^.*obj_.*\.[h|c|s]\r
\r
\r
+
+syntax: regexp
+^.project$
\ No newline at end of file
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+#include "Can.h"\r
+\r
+#ifndef USE_CAN_STUB
+#include "stm32f10x.h"\r
+#include "stm32f10x_can.h"
+#include "Cpu.h"\r
+#include "Mcu.h"\r
+#include "CanIf_Cbk.h"\r
+#include "Det.h"
+#if defined(USE_DEM)
+#include "Dem.h"\r
+#endif
+#include <assert.h>\r
+#include <stdlib.h>\r
+#include <string.h>\r
+#include "Os.h"
+#include "irq.h"\r
+#include "arc.h"
+\r
+
+/* CONFIGURATION NOTES\r
+ * ------------------------------------------------------------------\r
+ * - CanHandleType must be CAN_ARC_HANDLE_TYPE_BASIC\r
+ * i.e. CanHandleType=CAN_ARC_HANDLE_TYPE_FULL NOT supported\r
+ * i.e CanIdValue is NOT supported\r
+ * - All CanXXXProcessing must be CAN_ARC_PROCESS_TYPE_INTERRUPT\r
+ * ie CAN_ARC_PROCESS_TYPE_POLLED not supported\r
+ * - HOH's for Tx are global and Rx are for each controller\r
+ */\r
+\r
+/* IMPLEMENTATION NOTES\r
+ * -----------------------------------------------\r
+ * - A HOH us unique for a controller( not a config-set )\r
+ * - Hrh's are numbered for each controller from 0\r
+ * - loopback in HW NOT supported
+ * - Only one transmit mailbox is used because otherwise
+ * we cannot use tx_confirmation since there is no way to know
+ * which mailbox caused the tx interrupt. TP will need this feature.
+ * - Sleep,wakeup not fully implemented since other modules lack functionality\r
+ */\r
+\r
+/* ABBREVATIONS\r
+ * -----------------------------------------------\r
+ * - Can Hardware unit - One or multiple Can controllers of the same type.\r
+ * - Hrh - HOH with receive definitions\r
+ * - Hth - HOH with transmit definitions\r
+ *\r
+ */\r
+
+typedef CAN_TypeDef CAN_HW_t;\r
+//-------------------------------------------------------------------\r
+\r
+#define GET_CONTROLLER_CONFIG(_controller) \\r
+ &Can_Global.config->CanConfigSet->CanController[(_controller)]\r
+\r
+#define GET_CALLBACKS() \\r
+ (Can_Global.config->CanConfigSet->CanCallbacks)\r
+\r
+#define GET_PRIVATE_DATA(_controller) \\r
+ &CanUnit[_controller]\r
+\r
+#define GET_CONTROLLER_CNT() (CAN_CONTROLLER_CNT)\r
+\r
+//-------------------------------------------------------------------\r
+\r
+#if ( CAN_DEV_ERROR_DETECT == STD_ON )\r
+#define VALIDATE(_exp,_api,_err ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_CAN,0,_api,_err); \\r
+ return CAN_NOT_OK; \\r
+ }\r
+\r
+#define VALIDATE_NO_RV(_exp,_api,_err ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_CAN,0,_api,_err); \\r
+ return; \\r
+ }\r
+\r
+#define DET_REPORTERROR(_x,_y,_z,_q) Det_ReportError(_x, _y, _z, _q)\r
+#else\r
+#define VALIDATE(_exp,_api,_err )\r
+#define VALIDATE_NO_RV(_exp,_api,_err )\r
+#define DET_REPORTERROR(_x,_y,_z,_q)\r
+#endif\r
+
+#if defined(USE_DEM)
+#define VALIDATE_DEM_NO_RV(_exp,_err ) \
+ if( !(_exp) ) { \
+ Dem_ReportErrorStatus(_err, DEM_EVENT_STATUS_FAILED); \
+ return; \
+ }
+#else
+#define VALIDATE_DEM_NO_RV(_exp,_err )
+#endif\r
+
+//-------------------------------------------------------------------\r
+
+typedef enum\r
+{\r
+ CAN_UNINIT = 0,\r
+ CAN_READY\r
+} Can_DriverStateType;\r
+\r
+// Mapping between HRH and Controller//HOH\r
+typedef struct Can_Arc_ObjectHOHMapStruct\r
+{\r
+ CanControllerIdType CanControllerRef; // Reference to controller\r
+ const Can_HardwareObjectType* CanHOHRef; // Reference to HOH.\r
+} Can_Arc_ObjectHOHMapType;\r
+\r
+/* Type for holding global information used by the driver */\r
+typedef struct {\r
+ Can_DriverStateType initRun;\r
+\r
+ // Our config\r
+ const Can_ConfigType *config;\r
+\r
+ // One bit for each channel that is configured.\r
+ // Used to determine if validity of a channel\r
+ // 1 - configured\r
+ // 0 - NOT configured\r
+ uint32 configured;\r
+ // Maps the a channel id to a configured channel id\r
+ uint8 channelMap[CAN_CONTROLLER_CNT];\r
+\r
+ // This is a map that maps the HTH:s with the controller and Hoh. It is built\r
+ // during Can_Init and is used to make things faster during a transmit.\r
+ Can_Arc_ObjectHOHMapType CanHTHMap[NUM_OF_HTHS];\r
+} Can_GlobalType;\r
+\r
+// Global config\r
+Can_GlobalType Can_Global =\r
+{\r
+ .initRun = CAN_UNINIT,\r
+};\r
+\r
+/* Type for holding information about each controller */\r
+typedef struct {\r
+ CanIf_ControllerModeType state;\r
+ uint32 lock_cnt;\r
+\r
+ // Statistics\r
+ Can_Arc_StatisticsType stats;\r
+\r
+ // Data stored for Txconfirmation callbacks to CanIf\r
+ PduIdType swPduHandle; //\r
+} Can_UnitType;\r
+\r
+Can_UnitType CanUnit[CAN_CONTROLLER_CNT] =\r
+{\r
+ {\r
+ .state = CANIF_CS_UNINIT,\r
+ },
+ {\r
+ .state = CANIF_CS_UNINIT,\r
+ },\r
+};\r
+\r
+//-------------------------------------------------------------------\r
+static CAN_HW_t * GetController(int unit)
+{
+ return ((CAN_HW_t *)(CAN1_BASE + unit*0x400));
+}\r
+
+//-------------------------------------------------------------------\r
+/**\r
+ * Function that finds the Hoh( HardwareObjectHandle ) from a Hth\r
+ * A HTH may connect to one or several HOH's. Just find the first one.\r
+ *\r
+ * @param hth The transmit handle\r
+ * @returns Ptr to the Hoh\r
+ */\r
+static const Can_HardwareObjectType * Can_FindHoh( Can_Arc_HTHType hth , uint32* controller)\r
+{\r
+ const Can_HardwareObjectType *hohObj;\r
+ const Can_Arc_ObjectHOHMapType *map;\r
+ const Can_ControllerConfigType *canHwConfig;\r
+\r
+ map = &Can_Global.CanHTHMap[hth];\r
+\r
+ // Verify that this is the correct map\r
+ if (map->CanHOHRef->CanObjectId != hth)\r
+ {\r
+ DET_REPORTERROR(MODULE_ID_CAN, 0, 0x6, CAN_E_PARAM_HANDLE);\r
+ }\r
+\r
+ canHwConfig= GET_CONTROLLER_CONFIG(Can_Global.channelMap[map->CanControllerRef]);\r
+\r
+ hohObj = map->CanHOHRef;\r
+\r
+ // Verify that this is the correct Hoh type\r
+ if ( hohObj->CanObjectType == CAN_OBJECT_TYPE_TRANSMIT)\r
+ {\r
+ *controller = map->CanControllerRef;\r
+ return hohObj;\r
+ }\r
+\r
+ DET_REPORTERROR(MODULE_ID_CAN, 0, 0x6, CAN_E_PARAM_HANDLE);\r
+\r
+ return NULL;\r
+}\r
+\r
+//-------------------------------------------------------------------\r
+\r
+static void Can_RxIsr( int unit );
+static void Can_TxIsr( int unit );
+static void Can_ErrIsr( int unit );\r
+
+void Can_1_RxIsr( void ) { Can_RxIsr(CAN_CTRL_1); }
+void Can_2_RxIsr( void ) { Can_RxIsr(CAN_CTRL_2); }
+
+void Can_1_TxIsr( void ) { Can_TxIsr(CAN_CTRL_1); }
+void Can_2_TxIsr( void ) { Can_TxIsr(CAN_CTRL_2); }
+
+void Can_1_ErrIsr( void ) { Can_ErrIsr(CAN_CTRL_1); }
+void Can_2_ErrIsr( void ) { Can_ErrIsr(CAN_CTRL_2); }
+\r
+
+//-------------------------------------------------------------------\r
+
+// Uses 25.4.5.1 Transmission Abort Mechanism
+static void Can_AbortTx( CAN_HW_t *canHw, Can_UnitType *canUnit ) {
+ // Disable Transmit irq
+
+ // check if mb's empty
+
+ // Abort all pending mb's
+
+ // Wait for mb's being emptied
+}
+
+/**
+ * Hardware wake ISR for CAN
+ *
+ * @param unit CAN controller number( from 0 )
+ */
+static void Can_WakeIsr( int unit ) {
+ if (GET_CALLBACKS()->ControllerWakeup != NULL)
+ {
+ GET_CALLBACKS()->ControllerWakeup(unit);
+ }
+ // 269,270,271
+ Can_SetControllerMode(unit, CAN_T_STOP);
+
+ // TODO EcuM_CheckWakeup();
+}\r
+
+/**\r
+ * Hardware error ISR for CAN\r
+ *\r
+ * @param unit CAN controller number( from 0 )\r
+ */\r
+static void Can_ErrIsr( int unit ) {\r
+ CAN_HW_t *canHw = GetController(unit);\r
+ Can_UnitType *canUnit = GET_PRIVATE_DATA(unit);
+ Can_Arc_ErrorType err;\r
+ err.R = 0;
+
+ // Check wake up
+ if(SET == CAN_GetITStatus(canHw, CAN_IT_WKU)){\r
+ Can_WakeIsr(unit);\r
+ CAN_ClearITPendingBit(canHw, CAN_IT_WKU);
+ }
+
+ if(SET == CAN_GetITStatus(canHw, CAN_IT_BOF)){
+ canUnit->stats.boffCnt++;
+ if (GET_CALLBACKS()->ControllerBusOff != NULL)
+ {
+ GET_CALLBACKS()->ControllerBusOff(unit);
+ }
+ Can_SetControllerMode(unit, CAN_T_STOP); // CANIF272
+
+ Can_AbortTx( canHw, canUnit ); // CANIF273
+
+ // Clear int
+ CAN_ClearITPendingBit(canHw, CAN_IT_BOF);
+ }
+
+ if (err.R != 0)
+ {
+ if (GET_CALLBACKS()->Arc_Error != NULL)
+ {
+ GET_CALLBACKS()->Arc_Error( unit, err );
+ }
+ }
+}\r
+\r
+//-------------------------------------------------------------------\r
+\r
+/**\r
+ * ISR for CAN. Normal Rx/operation\r
+ *\r
+ * @param unit CAN controller number( from 0 )\r
+ */\r
+static void Can_RxIsr(int unit) {\r
+\r
+ CAN_HW_t *canHw= GetController(unit);\r
+ const Can_ControllerConfigType *canHwConfig= GET_CONTROLLER_CONFIG(Can_Global.channelMap[unit]);\r
+ Can_UnitType *canUnit = GET_PRIVATE_DATA(unit);\r
+ const Can_HardwareObjectType *hohObj;
+
+ CanRxMsg RxMessage;
+
+ RxMessage.StdId=0x00;
+ RxMessage.ExtId=0x00;
+ RxMessage.IDE=0;
+ RxMessage.DLC=0;
+ RxMessage.FMI=0;
+ RxMessage.Data[0]=0x00;
+ RxMessage.Data[1]=0x00;
+ CAN_Receive(canHw,CAN_FIFO0, &RxMessage);\r
+
+ // Loop over all the Hoh's\r
+ hohObj= canHwConfig->Can_Arc_Hoh;\r
+ --hohObj;\r
+ do {\r
+ ++hohObj;\r
+\r
+ if (hohObj->CanObjectType == CAN_OBJECT_TYPE_RECEIVE)\r
+ {\r
+ Can_IdType id=0;
+
+ // According to autosar MSB shuould be set if extended\r
+ if (RxMessage.IDE != CAN_ID_STD) {
+ id = RxMessage.ExtId;
+ id |= 0x80000000;\r
+ } else {
+ id = RxMessage.StdId;
+ }\r
+\r
+ if (GET_CALLBACKS()->RxIndication != NULL)\r
+ {\r
+ GET_CALLBACKS()->RxIndication(hohObj->CanObjectId,\r
+ id,\r
+ RxMessage.DLC,\r
+ (uint8 *)&RxMessage.Data[0] ); // Next layer will copy\r
+ }\r
+ // Increment statistics\r
+ canUnit->stats.rxSuccessCnt++;\r
+ }\r
+ } while ( !hohObj->Can_Arc_EOL);\r
+}\r
+
+/**
+ * ISR for CAN. Normal Tx operation
+ *
+ * @param unit CAN controller number( from 0 )
+ */
+static void Can_TxIsr(int unit) {
+ CAN_HW_t *canHw= GetController(unit);
+ const Can_ControllerConfigType *canHwConfig= GET_CONTROLLER_CONFIG(Can_Global.channelMap[unit]);
+ Can_UnitType *canUnit = GET_PRIVATE_DATA(unit);
+ const Can_HardwareObjectType *hohObj;
+
+ // Loop over all the Hoh's
+ hohObj= canHwConfig->Can_Arc_Hoh;
+ --hohObj;
+ do {
+ ++hohObj;
+
+ if (hohObj->CanObjectType == CAN_OBJECT_TYPE_TRANSMIT)
+ {
+ if (GET_CALLBACKS()->TxConfirmation != NULL)
+ {
+ GET_CALLBACKS()->TxConfirmation(canUnit->swPduHandle);
+ }
+ canUnit->swPduHandle = 0; // Is this really necessary ??
+
+ // Clear Tx interrupt
+ CAN_ClearITPendingBit(canHw,CAN_IT_RQCP0);
+ CAN_ClearITPendingBit(canHw,CAN_IT_RQCP1);
+ CAN_ClearITPendingBit(canHw,CAN_IT_RQCP2);
+ }
+ } while ( !hohObj->Can_Arc_EOL);
+}\r
+
+//-------------------------------------------------------------------\r
+\r
+#define INSTALL_HANDLERS(_can_name,_sce,_rx,_tx) \\r
+ do { \\r
+ TaskType tid; \\r
+ tid = Os_Arc_CreateIsr(_can_name ## _ErrIsr,2/*prio*/,"Can"); \
+ Irq_AttachIsr2(tid,NULL,_sce); \
+ tid = Os_Arc_CreateIsr(_can_name ## _RxIsr,2/*prio*/,"Can"); \
+ Irq_AttachIsr2(tid,NULL,_rx); \
+ tid = Os_Arc_CreateIsr(_can_name ## _TxIsr,2/*prio*/,"Can"); \
+ Irq_AttachIsr2(tid,NULL,_tx); \
+ } while(0);\r
+\r
+// This initiates ALL can controllers\r
+void Can_Init( const Can_ConfigType *config ) {\r
+ Can_UnitType *canUnit;\r
+ const Can_ControllerConfigType *canHwConfig;\r
+ uint32 ctlrId;\r
+\r
+ VALIDATE_NO_RV( (Can_Global.initRun == CAN_UNINIT), 0x0, CAN_E_TRANSITION );\r
+ VALIDATE_NO_RV( (config != NULL ), 0x0, CAN_E_PARAM_POINTER );\r
+\r
+ // Save config\r
+ Can_Global.config = config;\r
+ Can_Global.initRun = CAN_READY;\r
+\r
+ for (int configId=0; configId < CAN_ARC_CTRL_CONFIG_CNT; configId++) {\r
+ canHwConfig = GET_CONTROLLER_CONFIG(configId);\r
+ ctlrId = canHwConfig->CanControllerId;\r
+\r
+ // Assign the configuration channel used later..\r
+ Can_Global.channelMap[canHwConfig->CanControllerId] = configId;\r
+ Can_Global.configured |= (1<<ctlrId);\r
+\r
+ canUnit = GET_PRIVATE_DATA(ctlrId);\r
+ canUnit->state = CANIF_CS_STOPPED;\r
+\r
+ canUnit->lock_cnt = 0;\r
+\r
+ // Clear stats\r
+ memset(&canUnit->stats, 0, sizeof(Can_Arc_StatisticsType));
+
+ // Note!
+ // Could install handlers depending on HW objects to trap more errors
+ // in configuration
+ switch( canHwConfig->CanControllerId ) {
+#ifndef STM32F10X_CL
+ case CAN_CTRL_1:
+ INSTALL_HANDLERS(Can_1, CAN1_SCE_IRQn, USB_LP_CAN1_RX0_IRQn, USB_HP_CAN1_TX_IRQn); break;
+#else
+ case CAN_CTRL_1:
+ INSTALL_HANDLERS(Can_1, CAN1_SCE_IRQn, CAN1_RX0_IRQn, CAN1_TX_IRQn); break;
+ case CAN_CTRL_2:
+ INSTALL_HANDLERS(Can_2, CAN2_SCE_IRQn, CAN2_RX0_IRQn, CAN2_TX_IRQn); break;
+#endif
+ default:
+ assert(0);
+ }\r
+\r
+ Can_InitController(ctlrId, canHwConfig);\r
+\r
+ // Loop through all Hoh:s and map them into the HTHMap\r
+ const Can_HardwareObjectType* hoh;\r
+ hoh = canHwConfig->Can_Arc_Hoh;\r
+ hoh--;\r
+ do\r
+ {\r
+ hoh++;\r
+\r
+ if (hoh->CanObjectType == CAN_OBJECT_TYPE_TRANSMIT)\r
+ {\r
+ Can_Global.CanHTHMap[hoh->CanObjectId].CanControllerRef = canHwConfig->CanControllerId;\r
+ Can_Global.CanHTHMap[hoh->CanObjectId].CanHOHRef = hoh;\r
+ }\r
+ } while (!hoh->Can_Arc_EOL);\r
+ }\r
+ return;\r
+}\r
+\r
+// Unitialize the module\r
+void Can_DeInit()\r
+{\r
+ Can_UnitType *canUnit;\r
+ const Can_ControllerConfigType *canHwConfig;\r
+ uint32 ctlrId;\r
+\r
+ for (int configId=0; configId < CAN_ARC_CTRL_CONFIG_CNT; configId++) {\r
+ canHwConfig = GET_CONTROLLER_CONFIG(configId);\r
+ ctlrId = canHwConfig->CanControllerId;\r
+\r
+ canUnit = GET_PRIVATE_DATA(ctlrId);\r
+ canUnit->state = CANIF_CS_UNINIT;\r
+\r
+ Can_DisableControllerInterrupts(ctlrId);\r
+\r
+ canUnit->lock_cnt = 0;\r
+\r
+ // Clear stats\r
+ memset(&canUnit->stats, 0, sizeof(Can_Arc_StatisticsType));\r
+ }\r
+\r
+ Can_Global.config = NULL;\r
+ Can_Global.initRun = CAN_UNINIT;\r
+\r
+ return;\r
+}\r
+\r
+void Can_InitController( uint8 controller, const Can_ControllerConfigType *config)
+{\r
+ CAN_HW_t *canHw;\r
+ uint8_t tq;\r
+ uint8_t tqSync;
+ uint8_t tq1;
+ uint8_t tq2;\r
+ uint32_t clock;\r
+ Can_UnitType *canUnit;\r
+ uint8 cId = controller;\r
+ const Can_ControllerConfigType *canHwConfig;\r
+ const Can_HardwareObjectType *hohObj;\r
+\r
+ VALIDATE_NO_RV( (Can_Global.initRun == CAN_READY), 0x2, CAN_E_UNINIT );\r
+ VALIDATE_NO_RV( (config != NULL ), 0x2,CAN_E_PARAM_POINTER);\r
+ VALIDATE_NO_RV( (controller < GET_CONTROLLER_CNT()), 0x2, CAN_E_PARAM_CONTROLLER );\r
+\r
+ canUnit = GET_PRIVATE_DATA(controller);\r
+\r
+ VALIDATE_NO_RV( (canUnit->state==CANIF_CS_STOPPED), 0x2, CAN_E_TRANSITION );\r
+\r
+ canHw = GetController(cId);\r
+ canHwConfig = GET_CONTROLLER_CONFIG(Can_Global.channelMap[cId]);\r
+\r
+ // Start this baby up
+ CAN_DeInit(canHw);\r
+
+ /* CAN filter init. We set up two filters - one for the master (CAN1) and
+ * one for the slave (CAN2)
+ *
+ * CAN_SlaveStartBank(n) denotes which filter is the first of the slave.
+ *
+ * The filter registers reside in CAN1 and is shared to CAN2, so we only need
+ * to set up this once.
+ */
+
+ // We let all frames in and do the filtering in software.
+ CAN_FilterInitTypeDef CAN_FilterInitStructure;
+ CAN_FilterInitStructure.CAN_FilterMode=CAN_FilterMode_IdMask;
+ CAN_FilterInitStructure.CAN_FilterScale=CAN_FilterScale_32bit;
+ CAN_FilterInitStructure.CAN_FilterIdHigh=0x0000;
+ CAN_FilterInitStructure.CAN_FilterIdLow=0x0000;
+ CAN_FilterInitStructure.CAN_FilterMaskIdHigh=0x0000;
+ CAN_FilterInitStructure.CAN_FilterMaskIdLow=0x0000;
+ CAN_FilterInitStructure.CAN_FilterFIFOAssignment=CAN_FIFO0;
+ CAN_FilterInitStructure.CAN_FilterActivation=ENABLE;
+
+ // Init filter 0 (CAN1/master)
+ CAN_FilterInitStructure.CAN_FilterNumber=0;
+ CAN_FilterInit(&CAN_FilterInitStructure);
+
+ // Init filter 1 (CAN2/slave)
+ CAN_FilterInitStructure.CAN_FilterNumber=1;
+ CAN_FilterInit(&CAN_FilterInitStructure);
+
+ // Set which filter to use for CAN2.
+ CAN_SlaveStartBank(1);
+
+ // acceptance filters
+ hohObj = canHwConfig->Can_Arc_Hoh;
+ --hohObj;
+ do {
+ ++hohObj;
+ if (hohObj->CanObjectType == CAN_OBJECT_TYPE_RECEIVE)
+ {
+ // TODO Hw filtering
+ }
+ }while( !hohObj->Can_Arc_EOL );\r
+
+ // Clock calucation\r
+ // -------------------------------------------------------------------\r
+ //\r
+ // * 1 TQ = Sclk period( also called SCK )\r
+ // * Ftq = Fcanclk / ( PRESDIV + 1 ) = Sclk\r
+ // ( Fcanclk can come from crystal or from the peripheral dividers )\r
+ //\r
+ // -->\r
+ // TQ = 1/Ftq = (PRESDIV+1)/Fcanclk --> PRESDIV = (TQ * Fcanclk - 1 )\r
+ // TQ is between 8 and 25\r
+ clock = McuE_GetSystemClock()/2;
+
+ tqSync = config->CanControllerPropSeg + 1;
+ tq1 = config->CanControllerSeg1 + 1;\r
+ tq2 = config->CanControllerSeg2 + 1;\r
+ tq = tqSync + tq1 + tq2;\r
+\r
+ // Check TQ limitations..
+ VALIDATE_DEM_NO_RV(( (tq1>=1) && (tq1<=16)), CAN_E_TIMEOUT );\r
+ VALIDATE_DEM_NO_RV(( (tq2>=1) && (tq2<=8)), CAN_E_TIMEOUT );\r
+ VALIDATE_DEM_NO_RV(( (tq>=1) && (tq<5 )), CAN_E_TIMEOUT );
+
+ CAN_InitTypeDef CAN_InitStructure;
+ CAN_StructInit(&CAN_InitStructure);
+
+ /* CAN cell init */
+ CAN_InitStructure.CAN_TTCM=DISABLE;
+ CAN_InitStructure.CAN_ABOM=ENABLE;
+ CAN_InitStructure.CAN_AWUM=ENABLE;
+ CAN_InitStructure.CAN_NART=DISABLE;
+ CAN_InitStructure.CAN_RFLM=DISABLE;
+ CAN_InitStructure.CAN_TXFP=DISABLE;
+ CAN_InitStructure.CAN_Mode=CAN_Mode_Normal;//CAN_Mode_LoopBack;
+
+ CAN_InitStructure.CAN_SJW=config->CanControllerPropSeg;
+ CAN_InitStructure.CAN_BS1=config->CanControllerSeg1;
+ CAN_InitStructure.CAN_BS2=config->CanControllerSeg2;
+ CAN_InitStructure.CAN_Prescaler= clock/(config->CanControllerBaudRate*1000*tq);
+
+ if(CANINITOK != CAN_Init(canHw,&CAN_InitStructure))
+ {
+ return;
+ }\r
+
+ canUnit->state = CANIF_CS_STOPPED;\r
+ Can_EnableControllerInterrupts(cId);\r
+\r
+ return;\r
+}\r
+\r
+\r
+Can_ReturnType Can_SetControllerMode( uint8 controller, Can_StateTransitionType transition ) {\r
+ CAN_HW_t *canHw;\r
+ Can_ReturnType rv = CAN_OK;\r
+ VALIDATE( (controller < GET_CONTROLLER_CNT()), 0x3, CAN_E_PARAM_CONTROLLER );\r
+\r
+ Can_UnitType *canUnit = GET_PRIVATE_DATA(controller);\r
+\r
+ VALIDATE( (canUnit->state!=CANIF_CS_UNINIT), 0x3, CAN_E_UNINIT );\r
+ canHw = GetController(controller);\r
+\r
+ switch(transition )\r
+ {\r
+ case CAN_T_START:\r
+ canUnit->state = CANIF_CS_STARTED;\r
+ imask_t state = McuE_EnterCriticalSection();\r
+ if (canUnit->lock_cnt == 0){ // REQ CAN196\r
+ Can_EnableControllerInterrupts(controller);
+ }\r
+ McuE_ExitCriticalSection(state);\r
+ break;\r
+ case CAN_T_WAKEUP:
+ VALIDATE(canUnit->state == CANIF_CS_SLEEP, 0x3, CAN_E_TRANSITION);
+ CAN_WakeUp(canHw);
+ canUnit->state = CANIF_CS_STOPPED;
+ break;\r
+ case CAN_T_SLEEP: //CAN258, CAN290\r
+ // Should be reported to DEM but DET is the next best\r
+ VALIDATE(canUnit->state == CANIF_CS_STOPPED, 0x3, CAN_E_TRANSITION);\r
+ CAN_Sleep(canHw);
+ canUnit->state = CANIF_CS_SLEEP;
+ break;
+ case CAN_T_STOP:\r
+ // Stop\r
+ canUnit->state = CANIF_CS_STOPPED;\r
+ Can_AbortTx( canHw, canUnit ); // CANIF282\r
+ break;\r
+ default:\r
+ // Should be reported to DEM but DET is the next best\r
+ VALIDATE(canUnit->state == CANIF_CS_STOPPED, 0x3, CAN_E_TRANSITION);\r
+ break;\r
+ }\r
+\r
+ return rv;\r
+}\r
+\r
+void Can_DisableControllerInterrupts( uint8 controller )\r
+{\r
+ Can_UnitType *canUnit;\r
+ CAN_HW_t *canHw;\r
+\r
+ VALIDATE_NO_RV( (controller < GET_CONTROLLER_CNT()), 0x4, CAN_E_PARAM_CONTROLLER );\r
+\r
+ canUnit = GET_PRIVATE_DATA(controller);\r
+\r
+ VALIDATE_NO_RV( (canUnit->state!=CANIF_CS_UNINIT), 0x4, CAN_E_UNINIT );\r
+\r
+ imask_t state = McuE_EnterCriticalSection();\r
+ if(canUnit->lock_cnt > 0 )\r
+ {\r
+ // Interrupts already disabled\r
+ canUnit->lock_cnt++;\r
+ McuE_ExitCriticalSection(state);\r
+ return;\r
+ }\r
+ canUnit->lock_cnt++;\r
+ McuE_ExitCriticalSection(state);\r
+\r
+ /* Don't try to be intelligent, turn everything off */\r
+ canHw = GetController(controller);\r
+\r
+ /* Turn off the tx interrupt mailboxes */\r
+ CAN_ITConfig(canHw, CAN_IT_TME, DISABLE);\r
+
+ /* Turn off the bus off/tx warning/rx warning and error and rx */\r
+ CAN_ITConfig(canHw, CAN_IT_FMP0 | CAN_IT_BOF | CAN_IT_ERR | CAN_IT_WKU, DISABLE);
+}\r
+\r
+void Can_EnableControllerInterrupts( uint8 controller ) {\r
+ Can_UnitType *canUnit;\r
+ CAN_HW_t *canHw;\r
+ const Can_ControllerConfigType *canHwConfig;\r
+ VALIDATE_NO_RV( (controller < GET_CONTROLLER_CNT()), 0x5, CAN_E_PARAM_CONTROLLER );\r
+\r
+ canUnit = GET_PRIVATE_DATA(controller);\r
+\r
+ VALIDATE_NO_RV( (canUnit->state!=CANIF_CS_UNINIT), 0x5, CAN_E_UNINIT );\r
+\r
+ imask_t state = McuE_EnterCriticalSection();\r
+ if( canUnit->lock_cnt > 1 )\r
+ {\r
+ // IRQ should still be disabled so just decrement counter\r
+ canUnit->lock_cnt--;\r
+ McuE_ExitCriticalSection(state);\r
+ return;\r
+ } else if (canUnit->lock_cnt == 1)\r
+ {\r
+ canUnit->lock_cnt = 0;\r
+ }\r
+ McuE_ExitCriticalSection(state);\r
+\r
+ canHw = GetController(controller);\r
+\r
+ canHwConfig = GET_CONTROLLER_CONFIG(Can_Global.channelMap[controller]);\r
+\r
+ if( canHwConfig->CanRxProcessing == CAN_ARC_PROCESS_TYPE_INTERRUPT ) {\r
+ /* Turn on the rx interrupt */\r
+ CAN_ITConfig(canHw, CAN_IT_FMP0, ENABLE);
+ }
+ if( canHwConfig->CanTxProcessing == CAN_ARC_PROCESS_TYPE_INTERRUPT ) {
+ /* Turn on the tx interrupt mailboxes */
+ CAN_ITConfig(canHw, CAN_IT_TME, ENABLE);
+ }\r
+\r
+ // BusOff here represents all errors and warnings\r
+ if( canHwConfig->CanBusOffProcessing == CAN_ARC_PROCESS_TYPE_INTERRUPT ) {\r
+ /* Turn on the bus off/tx warning/rx warning and error and rx */
+ CAN_ITConfig(canHw, CAN_IT_BOF | CAN_IT_ERR | CAN_IT_WKU, ENABLE);
+ }\r
+\r
+ return;\r
+}\r
+
+Can_ReturnType Can_Write( Can_Arc_HTHType hth, Can_PduType *pduInfo ) {\r
+ Can_ReturnType rv = CAN_OK;\r
+ CAN_HW_t *canHw;\r
+ const Can_HardwareObjectType *hohObj;\r
+ const Can_ControllerConfigType *canHwConfig;
+ uint32 controller;\r
+ uint32 oldMsr;\r
+
+ VALIDATE( (Can_Global.initRun == CAN_READY), 0x6, CAN_E_UNINIT );\r
+ VALIDATE( (pduInfo != NULL), 0x6, CAN_E_PARAM_POINTER );\r
+ VALIDATE( (pduInfo->length <= 8), 0x6, CAN_E_PARAM_DLC );\r
+ VALIDATE( (hth < NUM_OF_HTHS ), 0x6, CAN_E_PARAM_HANDLE );\r
+\r
+ hohObj = Can_FindHoh(hth, &controller);\r
+ if (hohObj == NULL)\r
+ return CAN_NOT_OK;\r
+\r
+ Can_UnitType *canUnit = GET_PRIVATE_DATA(controller);\r
+\r
+ canHw = GetController(controller);\r
+ oldMsr = McuE_EnterCriticalSection();\r
+
+ CanTxMsg TxMessage;
+
+ TxMessage.RTR=CAN_RTR_DATA;
+ TxMessage.DLC=pduInfo->length;
+
+ memcpy(TxMessage.Data, pduInfo->sdu, pduInfo->length);
+
+ if (hohObj->CanIdType == CAN_ID_TYPE_EXTENDED) {
+ TxMessage.IDE=CAN_ID_EXT;
+ TxMessage.ExtId=pduInfo->id;
+ } else {
+ TxMessage.IDE=CAN_ID_STD;
+ TxMessage.StdId=pduInfo->id;
+ }\r
+
+ // check for any free box\r
+ if(CAN_Transmit(canHw,&TxMessage) != CAN_NO_MB) {
+ canHwConfig = GET_CONTROLLER_CONFIG(Can_Global.channelMap[controller]);
+
+ if( canHwConfig->CanTxProcessing == CAN_ARC_PROCESS_TYPE_INTERRUPT ) {
+ /* Turn on the tx interrupt mailboxes */
+ CAN_ITConfig(canHw,CAN_IT_TME, ENABLE);
+ }
+
+ // Increment statistics
+ canUnit->stats.txSuccessCnt++;\r
+
+ // Store pdu handle in unit to be used by TxConfirmation\r
+ canUnit->swPduHandle = pduInfo->swPduHandle;\r
+ } else {\r
+ rv = CAN_BUSY;\r
+ }\r
+ McuE_ExitCriticalSection(oldMsr);\r
+\r
+ return rv;\r
+}\r
+\r
+void Can_MainFunction_Read( void ) {\r
+\r
+ /* NOT SUPPORTED */\r
+}\r
+\r
+void Can_MainFunction_BusOff( void ) {\r
+ /* Bus-off polling events */\r
+\r
+ /* NOT SUPPORTED */\r
+}\r
+\r
+void Can_MainFunction_Wakeup( void ) {\r
+ /* Wakeup polling events */\r
+\r
+ /* NOT SUPPORTED */\r
+}\r
+\r
+\r
+/**\r
+ * Get send/receive/error statistics for a controller\r
+ *\r
+ * @param controller The controller\r
+ * @param stats Pointer to data to copy statistics to\r
+ */\r
+\r
+void Can_Arc_GetStatistics( uint8 controller, Can_Arc_StatisticsType *stats)\r
+{\r
+ Can_UnitType *canUnit = GET_PRIVATE_DATA(controller);\r
+ *stats = canUnit->stats;\r
+}\r
+\r
+#else // Stub all functions for use in simulator environment\r
+\r
+#include "debug.h"\r
+\r
+void Can_Init( const Can_ConfigType *Config )\r
+{\r
+ // Do initial configuration of layer here\r
+}\r
+\r
+void Can_InitController( uint8 controller, const Can_ControllerConfigType *config)\r
+{\r
+ // Do initialisation of controller here.\r
+}\r
+\r
+Can_ReturnType Can_SetControllerMode( uint8 Controller, Can_StateTransitionType transition )\r
+{\r
+ // Turn on off controller here depending on transition\r
+ return E_OK;\r
+}\r
+\r
+Can_ReturnType Can_Write( Can_Arc_HTHType hth, Can_PduType *pduInfo )\r
+{\r
+ // Write to mailbox on controller here.\r
+ DEBUG(DEBUG_MEDIUM, "Can_Write(stub): Received data ");\r
+ for (int i = 0; i < pduInfo->length; i++) {\r
+ DEBUG(DEBUG_MEDIUM, "%d ", pduInfo->sdu[i]);\r
+ }\r
+ DEBUG(DEBUG_MEDIUM, "\n");\r
+\r
+ return E_OK;\r
+}\r
+\r
+extern void CanIf_RxIndication(uint8 Hrh, Can_IdType CanId, uint8 CanDlc, const uint8 *CanSduPtr);\r
+Can_ReturnType Can_ReceiveAFrame()\r
+{\r
+ // This function is not part of autosar but needed to feed the stack with data\r
+ // from the mailboxes. Normally this is an interrup but probably not in the PCAN case.\r
+ uint8 CanSduData[] = {1,2,1,0,0,0,0,0};\r
+ CanIf_RxIndication(CAN_HRH_0_1, 3, 8, CanSduData);\r
+\r
+ return E_OK;\r
+}\r
+\r
+void Can_DisableControllerInterrupts( uint8 controller )\r
+{\r
+}\r
+\r
+void Can_EnableControllerInterrupts( uint8 controller )\r
+{\r
+}\r
+\r
+\r
+// Hth - for Flexcan, the hardware message box number... .We don't care\r
+void Can_Cbk_CheckWakeup( uint8 controller ){}\r
+\r
+void Can_MainFunction_Write( void ){}\r
+void Can_MainFunction_Read( void ){}\r
+void Can_MainFunction_BusOff( void ){}\r
+void Can_MainFunction_Wakeup( void ){}\r
+\r
+void Can_Arc_GetStatistics( uint8 controller, Can_Arc_StatisticsType * stat){}\r
+\r
+#endif\r
+\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "Std_Types.h"\r
+#include "Dio.h"\r
+#include "Det.h"\r
+#include <string.h>\r
+#include "stm32f10x_gpio.h"\r
+\r
+typedef GPIO_TypeDef* GPIO_TypeDefPtr;\r
+const GPIO_TypeDefPtr GPIO_ports[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF };\r
+\r
+#define DIO_GET_PORT_FROM_CHANNEL_ID(_channelId) (_channelId / 16)\r
+#define DIO_GET_BIT_FROM_CHANNEL_ID(_channelId) (1 << (_channelId % 16))\r
+\r
+#if ( DIO_VERSION_INFO_API == STD_ON )\r
+static Std_VersionInfoType _Dio_VersionInfo =\r
+{\r
+ .vendorID = (uint16)1,\r
+ .moduleID = (uint16)1,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)DIO_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)DIO_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)DIO_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)DIO_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)DIO_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)DIO_AR_PATCH_VERSION,\r
+};\r
+#endif\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+static int Channel_Config_Contains(Dio_ChannelType channelId)\r
+{\r
+ Dio_ChannelType* ch_ptr=(Dio_ChannelType*)CHANNEL_PTR;\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*ch_ptr)\r
+ {\r
+ if (*ch_ptr==channelId)\r
+ {\r
+ rv=1;\r
+ break;\r
+ }\r
+ ch_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Port_Config_Contains(Dio_PortType portId)\r
+{\r
+ Dio_PortType* port_ptr=(Dio_PortType*)PORT_PTR;\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*port_ptr)\r
+ {\r
+ if (*port_ptr==portId)\r
+ { rv=1; break;}\r
+ port_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Channel_Group_Config_Contains(const Dio_ChannelGroupType* _channelGroupIdPtr)\r
+{\r
+ Dio_ChannelGroupType* chGrp_ptr=(Dio_ChannelGroupType*)CHANNEL_GRP_PTR;\r
+ int rv=0;\r
+\r
+ while (DIO_END_OF_LIST!=chGrp_ptr->port)\r
+ {\r
+ if (chGrp_ptr->port==_channelGroupIdPtr->port&&\r
+ chGrp_ptr->offset==_channelGroupIdPtr->offset&&\r
+ chGrp_ptr->mask==_channelGroupIdPtr->mask)\r
+ { rv=1; break;}\r
+ chGrp_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+#define VALIDATE_CHANNEL(_channelId, _api) \\r
+ if(0==Channel_Config_Contains(channelId)) { \\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_CHANNEL_ID ); \\r
+ level = 0; \\r
+ goto cleanup; \\r
+ }\r
+#define VALIDATE_PORT(_portId, _api)\\r
+ if(0==Port_Config_Contains(_portId)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_PORT_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\\r
+ if(0==Channel_Group_Config_Contains(_channelGroupIdPtr)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_GROUP_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#else\r
+#define VALIDATE_CHANNEL(_channelId, _api)\r
+#define VALIDATE_PORT(_portId, _api)\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\r
+#endif\r
+\r
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
+{\r
+ Dio_LevelType level = 0;\r
+ VALIDATE_PORT(portId, DIO_READPORT_ID);\r
+\r
+ level = GPIO_ReadInputData(GPIO_ports[portId]);\r
+\r
+ cleanup: return level;\r
+}\r
+\r
+void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
+{\r
+ VALIDATE_PORT(portId, DIO_WRITEPORT_ID);\r
+\r
+ GPIO_Write(GPIO_ports[portId], level);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNEL(channelId, DIO_READCHANNEL_ID);\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId));\r
+ Dio_PortLevelType bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if ((portVal & bit) != STD_LOW){\r
+ level = STD_HIGH;\r
+ } else{\r
+ level = STD_LOW;\r
+ }\r
+\r
+ cleanup: return (level);\r
+}\r
+\r
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
+{\r
+ VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId));\r
+ Dio_PortLevelType bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if(level == STD_HIGH){\r
+ portVal |= bit;\r
+ }else{\r
+ portVal &= ~bit;\r
+ }\r
+\r
+ Dio_WritePort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId), portVal);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+\r
+Dio_PortLevelType Dio_ReadChannelGroup(\r
+ const Dio_ChannelGroupType *channelGroupIdPtr)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_READCHANNELGROUP_ID);\r
+\r
+ // Get masked values\r
+ level = Dio_ReadPort(channelGroupIdPtr->port) & channelGroupIdPtr->mask;\r
+\r
+ // Shift down\r
+ level = level >> channelGroupIdPtr->offset;\r
+\r
+ cleanup: return level;\r
+}\r
+\r
+void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
+ Dio_PortLevelType level)\r
+{\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_WRITECHANNELGROUP_ID);\r
+\r
+ // Shift up and apply mask so that no unwanted bits are affected\r
+ level = (level << channelGroupIdPtr->offset) & channelGroupIdPtr->mask;\r
+\r
+ // Read port and clear out masked bits\r
+ Dio_PortLevelType portVal = Dio_ReadPort(channelGroupIdPtr->port) & (~channelGroupIdPtr->mask);\r
+\r
+ // Or in the upshifted masked level\r
+ portVal |= level;\r
+\r
+ Dio_WritePort(channelGroupIdPtr->port, portVal);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+#if (DIO_VERSION_INFO_API == STD_ON)\r
+void Dio_GetVersionInfo(Std_VersionInfoType *versionInfo)\r
+{\r
+ memcpy(versionInfo, &_Dio_VersionInfo, sizeof(Std_VersionInfoType));\r
+}\r
+#endif\r
+\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "stm32f10x_flash.h"\r
+#include "Fls.h"\r
+\r
+static Fls_ConfigType const *flsConfigPtr;\r
+\r
+void Fls_Init(const Fls_ConfigType *ConfigPtr)\r
+{\r
+ flsConfigPtr = ConfigPtr;\r
+}\r
+\r
+Std_ReturnType Fls_Erase(Fls_AddressType TargetAddress, Fls_LengthType Length)\r
+{\r
+ Fls_AddressType pageStart = 0;\r
+ Fls_AddressType erased = 0;\r
+ u32 page = 0;\r
+ u32 pageIndex;\r
+\r
+ /* Unlock the Flash Program Erase controller */\r
+ FLASH_Unlock();\r
+ /* Clear All pending flags */\r
+ FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_PGERR | FLASH_FLAG_WRPRTERR);\r
+\r
+ /* Find first sector. */\r
+ page = (TargetAddress - flsConfigPtr->FlsSectorList[0].FlsSectorStartaddress) / flsConfigPtr->FlsSectorList[0].FlsPageSize;\r
+ pageStart = flsConfigPtr->FlsSectorList[0].FlsSectorStartaddress + page * flsConfigPtr->FlsSectorList[0].FlsPageSize;\r
+ //page = Length / flsConfigPtr->FlsSectorList[0].FlsPageSize;\r
+\r
+ /* Erase the pages... */\r
+ for (pageIndex = page; erased < Length; pageIndex++)\r
+ {\r
+ volatile FLASH_Status status = FLASH_BUSY;\r
+ while(status != FLASH_COMPLETE){\r
+ status = FLASH_ErasePage((uint32_t)pageStart);\r
+ }\r
+ erased += flsConfigPtr->FlsSectorList[0].FlsPageSize;\r
+ pageStart += flsConfigPtr->FlsSectorList[0].FlsPageSize;\r
+ }\r
+\r
+ return E_OK;\r
+}\r
+\r
+Std_ReturnType Fls_Write(Fls_AddressType TargetAddress, const uint8 *SourceAddressPtr, Fls_LengthType Length)\r
+{\r
+ FLASH_Status stResult;\r
+ Fls_LengthType len = Length;\r
+ Fls_AddressType addr = TargetAddress;\r
+ const uint8 *srcPtr = SourceAddressPtr;\r
+\r
+ while (len >= sizeof(uint32_t))\r
+ {\r
+ stResult = FLASH_ProgramWord((uint32_t)addr, (uint32_t)*(uint32_t *)srcPtr);\r
+ srcPtr += sizeof(uint32_t);\r
+ addr += sizeof(uint32_t);\r
+ len -= sizeof(uint32_t);\r
+ }\r
+\r
+ if (len == sizeof(uint16_t))\r
+ {\r
+ FLASH_ProgramHalfWord((uint32_t)addr, (uint16_t)*(uint16_t *)srcPtr);\r
+ srcPtr += sizeof(uint16_t);\r
+ addr += sizeof(uint16_t);\r
+ len -= sizeof(uint16_t);\r
+ }\r
+\r
+ return E_OK;\r
+}\r
}\r
\r
return NULL;\r
-}\r
-\r
-
+}
/**
* Identify the core, just to check that we have support for it.
*/\r
static uint32 Mcu_CheckCpu( void ) {\r
\r
- uint32 pvr;\r
+ uint32 pvr = SCB->CPUID;\r
//uint32 pir;\r
//cpu_info_t *cpuType;\r
core_info_t *coreType;\r
{
return (((uint32_t)pll - 2) << 18);
}
+static uint32_t GetPll2ValueFromMult(uint8_t pll)
+{
+ return (((uint32_t)pll - 2) << 8);
+}
/**
* Set bus clocks. SysClk,AHBClk,APB1Clk,APB2Clk
RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
- RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | GetPllValueFromMult(clockSettingsPtr->Pll2) |
+ RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | GetPll2ValueFromMult(clockSettingsPtr->Pll2) |
RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
/* Enable PLL2 */
}
}
+/**
+ * Initialize Peripherals clocks
+ */
+static void InitPerClocks()
+{
+ RCC->AHBENR |= McuPerClockConfigData.AHBClocksEnable;
+ RCC->APB1ENR |= McuPerClockConfigData.APB1ClocksEnable;
+ RCC->APB2ENR |= McuPerClockConfigData.APB2ClocksEnable;
+}
+
/**
* Initialize Flash, PLL and clocks.
*/
{\r
VALIDATE( ( NULL != configPtr ), MCU_INIT_SERVICE_ID, MCU_E_PARAM_CONFIG );\r
\r
- if( !SIMULATOR() ) {\r
- Mcu_CheckCpu();\r
- }\r
+#if !defined(USE_SIMULATOR)
+ Mcu_CheckCpu();\r
+#endif\r
\r
memset(&Mcu_Global.stats,0,sizeof(Mcu_Global.stats));\r
clockSettingsPtr = &Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting];\r
InitMcuClocks(clockSettingsPtr);
+
+ InitPerClocks(clockSettingsPtr);
\r
return E_OK;\r
}\r
VALIDATE_W_RV( ( 1 == Mcu_Global.initRun ), MCU_GETPLLSTATUS_SERVICE_ID, MCU_E_UNINIT, MCU_PLL_STATUS_UNDEFINED );
Mcu_PllStatusType rv;
- if (!SIMULATOR()) {
- if (RCC->CR & RCC_CR_PLLRDY) {
- rv = MCU_PLL_LOCKED;
- } else {
- rv = MCU_PLL_UNLOCKED;
- }
- } else {
- /* We are running on instruction set simulator. PLL is then always in sync... */
+#if !defined(USE_SIMULATOR)
+ if (RCC->CR & RCC_CR_PLLRDY) {
rv = MCU_PLL_LOCKED;
+ } else {
+ rv = MCU_PLL_UNLOCKED;
}
-
+#else
+ /* We are running on instruction set simulator. PLL is then always in sync... */
+ rv = MCU_PLL_LOCKED;
+#endif
return rv;
}\r
\r
}\r
\r
imask_t McuE_EnterCriticalSection()\r
-{\r
-#if 0\r
- uint32_t msr = get_msr();\r
- Irq_Disable();\r
- return msr;\r
-#endif\r
- return 0;\r
+{
+ uint32_t val;
+ Irq_Save(val);\r
+ return val;\r
}\r
\r
void McuE_ExitCriticalSection(uint32_t old_state)\r
{\r
-#if 0\r
- set_msr(old_state);\r
-#endif\r
+ Irq_Restore(old_state);
}\r
\r
/**\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include "Std_Types.h"\r
+#include "Port.h" /** @req PORT131 */\r
+#include "Det.h"\r
+#include "string.h"\r
+#include "stm32f10x_rcc.h"\r
+\r
+typedef enum\r
+{\r
+ PORT_UNINITIALIZED = 0, PORT_INITIALIZED,\r
+} Port_StateType;\r
+\r
+static Port_StateType _portState = PORT_UNINITIALIZED;\r
+static Port_ConfigType * _configPtr = NULL;\r
+\r
+/** @req PORT107 */\r
+#if (PORT_DEV_ERROR_DETECT == STD_ON)\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
+ if( (_ptr)==((void *)0) ) { \\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
+ goto cleanup; \\r
+ }\r
+\r
+#define VALIDATE_STATE_INIT(_api)\\r
+ if(PORT_INITIALIZED!=_portState){\\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
+ goto cleanup; \\r
+ }\r
+\r
+#else\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api)\r
+#define VALIDATE_STATE_INIT(_api)\r
+#define VALIDATE_PARAM_PIN(_api)\r
+#endif\r
+\r
+static Std_VersionInfoType _Port_VersionInfo =\r
+{ .vendorID = (uint16)1, .moduleID = (uint16) MODULE_ID_PORT,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)PORT_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)PORT_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)PORT_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)PORT_AR_PATCH_VERSION, };\r
+\r
+/** @req PORT140 */\r
+/** @req PORT041 Comment: To reduce flash usage the configuration tool can disable configuration of some ports */\r
+/** @req PORT078 See environment i.e Ecu State Manager */\r
+/** @req PORT042 */\r
+/** @req PORT113 Number 2 in list is applicable for all pins. */\r
+/** @req PORT043 Comment: Output value is set before direction */\r
+/** @req PORT071 See environment i.e Ecu State Manager */\r
+/** @req PORT002 The _portState varialble is initialised. */\r
+/** @req PORT003 See environment i.e Ecu State Manager */\r
+/** @req PORT055 Comment: Output value is set before direction */\r
+/** @req PORT121 */\r
+void Port_Init(const Port_ConfigType *configType)\r
+{\r
+ VALIDATE_PARAM_CONFIG(configType, PORT_INIT_ID); /** @req PORT105 */\r
+\r
+ uint16_t portIndex,pinIndex;\r
+\r
+ // Set up all the ports\r
+ for (portIndex = 0; portIndex < configType->portCount; portIndex++) {\r
+ const Port_PortConfigType* portConfig = configType->ports[portIndex];\r
+\r
+ // set up all pins\r
+ for (pinIndex = 0; pinIndex < portConfig->pinCount; pinIndex++) {\r
+\r
+ GPIO_Init(portConfig->port, &portConfig->pins[pinIndex]);\r
+\r
+ }\r
+ }\r
+\r
+ // Enable remaps\r
+ for (portIndex = 0; portIndex < configType->remapCount; portIndex++) {\r
+ GPIO_PinRemapConfig(configType->remaps[portIndex], ENABLE);\r
+ }\r
+\r
+ _portState = PORT_INITIALIZED;\r
+ _configPtr = configType;\r
+ cleanup: return;\r
+}\r
+\r
+/** @req PORT141 */\r
+/** @req PORT063 */\r
+/** @req PORT054 */\r
+/** @req PORT086 */\r
+#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
+void Port_SetPinDirection( Port_PinType pin, Port_PinDirectionType direction )\r
+{\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_DIRECTION_ID);\r
+\r
+ {\r
+ Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_DIRECTION_ID, PORT_E_PARAM_PIN );\r
+ }\r
+\r
+ cleanup:return;\r
+}\r
+#endif\r
+\r
+/** @req PORT066 */\r
+/** @req PORT142 */\r
+/** @req PORT060 */\r
+/** @req PORT061 */\r
+void Port_RefreshPortDirection(void)\r
+{\r
+ uint8_t curValue;\r
+ VALIDATE_STATE_INIT(PORT_REFRESH_PORT_DIRECTION_ID);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+/** req PORT143 */\r
+/** req PORT102 */\r
+/** req PORT103 */\r
+#if (PORT_VERSION_INFO_API == STD_ON)\r
+void Port_GetVersionInfo(Std_VersionInfoType* versionInfo)\r
+{\r
+ VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
+ memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
+ cleanup: return;\r
+}\r
+#endif\r
+\r
+/** req PORT145 */\r
+/** req PORT125 */\r
+/** req PORT128 */\r
+#if (PORT_SET_PIN_MODE_API == STD_ON)\r
+void Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode)\r
+{\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_MODE_ID);\r
+\r
+ // Mode of pins not changeable on this CPU\r
+#if (PORT_DEV_ERROR_DETECT == STD_ON)\r
+ Det_ReportError(MODULE_ID_PORT, 0, PORT_SET_PIN_MODE_ID, PORT_E_MODE_UNCHANGEABLE );\r
+#endif\r
+\r
+ cleanup: return;\r
+}\r
+#endif\r
+\r
\r
MEMORY\r
{\r
- flash(R) : ORIGIN = 0x08000000, LENGTH = 128K\r
- ram(RW) : ORIGIN = 0x20000000, LENGTH = 20K\r
+ flash(R) : ORIGIN = 0x08000000, LENGTH = 256K\r
+ ram(RW) : ORIGIN = 0x20000000, LENGTH = 64K\r
}\r
\r
SECTIONS\r
KEEP (*(SORT(.ctors.*)))\r
}\r
\r
- .uninit ALIGN(0x10) (NOLOAD) : { *(.winidea_port .ramlog) ; } > ram\r
+ .uninit ALIGN(0x10) (NOLOAD) : { *(.winidea_port .ramlog .dem_eventmemory_pri) ; } > ram\r
\r
\r
__FLS_SIZE__ = SIZEOF(.fls_rom);\r
*/\r
uint32_t McuE_GetSystemClock(void)\r
{\r
- uint32_t f_sys = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePointFrequency * 2 * (SYNR + 1) / ( REFDV+1);\r
+ uint32_t f_sys = Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].McuClockReferencePointFrequency * 2 *
+ (Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].Pll2 + 1) / ( Mcu_Global.config->McuClockSettingConfig[Mcu_Global.clockSetting].Pll1+1);\r
return f_sys;\r
}\r
\r
#include "irq.h"
#include "arc.h"
#include "regs.h"
+#include "Mcu.h"
+
+extern OsTickType OsTickFreq;
\r
/**\r
* Init of free running timer.\r
- */\r
+ */
void Os_SysTickInit( void ) {
// Set timer 0 as output compare. Timer 0 is reserved for the OS.
// TSFRZ, stop in freeze mode (easier debugging)
TSCR1 = TEN | TSFRZ;
+ ICSYS = 0;
+\r
+ TaskType tid;\r
+ tid = Os_Arc_CreateIsr(OsTick, 6/*prio*/, "OsTick");\r
+ Irq_AttachIsr2(tid, NULL, IRQ_TYPE_MCCNT_UNDERFLOW);
+
// Modulus counter
// MCZI, enable interrupt, MCEN enable modulus counter
// Prescaler 4
MCCTL |= MODMC;
// time = (count * prescaler)/(bus frequency)
- // = (0xFA0 * 4)/(16*10^6)
- // = 1ms
- MCCNT = 0xFA0;
-
- ICSYS = 0;
-\r
- TaskType tid;\r
- tid = Os_Arc_CreateIsr(OsTick, 6/*prio*/, "OsTick");\r
- Irq_AttachIsr2(tid, NULL, IRQ_TYPE_MCCNT_UNDERFLOW);\r
+ MCCNT = (McuE_GetSystemClock() / 2) / (4 * OsTickFreq);\r
}\r
\r
/**\r
Det.o(.text)\r
xtoa.o(.text)\r
newlib_port.o(.text)\r
- tiny.o(.text)\r
\r
. = ALIGN(2);\r
} > bank9 AT>bank9_lma =0xff\r
*_pack_sf.o(.text)\r
*_unpack_sf.o(.text)\r
*udivmodsi4.o(.text)\r
- *_ashlsi3.o(.text)\r
- *_lshrsi3.o(.text)\r
+ /* *_ashlsi3.o(.text) */\r
+ /* *_lshrsi3.o(.text) */\r
*assert.o(.text)\r
*div.o(.text)\r
*fiprintf.o(.text)\r
{\r
*(.winidea_port)\r
*(.ramlog)\r
+ *(.dem_eventmemory_pri)\r
} > data\r
\r
/* SCz: this does not work yet... This is supposed to force the loading\r
}\r
\r
/* TODO How do we handle interrupt priorities? */\r
-#define EQADC_FIFO0_END_OF_QUEUE_PRIORITY (1)\r
-#define EQADC_FIFO1_END_OF_QUEUE_PRIORITY (1)\r
-#define EQADC_FISR_OVER_PRIORITY (1)\r
+#define EQADC_FIFO0_END_OF_QUEUE_PRIORITY (2)\r
+#define EQADC_FIFO1_END_OF_QUEUE_PRIORITY (2)\r
+#define EQADC_FISR_OVER_PRIORITY (2)\r
\r
void Adc_ConfigureEQADCInterrupts (void)\r
{\r
// No FIFO used\r
const Can_HardwareObjectType *hohObj;\r
uint32 mbMask;\r
- uint8 mbNr;\r
+ uint8 mbNr = 0;\r
uint32 data;\r
Can_IdType id;\r
\r
}\r
// Increment statistics\r
canUnit->stats.rxSuccessCnt++;\r
+
+ // unlock MB (dummy read timer)
+ canHw->TIMER.R;
\r
// Clear interrupt\r
canHw->IFRL.R = (1<<mbNr);\r
#define INSTALL_HANDLERS( _can_name,_boff,_err,_start,_stop) \\r
do { \\r
TaskType tid; \\r
- tid = Os_Arc_CreateIsr(_can_name ## _BusOff,1/*prio*/,"Can"); \\r
+ tid = Os_Arc_CreateIsr(_can_name ## _BusOff,2/*prio*/,"Can"); \\r
Irq_AttachIsr2(tid,NULL,_boff); \\r
- tid = Os_Arc_CreateIsr(_can_name ## _Err,1/*prio*/,"Can"); \\r
+ tid = Os_Arc_CreateIsr(_can_name ## _Err,2/*prio*/,"Can"); \\r
Irq_AttachIsr2(tid,NULL,_err); \\r
for(i=_start;i<=_stop;i++) { \\r
- tid = Os_Arc_CreateIsr(_can_name ## _Isr,1/*prio*/,"Can"); \\r
+ tid = Os_Arc_CreateIsr(_can_name ## _Isr,2/*prio*/,"Can"); \\r
Irq_AttachIsr2(tid,NULL,i); \\r
} \\r
} while(0);\r
canHw->RXIMR[i].R = 0;\r
}\r
}\r
-#else\r
+#endif
+#if defined(CFG_MPC5567)
+ // Enable individual Rx ID masking and the reception queue features.
+ canHw->MCR.B.MBFEN = 1;\r
#endif\r
// Set the id's\r
if( config->Can_Arc_Fifo ) {\r
canHw->BUF[mbNr].CS.B.CODE = MB_RX;\r
if ( hohObj->CanIdType == CAN_ID_TYPE_EXTENDED )\r
{\r
- canHw->BUF[mbNr].CS.B.IDE = 1;\r
- canHw->BUF[mbNr].ID.R = *hohObj->CanFilterMaskRef; // Write 29-bit MB IDs\r
+ canHw->BUF[mbNr].CS.B.IDE = 1;
+#if defined(CFG_MPC5567)
+ canHw->RXIMR[mbNr].B.MI = *hohObj->CanFilterMaskRef;
+#else\r
+ canHw->BUF[mbNr].ID.R = *hohObj->CanFilterMaskRef; // Write 29-bit MB IDs
+#endif\r
}\r
else\r
{\r
- canHw->BUF[mbNr].CS.B.IDE = 0;\r
- canHw->BUF[mbNr].ID.B.STD_ID = *hohObj->CanFilterMaskRef;\r
+ canHw->BUF[mbNr].CS.B.IDE = 0;
+#if defined(CFG_MPC5567)
+ canHw->RXIMR[mbNr].B.MI = *hohObj->CanFilterMaskRef;
+#else\r
+ canHw->BUF[mbNr].ID.B.STD_ID = *hohObj->CanFilterMaskRef;
+#endif\r
}\r
}\r
\r
}\r
} while( !hohObj->Can_Arc_EOL );\r
\r
-\r
+#if defined(CFM_MPC5567)
+#else\r
// Set global mask\r
canHw->RXGMASK.R = mask;\r
// Don't use them\r
canHw->RX14MASK.R = 0;\r
- canHw->RX15MASK.R = 0;\r
+ canHw->RX15MASK.R = 0;
+#endif\r
}\r
\r
canUnit->iflagStart = canUnit->Can_Arc_TxMbMask;\r
#else\r
#define VALIDATE_PARAM_CONFIG(_ptr,_api)\r
#define VALIDATE_STATE_INIT(_api)\r
-#define VALIDATE_PARAM_PIN(_api)\r
+#define VALIDATE_PARAM_PIN(_pin, _api)\r
#endif\r
-\r
+
+#if PORT_VERSION_INFO_API == STD_ON
static Std_VersionInfoType _Port_VersionInfo =\r
{\r
.vendorID = (uint16)1,\r
.ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
.ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
.ar_patch_version = (uint8)PORT_AR_PATCH_VERSION,\r
-};\r
+};
+#endif
+\r
const Port_ConfigType * _configPtr = &PortConfigData;\r
void Port_Init(const Port_ConfigType *configType)\r
{\r
.t32_outport ALIGN(0x10): { *(.t32_outport); } > ram\r
.got : AT(ALIGN(LOADADDR(.sdata)+SIZEOF(.sdata),4)) { *(.got.plt) *(.got) } > ram\r
.bss : { *(.bss .bss.* COMMON .gnu.linkonce.b.*);__BSS_END = .; } > ram\r
- .init_stack ALIGN(16) (NOLOAD) : { __SP_END = .;. = . + 200; __SP_INIT = .; } > ram\r
+ .init_stack ALIGN(16) (NOLOAD) : { __SP_END = .;. = . + 1000; __SP_INIT = .; } > ram\r
/* Fls RAM section */\r
.fls_ram ALIGN(16) (NOLOAD) : {\r
__FLS_ERASE_RAM__ = .;\r
KEEP (*(SORT(.ctors.*)))\r
}\r
\r
- .uninit ALIGN(0x10): { *(.winidea_port .ramlog) ; } > ram\r
+ .uninit ALIGN(0x10): { *(.winidea_port .ramlog .dem_eventmemory_pri) ; } > ram\r
\r
__FLS_SIZE__ = SIZEOF(.fls_rom);\r
__FLS_WRITE_RAM__ = __FLS_ERASE_RAM__ + (__FLS_WRITE_ROM__ - __FLS_ERASE_ROM__);\r
# Flash\r
obj-$(USE_FLS) += Fls.o\r
obj-$(USE_FLS) += Fls_Cfg.o\r
-obj-$(USE_FLS) += Fls_H7F.o\r
+obj-$(CFG_MPC55XX)-$(USE_FLS) += Fls_H7F.o\r
\r
# Bring in the freescale driver source \r
inc-$(CFG_MPC55XX) += $(ROOTDIR)/$(ARCH_PATH-y)/delivery/mpc5500_h7f/include\r
vpath-$(USE_CANIF) += $(ROOTDIR)/communication/CanIf\r
inc-$(USE_CANIF) += $(ROOTDIR)/communication/CanIf\r
\r
+# CanTp\r
+obj-$(USE_CANTP) += CanTp.o\r
+obj-$(USE_CANTP) += CanTp_Cfg.o\r
+\r
+vpath-$(USE_CANTP) += $(ROOTDIR)/communication/CanTp\r
+inc-$(USE_CANTP) += $(ROOTDIR)/communication/CanTp\r
+\r
obj-$(USE_DIO) += Dio.o\r
obj-$(USE_DIO) += Dio_Lcfg.o\r
\r
obj-$(USE_PDUR) += PduR_LinIf.o\r
obj-$(USE_PDUR) += PduR_PbCfg.o\r
obj-$(USE_PDUR) += PduR_CanIf.o\r
+obj-$(USE_PDUR) += PduR_CanTp.o\r
+obj-$(USE_PDUR) += PduR_Dcm.o\r
obj-$(USE_PDUR) += PduR.o\r
inc-$(USE_PDUR) += $(ROOTDIR)/communication/PduR\r
inc-$(USE_COM) += $(ROOTDIR)/communication/PduR\r
inc-$(USE_DEM) += $(ROOTDIR)/diagnostic/Dem\r
vpath-$(USE_DEM) += $(ROOTDIR)/diagnostic/Dem\r
\r
+#Dcm\r
+obj-$(USE_DCM) += Dcm.o\r
+obj-$(USE_DCM) += Dcm_Dsp.o\r
+obj-$(USE_DCM) += Dcm_Dsd.o\r
+obj-$(USE_DCM) += Dcm_Dsl.o\r
+obj-$(USE_DCM) += Dcm_LCfg.o\r
+inc-$(USE_DCM) += $(ROOTDIR)/diagnostic/Dcm\r
+vpath-$(USE_DCM) += $(ROOTDIR)/diagnostic/Dcm\r
+\r
+\r
# Common\r
obj-$(USE_COMMON) += xtoa.o\r
obj-$(USE_COMMON) += arc.o\r
#obj-y += malloc.o\r
obj-$(USE_RAMLOG) += ramlog.o\r
-obj-$(USE_SIMPLE_PRINTF) += printf.o\r
+\r
+# If we have configured console output we include printf. \r
+# Overridden to use lib implementation with CFG_USE_NEWLIB_PRINTF\r
+ifndef (CFG_USE_NEWLIB_PRINTF)\r
+ifneq (,$(SELECT_CONSOLE) $(SELECT_OS_CONSOLE))\r
+obj-y += printf.o\r
+endif\r
+endif\r
\r
VPATH += $(ROOTDIR)/common\r
\r
vpath-y += $(ROOTDIR)/arch/$(ARCH_FAM)\r
vpath-y += $(ROOTDIR)/boards/$(BOARDDIR)/config\r
vpath-y += $(ROOTDIR)/diagnostic/Dem\r
+vpath-y += $(ROOTDIR)/diagnostic/Dcm\r
vpath-y += $(ROOTDIR)/diagnostic/Det\r
\r
# include files need by us\r
inc-y += $(ROOTDIR)/$(ARCH_PATH-y)/drivers\r
inc-y += $(ROOTDIR)/boards/$(BOARDDIR)/config\r
inc-y += $(ROOTDIR)/drivers/Dem\r
+inc-y += $(ROOTDIR)/drivers/Dcm\r
inc-y += $(ROOTDIR)/drivers/test\r
\r
\r
--- /dev/null
+/*
+* Configuration of module CanTp (CanTp_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module vendor: ArcCore
+* Module version: 1.0.1
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Thu Apr 08 12:29:52 CEST 2010
+*/
+
+
+#include "CanTp_Types.h"\r
+\r
+CanTp_GeneralType CanTpGeneralConfig =\r
+{\r
+ .main_function_period = 20,\r
+};\r
+\r
+\r
+//NSa\r
+CanTp_NSaType CanTpNSaConfig_UdsPhys_RxNSdu = \r
+{ \r
+ .CanTpNSa = 0,\r
+};\r
+CanTp_NSaType CanTpNSaConfig_UdsFunc_RxNSdu = \r
+{ \r
+ .CanTpNSa = 0,\r
+};\r
+CanTp_NSaType CanTpNSaConfig_UdsPhys_TxNSdu = \r
+{ \r
+ .CanTpNSa = 0,\r
+};\r
+CanTp_NSaType CanTpNSaConfig_UdsFunc_TxNSdu = \r
+{ \r
+ .CanTpNSa = 0,\r
+}; \r
+\r
+//NTa\r
+CanTp_NTaType CanTpNTaConfig_UdsPhys_RxNSdu = \r
+{\r
+ .CanTpNTa = 0,\r
+};\r
+CanTp_NTaType CanTpNTaConfig_UdsFunc_RxNSdu = \r
+{\r
+ .CanTpNTa = 0,\r
+};\r
+CanTp_NTaType CanTpNTaConfig_UdsPhys_TxNSdu = \r
+{\r
+ .CanTpNTa = 0,\r
+};\r
+CanTp_NTaType CanTpNTaConfig_UdsFunc_TxNSdu = \r
+{\r
+ .CanTpNTa = 0,\r
+};\r
+\r
+CanTp_NSduType CanTpNSduConfigList[] =\r
+{\r
+ {\r
+ .direction = IS015765_TRANSMIT,\r
+ .configData.CanTpTxNSdu.CanIf_PduId = 1, //CANIF_PDU_ID_UDS_PHYS_TX,\r
+ .configData.CanTpTxNSdu.PduR_PduId = 0, //PDUR_PDU_ID_UDS_PHYS_TX,\r
+ .configData.CanTpTxNSdu.CanTpTxChannel = 2,\r
+ .configData.CanTpTxNSdu.CanTpAddressingMode = CANTP_STANDARD,\r
+ .configData.CanTpTxNSdu.CanTpNas = 2,\r
+ .configData.CanTpTxNSdu.CanTpNbs = 2,\r
+ .configData.CanTpTxNSdu.CanTpNcs = 2,\r
+ .configData.CanTpTxNSdu.CanTpTxDI = 6,\r
+ .configData.CanTpTxNSdu.CanTpTxPaddingActivation = CANTP_OFF,\r
+ .configData.CanTpTxNSdu.CanTpTxTaType = CANTP_FUNCTIONAL,\r
+ .configData.CanTpTxNSdu.CanTpNSa = &CanTpNSaConfig_UdsPhys_TxNSdu,\r
+ .configData.CanTpTxNSdu.CanTpNTa = &CanTpNTaConfig_UdsPhys_TxNSdu,\r
+ .listItemType = CANTP_NOT_LAST_ENTRY,\r
+ },\r
+ {\r
+ .direction = IS015765_TRANSMIT,\r
+ .configData.CanTpTxNSdu.CanIf_PduId = 0, //CANIF_PDU_ID_UDS_FUNC_TX,\r
+ .configData.CanTpTxNSdu.PduR_PduId = 1, //PDUR_PDU_ID_UDS_FUNC_TX,\r
+ .configData.CanTpTxNSdu.CanTpTxChannel = 3,\r
+ .configData.CanTpTxNSdu.CanTpAddressingMode = CANTP_STANDARD,\r
+ .configData.CanTpTxNSdu.CanTpNas = 2,
+ .configData.CanTpTxNSdu.CanTpNbs = 2,
+ .configData.CanTpTxNSdu.CanTpNcs = 2,
+ .configData.CanTpTxNSdu.CanTpTxDI = 6,\r
+ .configData.CanTpTxNSdu.CanTpTxPaddingActivation = CANTP_OFF,\r
+ .configData.CanTpTxNSdu.CanTpTxTaType = CANTP_FUNCTIONAL,\r
+ .configData.CanTpTxNSdu.CanTpNSa = &CanTpNSaConfig_UdsFunc_TxNSdu,\r
+ .configData.CanTpTxNSdu.CanTpNTa = &CanTpNTaConfig_UdsFunc_TxNSdu,\r
+ .listItemType = CANTP_END_OF_LIST,\r
+ },\r
+ {
+ .direction = ISO15765_RECEIVE,
+ .configData.CanTpRxNSdu.CanIf_FcPduId = 0, //CANIF_PDU_ID_UDS_PHYS_RX,
+ .configData.CanTpRxNSdu.PduR_PduId = 0, //PDUR_PDU_ID_UDS_PHYS_RX,
+ .configData.CanTpRxNSdu.CanTpRxChannel = 0,
+ .configData.CanTpRxNSdu.CanTpAddressingFormant = CANTP_STANDARD,
+ .configData.CanTpRxNSdu.CanTpBs = 30,
+ .configData.CanTpRxNSdu.CanTpNar = 5000,
+ .configData.CanTpRxNSdu.CanTpNbr = 1000,
+ .configData.CanTpRxNSdu.CanTpNcr = 1000,
+ .configData.CanTpRxNSdu.CanTpRxDI = 6,
+ .configData.CanTpRxNSdu.CanTpRxPaddingActivation = CANTP_OFF,
+ .configData.CanTpRxNSdu.CanTpRxTaType = CANTP_FUNCTIONAL,
+ .configData.CanTpRxNSdu.CanTpWftMax = 5,
+ .configData.CanTpRxNSdu.CanTpSTmin = 0,
+ .configData.CanTpRxNSdu.CanTpNSa = &CanTpNSaConfig_UdsPhys_RxNSdu,
+ .configData.CanTpRxNSdu.CanTpNTa = &CanTpNTaConfig_UdsPhys_RxNSdu,
+ .listItemType = CANTP_NOT_LAST_ENTRY,
+ },
+ {
+ .direction = ISO15765_RECEIVE,
+ .configData.CanTpRxNSdu.CanIf_FcPduId = 0, //CANIF_PDU_ID_UDS_FUNC_RX,
+ .configData.CanTpRxNSdu.PduR_PduId = 1, //PDUR_PDU_ID_UDS_FUNC_RX,
+ .configData.CanTpRxNSdu.CanTpRxChannel = 1,
+ .configData.CanTpRxNSdu.CanTpAddressingFormant = CANTP_STANDARD,
+ .configData.CanTpRxNSdu.CanTpBs = 30,
+ .configData.CanTpRxNSdu.CanTpNar = 5000,
+ .configData.CanTpRxNSdu.CanTpNbr = 1000,
+ .configData.CanTpRxNSdu.CanTpNcr = 1000,
+ .configData.CanTpRxNSdu.CanTpRxDI = 6,
+ .configData.CanTpRxNSdu.CanTpRxPaddingActivation = CANTP_OFF,
+ .configData.CanTpRxNSdu.CanTpRxTaType = CANTP_FUNCTIONAL,
+ .configData.CanTpRxNSdu.CanTpWftMax = 0,
+ .configData.CanTpRxNSdu.CanTpSTmin = 0,
+ .configData.CanTpRxNSdu.CanTpNSa = &CanTpNSaConfig_UdsFunc_RxNSdu,
+ .configData.CanTpRxNSdu.CanTpNTa = &CanTpNTaConfig_UdsFunc_RxNSdu,
+ .listItemType = CANTP_NOT_LAST_ENTRY,
+ },
+};\r
+\r
+CanTp_ConfigType CanTpConfig =\r
+{\r
+ .CanTpNSduList = CanTpNSduConfigList,\r
+ .CanTpGeneral = &CanTpGeneralConfig,\r
+};\r
+
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#ifndef CANTP_CFG_H_\r
+#define CANTP_CFG_H_\r
+\r
+#include "CanTp_Types.h"\r
+\r
+#define CANTP_MAIN_FUNCTION_PERIOD_TIME_MS 1000\r
+#define CANTP_CONVERT_MS_TO_MAIN_CYCLES(x) (x)/CANTP_MAIN_FUNCTION_PERIOD_TIME_MS\r
+\r
+#define CANTP_NSDU_CONFIG_LIST_SIZE 4\r
+#define CANTP_NSDU_RUNTIME_LIST_SIZE 4\r
+\r
+#define FRTP_CANCEL_TRANSMIT_REQUEST STD_ON\r
+#define CANTP_VERSION_INFO_API STD_ON /**< Build version info API */\r
+#define CANTP_DEV_ERROR_DETECT STD_ON\r
+\r
+extern CanTp_ConfigType CanTpConfig;\r
+extern const CanTp_NSduType CanTpNSduConfigList[];\r
+\r
+#endif /* CANTP_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+#ifndef DCM_CFG_H_\r
+#define DCM_CFG_H_
+/*
+ * DCM General
+ */
+#define DCM_VERSION_INFO_API STD_ON // Activate/Deactivate ver info API.
+#define DCM_DEV_ERROR_DETECT STD_ON // Activate/Deactivate Dev Error Detection and Notification.
+#define DCM_REQUEST_INDICATION_ENABLED STD_ON // Activate/Deactivate indication request mechanism.
+#define DCM_RESPOND_ALL_REQUEST STD_ON // Activate/Deactivate response on SID 0x40-0x7f and 0xc0-0xff.
+#define DCM_TASK_TIME TBD // Time for periodic task (in ms).
+#define DCM_PAGEDBUFFER_ENABLED STD_OFF // Enable/disable page buffer mechanism (currently only disabled supported)
+
+#endif /*DCM_CFG_H_*/\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+#include "Dcm.h"
+#include "Rte_Dcm.h"
+
+
+\r
+\r
+/*********************\r
+ * DCM Configuration *
+ *********************/
+
+/*
+ * DSP configurations
+ */
+const Dcm_DspType Dsp = {
+ .DspDid = NULL,
+ .DspDidInfo = NULL,
+ .DspEcuReset = NULL,
+ .DspPid = NULL,
+ .DspReadDTC = NULL,
+ .DspRequestControl = NULL,
+ .DspRoutine = NULL,
+ .DspRoutineInfo = NULL,
+ .DspSecurity = NULL,
+ .DspSession = NULL,
+ .DspTestResultByObdmid = NULL,
+ .DspVehInfo = NULL,
+};
+
+
+/*
+ * DSD configurations
+ */
+const Dcm_DsdType Dsd = {
+ .DsdServiceTable = NULL
+};
+
+
+/*
+ * DSL configurations
+ */
+const Dcm_DslType Dsl = {
+ .DslBuffer = NULL,
+ .DslCallbackDCMRequestService = NULL,
+ .DslDiagResp = NULL,
+ .DslProtocol = NULL,
+ .DslProtocolTiming = NULL,
+ .DslServiceRequestIndication = NULL,
+ .DslSessionControl = NULL
+};
+
+/*
+ * DCM configurations
+ */
+const Dcm_ConfigType DCM_Config = {
+ .Dsp = &Dsp,
+ .Dsd = &Dsd,
+ .Dsl = &Dsl
+};
/*
* DEM General
*/
-#define DEM_VERSION_INFO_API STD_ON // Activate/Deactivate ver info API.
-#define DEM_DEV_ERROR_DETECT STD_ON // Activate/Deactivate Dev Error Detection and Notification.
-#define DEM_OBD_SUPPORT STD_OFF
-#define DEM_PTO_SUPPORT STD_OFF
-
-#define DEM_BSW_ERROR_BUFFER_SIZE 20 // Max nr of elements in BSW error buffer (0..255)
-#define DEM_FF_DID_LENGTH TBD // Length of DID & PID of FreezeFrames in Bytes.
-#define DEM_MAX_NUMBER_EVENT_ENTRY_MIR 0 // Max nr of events stored in mirror memory.
-#define DEM_MAX_NUMBER_EVENT_ENTRY_PER 0 // Max nr of events stored in permanent memory.
-#define DEM_MAX_NUMBER_EVENT_ENTRY_PRI 10 // Max nr of events stored in primary memory.
-#define DEM_MAX_NUMBER_EVENT_ENTRY_SEC 0 // Max nr of events stored in secondary memory.
-#define DEM_MAX_NUMBER_PRESTORED_FF 0 // Max nr of prestored FreezeFrames. 0=Not supported.
+#define DEM_VERSION_INFO_API STD_ON // Activate/Deactivate ver info API.
+#define DEM_DEV_ERROR_DETECT STD_ON // Activate/Deactivate Dev Error Detection and Notification.
+#define DEM_OBD_SUPPORT STD_OFF
+#define DEM_PTO_SUPPORT STD_OFF
+#define DEM_TYPE_OF_DTC_SUPPORTED DEM_ISO14229_1
+#define DEM_DTC_STATUS_AVAILABILITY_MASK 0xFF
+#define DEM_CLEAR_ALL_EVENTS STD_OFF // All event or only events with DTC is cleared with Dem_ClearDTC
+
+
+#define DEM_BSW_ERROR_BUFFER_SIZE 20 // Max nr of elements in BSW error buffer (0..255)
+#define DEM_FF_DID_LENGTH TBD // Length of DID & PID of FreezeFrames in Bytes.
+#define DEM_MAX_NUMBER_EVENT_ENTRY_MIR 0 // Max nr of events stored in mirror memory.
+#define DEM_MAX_NUMBER_EVENT_ENTRY_PER 0 // Max nr of events stored in permanent memory.
+#define DEM_MAX_NUMBER_EVENT_ENTRY_PRI 10 // Max nr of events stored in primary memory.
+#define DEM_MAX_NUMBER_EVENT_ENTRY_SEC 0 // Max nr of events stored in secondary memory.
+#define DEM_MAX_NUMBER_PRESTORED_FF 0 // Max nr of prestored FreezeFrames. 0=Not supported.
/*
* Size limitations of the types derived from DemGeneral
{\r
.McuClockReferencePointFrequency = 16000000,\r
.Pll1 = 1,
- .Pll2 = 0,\r
+ .Pll2 = 2,\r
}\r
};\r
\r
\r
# What buildable modules does this board have, \r
# default or private\r
-MOD_AVAIL+=KERNEL RAMLOG MCU ECUM GPT LIN CAN CANIF PORT DIO WDG WDGM T32_TERM PWM WINIDEA_TERM COM ADC DMA SIMPLE_PRINTF DEM PDUR IOHWAB\r
+MOD_AVAIL+=KERNEL RAMLOG MCU ECUM GPT LIN CAN CANIF CANTP PORT DIO WDG WDGM PWM COM ADC DMA DEM DCM PDUR IOHWAB\r
\r
# Needed by us\r
MOD_USE=KERNEL MCU\r
#define PDUR_VERSION_INFO_API
-#ifdef PDUR_ZERO_COST_OPERATION
+#if (PDUR_ZERO_COST_OPERATION == STD_ON)
// CanIf, FrIf, LinIf
#define PDUR_SINGLE_IF CAN_IF
// CanTp, FrTp, LinTp
#define PDUR_E_PDU_ID_INVALID 0x02
#define PDUR_E_TP_TX_REQ_REJECTED 0x03
#define PDUR_E_DATA_PTR_INVALID 0x05
-#define PDUR_E_PDU_INSTANCE_LOST 0x10
-#define PDUR_ZERO_COST_OPERATION\r
+#define PDUR_ZERO_COST_OPERATION STD_ON\r
\r
# What buildable modules does this board have, \r
# default or private\r
-MOD_AVAIL=KERNEL RAMLOG MCU ECUM GPT LIN CAN WDG WDGM T32_TERM WINIDEA_TERM SIMPLE_PRINTF DEM IOHWAB\r
+MOD_AVAIL=KERNEL RAMLOG MCU ECUM GPT LIN CAN WDG WDGM DEM DCM IOHWAB\r
MOD_AVAIL+=COMMON NEWLIB DET\r
\r
# Needed by us\r
\r
# What buildable modules does this board have, \r
# default or private\r
-MOD_AVAIL+=KERNEL RAMLOG MCU ECUM GPT LIN CAN COM WDG WDGM T32_TERM WINIDEA_TERM SIMPLE_PRINTF DEM IOHWAB\r
+MOD_AVAIL+=KERNEL RAMLOG MCU ECUM GPT LIN CAN COM WDG WDGM T32_TERM WINIDEA_TERM SIMPLE_PRINTF DEM DCM IOHWAB\r
\r
# Needed by kernel\r
MOD_USE+=KERNEL MCU\r
#define PDUR_VERSION_INFO_API
-#ifdef PDUR_ZERO_COST_OPERATION
+#if (PDUR_ZERO_COST_OPERATION == STD_ON)
// CanIf, FrIf, LinIf
#define PDUR_SINGLE_IF CAN_IF
// CanTp, FrTp, LinTp
#define PDUR_E_PDU_ID_INVALID 0x02
#define PDUR_E_TP_TX_REQ_REJECTED 0x03
#define PDUR_E_DATA_PTR_INVALID 0x05
-#define PDUR_E_PDU_INSTANCE_LOST 0x10
-#define PDUR_ZERO_COST_OPERATION\r
+#define PDUR_ZERO_COST_OPERATION STD_ON\r
--- /dev/null
+/*
+* Configuration of module Can (Can_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Wed Apr 21 10:15:00 CEST 2010
+*/
+
+
+#if (CAN_SW_MAJOR_VERSION != 1)
+#error "Can: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef CAN_CFG_H_\r
+#define CAN_CFG_H_\r
+\r
+// Number of controller configs\r
+#define CAN_ARC_CTRL_CONFIG_CNT 1\r
+\r
+#define CAN_DEV_ERROR_DETECT STD_OFF\r
+#define CAN_VERSION_INFO_API STD_OFF\r
+#define CAN_MULTIPLEXED_TRANSMISSION STD_OFF\r
+#define CAN_WAKEUP_SUPPORT STD_OFF // Not supported\r
+#define CAN_HW_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
+\r
+\r
+// Start stm32 unique
+typedef enum {\r
+ CAN_CTRL_1 = 0,\r
+ CAN_CTRL_2 = 1,\r
+ CAN_CONTROLLER_CNT = 2\r
+}CanControllerIdType;\r
+// End stm32 unique
+\r
+\r
+typedef enum {\r
+ CAN_ID_TYPE_EXTENDED,\r
+ CAN_ID_TYPE_MIXED,\r
+ CAN_ID_TYPE_STANDARD,\r
+} Can_IdTypeType;\r
+\r
+\r
+typedef enum {\r
+ CAN_OBJECT_TYPE_RECEIVE,\r
+ CAN_OBJECT_TYPE_TRANSMIT,\r
+} Can_ObjectTypeType;\r
+\r
+\r
+typedef enum {\r
+ CAN_ARC_HANDLE_TYPE_BASIC,\r
+ CAN_ARC_HANDLE_TYPE_FULL\r
+} Can_Arc_HohType;\r
+\r
+\r
+typedef enum {\r
+ HWObj_2,\r
+ NUM_OF_HTHS\r
+} Can_Arc_HTHType;\r
+\r
+\r
+typedef enum {\r
+ HWObj_1,\r
+ NUM_OF_HRHS\r
+} Can_Arc_HRHType;\r
+\r
+\r
+typedef struct {\r
+ void (*CancelTxConfirmation)( const Can_PduType *);\r
+ void (*RxIndication)( uint8 ,Can_IdType ,uint8 , const uint8 * );\r
+ void (*ControllerBusOff)(uint8);\r
+ void (*TxConfirmation)(PduIdType);\r
+ void (*ControllerWakeup)(uint8);\r
+ void (*Arc_Error)(uint8,Can_Arc_ErrorType);\r
+} Can_CallbackType;\r
+\r
+\r
+typedef struct {\r
+ // Specifies the InstanceId of this module instance. If only one instance is\r
+ // present it shall have the Id 0\r
+ int CanIndex;\r
+} Can_GeneralType;
+
+typedef uint32_t Can_FilterMaskType;
+\r
+typedef struct Can_HardwareObjectStruct {\r
+ // Specifies the type (Full-CAN or Basic-CAN) of a hardware object.\r
+ Can_Arc_HohType CanHandleType;\r
+\r
+ // Specifies whether the IdValue is of type - standard identifier - extended\r
+ // identifier - mixed mode ImplementationType: Can_IdType\r
+ Can_IdTypeType CanIdType;\r
+\r
+ // Specifies (together with the filter mask) the identifiers range that passes\r
+ // the hardware filter.\r
+ uint32 CanIdValue;\r
+\r
+ // Holds the handle ID of HRH or HTH. The value of this parameter is unique\r
+ // in a given CAN Driver, and it should start with 0 and continue without any\r
+ // gaps. The HRH and HTH Ids are defined under two different name-spaces.\r
+ // Example: HRH0-0, HRH1-1, HTH0-2, HTH1-3\r
+ uint32 CanObjectId;\r
+\r
+ // Specifies if the HardwareObject is used as Transmit or as Receive object\r
+ Can_ObjectTypeType CanObjectType;\r
+\r
+ // Reference to the filter mask that is used for hardware filtering togerther\r
+ // with the CAN_ID_VALUE\r
+ Can_FilterMaskType *CanFilterMaskRef;\r
+\r
+ // A "1" in this mask tells the driver that that HW Message Box should be\r
+ // occupied by this Hoh. A "1" in bit 31(ppc) occupies Mb 0 in HW.\r
+ uint32 Can_Arc_MbMask;\r
+\r
+ // End Of List. Set to TRUE is this is the last object in the list.\r
+ boolean Can_Arc_EOL;\r
+} Can_HardwareObjectType;\r
+\r
+\r
+typedef enum {\r
+ CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ CAN_ARC_PROCESS_TYPE_POLLING,\r
+} Can_Arc_ProcessType;\r
+\r
+\r
+typedef struct {\r
+\r
+ // Enables / disables API Can_MainFunction_BusOff() for handling busoff\r
+ // events in polling mode.\r
+ // INTERRUPT or POLLING\r
+ Can_Arc_ProcessType CanBusOffProcessing;\r
+\r
+ // Defines if a CAN controller is used in the configuration.\r
+ boolean CanControllerActivation;\r
+\r
+ // Specifies the buadrate of the controller in kbps.\r
+ uint32 CanControllerBaudRate;\r
+\r
+ // This parameter provides the controller ID which is unique in a given CAN\r
+ // Driver. The value for this parameter starts with 0 and continue without any\r
+ // gaps.\r
+ CanControllerIdType CanControllerId;\r
+\r
+ // Specifies propagation delay in time quantas.\r
+ uint32 CanControllerPropSeg;\r
+\r
+ // Specifies phase segment 1 in time quantas.\r
+ uint32 CanControllerSeg1;\r
+\r
+ // Specifies phase segment 2 in time quantas.\r
+ uint32 CanControllerSeg2;\r
+\r
+ // Specifies the time quanta for the controller. The calculation of the resulting\r
+ // prescaler value depending on module clocking and time quanta shall be\r
+ // done offline Hardware specific.\r
+ uint32 CanControllerTimeQuanta;\r
+\r
+ // Enables / disables API Can_MainFunction_Read() for handling PDU\r
+ // reception events in polling mode.\r
+ Can_Arc_ProcessType CanRxProcessing;\r
+\r
+ // Enables / disables API Can_MainFunction_Write() for handling PDU\r
+ // transmission events in polling mode.\r
+ Can_Arc_ProcessType CanTxProcessing;\r
+\r
+ // Enables / disables API Can_MainFunction_Wakeup() for handling wakeup\r
+ // events in polling mode.\r
+ Can_Arc_ProcessType CanWakeupProcessing;\r
+\r
+ // Reference to the CPU clock configuration, which is set in the MCU driver\r
+ // configuration\r
+ uint32 CanCpuClockRef;\r
+\r
+ // This parameter contains a reference to the Wakeup Source for this\r
+ // controller as defined in the ECU State Manager. Implementation Type:\r
+ // reference to EcuM_WakeupSourceType\r
+ uint32 CanWakeupSourceRef;\r
+\r
+ // List of Hoh id's that belong to this controller\r
+ const Can_HardwareObjectType *Can_Arc_Hoh;\r
+\r
+ boolean Can_Arc_Loopback;\r
+\r
+ // Set this to use the fifo\r
+ boolean Can_Arc_Fifo;\r
+} Can_ControllerConfigType;\r
+\r
+\r
+typedef struct {\r
+ const Can_ControllerConfigType *CanController;\r
+ \r
+ // Callbacks( Extension )\r
+ const Can_CallbackType *CanCallbacks;\r
+} Can_ConfigSetType;\r
+\r
+\r
+typedef struct {\r
+ // This is the multiple configuration set container for CAN Driver\r
+ // Multiplicity 1..*\r
+ const Can_ConfigSetType *CanConfigSet;\r
+ // This container contains the parameters related each CAN\r
+ // Driver Unit.\r
+ // Multiplicity 1..*\r
+ const Can_GeneralType *CanGeneral;\r
+} Can_ConfigType;\r
+\r
+\r
+extern const Can_ConfigType CanConfigData;\r
+extern const Can_ControllerConfigType CanControllerConfigData[];\r
+extern const Can_ConfigSetType Can_ConfigSet;\r
+\r
+#endif /*CAN_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Can (Can_Lcfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Wed Apr 21 10:15:00 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include "Can.h"\r
+#include "CanIf_Cbk.h"\r
+\r
+\r
+Can_FilterMaskType Can_FilterMaskConfigData_Controller_1_Mask_1[] = {
+ 0xffffffff,
+ 0xffffffff,
+};\r
+\r
+const Can_HardwareObjectType CanHardwareObjectConfig_Controller_1[] = {\r
+ {\r
+ .CanObjectId = HWObj_1,\r
+ .CanHandleType = CAN_ARC_HANDLE_TYPE_BASIC,\r
+ .CanIdType = CAN_ID_TYPE_EXTENDED,\r
+ .CanObjectType = CAN_OBJECT_TYPE_RECEIVE,\r
+ .CanFilterMaskRef = &Can_FilterMaskConfigData_Controller_1_Mask_1[0],\r
+ \r
+ .Can_Arc_MbMask = 0x0,\r
+ .Can_Arc_EOL = 0,\r
+ },\r
+ {\r
+ .CanObjectId = HWObj_2,\r
+ .CanHandleType = CAN_ARC_HANDLE_TYPE_BASIC,\r
+ .CanIdType = CAN_ID_TYPE_EXTENDED,\r
+ .CanObjectType = CAN_OBJECT_TYPE_TRANSMIT,\r
+ .CanFilterMaskRef = &Can_FilterMaskConfigData_Controller_1_Mask_1[0],\r
+ \r
+ .Can_Arc_MbMask = 0x0,\r
+ .Can_Arc_EOL = 1,\r
+ },\r
+};\r
+\r
+\r
+const Can_ControllerConfigType CanControllerConfigData[] =\r
+{\r
+ {\r
+ .CanControllerActivation = TRUE,\r
+ .CanControllerBaudRate = 125,\r
+ .CanControllerId = CAN_CTRL_1,\r
+ .CanControllerPropSeg = 0,\r
+ .CanControllerSeg1 = 12,\r
+ .CanControllerSeg2 = 1,\r
+ .CanBusOffProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanRxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanTxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanWakeupProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanCpuClockRef = 0,\r
+ .Can_Arc_Hoh = &CanHardwareObjectConfig_Controller_1[0],\r
+ .Can_Arc_Loopback = FALSE,\r
+ .Can_Arc_Fifo = 0,\r
+ },\r
+};\r
+\r
+const Can_CallbackType CanCallbackConfigData = {\r
+ NULL, //CanIf_CancelTxConfirmation,\r
+ CanIf_RxIndication,\r
+ CanIf_ControllerBusOff,\r
+ CanIf_TxConfirmation,\r
+ NULL, //CanIf_ControllerWakeup,\r
+ CanIf_Arc_Error,\r
+};\r
+\r
+const Can_ConfigSetType CanConfigSetData =\r
+{\r
+ .CanController = CanControllerConfigData,\r
+ .CanCallbacks = &CanCallbackConfigData,\r
+};\r
+\r
+const Can_ConfigType CanConfigData = {\r
+ .CanConfigSet = &CanConfigSetData,\r
+};\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+#define DIO_END_OF_LIST -1\r
+\r
+/** @name DIO channels\r
+ * HW specific dio channels.\r
+ */\r
+// Pin Name GPIO(PCR)Num\r
+//@{\r
+//* req DIO015 */\r
+//* req DIO017 */\r
+typedef enum\r
+{\r
+ DIO_CHANNEL_A0,\r
+ DIO_CHANNEL_A1,\r
+ DIO_CHANNEL_A2,\r
+ DIO_CHANNEL_A3,\r
+ DIO_CHANNEL_A4,\r
+ DIO_CHANNEL_A5,\r
+ DIO_CHANNEL_A6,\r
+ DIO_CHANNEL_A7,\r
+ DIO_CHANNEL_A8,\r
+ DIO_CHANNEL_A9,\r
+ DIO_CHANNEL_A10,\r
+ DIO_CHANNEL_A11,\r
+ DIO_CHANNEL_A12,\r
+ DIO_CHANNEL_A13,\r
+ DIO_CHANNEL_A14,\r
+ DIO_CHANNEL_A15,\r
+\r
+ DIO_CHANNEL_B0,\r
+ DIO_CHANNEL_B1,\r
+ DIO_CHANNEL_B2,\r
+ DIO_CHANNEL_B3,\r
+ DIO_CHANNEL_B4,\r
+ DIO_CHANNEL_B5,\r
+ DIO_CHANNEL_B6,\r
+ DIO_CHANNEL_B7,\r
+ DIO_CHANNEL_B8,\r
+ DIO_CHANNEL_B9,\r
+ DIO_CHANNEL_B10,\r
+ DIO_CHANNEL_B11,\r
+ DIO_CHANNEL_B12,\r
+ DIO_CHANNEL_B13,\r
+ DIO_CHANNEL_B14,\r
+ DIO_CHANNEL_B15,\r
+\r
+ DIO_CHANNEL_C0,\r
+ DIO_CHANNEL_C1,\r
+ DIO_CHANNEL_C2,\r
+ DIO_CHANNEL_C3,\r
+ DIO_CHANNEL_C4,\r
+ DIO_CHANNEL_C5,\r
+ DIO_CHANNEL_C6,\r
+ DIO_CHANNEL_C7,\r
+ DIO_CHANNEL_C8,\r
+ DIO_CHANNEL_C9,\r
+ DIO_CHANNEL_C10,\r
+ DIO_CHANNEL_C11,\r
+ DIO_CHANNEL_C12,\r
+ DIO_CHANNEL_C13,\r
+ DIO_CHANNEL_C14,\r
+ DIO_CHANNEL_C15,\r
+\r
+ DIO_CHANNEL_D0,\r
+ DIO_CHANNEL_D1,\r
+ DIO_CHANNEL_D2,\r
+ DIO_CHANNEL_D3,\r
+ DIO_CHANNEL_D4,\r
+ DIO_CHANNEL_D5,\r
+ DIO_CHANNEL_D6,\r
+ DIO_CHANNEL_D7,\r
+ DIO_CHANNEL_D8,\r
+ DIO_CHANNEL_D9,\r
+ DIO_CHANNEL_D10,\r
+ DIO_CHANNEL_D11,\r
+ DIO_CHANNEL_D12,\r
+ DIO_CHANNEL_D13,\r
+ DIO_CHANNEL_D14,\r
+ DIO_CHANNEL_D15,\r
+\r
+ DIO_CHANNEL_E0,\r
+ DIO_CHANNEL_E1,\r
+ DIO_CHANNEL_E2,\r
+ DIO_CHANNEL_E3,\r
+ DIO_CHANNEL_E4,\r
+ DIO_CHANNEL_E5,\r
+ DIO_CHANNEL_E6,\r
+ DIO_CHANNEL_E7,\r
+ DIO_CHANNEL_E8,\r
+ DIO_CHANNEL_E9,\r
+ DIO_CHANNEL_E10,\r
+ DIO_CHANNEL_E11,\r
+ DIO_CHANNEL_E12,\r
+ DIO_CHANNEL_E13,\r
+ DIO_CHANNEL_E14,\r
+ DIO_CHANNEL_E15,\r
+\r
+ DIO_CHANNEL_F0,\r
+ DIO_CHANNEL_F1,\r
+ DIO_CHANNEL_F2,\r
+ DIO_CHANNEL_F3,\r
+ DIO_CHANNEL_F4,\r
+ DIO_CHANNEL_F5,\r
+ DIO_CHANNEL_F6,\r
+ DIO_CHANNEL_F7,\r
+ DIO_CHANNEL_F8,\r
+ DIO_CHANNEL_F9,\r
+ DIO_CHANNEL_F10,\r
+ DIO_CHANNEL_F11,\r
+ DIO_CHANNEL_F12,\r
+ DIO_CHANNEL_F13,\r
+ DIO_CHANNEL_F14,\r
+ DIO_CHANNEL_F15,\r
+\r
+} Dio_ChannelType;\r
+//@}\r
+\r
+/** HW specific DIO port definitions. */\r
+/** @req DIO018 */\r
+/** @req DIO020 */\r
+typedef enum {\r
+ DIO_PORT_A,\r
+ DIO_PORT_B,\r
+ DIO_PORT_C,\r
+ DIO_PORT_D,\r
+ DIO_PORT_E,\r
+ DIO_PORT_F,\r
+} Dio_PortType;\r
+\r
+/** @req DIO021 */\r
+/** @req DIO022 */\r
+typedef struct\r
+{\r
+ Dio_PortType port;\r
+ uint16 offset;\r
+ uint16 mask;\r
+} Dio_ChannelGroupType;\r
+\r
+/** @req DIO023 */\r
+typedef uint16 Dio_LevelType;\r
+\r
+/** @req DIO024 */\r
+typedef uint16 Dio_PortLevelType;\r
+\r
+#define LED_CHANNEL (DIO_CHANNEL_B13)\r
+\r
+#define LED_PORT (DIO_PORT_B)\r
+\r
+#define LED_GROUP (&DioConfigData[0])\r
+\r
+// Channels\r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+#define CHANNEL_PTR (&DioChannelConfigData)\r
+\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+#define PORT_PTR (&DioPortConfigData)\r
+\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+#define CHANNEL_GRP_PTR (&DioConfigData)\r
+\r
+#endif /* DIO_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] =\r
+{\r
+ LED_CHANNEL,\r
+ DIO_END_OF_LIST,\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] =\r
+{\r
+ LED_PORT,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] =\r
+{\r
+ { .port = DIO_PORT_B, .offset = 7, .mask = 0x80, },\r
+ { .port = DIO_END_OF_LIST, .offset = DIO_END_OF_LIST, .mask = DIO_END_OF_LIST, },\r
+};\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+#include "Fls.h"\r
+#include <stdlib.h>\r
+\r
+\r
+#define KB *1024\r
+
+const Fls_SectorType fls_SectorList[] = {
+ {
+ .FlsSectorStartaddress = (Fls_AddressType)0x08000000, // Start address of this sector
+ .FlsPageSize = (Fls_LengthType)(1 KB), // Page size of 1k
+ .FlsSectorSize = (Fls_LengthType)(1 KB),
+ // Number of continuous sectors with the above characteristics.
+ .FlsNumberOfSectors = (uint32)255
+ }
+};
+\r
+\r
+const Fls_ConfigType FlsConfigSet[]=\r
+{\r
+ {\r
+ .FlsSectorList = &fls_SectorList[0],\r
+ .FlsSectorListSize = sizeof(fls_SectorList)/sizeof(Fls_SectorType),\r
+ .FlsBlockToPartitionMap = NULL,\r
+ }\r
+};\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef FLS_CFG_H_\r
+#define FLS_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+#define FLS_BASE_ADDRESS 0x08000000\r
+#define FLS_TOTAL_SIZE 0x40000 // from addr 0x0800_0000 to 0x0804_0000\r
+\r
+// Configuration description of a flashable sector\r
+typedef struct {\r
+ // Number of continuous sectors with the above characteristics.\r
+ Fls_LengthType FlsNumberOfSectors;\r
+\r
+ // Size of one page of this sector. Implementation Type: Fls_LengthType.\r
+ Fls_LengthType FlsPageSize;\r
+\r
+ // Size of this sector. Implementation Type: Fls_LengthTyp\r
+ Fls_LengthType FlsSectorSize;\r
+\r
+ // Start address of this sector\r
+ Fls_AddressType FlsSectorStartaddress;\r
+\r
+} Fls_SectorType;\r
+\r
+\r
+typedef struct {\r
+ // List of flash:able sectors and pages\r
+ const Fls_SectorType *FlsSectorList;\r
+\r
+ // Size of List of the FlsSectorList\r
+ const uint32 FlsSectorListSize;\r
+\r
+ uint8 *FlsBlockToPartitionMap;\r
+\r
+} Fls_ConfigType;\r
+\r
+extern const Fls_ConfigType FlsConfigSet[];\r
+\r
+\r
+#endif /* FLS_CFG_H_ */\r
.McuRamSectionSize = 0xFF,\r
}\r
};\r
-\r
-Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
+
+const Mcu_PerClockConfigType McuPerClockConfigData =
+{
+ .AHBClocksEnable = RCC_AHBPeriph_DMA1,
+ .APB1ClocksEnable = RCC_APB1Periph_TIM2 | RCC_APB1Periph_CAN1,
+ .APB2ClocksEnable = (RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA |
+ RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO),
+};
+\r
+const Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
{\r
{\r
.McuClockReferencePointFrequency = 8000000UL,\r
#define MCU_VERSION_INFO_API STD_ON\r
\r
#include "Std_Types.h"\r
+
+#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
+#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
+#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
+#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
+#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
+
+#ifndef STM32F10X_CL
+ #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
+ #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
+#else
+ #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
+ #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
+ #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
+ #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
+#endif
+
+#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
+#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
+#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
+#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
+#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
+#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
+#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
+#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
+#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
+#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
+#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
+#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
+#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
+#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
+#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
+#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
+#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
+#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
+#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
+#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
+#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
+
+#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
+#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
+#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
+#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
+#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
+#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
+#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
+#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
+#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
+#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
+#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
+#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
+#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
+#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
+#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
+
+typedef struct {
+ uint32 AHBClocksEnable;
+ uint32 APB1ClocksEnable;
+ uint32 APB2ClocksEnable;
+} Mcu_PerClockConfigType;
+
+extern const Mcu_PerClockConfigType McuPerClockConfigData;
\r
typedef enum {\r
MCU_CLOCKTYPE_EXT_REF_8MHZ = 0,\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+#include "Port_Cfg.h"\r
+\r
+\r
+typedef enum {\r
+ PORTA,\r
+ PORTB,\r
+ PORTC,\r
+ PORTD,\r
+ PORTE,\r
+ NUMBER_OF_PORTS\r
+} Port_PortType;\r
+\r
+const u32 remaps[] = {\r
+ GPIO_Remap1_CAN1,\r
+ GPIO_PartialRemap2_TIM2,\r
+};\r
+\r
+const Port_PortConfigType porta = {\r
+ .port = GPIOA,\r
+ .pinCount = 1,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_1,\r
+ .GPIO_Mode = GPIO_Mode_AIN,\r
+ .GPIO_Speed = GPIO_Speed_2MHz\r
+ },\r
+ }\r
+};\r
+\r
+\r
+const Port_PortConfigType portb = {\r
+ .port = GPIOB,\r
+ .pinCount = 4,\r
+ .pins = {\r
+ /* PB8 is CAN1_RX, remapped: */\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_8,\r
+ .GPIO_Mode = GPIO_Mode_IPU,\r
+ .GPIO_Speed = GPIO_Speed_10MHz\r
+ },\r
+ /* PB9 is CAN1_TX, remapped: */\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_9,\r
+ .GPIO_Mode = GPIO_Mode_AF_PP,\r
+ .GPIO_Speed = GPIO_Speed_10MHz\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11,\r
+ .GPIO_Mode = GPIO_Mode_AF_PP,\r
+ .GPIO_Speed = GPIO_Speed_50MHz\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15,\r
+ .GPIO_Mode = GPIO_Mode_Out_PP,\r
+ .GPIO_Speed = GPIO_Speed_10MHz\r
+ },\r
+\r
+ }\r
+};\r
+\r
+const Port_PortConfigType portc = {\r
+ .port = GPIOC,\r
+ .pinCount = 1,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12,\r
+ .GPIO_Mode = GPIO_Mode_Out_PP,\r
+ .GPIO_Speed = GPIO_Speed_10MHz,\r
+ },\r
+\r
+ }\r
+};\r
+\r
+const Port_PortConfigType portd = {\r
+ .port = GPIOD,\r
+ .pinCount = 1,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = 0xffff,\r
+ .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
+ .GPIO_Speed = GPIO_Speed_2MHz,\r
+ },\r
+ }\r
+};\r
+\r
+const Port_PortConfigType porte = {\r
+ .port = GPIOE,\r
+ .pinCount = 1,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = 0xffff,\r
+ .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
+ .GPIO_Speed = GPIO_Speed_2MHz,\r
+ },\r
+ }\r
+};\r
+\r
+const Port_ConfigType PortConfigData = {\r
+ .portCount = NUMBER_OF_PORTS,\r
+ .ports = {\r
+ &porta,\r
+ &portb,\r
+ &portc,\r
+ &portd,\r
+ &porte\r
+ },\r
+\r
+ .remapCount = sizeof(remaps) / sizeof(u32),\r
+ .remaps = &remaps[0]\r
+};\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "stm32f10x_gpio.h"\r
+\r
+/** Build version info API */\r
+#define PORT_VERSION_INFO_API STD_ON /** @req PORT100 PORT101 */\r
+/** Enable Development Error Trace */\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+/** Build change pin direction API */\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+/** Allow Pin mode changes during runtime (not avail on this CPU) */\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+\r
+/** @req PORT124 */\r
+typedef uint8 Port_PinModeType;\r
+\r
+/** HW specific symbolic names of pins */\r
+/** @req PORT013 */\r
+typedef enum{\r
+ PIN1,\r
+} Port_PinType;\r
+\r
+/* Configuration of one specific port */\r
+typedef struct {\r
+ uint16_t pinCount;\r
+ GPIO_TypeDef *port;\r
+ const GPIO_InitTypeDef pins[];\r
+\r
+} Port_PortConfigType;\r
+\r
+/** Top level configuration container */\r
+/** @req PORT073 */\r
+typedef struct {\r
+ uint16_t remapCount;\r
+ const uint32_t* remaps;\r
+\r
+ uint16_t portCount;\r
+ const Port_PortConfigType* ports[];\r
+} Port_ConfigType;\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#endif /*PORT_CFG_H_*/\r
* Maps a symbolic name to a hardware channel\r
*/\r
typedef enum {\r
- PWM_CHANNEL_1 = PWM_CHANNEL_43, //PB8\r
- PWM_CHANNEL_2 = PWM_CHANNEL_44, //PB9\r
+ PWM_CHANNEL_1 = PWM_CHANNEL_23, //PB10\r
+ PWM_CHANNEL_2 = PWM_CHANNEL_24, //PB11\r
PWM_NUMBER_OF_CHANNELS = 2\r
} Pwm_NamedChannelsType;\r
\r
\r
# What buildable modules does this board have, \r
# default or private\r
-MOD_AVAIL=KERNEL MCU ECUM PWM ADC SIMPLE_PRINTF ARM_ITM_TERM RAMLOG DEM IOHWAB\r
+MOD_AVAIL=KERNEL MCU ECUM PWM ADC DIO PORT FLS CAN COM CAN CANIF SIMPLE_PRINTF ARM_ITM_TERM RAMLOG DEM IOHWAB\r
\r
#\r
# Modules needed by us\r
#\r
\r
# Use little heap\r
-def-y += HEAPSIZE=4000\r
+def-y += HEAPSIZE=25000\r
# Select the right device in ST header files.\r
# [ STM32F10X_LD | STM32F10X_MD | STM32F10X_HD |STM32F10X_CL ]\r
def-y += STM32F10X_CL\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+/*\r
+ * Adc_Cfg.c\r
+ *\r
+ * Created on: 2009-okt-02\r
+ * Author: Fredrik\r
+ */\r
+\r
+#include "Adc.h"\r
+#include "stm32f10x_adc.h"\r
+\r
+\r
+Adc_GroupStatus AdcGroupStatus[ADC_NBR_OF_GROUPS];\r
+\r
+/* Configuration goes here. */\r
+void Adc_Group0Notification (void)\r
+{\r
+}\r
+\r
+const Adc_HWConfigurationType AdcHWUnitConfiguration =\r
+{\r
+ .hwUnitId = 0,\r
+ .adcPrescale = ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_8,\r
+ .clockSource = ADC_SYSTEM_CLOCK,\r
+};\r
+\r
+const Adc_ChannelConfigurationType AdcChannelConfiguration [ADC_NBR_OF_CHANNELS] =\r
+{\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+ { .adcChannelConvTime = ADC_SampleTime_55Cycles5 },\r
+};\r
+\r
+const Adc_ChannelType Adc_Group0ChannelList[ADC_NBR_OF_GROUP0_CHANNELS] =\r
+{\r
+ ADC_CH1,ADC_CH1,ADC_CH1,ADC_CH1\r
+};\r
+\r
+\r
+/* Ram buffers for command and result queues. These are located here in the\r
+ configuration to be able to reconfigure system without recompiling the\r
+ drivers. */\r
+Adc_ValueGroupType Adc_Group0Buffer [sizeof(Adc_Group0ChannelList)/sizeof(Adc_Group0ChannelList[0])];\r
+\r
+const Adc_GroupDefType AdcGroupConfiguration [] =\r
+{\r
+ {\r
+ // NOT SUPPORTED .accessMode = ADC_ACCESS_MODE_SINGLE,\r
+ .conversionMode = ADC_CONV_MODE_ONESHOT,\r
+ .triggerSrc = ADC_TRIGG_SRC_SW,\r
+ // NOT SUPPORTED .hwTriggerSignal = ADC_NO_HW_TRIG,\r
+ // NOT SUPPORTED .hwTriggerTimer = ADC_NO_TIMER,\r
+ .groupCallback = Adc_Group0Notification,\r
+ // NOT SUPPORTED .streamBufferMode = ADC_NO_STREAMING,\r
+ // NOT SUPPORTED .streamNumSamples = 0,\r
+ .channelList = Adc_Group0ChannelList,\r
+ .resultBuffer = Adc_Group0Buffer,\r
+ .numberOfChannels = sizeof(Adc_Group0ChannelList)/sizeof(Adc_Group0ChannelList[0]),\r
+ .status = &AdcGroupStatus[ADC_GROUP0]},\r
+};\r
+\r
+\r
+/******************************************************************/\r
+/* */\r
+/* End of user configuration area. DO NOT modify the code below!! */\r
+/* */\r
+/******************************************************************/\r
+const Adc_ConfigType AdcConfig [] =\r
+{\r
+ {\r
+ .hwConfigPtr = &AdcHWUnitConfiguration,\r
+ .channelConfigPtr = AdcChannelConfiguration,\r
+ .nbrOfChannels = sizeof(AdcChannelConfiguration)/sizeof(AdcChannelConfiguration[0]),\r
+ .groupConfigPtr = AdcGroupConfiguration,\r
+ .nbrOfGroups = sizeof(AdcGroupConfiguration)/sizeof(AdcGroupConfiguration[0])}\r
+};\r
+
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+/*\r
+ * Adc_Cfg.h\r
+ *\r
+ * Created on: 2009-okt-02\r
+ * Author: Fredrik\r
+ */\r
+#ifndef ADC_CFG_H_\r
+#define ADC_CFG_H_\r
+\r
+#define ADC_PRIORITY_HW 0\r
+#define ADC_PRIORITY_HW_SW 1\r
+#define ADC_PRIORITY_NONE 2\r
+\r
+#define ADC_DEINIT_API STD_ON\r
+#define ADC_DEV_ERROR_DETECT STD_ON\r
+#define ADC_ENABLE_QUEUING STD_ON\r
+#define ADC_ENABLE_START_STOP_GROUP_API STD_ON\r
+#define ADC_GRP_NOTIF_CAPABILITY STD_ON\r
+#define ADC_HW_TRIGGER_API STD_OFF /* Not implemented. */\r
+#define ADC_PRIORITY_IMPLEMENTATION ADC_PRIORITY_HW\r
+#define ADC_READ_GROUP_API STD_ON\r
+#define ADC_VERSION_API STD_ON /* Not implemented. */\r
+\r
+typedef uint16_t Adc_ValueGroupType;\r
+/* Group definitions. */\r
+\r
+typedef enum\r
+{\r
+ ADC_GROUP0,\r
+ ADC_NBR_OF_GROUPS\r
+}Adc_GroupType;\r
+\r
+typedef enum\r
+{\r
+ ADC_CH0,\r
+ ADC_CH1,\r
+ ADC_CH2,\r
+ ADC_CH3,\r
+ ADC_CH4,\r
+ ADC_CH5,\r
+ ADC_CH6,\r
+ ADC_CH7,\r
+ ADC_CH8,\r
+ ADC_CH9,\r
+ ADC_CH10,\r
+ ADC_CH11,\r
+ ADC_CH12,\r
+ ADC_CH13,\r
+ ADC_CH14,\r
+ ADC_CH15,\r
+ ADC_NBR_OF_CHANNELS,\r
+}Adc_ChannelType;\r
+\r
+typedef enum\r
+{\r
+ ADC_TEST_BOARD_POT,\r
+ ADC_TEST_BOARD_POT2,\r
+ ADC_TEST_BOARD_POT3,\r
+ ADC_TEST_BOARD_POT4,\r
+ ADC_NBR_OF_GROUP0_CHANNELS,\r
+}Adc_Group0SignalType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK\r
+}Adc_ClockSourceType;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK_DISABLED,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_1,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_2,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_4,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_6,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_8,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_10,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_12,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_14,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_16,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_18,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_20,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_22,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_24,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_26,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_28,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_30,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_32,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_34,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_36,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_38,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_40,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_42,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_44,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_46,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_48,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_50,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_52,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_54,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_56,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_58,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_60,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_62,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_64,\r
+}Adc_PrescaleType;\r
+\r
+/* Non-standard type */\r
+typedef struct\r
+{\r
+ Adc_ClockSourceType clockSource;\r
+ uint8_t hwUnitId;\r
+ Adc_PrescaleType adcPrescale;\r
+}Adc_HWConfigurationType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONVERSION_TIME_2_CLOCKS,\r
+ ADC_CONVERSION_TIME_8_CLOCKS,\r
+ ADC_CONVERSION_TIME_64_CLOCKS,\r
+ ADC_CONVERSION_TIME_128_CLOCKS\r
+}Adc_ConversionTimeType;\r
+\r
+/* Channel definitions, std container */\r
+typedef struct\r
+{\r
+ Adc_ConversionTimeType adcChannelConvTime;\r
+ // NOT SUPPORTED Adc_VoltageSourceType adcChannelRefVoltSrcLow;\r
+ // NOT SUPPORTED Adc_VoltageSourceType adcChannelRefVoltSrcHigh;\r
+ // NOT SUPPORTED Adc_ResolutionType adcChannelResolution;\r
+ // NOT SUPPORTED Adc_CalibrationType adcChannelCalibrationEnable;\r
+} Adc_ChannelConfigurationType;\r
+\r
+/* Used ?? */\r
+typedef struct\r
+{\r
+ uint8 notifictionEnable;\r
+ Adc_ValueGroupType * resultBufferPtr;\r
+ Adc_StatusType groupStatus;\r
+} Adc_GroupStatus;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONV_MODE_DISABLED,\r
+ ADC_CONV_MODE_ONESHOT = 1,\r
+ ADC_CONV_MODE_CONTINOUS = 9,\r
+} Adc_GroupConvModeType;\r
+\r
+/* Implementation specific */\r
+typedef struct\r
+{\r
+ // NOT SUPPORTED Adc_GroupAccessModeType accessMode;\r
+ Adc_GroupConvModeType conversionMode;\r
+ Adc_TriggerSourceType triggerSrc;\r
+ // NOT SUPPORTED Adc_HwTriggerSignalType hwTriggerSignal;\r
+ // NOT SUPPORTED Adc_HwTriggerTimerType hwTriggerTimer;\r
+ void (*groupCallback)(void);\r
+ // NOT SUPPORTED Adc_StreamBufferModeType streamBufferMode;\r
+ // NOT SUPPORTED Adc_StreamNumSampleType streamNumSamples;\r
+ const Adc_ChannelType *channelList;\r
+ Adc_ValueGroupType *resultBuffer;\r
+ // NOT SUPPORTED Adc_CommandType *commandBuffer;\r
+ Adc_ChannelType numberOfChannels;\r
+ Adc_GroupStatus *status;\r
+ // NOT SUPPORTED Dma_ChannelType dmaCommandChannel;\r
+ // NOT SUPPORTED Dma_ChannelType dmaResultChannel;\r
+ // NOT SUPPORTED const struct tcd_t * groupDMACommands;\r
+ // NOT SUPPORTED const struct tcd_t * groupDMAResults;\r
+} Adc_GroupDefType;\r
+\r
+/* Non-standard type */\r
+typedef struct\r
+{\r
+ const Adc_HWConfigurationType* hwConfigPtr;\r
+ const Adc_ChannelConfigurationType* channelConfigPtr;\r
+ const uint16_t nbrOfChannels;\r
+ const Adc_GroupDefType* groupConfigPtr;\r
+ const uint16_t nbrOfGroups;\r
+} Adc_ConfigType;\r
+\r
+extern const Adc_ConfigType AdcConfig [];\r
+\r
+\r
+#endif /*ADC_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Can (Can_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Wed Apr 21 10:15:00 CEST 2010
+*/
+
+
+#if (CAN_SW_MAJOR_VERSION != 1)
+#error "Can: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef CAN_CFG_H_\r
+#define CAN_CFG_H_\r
+\r
+// Number of controller configs\r
+#define CAN_ARC_CTRL_CONFIG_CNT 1\r
+\r
+#define CAN_DEV_ERROR_DETECT STD_OFF\r
+#define CAN_VERSION_INFO_API STD_OFF\r
+#define CAN_MULTIPLEXED_TRANSMISSION STD_OFF\r
+#define CAN_WAKEUP_SUPPORT STD_OFF // Not supported\r
+#define CAN_HW_TRANSMIT_CANCELLATION STD_OFF // Not supported\r
+\r
+\r
+// Start stm32 unique
+typedef enum {\r
+ CAN_CTRL_1 = 0,\r
+ CAN_CTRL_2 = 1,\r
+ CAN_CONTROLLER_CNT = 2\r
+}CanControllerIdType;\r
+// End stm32 unique
+\r
+\r
+typedef enum {\r
+ CAN_ID_TYPE_EXTENDED,\r
+ CAN_ID_TYPE_MIXED,\r
+ CAN_ID_TYPE_STANDARD,\r
+} Can_IdTypeType;\r
+\r
+\r
+typedef enum {\r
+ CAN_OBJECT_TYPE_RECEIVE,\r
+ CAN_OBJECT_TYPE_TRANSMIT,\r
+} Can_ObjectTypeType;\r
+\r
+\r
+typedef enum {\r
+ CAN_ARC_HANDLE_TYPE_BASIC,\r
+ CAN_ARC_HANDLE_TYPE_FULL\r
+} Can_Arc_HohType;\r
+\r
+\r
+typedef enum {\r
+ HWObj_2,\r
+ NUM_OF_HTHS\r
+} Can_Arc_HTHType;\r
+\r
+\r
+typedef enum {\r
+ HWObj_1,\r
+ NUM_OF_HRHS\r
+} Can_Arc_HRHType;\r
+\r
+\r
+typedef struct {\r
+ void (*CancelTxConfirmation)( const Can_PduType *);\r
+ void (*RxIndication)( uint8 ,Can_IdType ,uint8 , const uint8 * );\r
+ void (*ControllerBusOff)(uint8);\r
+ void (*TxConfirmation)(PduIdType);\r
+ void (*ControllerWakeup)(uint8);\r
+ void (*Arc_Error)(uint8,Can_Arc_ErrorType);\r
+} Can_CallbackType;\r
+\r
+\r
+typedef struct {\r
+ // Specifies the InstanceId of this module instance. If only one instance is\r
+ // present it shall have the Id 0\r
+ int CanIndex;\r
+} Can_GeneralType;
+
+typedef uint32_t Can_FilterMaskType;
+\r
+typedef struct Can_HardwareObjectStruct {\r
+ // Specifies the type (Full-CAN or Basic-CAN) of a hardware object.\r
+ Can_Arc_HohType CanHandleType;\r
+\r
+ // Specifies whether the IdValue is of type - standard identifier - extended\r
+ // identifier - mixed mode ImplementationType: Can_IdType\r
+ Can_IdTypeType CanIdType;\r
+\r
+ // Specifies (together with the filter mask) the identifiers range that passes\r
+ // the hardware filter.\r
+ uint32 CanIdValue;\r
+\r
+ // Holds the handle ID of HRH or HTH. The value of this parameter is unique\r
+ // in a given CAN Driver, and it should start with 0 and continue without any\r
+ // gaps. The HRH and HTH Ids are defined under two different name-spaces.\r
+ // Example: HRH0-0, HRH1-1, HTH0-2, HTH1-3\r
+ uint32 CanObjectId;\r
+\r
+ // Specifies if the HardwareObject is used as Transmit or as Receive object\r
+ Can_ObjectTypeType CanObjectType;\r
+\r
+ // Reference to the filter mask that is used for hardware filtering togerther\r
+ // with the CAN_ID_VALUE\r
+ Can_FilterMaskType *CanFilterMaskRef;\r
+\r
+ // A "1" in this mask tells the driver that that HW Message Box should be\r
+ // occupied by this Hoh. A "1" in bit 31(ppc) occupies Mb 0 in HW.\r
+ uint32 Can_Arc_MbMask;\r
+\r
+ // End Of List. Set to TRUE is this is the last object in the list.\r
+ boolean Can_Arc_EOL;\r
+} Can_HardwareObjectType;\r
+\r
+\r
+typedef enum {\r
+ CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ CAN_ARC_PROCESS_TYPE_POLLING,\r
+} Can_Arc_ProcessType;\r
+\r
+\r
+typedef struct {\r
+\r
+ // Enables / disables API Can_MainFunction_BusOff() for handling busoff\r
+ // events in polling mode.\r
+ // INTERRUPT or POLLING\r
+ Can_Arc_ProcessType CanBusOffProcessing;\r
+\r
+ // Defines if a CAN controller is used in the configuration.\r
+ boolean CanControllerActivation;\r
+\r
+ // Specifies the buadrate of the controller in kbps.\r
+ uint32 CanControllerBaudRate;\r
+\r
+ // This parameter provides the controller ID which is unique in a given CAN\r
+ // Driver. The value for this parameter starts with 0 and continue without any\r
+ // gaps.\r
+ CanControllerIdType CanControllerId;\r
+\r
+ // Specifies propagation delay in time quantas.\r
+ uint32 CanControllerPropSeg;\r
+\r
+ // Specifies phase segment 1 in time quantas.\r
+ uint32 CanControllerSeg1;\r
+\r
+ // Specifies phase segment 2 in time quantas.\r
+ uint32 CanControllerSeg2;\r
+\r
+ // Specifies the time quanta for the controller. The calculation of the resulting\r
+ // prescaler value depending on module clocking and time quanta shall be\r
+ // done offline Hardware specific.\r
+ uint32 CanControllerTimeQuanta;\r
+\r
+ // Enables / disables API Can_MainFunction_Read() for handling PDU\r
+ // reception events in polling mode.\r
+ Can_Arc_ProcessType CanRxProcessing;\r
+\r
+ // Enables / disables API Can_MainFunction_Write() for handling PDU\r
+ // transmission events in polling mode.\r
+ Can_Arc_ProcessType CanTxProcessing;\r
+\r
+ // Enables / disables API Can_MainFunction_Wakeup() for handling wakeup\r
+ // events in polling mode.\r
+ Can_Arc_ProcessType CanWakeupProcessing;\r
+\r
+ // Reference to the CPU clock configuration, which is set in the MCU driver\r
+ // configuration\r
+ uint32 CanCpuClockRef;\r
+\r
+ // This parameter contains a reference to the Wakeup Source for this\r
+ // controller as defined in the ECU State Manager. Implementation Type:\r
+ // reference to EcuM_WakeupSourceType\r
+ uint32 CanWakeupSourceRef;\r
+\r
+ // List of Hoh id's that belong to this controller\r
+ const Can_HardwareObjectType *Can_Arc_Hoh;\r
+\r
+ boolean Can_Arc_Loopback;\r
+\r
+ // Set this to use the fifo\r
+ boolean Can_Arc_Fifo;\r
+} Can_ControllerConfigType;\r
+\r
+\r
+typedef struct {\r
+ const Can_ControllerConfigType *CanController;\r
+ \r
+ // Callbacks( Extension )\r
+ const Can_CallbackType *CanCallbacks;\r
+} Can_ConfigSetType;\r
+\r
+\r
+typedef struct {\r
+ // This is the multiple configuration set container for CAN Driver\r
+ // Multiplicity 1..*\r
+ const Can_ConfigSetType *CanConfigSet;\r
+ // This container contains the parameters related each CAN\r
+ // Driver Unit.\r
+ // Multiplicity 1..*\r
+ const Can_GeneralType *CanGeneral;\r
+} Can_ConfigType;\r
+\r
+\r
+extern const Can_ConfigType CanConfigData;\r
+extern const Can_ControllerConfigType CanControllerConfigData[];\r
+extern const Can_ConfigSetType Can_ConfigSet;\r
+\r
+#endif /*CAN_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Can (Can_Lcfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Wed Apr 21 10:15:00 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include "Can.h"\r
+#include "CanIf_Cbk.h"\r
+\r
+\r
+Can_FilterMaskType Can_FilterMaskConfigData_Controller_1_Mask_1[] = {
+ 0xffffffff,
+ 0xffffffff,
+};\r
+\r
+const Can_HardwareObjectType CanHardwareObjectConfig_Controller_1[] = {\r
+ {\r
+ .CanObjectId = HWObj_1,\r
+ .CanHandleType = CAN_ARC_HANDLE_TYPE_BASIC,\r
+ .CanIdType = CAN_ID_TYPE_EXTENDED,\r
+ .CanObjectType = CAN_OBJECT_TYPE_RECEIVE,\r
+ .CanFilterMaskRef = &Can_FilterMaskConfigData_Controller_1_Mask_1[0],\r
+ \r
+ .Can_Arc_MbMask = 0x0,\r
+ .Can_Arc_EOL = 0,\r
+ },\r
+ {\r
+ .CanObjectId = HWObj_2,\r
+ .CanHandleType = CAN_ARC_HANDLE_TYPE_BASIC,\r
+ .CanIdType = CAN_ID_TYPE_EXTENDED,\r
+ .CanObjectType = CAN_OBJECT_TYPE_TRANSMIT,\r
+ .CanFilterMaskRef = &Can_FilterMaskConfigData_Controller_1_Mask_1[0],\r
+ \r
+ .Can_Arc_MbMask = 0x0,\r
+ .Can_Arc_EOL = 1,\r
+ },\r
+};\r
+\r
+\r
+const Can_ControllerConfigType CanControllerConfigData[] =\r
+{\r
+ {\r
+ .CanControllerActivation = TRUE,\r
+ .CanControllerBaudRate = 125,\r
+ .CanControllerId = CAN_CTRL_1,\r
+ .CanControllerPropSeg = 0,\r
+ .CanControllerSeg1 = 12,\r
+ .CanControllerSeg2 = 1,\r
+ .CanBusOffProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanRxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanTxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanWakeupProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,\r
+ .CanCpuClockRef = 0,\r
+ .Can_Arc_Hoh = &CanHardwareObjectConfig_Controller_1[0],\r
+ .Can_Arc_Loopback = FALSE,\r
+ .Can_Arc_Fifo = 0,\r
+ },\r
+};\r
+\r
+const Can_CallbackType CanCallbackConfigData = {\r
+ NULL, //CanIf_CancelTxConfirmation,\r
+ CanIf_RxIndication,\r
+ CanIf_ControllerBusOff,\r
+ CanIf_TxConfirmation,\r
+ NULL, //CanIf_ControllerWakeup,\r
+ CanIf_Arc_Error,\r
+};\r
+\r
+const Can_ConfigSetType CanConfigSetData =\r
+{\r
+ .CanController = CanControllerConfigData,\r
+ .CanCallbacks = &CanCallbackConfigData,\r
+};\r
+\r
+const Can_ConfigType CanConfigData = {\r
+ .CanConfigSet = &CanConfigSetData,\r
+};\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+#define DIO_END_OF_LIST -1\r
+\r
+/** @name DIO channels\r
+ * HW specific dio channels.\r
+ */\r
+// Pin Name GPIO(PCR)Num\r
+//@{\r
+//* req DIO015 */\r
+//* req DIO017 */\r
+typedef enum\r
+{\r
+ DIO_CHANNEL_A0,\r
+ DIO_CHANNEL_A1,\r
+ DIO_CHANNEL_A2,\r
+ DIO_CHANNEL_A3,\r
+ DIO_CHANNEL_A4,\r
+ DIO_CHANNEL_A5,\r
+ DIO_CHANNEL_A6,\r
+ DIO_CHANNEL_A7,\r
+ DIO_CHANNEL_A8,\r
+ DIO_CHANNEL_A9,\r
+ DIO_CHANNEL_A10,\r
+ DIO_CHANNEL_A11,\r
+ DIO_CHANNEL_A12,\r
+ DIO_CHANNEL_A13,\r
+ DIO_CHANNEL_A14,\r
+ DIO_CHANNEL_A15,\r
+\r
+ DIO_CHANNEL_B0,\r
+ DIO_CHANNEL_B1,\r
+ DIO_CHANNEL_B2,\r
+ DIO_CHANNEL_B3,\r
+ DIO_CHANNEL_B4,\r
+ DIO_CHANNEL_B5,\r
+ DIO_CHANNEL_B6,\r
+ DIO_CHANNEL_B7,\r
+ DIO_CHANNEL_B8,\r
+ DIO_CHANNEL_B9,\r
+ DIO_CHANNEL_B10,\r
+ DIO_CHANNEL_B11,\r
+ DIO_CHANNEL_B12,\r
+ DIO_CHANNEL_B13,\r
+ DIO_CHANNEL_B14,\r
+ DIO_CHANNEL_B15,\r
+\r
+ DIO_CHANNEL_C0,\r
+ DIO_CHANNEL_C1,\r
+ DIO_CHANNEL_C2,\r
+ DIO_CHANNEL_C3,\r
+ DIO_CHANNEL_C4,\r
+ DIO_CHANNEL_C5,\r
+ DIO_CHANNEL_C6,\r
+ DIO_CHANNEL_C7,\r
+ DIO_CHANNEL_C8,\r
+ DIO_CHANNEL_C9,\r
+ DIO_CHANNEL_C10,\r
+ DIO_CHANNEL_C11,\r
+ DIO_CHANNEL_C12,\r
+ DIO_CHANNEL_C13,\r
+ DIO_CHANNEL_C14,\r
+ DIO_CHANNEL_C15,\r
+\r
+ DIO_CHANNEL_D0,\r
+ DIO_CHANNEL_D1,\r
+ DIO_CHANNEL_D2,\r
+ DIO_CHANNEL_D3,\r
+ DIO_CHANNEL_D4,\r
+ DIO_CHANNEL_D5,\r
+ DIO_CHANNEL_D6,\r
+ DIO_CHANNEL_D7,\r
+ DIO_CHANNEL_D8,\r
+ DIO_CHANNEL_D9,\r
+ DIO_CHANNEL_D10,\r
+ DIO_CHANNEL_D11,\r
+ DIO_CHANNEL_D12,\r
+ DIO_CHANNEL_D13,\r
+ DIO_CHANNEL_D14,\r
+ DIO_CHANNEL_D15,\r
+\r
+ DIO_CHANNEL_E0,\r
+ DIO_CHANNEL_E1,\r
+ DIO_CHANNEL_E2,\r
+ DIO_CHANNEL_E3,\r
+ DIO_CHANNEL_E4,\r
+ DIO_CHANNEL_E5,\r
+ DIO_CHANNEL_E6,\r
+ DIO_CHANNEL_E7,\r
+ DIO_CHANNEL_E8,\r
+ DIO_CHANNEL_E9,\r
+ DIO_CHANNEL_E10,\r
+ DIO_CHANNEL_E11,\r
+ DIO_CHANNEL_E12,\r
+ DIO_CHANNEL_E13,\r
+ DIO_CHANNEL_E14,\r
+ DIO_CHANNEL_E15,\r
+\r
+ DIO_CHANNEL_F0,\r
+ DIO_CHANNEL_F1,\r
+ DIO_CHANNEL_F2,\r
+ DIO_CHANNEL_F3,\r
+ DIO_CHANNEL_F4,\r
+ DIO_CHANNEL_F5,\r
+ DIO_CHANNEL_F6,\r
+ DIO_CHANNEL_F7,\r
+ DIO_CHANNEL_F8,\r
+ DIO_CHANNEL_F9,\r
+ DIO_CHANNEL_F10,\r
+ DIO_CHANNEL_F11,\r
+ DIO_CHANNEL_F12,\r
+ DIO_CHANNEL_F13,\r
+ DIO_CHANNEL_F14,\r
+ DIO_CHANNEL_F15,\r
+\r
+} Dio_ChannelType;\r
+//@}\r
+\r
+/** HW specific DIO port definitions. */\r
+/** @req DIO018 */\r
+/** @req DIO020 */\r
+typedef enum {\r
+ DIO_PORT_A,\r
+ DIO_PORT_B,\r
+ DIO_PORT_C,\r
+ DIO_PORT_D,\r
+ DIO_PORT_E,\r
+ DIO_PORT_F,\r
+} Dio_PortType;\r
+\r
+/** @req DIO021 */\r
+/** @req DIO022 */\r
+typedef struct\r
+{\r
+ Dio_PortType port;\r
+ uint16 offset;\r
+ uint16 mask;\r
+} Dio_ChannelGroupType;\r
+\r
+/** @req DIO023 */\r
+typedef uint16 Dio_LevelType;\r
+\r
+/** @req DIO024 */\r
+typedef uint16 Dio_PortLevelType;\r
+\r
+#define LED_CHANNEL1 (DIO_CHANNEL_D3)\r
+#define LED_CHANNEL2 (DIO_CHANNEL_D4)\r
+#define LED_CHANNEL3 (DIO_CHANNEL_D7)\r
+#define LED_CHANNEL4 (DIO_CHANNEL_D13)\r
+\r
+#define LED_PORT (DIO_PORT_D)\r
+\r
+#define LED_GROUP (&DioConfigData[0])\r
+\r
+// Channels\r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+#define CHANNEL_PTR (&DioChannelConfigData)\r
+\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+#define PORT_PTR (&DioPortConfigData)\r
+\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+#define CHANNEL_GRP_PTR (&DioConfigData)\r
+\r
+#endif /* DIO_CFG_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] =\r
+{\r
+ LED_CHANNEL1,\r
+ LED_CHANNEL2,\r
+ LED_CHANNEL3,\r
+ LED_CHANNEL4,\r
+ DIO_END_OF_LIST,\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] =\r
+{\r
+ LED_PORT,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] =\r
+{\r
+ { .port = DIO_PORT_D, .offset = 0, .mask = 0x1094, },\r
+ { .port = DIO_END_OF_LIST, .offset = DIO_END_OF_LIST, .mask = DIO_END_OF_LIST, },\r
+};\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+#include "Fls.h"\r
+#include <stdlib.h>\r
+\r
+\r
+#define KB *1024\r
+
+const Fls_SectorType fls_SectorList[] = {
+ {
+ .FlsSectorStartaddress = (Fls_AddressType)0x08000000, // Start address of this sector
+ .FlsPageSize = (Fls_LengthType)(1 KB), // Page size of 1k
+ .FlsSectorSize = (Fls_LengthType)(1 KB),
+ // Number of continuous sectors with the above characteristics.
+ .FlsNumberOfSectors = (uint32)255
+ }
+};
+\r
+\r
+const Fls_ConfigType FlsConfigSet[]=\r
+{\r
+ {\r
+ .FlsSectorList = &fls_SectorList[0],\r
+ .FlsSectorListSize = sizeof(fls_SectorList)/sizeof(Fls_SectorType),\r
+ .FlsBlockToPartitionMap = NULL,\r
+ }\r
+};\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef FLS_CFG_H_\r
+#define FLS_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+#define FLS_BASE_ADDRESS 0x08000000\r
+#define FLS_TOTAL_SIZE 0x40000 // from addr 0x0800_0000 to 0x0804_0000\r
+\r
+// Configuration description of a flashable sector\r
+typedef struct {\r
+ // Number of continuous sectors with the above characteristics.\r
+ Fls_LengthType FlsNumberOfSectors;\r
+\r
+ // Size of one page of this sector. Implementation Type: Fls_LengthType.\r
+ Fls_LengthType FlsPageSize;\r
+\r
+ // Size of this sector. Implementation Type: Fls_LengthTyp\r
+ Fls_LengthType FlsSectorSize;\r
+\r
+ // Start address of this sector\r
+ Fls_AddressType FlsSectorStartaddress;\r
+\r
+} Fls_SectorType;\r
+\r
+\r
+typedef struct {\r
+ // List of flash:able sectors and pages\r
+ const Fls_SectorType *FlsSectorList;\r
+\r
+ // Size of List of the FlsSectorList\r
+ const uint32 FlsSectorListSize;\r
+\r
+ uint8 *FlsBlockToPartitionMap;\r
+\r
+} Fls_ConfigType;\r
+\r
+extern const Fls_ConfigType FlsConfigSet[];\r
+\r
+\r
+#endif /* FLS_CFG_H_ */\r
.McuRamSectionSize = 0xFF,\r
}\r
};\r
+
+
+const Mcu_PerClockConfigType McuPerClockConfigData =
+{
+ .AHBClocksEnable = RCC_AHBPeriph_DMA1 | RCC_AHBPeriph_ETH_MAC |
+ RCC_AHBPeriph_ETH_MAC_Tx | RCC_AHBPeriph_ETH_MAC_Rx,
+ .APB1ClocksEnable = RCC_APB1Periph_TIM2 | RCC_APB1Periph_CAN1,
+ .APB2ClocksEnable = (RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA |
+ RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC |
+ RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO),
+};
\r
Mcu_ClockSettingConfigType Mcu_ClockSettingConfigData[] =\r
{\r
.McuClockSettings = MCU_NBR_OF_CLOCKS,\r
\r
// Default clock frequency used\r
- .McuDefaultClockSettings = MCU_CLOCKTYPE_EXT_REF_80MHZ,\r
+ .McuDefaultClockSettings = MCU_CLOCKTYPE_EXT_REF_25MHZ,\r
\r
// This parameter relates to the MCU specific reset configuration. This ap-\r
// plies to the function Mcu_PerformReset, which performs a microcontroller\r
#define MCU_VERSION_INFO_API STD_ON\r
\r
#include "Std_Types.h"\r
+
+#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
+#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
+#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
+#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
+#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
+
+#ifndef STM32F10X_CL
+ #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
+ #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
+#else
+ #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
+ #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
+ #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
+ #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
+#endif
+
+#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
+#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
+#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
+#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
+#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
+#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
+#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
+#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
+#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
+#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
+#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
+#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
+#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
+#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
+#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
+#define RCC_APB1Periph_USB ((uint32_t)0x00800000)
+#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
+#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
+#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
+#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
+#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
+
+#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
+#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
+#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
+#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
+#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
+#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
+#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
+#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
+#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
+#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
+#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
+#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
+#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
+#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
+#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
+
+typedef struct {
+ uint32 AHBClocksEnable;
+ uint32 APB1ClocksEnable;
+ uint32 APB2ClocksEnable;
+} Mcu_PerClockConfigType;
+
+extern const Mcu_PerClockConfigType McuPerClockConfigData;
\r
typedef enum {\r
MCU_CLOCKTYPE_EXT_REF_25MHZ = 0,\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+#include "Port_Cfg.h"\r
+\r
+\r
+typedef enum {\r
+ PORTA,\r
+ PORTB,\r
+ PORTC,\r
+ PORTD,\r
+ PORTE,\r
+ NUMBER_OF_PORTS\r
+} Port_PortType;\r
+\r
+const u32 remaps[] = {\r
+ GPIO_Remap_ETH,\r
+ GPIO_Remap2_CAN1,\r
+};\r
+\r
+const Port_PortConfigType porta = {\r
+ .port = GPIOA,\r
+ .pinCount = 3,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_2,\r
+ .GPIO_Mode = GPIO_Mode_AF_PP,\r
+ .GPIO_Speed = GPIO_Speed_50MHz\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_3,\r
+ .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
+ .GPIO_Speed = GPIO_Speed_50MHz\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_8,\r
+ .GPIO_Mode = GPIO_Mode_AF_PP,\r
+ .GPIO_Speed = GPIO_Speed_50MHz\r
+ },\r
+ }\r
+};\r
+\r
+const Port_PortConfigType portb = {\r
+ .port = GPIOB,\r
+ .pinCount = 2,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_8 | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13,\r
+ .GPIO_Mode = GPIO_Mode_AF_PP,\r
+ .GPIO_Speed = GPIO_Speed_50MHz\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_10,\r
+ .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
+ .GPIO_Speed = GPIO_Speed_50MHz\r
+ },\r
+\r
+ }\r
+};\r
+\r
+const Port_PortConfigType portc = {\r
+ .port = GPIOC,\r
+ .pinCount = 3,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2,\r
+ .GPIO_Mode = GPIO_Mode_AF_PP,\r
+ .GPIO_Speed = GPIO_Speed_50MHz,\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_3,\r
+ .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
+ .GPIO_Speed = GPIO_Speed_50MHz,\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_4,\r
+ .GPIO_Mode = GPIO_Mode_AIN,\r
+ .GPIO_Speed = GPIO_Speed_10MHz,\r
+ },\r
+\r
+ }\r
+};\r
+\r
+const Port_PortConfigType portd = {\r
+ .port = GPIOD,\r
+ .pinCount = 4,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12,\r
+ .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
+ .GPIO_Speed = GPIO_Speed_50MHz,\r
+ },\r
+ /* PD0 is CAN1_RX, remapped: */\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_0,\r
+ .GPIO_Mode = GPIO_Mode_IPU,\r
+ .GPIO_Speed = GPIO_Speed_10MHz\r
+ },\r
+ /* PD1 is CAN1_TX, remapped: */\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_1,\r
+ .GPIO_Mode = GPIO_Mode_AF_PP,\r
+ .GPIO_Speed = GPIO_Speed_10MHz\r
+ },\r
+ {\r
+ .GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_7 | GPIO_Pin_13,\r
+ .GPIO_Mode = GPIO_Mode_Out_PP,\r
+ .GPIO_Speed = GPIO_Speed_10MHz\r
+ },\r
+ }\r
+};\r
+\r
+const Port_PortConfigType porte = {\r
+ .port = GPIOE,\r
+ .pinCount = 1,\r
+ .pins = {\r
+ {\r
+ .GPIO_Pin = 0xffff,\r
+ .GPIO_Mode = GPIO_Mode_IN_FLOATING,\r
+ .GPIO_Speed = GPIO_Speed_2MHz,\r
+ },\r
+ }\r
+};\r
+\r
+const Port_ConfigType PortConfigData = {\r
+ .portCount = NUMBER_OF_PORTS,\r
+ .ports = {\r
+ &porta,\r
+ &portb,\r
+ &portc,\r
+ &portd,\r
+ &porte\r
+ },\r
+\r
+ .remapCount = sizeof(remaps) / sizeof(u32),\r
+ .remaps = &remaps[0]\r
+};\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+#include "stm32f10x_gpio.h"\r
+\r
+/** Build version info API */\r
+#define PORT_VERSION_INFO_API STD_ON /** @req PORT100 PORT101 */\r
+/** Enable Development Error Trace */\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+/** Build change pin direction API */\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+/** Allow Pin mode changes during runtime (not avail on this CPU) */\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+\r
+/** @req PORT124 */\r
+typedef uint8 Port_PinModeType;\r
+\r
+/** HW specific symbolic names of pins */\r
+/** @req PORT013 */\r
+typedef enum{\r
+ PIN1,\r
+} Port_PinType;\r
+\r
+/* Configuration of one specific port */\r
+typedef struct {\r
+ uint16_t pinCount;\r
+ GPIO_TypeDef *port;\r
+ const GPIO_InitTypeDef pins[];\r
+\r
+} Port_PortConfigType;\r
+\r
+/** Top level configuration container */\r
+/** @req PORT073 */\r
+typedef struct {\r
+ uint16_t remapCount;\r
+ const uint32_t* remaps;\r
+\r
+ uint16_t portCount;\r
+ const Port_PortConfigType* ports[];\r
+} Port_ConfigType;\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+#endif /*PORT_CFG_H_*/\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/*\r
+ * Pwm_Cfg.c\r
+ *\r
+ * Created on: 2009-okt-02\r
+ * Author: jonte\r
+ */\r
+\r
+\r
+#include "Pwm.h"\r
+#include "Pwm_Cfg.h"\r
+\r
+extern void MyPwmNotificationRoutine(void);\r
+\r
+// TODO remove, just put here for lazyness\r
+void MyPwmNotificationRoutine(void){\r
+}\r
+/* -----------------------------------------------------------------------\r
+ TIM4CLK = 72 MHz, Prescaler = 7199, TIM4 counter clock = 72 MHz\r
+ TIM4 ARR Register = 10000 => TIM4 Frequency = TIM4 counter clock/(ARR*(PSC + 1)\r
+ TIM4 Frequency = 1 Hz.\r
+ TIM4 Channel1 duty cycle = (TIM4_CCR1/ TIM4_ARR)* 100 = 12.5%\r
+\r
+\r
+ NOTE!!! All channels on one TIM uses the same Time base. The last configured will\r
+ set the Time base.\r
+ ----------------------------------------------------------------------- */\r
+const Pwm_ConfigType PwmConfig = {\r
+ .Channels = {\r
+ PWM_CHANNEL_CONFIG(PWM_CHANNEL_1, 10000, 0x4000/*50%*/, 29, PWM_HIGH),\r
+ PWM_CHANNEL_CONFIG(PWM_CHANNEL_2, 10000, 0x4000/*50%*/, 29, PWM_LOW)\r
+ },\r
+#if PWM_NOTIFICATION_SUPPORTED==ON\r
+ .NotificationHandlers = {\r
+ MyPwmNotificationRoutine, // PWM_CHANNEL_1\r
+ NULL // PWM_CHANNEL_2\r
+ }\r
+#endif\r
+};\r
+\r
+\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
* -------------------------------- Arctic Core ------------------------------*/\r
\r
+/*\r
+ * Pwm_Cfg.h\r
+ *\r
+ * Created on: 2009-okt-02\r
+ * Author: jonte\r
+ */\r
#ifndef PWM_CFG_H_\r
#define PWM_CFG_H_\r
\r
-/*
- * PwmGeneral
+/****************************************************************************\r
+ * Global configuration options and defines\r
*/\r
-\r
/*\r
- * PWM003: The detection of development errors is configurable (ON/OFF) at\r
+ * PWM003: The detection of development errors is configurable (STD_ON/STD_OFF) at\r
* pre-compile time. The switch PwmDevErorDetect shall activate or disable\r
* the detection of all development errors\r
- */
-#define PWM_DEV_EROR_DETECT STD_ON\r
-#define PWM_GET_OUTPUT_STATE STD_ON\r
-#define PWM_STATICALLY_CONFIGURED STD_OFF\r
-#define PWM_NOTIFICATION_SUPPORTED STD_ON\r
-\r
-#define PWM_SET_PERIOD_AND_DUTY STD_ON\r
-
-/*
- * PWM106: This is implementation specific but not all values may be valid
- * within the type. This shall be chosen in order to have the most efficient
- * implementation on a specific microcontroller platform.
- *
- * PWM106 => Pwm_ChannelType == eemios channel id.
- */
-typedef uint8 Pwm_ChannelType;
-
-/*
- * PWM070: All time units used within the API services of the PWM module shall
- * be of the unit ticks.
- */
-typedef uint16 Pwm_PeriodType;
-
+ */\r
+#define PWM_DEV_EROR_DETECT STD_ON\r
+#define PWM_GET_OUTPUT_STATE STD_ON\r
+#define PWM_STATICALLY_CONFIGURED STD_OFF\r
+#define PWM_NOTIFICATION_SUPPORTED STD_ON\r
+\r
+#define PWM_SET_PERIOD_AND_DUTY STD_ON\r
\r
/*\r
* PWM132: Switch for enabling the update of duty cycle parameter at the end\r
* of the current period.\r
*\r
- * Note: Currently only ON mode is supported.\r
+ * Note: Currently only STD_ON mode is supported.\r
*/\r
#define PWM_DUTYCYCLE_UPDATED_ENDPERIOD STD_ON\r
\r
-/****************************************************************************\r
- * Not defined in AUTOSAR.\r
- */\r
-#define PWM_ISR_PRIORITY 1\r
-#define PWM_PRESCALER 64\r
/*\r
- * Setting to ON freezes the current output state of a PWM channel when in\r
+ * Setting to STD_ON freezes the current output state of a PWM channel when in\r
* debug mode.\r
*/\r
#define PWM_FREEZE_ENABLE STD_ON\r
\r
+typedef uint16 Pwm_PeriodType;\r
+\r
+/*\r
+ * PWM106: This is implementation specific but not all values may be valid\r
+ * within the type. This shall be chosen in order to have the most efficient\r
+ * implementation on a specific microcontroller platform.\r
+ *\r
+ * PWM106 => Pwm_ChannelType == eemios channel id.\r
+ */\r
+typedef enum {\r
+ PWM_CHANNEL_11 = 0, // TIM1 Channel 1\r
+ PWM_CHANNEL_12,\r
+ PWM_CHANNEL_13,\r
+ PWM_CHANNEL_14,\r
+ PWM_CHANNEL_21, // TIM2 Channel 1\r
+ PWM_CHANNEL_22,\r
+ PWM_CHANNEL_23,\r
+ PWM_CHANNEL_24,\r
+ PWM_CHANNEL_31, // TIM3 Channel 1\r
+ PWM_CHANNEL_32,\r
+ PWM_CHANNEL_33,\r
+ PWM_CHANNEL_34,\r
+ PWM_CHANNEL_41, // TIM4 Channel 1\r
+ PWM_CHANNEL_42,\r
+ PWM_CHANNEL_43,\r
+ PWM_CHANNEL_44,\r
+ PWM_TOTAL_NOF_CHANNELS,\r
+} Pwm_ChannelType;\r
+\r
/****************************************************************************\r
* Enumeration of channels\r
* Maps a symbolic name to a hardware channel\r
*/\r
typedef enum {\r
-#if defined(CFG_BRD_MPC5516IT)\r
- PWM_CHANNEL_1 = 13, /* Emios channel 13 and 12 map to the */\r
- PWM_CHANNEL_2 = 12, /* LEDs LD4 and LD5 of MPC5516IT */\r
-\r
-#elif defined(CFG_BRD_MPC5567QRTECH)\r
- PWM_CHANNEL_1 = 10, /* Emios channel 10 maps to PCR189 which\r
- * is available on pin 54 of the\r
- * ERNI 154822 connector\r
- */\r
- PWM_CHANNEL_2 = 12, /* Channel 12 goes to PCR191, also\r
- * available on the ERNI 154822 connector\r
- */\r
-#else\r
-#warning "Unknown board or CFG_BRD_* undefined"\r
-#endif\r
+ PWM_CHANNEL_1 = PWM_CHANNEL_23, //PB10\r
+ PWM_CHANNEL_2 = PWM_CHANNEL_24, //PB11\r
PWM_NUMBER_OF_CHANNELS = 2\r
} Pwm_NamedChannelsType;\r
-
-typedef enum {
- PWM_CHANNEL_PRESCALER_1=0,
- PWM_CHANNEL_PRESCALER_2,
- PWM_CHANNEL_PRESCALER_3,
- PWM_CHANNEL_PRESCALER_4,
-} Pwm_ChannelPrescalerType;
-
-/*
- * Since the AUTOSAR PWM specification uses a different unit for the duty,
- * the following macro can be used to convert between that format and the
- * mpc5516 format.
- */
-#define DUTY_AND_PERIOD(_duty,_period) .duty = (_duty*_period)>>15, .period = _period
-
-#if defined(CFG_MPC5516)
- /* Mode is buffered PWM output (OPWM) */
- /* Mode is buffered Output PW and frequency modulation mode */
-#define PWM_EMIOS_OPWM 0x5A
-#elif defined(CFG_MPC5567)
- /* Mode is buffered OPWM with frequency modulation (allows change of
- * period) */
-#define PWM_EMIOS_OPWM 0x19
-#endif
-
-
-typedef struct {
- /* Number of duty ticks */
- uint32_t duty:32;
- /* Length of period, in ticks */
- uint32_t period:32;
- /* Counter */
- uint32_t counter:32;
- /* Enable freezing the channel when in debug mode */
- uint32_t freezeEnable:1;
- /* Disable output */
- uint32_t outputDisable:1;
- /* Select which bus disables the bus
- * TODO: Figure out how this works, i.e. what bus does it refer to? */
- uint32_t outputDisableSelect:2;
- /* Prescale the emios clock some more? */
- Pwm_ChannelPrescalerType prescaler:2;
- /* Prescale the emios clock some more? */
- uint32_t usePrescaler:1;
- /* Whether to use DMA. Currently unsupported */
- uint32_t useDma:1;
- uint32_t reserved_2:1;
- /* Input filter. Ignored in output mode. */
- uint32_t inputFilter:4;
- /* Input filter clock source. Ignored in output mode */
- uint32_t filterClockSelect:1;
- /* Enable interrupts/flags on this channel? Required for DMA as well. */
- uint32_t flagEnable:1;
- uint32_t reserved_3:3;
- /* Trigger a match on channel A */
- uint32_t forceMatchA:1;
- /* Triggers a match on channel B */
- uint32_t forceMatchB:1;
- uint32_t reserved_4:1;
- /* We can use different buses for the counter. Use the internal counter */
- uint32_t busSelect:2;
- /* What edges to flag on? */
- uint32_t edgeSelect:1;
- /* Polarity of the channel */
- uint32_t edgePolarity:1;
- /* EMIOS mode. 0x58 for buffered output PWM */
- uint32_t mode:7;
-} Pwm_ChannelRegisterType;
-
-typedef struct {
- Pwm_ChannelRegisterType r;
- Pwm_ChannelType channel;
-} Pwm_ChannelConfigurationType;
-
-
-typedef struct {
- Pwm_ChannelConfigurationType Channels[PWM_NUMBER_OF_CHANNELS];
-#if PWM_NOTIFICATION_SUPPORTED==STD_ON
- Pwm_NotificationHandlerType NotificationHandlers[PWM_NUMBER_OF_CHANNELS];
-#endif
-} Pwm_ConfigType;
-
-// Channel configuration macro.
-#define PWM_CHANNEL_CONFIG(_hwchannel, _period, _duty, _prescaler, _polarity) \
- {\
- .channel = _hwchannel,\
- .r = {\
- DUTY_AND_PERIOD(_duty, _period),\
- .freezeEnable = 1,\
- .outputDisable = 0,\
- .usePrescaler = 1,\
- .prescaler = _prescaler,\
- .useDma = 0,\
- .flagEnable = 0, /* See PWM052 */ \
- .busSelect = 3, /* Use the internal counter bus */\
- .edgePolarity = _polarity,\
- .mode = PWM_EMIOS_OPWM\
- }\
- }
-\r
-#endif /* PWM_CFG_H_ */\r
+\r
+\r
+/* NEW NEW */\r
+\r
+typedef enum {\r
+ PWM_CHANNEL_PRESCALER_1=0,\r
+ PWM_CHANNEL_PRESCALER_2,\r
+ PWM_CHANNEL_PRESCALER_3,\r
+ PWM_CHANNEL_PRESCALER_4,\r
+} Pwm_ChannelPrescalerType;\r
+\r
+#define DUTY_AND_PERIOD(_duty,_period) .duty = (_duty*_period)>>15, .period = _period\r
+\r
+typedef struct {\r
+ /* Number of duty ticks */\r
+ uint32_t duty:32;\r
+ /* Length of period, in ticks */\r
+ uint32_t period:32;\r
+ /* Counter */\r
+ uint32_t counter:32;\r
+ /* Enable freezing the channel when in debug mode */\r
+ uint32_t freezeEnable:1;\r
+ /* Disable output */\r
+ uint32_t outputDisable:1;\r
+ /* Select which bus disables the bus\r
+ * TODO: Figure out how this works, i.e. what bus does it refer to? */\r
+ uint32_t outputDisableSelect:2;\r
+ /* Prescale the emios clock some more? */\r
+ Pwm_ChannelPrescalerType prescaler:2;\r
+ /* Prescale the emios clock some more? */\r
+ uint32_t usePrescaler:1;\r
+ /* Whether to use DMA. Currently unsupported */\r
+ uint32_t useDma:1;\r
+ uint32_t reserved_2:1;\r
+ /* Input filter. Ignored in output mode. */\r
+ uint32_t inputFilter:4;\r
+ /* Input filter clock source. Ignored in output mode */\r
+ uint32_t filterClockSelect:1;\r
+ /* Enable interrupts/flags on this channel? Required for DMA as well. */\r
+ uint32_t flagEnable:1;\r
+ uint32_t reserved_3:3;\r
+ /* Trigger a match on channel A */\r
+ uint32_t forceMatchA:1;\r
+ /* Triggers a match on channel B */\r
+ uint32_t forceMatchB:1;\r
+ uint32_t reserved_4:1;\r
+ /* We can use different buses for the counter. Use the internal counter */\r
+ uint32_t busSelect:2;\r
+ /* What edges to flag on? */\r
+ uint32_t edgeSelect:1;\r
+ /* Polarity of the channel */\r
+ uint32_t edgePolarity:1;\r
+ /* EMIOS mode. 0x58 for buffered output PWM */\r
+ uint32_t mode:7;\r
+} Pwm_ChannelRegisterType;\r
+\r
+typedef struct {\r
+ Pwm_ChannelRegisterType r;\r
+ Pwm_ChannelType channel;\r
+} Pwm_ChannelConfigurationType;\r
+\r
+\r
+typedef struct {\r
+ Pwm_ChannelConfigurationType Channels[PWM_NUMBER_OF_CHANNELS];\r
+#if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
+ Pwm_NotificationHandlerType NotificationHandlers[PWM_NUMBER_OF_CHANNELS];\r
+#endif\r
+} Pwm_ConfigType;\r
+\r
+// Channel configuration macro.\r
+#define PWM_CHANNEL_CONFIG(_hwchannel, _period, _duty, _prescaler, _polarity) \\r
+ {\\r
+ .channel = _hwchannel,\\r
+ .r = {\\r
+ DUTY_AND_PERIOD(_duty, _period),\\r
+ .freezeEnable = 1,\\r
+ .outputDisable = 0,\\r
+ .usePrescaler = 1,\\r
+ .prescaler = _prescaler,\\r
+ .useDma = 0,\\r
+ .flagEnable = 0, /* See PWM052 */ \\r
+ .busSelect = 3, /* Use the internal counter bus */\\r
+ .edgePolarity = _polarity,\\r
+ .mode = 0\\r
+ }\\r
+ }\r
+\r
+#endif /*PWM_CFG_H_*/\r
if( fd <= STDERR_FILENO ) {
#ifdef USE_TTY_WINIDEA
- if (g_TConn)
- {
- unsigned char nCnt,nLen;
- for(nCnt=0; nCnt<nbytes; nCnt++)
- {
- while(TWBUFF_FULL());
- nLen=TWBUFF_TPTR;
- g_TWBuffer[nLen]=buf[nCnt];
- nLen=TWBUFF_INC(nLen);
- TWBUFF_TPTR=nLen;
- }
- }
+ if (g_TConn)
+ {
+ unsigned char nCnt,nLen;
+ for(nCnt=0; nCnt<nbytes; nCnt++)
+ {
+ while(TWBUFF_FULL());
+ nLen=TWBUFF_TPTR;
+ g_TWBuffer[nLen]=buf[nCnt];
+ nLen=TWBUFF_INC(nLen);
+ TWBUFF_TPTR=nLen;
+ }
+ }
#endif
#ifdef USE_TTY_T32
- for (int i = 0; i < nbytes; i++) {
- if (*(buf + i) == '\n') {
- t32_writebyte ('\r');
+ for (int i = 0; i < nbytes; i++) {
+ if (*(buf + i) == '\n') {
+ t32_writebyte ('\r');
// t32_writebyte ('\n');
- }
- t32_writebyte (*(buf + i));
- }
+ }
+ t32_writebyte (*(buf + i));
+ }
#endif
+
#ifdef USE_TTY_ARM_ITM
- for (int i = 0; i < nbytes; i++) {
- ITM_SendChar(*(buf + i));
- }
+ for (int i = 0; i < nbytes; i++) {
+ ITM_SendChar(*(buf + i));
+ }
+#endif
+
+#if defined(USE_RAMLOG)
+ for (int i = 0; i < nbytes; i++) {
+ ramlog_chr (*(buf + i));
+ }
#endif
}
#include <stdio.h>
#include <stdarg.h>
#include <assert.h>
+#include <string.h>
//#define HOST_TEST 1
#include "debug.h"
#include "PduR.h"
+#if defined(USE_CANTP)
+#include "CanTp_Cbk.h"
+#endif
+
#if 0
// TODO: Include upper layer functions, See CANIF208 and CANIF233
#include "PduR_CanIf.h"
static CanIf_Arc_ChannelIdType CanIf_Arc_FindHrhChannel( Can_Arc_HRHType hrh )
{
+ const CanIf_InitHohConfigType *hohConfig;
const CanIf_HrhConfigType *hrhConfig;
- hrhConfig = CanIf_ConfigPtr->InitConfig->CanIfHohConfigPtr->CanIfHrhConfig;
-
- hrhConfig--;
+ // foreach(hoh){ foreach(hrh in hoh) {} }
+ hohConfig = CanIf_ConfigPtr->InitConfig->CanIfHohConfigPtr;
+ hohConfig--;
do
{
- hrhConfig++;
- if (hrhConfig->CanIfHrhIdSymRef == hrh)
- return hrhConfig->CanIfCanControllerHrhIdRef;
- } while(!hrhConfig->CanIf_Arc_EOL);
+ hohConfig++;
+
+ hrhConfig = hohConfig->CanIfHrhConfig;
+ hrhConfig--;
+ do
+ {
+ hrhConfig++;
+ if (hrhConfig->CanIfHrhIdSymRef == hrh)
+ return hrhConfig->CanIfCanControllerHrhIdRef;
+ } while(!hrhConfig->CanIf_Arc_EOL);
+ } while(!hohConfig->CanIf_Arc_EOL);
DET_REPORTERROR(MODULE_ID_CANIF, 0, CANIF_RXINDICATION_ID, CANIF_E_PARAM_HRH);
*/
static const CanIf_TxPduConfigType * CanIf_FindTxPduEntry(PduIdType id)
{
- const CanIf_TxPduConfigType *entry =
- CanIf_ConfigPtr->InitConfig->CanIfTxPduConfigPtr;
-
+ if (id >= CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds) {
+ return NULL;
+ } else {
+ return &CanIf_ConfigPtr->InitConfig->CanIfTxPduConfigPtr[id];
+ }
+/*
for (uint16 i = 0; i < CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds; i++)
{
if (entry->CanIfTxPduId == id)
}
return 0;
+ */
}
//-------------------------------------------------------------------
void CanIf_TxConfirmation(PduIdType canTxPduId)
{
VALIDATE_NO_RV(CanIf_Global.initRun, CANIF_TXCONFIRMATION_ID, CANIF_E_UNINIT)
+ VALIDATE_NO_RV(canTxPduId < CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds, CANIF_TXCONFIRMATION_ID, CANIF_E_PARAM_LPDU);
- const CanIf_TxPduConfigType *entry =
- CanIf_ConfigPtr->InitConfig->CanIfTxPduConfigPtr;
+ const CanIf_TxPduConfigType* entry =
+ &CanIf_ConfigPtr->InitConfig->CanIfTxPduConfigPtr[canTxPduId];
/* Find the CAN id in the TxPduList */
+ /*
for (uint16 i = 0; i < CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds; i++)
{
if (entry->CanIfTxPduId == canTxPduId)
{
+ */
if (entry->CanIfUserTxConfirmation != NULL)
{
CanIf_ChannelGetModeType mode;
if ((mode == CANIF_GET_TX_ONLINE) || (mode == CANIF_GET_ONLINE)
|| (mode == CANIF_GET_OFFLINE_ACTIVE) || (mode == CANIF_GET_OFFLINE_ACTIVE_RX_ONLINE) )
{
- entry->CanIfUserTxConfirmation(canTxPduId); /* CANIF053 */
+ entry->CanIfUserTxConfirmation(entry->CanIfTxPduId); /* CANIF053 */
}
}
return;
+ /*
}
entry++;
}
-
+ */
// Did not find the PDU, something is wrong
- VALIDATE_NO_RV(FALSE, CANIF_TXCONFIRMATION_ID, CANIF_E_PARAM_LPDU);
+
}
void CanIf_RxIndication(uint8 Hrh, Can_IdType CanId, uint8 CanDlc,
return;
}
break;
- case CANIF_USER_TYPE_CAN_NM:
- case CANIF_USER_TYPE_CAN_PDUR:
- // Send Can frame to PDU router
- PduR_CanIfRxIndication(entry->CanIfCanRxPduId,CanSduPtr);
- return;
- break;
-
- case CANIF_USER_TYPE_CAN_TP:
- continue; // Not supported yet
+
+ case CANIF_USER_TYPE_CAN_NM:
+ case CANIF_USER_TYPE_CAN_PDUR:
+ // Send Can frame to PDU router
+ PduR_CanIfRxIndication(entry->CanIfCanRxPduId,CanSduPtr);
return;
- break;
+ break;
+
+ case CANIF_USER_TYPE_CAN_TP:
+ // Send Can frame to CAN TP
+#if defined(USE_CANTP)
+ {
+ PduInfoType CanTpRxPdu;
+ CanTpRxPdu.SduLength = CanDlc;
+ CanTpRxPdu.SduDataPtr = (uint8 *)CanSduPtr;
+ CanTp_RxIndication(entry->CanIfCanRxPduId, &CanTpRxPdu); /** @req CANTP019 */
+ }
+ return;
+#endif
+ break;
}
}
const CanIf_TxPduConfigType *entry =
CanIf_ConfigPtr->InitConfig->CanIfTxPduConfigPtr;
- /* Find the CAN id in the TxPduList */
- for (uint16 i = 0; i < CanIf_ConfigPtr->InitConfig->CanIfNumberOfCanTXPduIds; i++)
- {
- if (entry->CanIfTxPduId == canTxPduId)
- {
- // Not supported
- return;
- }
-
- entry++;
- }
+ // Not supported
// Did not find the PDU, something is wrong
VALIDATE_NO_RV(FALSE, CANIF_TXCONFIRMATION_ID, CANIF_E_PARAM_LPDU);
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>. \r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/** @addtogroup TBD\r
+ * @{ */\r
+\r
+/** @file CanTp.c\r
+ * TBD.\r
+ */\r
+\r
+/** @req CANTP150 */\r
+/** @req CANTP151 */\r
+/** @req CANTP152 */\r
+/** @req CANTP153 */\r
+/** @req CANTP155 */\r
+/** @req CANTP158 */\r
+/** @req CANTP003 */\r
+/** @req CANTP216 */\r
+\r
+#include "Det.h"\r
+#include "CanIf.h"\r
+#include "CanTp_Cfg.h" /** @req CANTP156 */\r
+#include "CanTp_Cbk.h" /** @req CANTP156 *//** @req CANTP233 */\r
+#include "CanTp.h" /** @req CANTP156 */ /** @req CANTP219 */\r
+#include "SchM_CanTp.h" /** @req CANTP156 */\r
+#include "PduR_CanTp.h"\r
+//#include "MemMap.h" /** @req CANTP156 */\r
+#include <string.h>\r
+//#define USE_DEBUG_PRINTF\r
+#include "debug.h"\r
+\r
+#if ( CANTP_DEV_ERROR_DETECT == STD_ON ) /** @req CANTP006 *//** @req CANTP134 */\r
+\r
+/** @req CANTP132 */ /** @req CANTP021 */\r
+#define VALIDATE(_exp,_api,_err ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_CANTP, 0, _api, _err); \\r
+ return E_NOT_OK; \\r
+ }\r
+ /** @req CANTP132 */ /** @req CANTP021 */\r
+#define VALIDATE_NO_RV(_exp,_api,_err ) \\r
+ if( !(_exp) ) { \\r
+ Det_ReportError(MODULE_ID_CANTP, 0, _api, _err); \\r
+ return; \\r
+ }\r
+#undef DET_REPORTERROR\r
+#define DET_REPORTERROR(_x,_y,_z,_q) Det_ReportError(_x, _y, _z, _q)\r
+\r
+#else\r
+#define VALIDATE(_exp,_api,_err )\r
+#define VALIDATE_NO_RV(_exp,_api,_err )\r
+#define DET_REPORTERROR(_x,_y,_z,_q)\r
+#endif\r
+\r
+\r
+#if 0\r
+\r
+NotifResultType PduR_CanTpRxIndication(PduIdType CanTpRxPduId,\r
+ NotifResultType Result) {\r
+ ;\r
+\r
+}\r
+\r
+BufReq_ReturnType PduR_CanTpProvideRxBuffer(PduIdType id, PduLengthType length,\r
+ PduInfoType **PduInfoPtr) {\r
+ ;\r
+}\r
+\r
+BufReq_ReturnType PduR_CanTpProvideTxBuffer(PduIdType CanTpTxId,\r
+ PduInfoType** PduinfoPtr, uint16 Length) {\r
+ ;\r
+}\r
+\r
+void PduR_CanTpTxConfirmation(PduIdType CanTpTxPduId, NotifResultType Result) {\r
+ ;\r
+\r
+}\r
+\r
+#endif\r
+\r
+//#define INLINE inline\r
+#define INLINE inline\r
+\r
+#define TIMER_DECREMENT(timer) \\r
+ if (timer > 0) { \\r
+ timer = timer - 1; \\r
+ } \\r
+\r
+#define COUNT_DECREMENT(timer) \\r
+ if (timer > 0) { \\r
+ timer = timer - 1; \\r
+ } \\r
+\r
+\r
+#define CANTP_ERR -1\r
+#define ISO15765_FLOW_CONTROL_STATUS_CTS 0\r
+#define ISO15765_FLOW_CONTROL_STATUS_WAIT 1\r
+#define ISO15765_FLOW_CONTROL_STATUS_OVFLW 2\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+#define ISO15765_TPCI_MASK 0x30\r
+#define ISO15765_TPCI_SF 0x00 /* Single Frame */\r
+#define ISO15765_TPCI_FF 0x10 /* First Frame */\r
+#define ISO15765_TPCI_CF 0x20 /* Consecutive Frame */\r
+#define ISO15765_TPCI_FC 0x30 /* Flow Control */\r
+#define ISO15765_TPCI_DL 0x7 /* Single frame data length mask */\r
+#define ISO15765_TPCI_FS_MASK 0x0F /* Flowcontrol status mask*/\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+#define MAX_PAYLOAD_SF_STD_ADDR 7\r
+#define MAX_PAYLOAD_SF_EXT_ADDR 6\r
+\r
+#define MAX_PAYLOAD_FF_STD_ADDR 6\r
+#define MAX_PAYLOAD_FF_EXT_ADDR 5\r
+\r
+#define MAX_PAYLOAD_CF_STD_ADDR 7\r
+#define MAX_PAYLOAD_CF_EXT_ADDR 6\r
+\r
+#define SEGMENT_NUMBER_MASK 0x0f\r
+\r
+#define MAX_SEGMENT_DATA_SIZE 8 // Size of a CAN frame data bytes.\r
+\r
+/*\r
+ *\r
+ */\r
+typedef enum {\r
+ UNINITIALIZED, IDLE, SF_OR_FF_RECEIVED_WAITING_PDUR_BUFFER, /** Req: CanTp079. */\r
+ RX_WAIT_CONSECUTIVE_FRAME, RX_WAIT_SDU_BUFFER,\r
+\r
+ TX_WAIT_CAN_TP_TRANSMIT_CAN_TP_PROVIDE_TX_BUFFER, /** req: CanTp 226. */\r
+ TX_WAIT_CAN_TP_TRANSMIT_PENDING, /* CanTP_Transmit was called but no buffer was received (BUSY). */\r
+ TX_WAIT_SEND_CONSECUTIVE_FRAME, TX_WAIT_FLOW_CONTROL\r
+} ISO15765TransferStateTypes;\r
+\r
+typedef enum {\r
+ INVALID_FRAME, /* Not specified by ISO15765 - used as error return type when decoding frame. */\r
+ SINGLE_FRAME, FIRST_FRAME, CONSECUTIVE_FRAME, FLOW_CONTROL_CTS_FRAME, /* Clear to send */\r
+ FLOW_CONTROL_WAIT_FRAME, FLOW_CONTROL_OVERFLOW_FRAME\r
+} ISO15765FrameType;\r
+\r
+typedef enum {\r
+ SEND_NEXT_CONSECUTIVE_FRAME, WAIT_FLOW_CONTROL, TRANSFER_FINISHED\r
+} ISO15765TxStateTypes;\r
+\r
+/*\r
+ * In case no buffer is available at some cases the data needs to be\r
+ * temporarly stored away.\r
+ */\r
+\r
+typedef struct {\r
+ uint8 data[MAX_SEGMENT_DATA_SIZE];\r
+ PduLengthType byteCount;\r
+} CanIfSduType;\r
+\r
+/*\r
+ * Structure that is keeping track on the run-time variables for the ongoing\r
+ * transfer.\r
+ */\r
+typedef struct {\r
+ uint16 nextFlowControlCount; // Count down to next Flow Control.\r
+ uint16 framesHandledCount; // Counter keeping track total frames handled.\r
+ uint8 extendedAddress; // Not always used but need to be available.\r
+ uint32 stateTimeoutCount; // Counter for timeout.\r
+ uint8 STmin; // In case we are transmitters the remote node can configure this value (only valid for TX).\r
+ uint8 BS; // Blocksize (only valid for TX).\r
+ boolean NasNarPending;\r
+ uint32 NasNarTimeoutCount; // CanTpNas, CanTpNar.\r
+ ISO15765TransferStateTypes state; // Transfer state machine. qqq: Can this be initialized here?\r
+} ISO15765TransferControlType;\r
+\r
+/*\r
+ * Container for TX or RX runtime paramters (TX/RX are identical?)\r
+ */\r
+typedef struct {\r
+ ISO15765TransferControlType iso15765;\r
+ PduInfoType *pdurBuffer; // The PDUR make an instance of this.\r
+ PduLengthType pdurBufferCount; // Number of bytes in PDUR buffer.\r
+ PduLengthType transferTotal; // Total length of the PDU.\r
+ PduLengthType transferCount; // Counter ongoing transfer.\r
+ CanIfSduType canFrameBuffer; // Temp storage of SDU data.\r
+ CanTp_TransferInstanceMode mode; // CanTp030.\r
+} CanTp_ChannelPrivateType;\r
+\r
+\r
+#define CANIF_PDU_MAX_LENGTH 0x08 // Max length is 8 (it is CAN dlc=8).\r
+\r
+typedef struct {\r
+ PduIdType PduId;\r
+ uint8 SduData[CANIF_PDU_MAX_LENGTH];\r
+ PduLengthType SduLength;\r
+} CanTpFifoQueueItem;\r
+\r
+#define FIFO_QUEUE_DEPTH 10\r
+\r
+typedef struct {\r
+ int fifoQueueReadIndex;\r
+ int fifoQueueWriteIndex;\r
+ CanTpFifoQueueItem queueList[FIFO_QUEUE_DEPTH];\r
+} CanTpFifo;\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+typedef struct {\r
+ boolean initRun;\r
+ CanTpFifo fifo;\r
+ CanTp_StateType internalState; /** @req CANTP027 */\r
+ CanTp_ChannelPrivateType runtimeDataList[CANTP_NSDU_RUNTIME_LIST_SIZE];\r
+} CanTp_RunTimeDataType;\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+#if (CANTP_VERSION_INFO_API == STD_ON) /** @req CANTP162 *//** @req CANTP163 */\r
+static Std_VersionInfoType _CanTp_VersionInfo =\r
+{\r
+ .vendorID = (uint16)1,\r
+ .moduleID = (uint16)1,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)CANTP_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)CANTP_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)CANTP_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)CANTP_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)CANTP_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)CANTP_AR_PATCH_VERSION,\r
+};\r
+#endif /* DEM_VERSION_INFO_API */\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+CanTp_RunTimeDataType CanTpRunTimeData = { .initRun = FALSE,\r
+ .internalState = CANTP_OFF }; /** @req CANTP168 */\r
+\r
+static INLINE void fifoQueueInit( CanTpFifo *fifoQueue ) {\r
+ fifoQueue->fifoQueueReadIndex = 0;\r
+ fifoQueue->fifoQueueWriteIndex = 0;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE boolean fifoQueueRead( CanTpFifo *fifoQueue, CanTpFifoQueueItem *item ) {\r
+ boolean ret = FALSE;\r
+ int readIndex = 0;\r
+ readIndex = fifoQueue->fifoQueueReadIndex;\r
+ if ( fifoQueue->fifoQueueReadIndex !=\r
+ fifoQueue->fifoQueueWriteIndex ) {\r
+\r
+ if (++readIndex == FIFO_QUEUE_DEPTH) {\r
+ readIndex = 0;\r
+ }\r
+ item->PduId = fifoQueue->queueList[fifoQueue->fifoQueueReadIndex].PduId;\r
+ item->SduLength = fifoQueue->queueList[fifoQueue->fifoQueueReadIndex].SduLength;\r
+ for (int i=0; i<item->SduLength; i++) {\r
+ item->SduData[i] = fifoQueue->queueList[fifoQueue->fifoQueueReadIndex].SduData[i];\r
+ }\r
+ fifoQueue->fifoQueueReadIndex = readIndex;\r
+ ret = TRUE;\r
+ } else {\r
+ ret = FALSE;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE boolean fifoQueueWrite( CanTpFifo *fifoQueue, CanTpFifoQueueItem *item ) {\r
+ boolean ret = FALSE;\r
+ int writeIndex;\r
+ writeIndex = fifoQueue->fifoQueueWriteIndex;\r
+ if (++writeIndex == FIFO_QUEUE_DEPTH) {\r
+ writeIndex = 0;\r
+ }\r
+ if ( writeIndex != fifoQueue->fifoQueueReadIndex ) { // Check if space left.\r
+ fifoQueue->queueList[fifoQueue->fifoQueueWriteIndex].PduId = item->PduId;\r
+ fifoQueue->queueList[fifoQueue->fifoQueueWriteIndex].SduLength = item->SduLength;\r
+ for (int i=0; i<item->SduLength;i++) {\r
+ fifoQueue->queueList[fifoQueue->fifoQueueWriteIndex].SduData[i] = item->SduData[i];\r
+ }\r
+ fifoQueue->fifoQueueWriteIndex = writeIndex;\r
+ ret = TRUE;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static inline ISO15765FrameType getFrameType(\r
+ const CanTp_AddressingFormantType *formatType,\r
+ const PduInfoType *CanTpRxPduPtr) {\r
+ ISO15765FrameType res = INVALID_FRAME;\r
+ uint8 tpci = 0;\r
+\r
+ switch (*formatType) {\r
+ case CANTP_STANDARD:\r
+ DEBUG( DEBUG_MEDIUM, "CANTP_STANDARD\n")\r
+ tpci = CanTpRxPduPtr->SduDataPtr[0];\r
+ break;\r
+ case CANTP_EXTENDED:\r
+ DEBUG( DEBUG_MEDIUM, "CANTP_EXTENDED\n")\r
+ tpci = CanTpRxPduPtr->SduDataPtr[1];\r
+ break;\r
+ default:\r
+ break;\r
+ }\r
+\r
+ switch (tpci & ISO15765_TPCI_MASK) {\r
+ case ISO15765_TPCI_SF:\r
+ res = SINGLE_FRAME;\r
+ break;\r
+ case ISO15765_TPCI_FF:\r
+ res = FIRST_FRAME;\r
+ break;\r
+ case ISO15765_TPCI_CF:\r
+ res = CONSECUTIVE_FRAME;\r
+ break;\r
+ case ISO15765_TPCI_FC: // Some kind of flow control.\r
+ switch (tpci & ISO15765_TPCI_FS_MASK) {\r
+ case ISO15765_FLOW_CONTROL_STATUS_CTS:\r
+ res = FLOW_CONTROL_CTS_FRAME;\r
+ break;\r
+ case ISO15765_FLOW_CONTROL_STATUS_WAIT:\r
+ res = FLOW_CONTROL_CTS_FRAME;\r
+ break;\r
+ case ISO15765_FLOW_CONTROL_STATUS_OVFLW:\r
+ res = FLOW_CONTROL_CTS_FRAME;\r
+ break;\r
+ }\r
+ }\r
+ return res;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static inline PduLengthType getPduLength(\r
+ const CanTp_AddressingFormantType *formatType,\r
+ const ISO15765FrameType iso15765Frame, const PduInfoType *CanTpRxPduPtr) {\r
+ PduLengthType res = 0;\r
+ uint8 tpci_offset = 0;\r
+\r
+ switch (*formatType) {\r
+ case CANTP_STANDARD:\r
+ tpci_offset = 0;\r
+ break;\r
+ case CANTP_EXTENDED:\r
+ tpci_offset = 1;\r
+ break;\r
+ default:\r
+ return 0;\r
+ }\r
+\r
+ switch (iso15765Frame) {\r
+ case SINGLE_FRAME:\r
+ // Parse the data length from the single frame header.\r
+ res = CanTpRxPduPtr->SduDataPtr[tpci_offset] & ISO15765_TPCI_DL;\r
+ break;\r
+ case FIRST_FRAME:\r
+ // Parse the data length form the first frame.\r
+ res = CanTpRxPduPtr->SduDataPtr[tpci_offset + 1] + (PduLengthType)(\r
+ (CanTpRxPduPtr->SduDataPtr[tpci_offset]) & 0xf << 8);\r
+ break;\r
+ default:\r
+ res = 0; // qqq maybe we should have an error code here.\r
+ break;\r
+ }\r
+ return res;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+void initRx15765RuntimeData(const CanTp_RxNSduType *rxConfigParams,\r
+ CanTp_ChannelPrivateType *rxRuntimeParams) {\r
+\r
+ rxRuntimeParams->iso15765.state = IDLE;\r
+ rxRuntimeParams->iso15765.NasNarPending = FALSE;\r
+ rxRuntimeParams->iso15765.framesHandledCount = 0;\r
+ rxRuntimeParams->iso15765.nextFlowControlCount = 0;\r
+ rxRuntimeParams->pdurBufferCount = 0;\r
+ rxRuntimeParams->transferTotal = 0;\r
+ rxRuntimeParams->transferCount = 0;\r
+ rxRuntimeParams->mode = CANTP_RX_WAIT; /** @req CANTP030 */\r
+ rxRuntimeParams->pdurBuffer = NULL;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+void initTx15765RuntimeData(const CanTp_TxNSduType *txConfigParams,\r
+ CanTp_ChannelPrivateType *txRuntimeParams) {\r
+\r
+ txRuntimeParams->iso15765.state = IDLE;\r
+ txRuntimeParams->iso15765.NasNarPending = FALSE;\r
+ txRuntimeParams->iso15765.framesHandledCount = 0;\r
+ txRuntimeParams->iso15765.nextFlowControlCount = 0;\r
+ txRuntimeParams->pdurBufferCount = 0;\r
+ txRuntimeParams->transferTotal = 0;\r
+ txRuntimeParams->transferCount = 0;\r
+ txRuntimeParams->mode = CANTP_TX_WAIT; /** @req CANTP030 */\r
+ txRuntimeParams->pdurBuffer = NULL;\r
+\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE BufReq_ReturnType copySegmentToPduRRxBuffer(const CanTp_RxNSduType *rxConfig,\r
+ CanTp_ChannelPrivateType *rxRuntime, uint8 *segment,\r
+ PduLengthType segmentSize, PduLengthType *bytesWrittenSuccessfully) {\r
+\r
+ BufReq_ReturnType ret = BUFREQ_NOT_OK;\r
+ boolean error = FALSE;\r
+ *bytesWrittenSuccessfully = 0;\r
+\r
+ while ((*bytesWrittenSuccessfully < segmentSize) && error == FALSE) {\r
+ // Copy the data that resides in the buffer.\r
+ if (rxRuntime->pdurBuffer != NULL) {\r
+ while ((*bytesWrittenSuccessfully < segmentSize ) &&\r
+ (rxRuntime->pdurBuffer->SduLength > rxRuntime->pdurBufferCount)) {\r
+ rxRuntime->pdurBuffer->SduDataPtr[rxRuntime->pdurBufferCount++]\r
+ = segment[(*bytesWrittenSuccessfully)++];\r
+ }\r
+ }\r
+ if (*bytesWrittenSuccessfully < segmentSize ) {\r
+ // We need to request a new buffer from the SDUR.\r
+ // qqq: TODO: We should do a timeout here.\r
+ ret = PduR_CanTpProvideRxBuffer(rxConfig->PduR_PduId, /** @req CANTP079 */ /** @req CANTP080 */ /** @req CANTP064 */\r
+ rxRuntime->transferTotal,\r
+ &rxRuntime->pdurBuffer);\r
+ if (ret == BUFREQ_OK) {\r
+ VALIDATE( rxRuntime->pdurBuffer->SduDataPtr != NULL,\r
+ SERVICE_ID_CANTP_TRANSMIT, CANTP_E_INVALID_RX_BUFFER );\r
+ rxRuntime->pdurBufferCount = 0; // The buffer is emptied.\r
+ } else if (ret == BUFREQ_BUSY) {\r
+ rxRuntime->transferCount += *bytesWrittenSuccessfully;\r
+ error = TRUE;\r
+ break;\r
+ } else {\r
+ error = TRUE; // Let calling function handle this error.\r
+ break;\r
+ }\r
+ } else {\r
+ rxRuntime->transferCount += segmentSize; //== bytesWrittenSuccessfully\r
+ ret = BUFREQ_OK;\r
+ break;\r
+ }\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE boolean copySegmentToLocalRxBuffer /*writeDataSegmentToLocalBuffer*/(\r
+ CanTp_ChannelPrivateType *rxRuntime, uint8 *segment,\r
+ PduLengthType segmentSize) {\r
+ boolean ret = FALSE;\r
+\r
+ if ( segmentSize < MAX_SEGMENT_DATA_SIZE ) {\r
+ for (int i=0; i < segmentSize; i++) {\r
+ rxRuntime->canFrameBuffer.data[i] = segment[i];\r
+ }\r
+ rxRuntime->canFrameBuffer.byteCount = segmentSize;\r
+ ret = TRUE;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE Std_ReturnType canReceivePaddingHelper(\r
+ const CanTp_RxNSduType *rxConfig, CanTp_ChannelPrivateType *rxRuntime,\r
+ PduInfoType *PduInfoPtr) {\r
+ if (rxConfig->CanTpRxPaddingActivation == CANTP_ON) {\r
+ for (int i = PduInfoPtr->SduLength; i < CANIF_PDU_MAX_LENGTH; i++) {\r
+ PduInfoPtr->SduDataPtr[i] = 0x0; // qqq: Does it have to be padded with zeroes?\r
+ }\r
+ PduInfoPtr->SduLength = CANIF_PDU_MAX_LENGTH;\r
+ }\r
+ rxRuntime->iso15765.NasNarTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNar * 1000); // req: CanTp075.\r
+ rxRuntime->iso15765.NasNarPending = TRUE;\r
+ return CanIf_Transmit(rxConfig->CanIf_FcPduId, PduInfoPtr);\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE Std_ReturnType canTansmitPaddingHelper(\r
+ const CanTp_TxNSduType *txConfig, CanTp_ChannelPrivateType *txRuntime,\r
+ PduInfoType *PduInfoPtr) {\r
+\r
+ /** @req CANTP114 */\r
+ /** @req CANTP040 */\r
+ /** @req CANTP098 */\r
+ /** @req CANTP116 */\r
+ /** @req CANTP059 */\r
+\r
+ if (txConfig->CanTpTxPaddingActivation == CANTP_ON) { /** @req CANTP225 */\r
+ for (int i = PduInfoPtr->SduLength; i < CANIF_PDU_MAX_LENGTH; i++) {\r
+ PduInfoPtr->SduDataPtr[i] = 0x0; // qqq: Does it have to be padded with zeroes?\r
+ }\r
+ PduInfoPtr->SduLength = CANIF_PDU_MAX_LENGTH;\r
+ }\r
+ txRuntime->iso15765.NasNarTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(txConfig->CanTpNas * 1000); // req: CanTp075.\r
+ txRuntime->iso15765.NasNarPending = TRUE;\r
+ return CanIf_Transmit(txConfig->CanIf_PduId, PduInfoPtr);\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE void sendFlowControlFrame(const CanTp_RxNSduType *rxConfig,\r
+ CanTp_ChannelPrivateType *rxRuntime, BufReq_ReturnType flowStatus) {\r
+ int indexCount = 0;\r
+ Std_ReturnType ret = E_NOT_OK;\r
+ PduInfoType pduInfo;\r
+ uint8 sduData[8]; // Note that buffer in declared on the stack.\r
+ uint16 spaceFreePduRBuffer = 0;\r
+ uint8 computedBs = 0; // req:CanTp064 and example.\r
+\r
+ DEBUG( DEBUG_MEDIUM, "sendFlowControlFrame called!\n");\r
+ pduInfo.SduDataPtr = &sduData[0];\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_EXTENDED) {\r
+ sduData[indexCount++] = rxRuntime->iso15765.extendedAddress;\r
+ }\r
+ switch (flowStatus) {\r
+ case BUFREQ_OK:\r
+ {\r
+ sduData[indexCount++] = ISO15765_TPCI_FC\r
+ | ISO15765_FLOW_CONTROL_STATUS_CTS;\r
+ spaceFreePduRBuffer = rxRuntime->pdurBuffer->SduLength -\r
+ rxRuntime->pdurBufferCount;\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
+ computedBs = spaceFreePduRBuffer / MAX_PAYLOAD_SF_EXT_ADDR + 1; // + 1 is for local buffer.\r
+ } else {\r
+ computedBs = spaceFreePduRBuffer / MAX_PAYLOAD_SF_STD_ADDR + 1; // + 1 is for local buffer.\r
+ }\r
+ if (computedBs > rxConfig->CanTpBs) { // /** @req CANTP091 *//** @req CANTP084 */\r
+ computedBs = rxConfig->CanTpBs;\r
+ }\r
+ DEBUG( DEBUG_MEDIUM, "computedBs:%d\n", computedBs);\r
+ sduData[indexCount++] = computedBs;\r
+ sduData[indexCount++] = (uint8) rxConfig->CanTpSTmin;\r
+ rxRuntime->iso15765.nextFlowControlCount = (uint8) computedBs;\r
+ pduInfo.SduLength = indexCount;\r
+ break;\r
+ }\r
+ case BUFREQ_NOT_OK:\r
+ break;\r
+ case BUFREQ_BUSY:\r
+ sduData[indexCount++] = ISO15765_TPCI_FC\r
+ | ISO15765_FLOW_CONTROL_STATUS_WAIT;\r
+ pduInfo.SduLength = indexCount;\r
+ break;\r
+ case BUFREQ_OVFL: /** @req CANTP081 */\r
+ sduData[indexCount++] = ISO15765_TPCI_FC\r
+ | ISO15765_FLOW_CONTROL_STATUS_OVFLW;\r
+ pduInfo.SduLength = indexCount;\r
+ break;\r
+ default:\r
+ break;\r
+ }\r
+ ret = canReceivePaddingHelper(rxConfig, rxRuntime, &pduInfo);\r
+ if (ret != E_OK) {\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_E_NOT_OK); /** @req CANTP084 */\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+\r
+static INLINE void handleConsecutiveFrame(const CanTp_RxNSduType *rxConfig,\r
+ CanTp_ChannelPrivateType *rxRuntime, const PduInfoType *rxPduData) {\r
+ int indexCount = 0;\r
+ uint8 segmentNumber = 0;\r
+ uint8 extendedAddress = 0;\r
+ PduLengthType bytesLeftToCopy = 0;\r
+ PduLengthType bytesLeftToTransfer = 0;\r
+ PduLengthType currentSegmentSize = 0;\r
+ PduLengthType currentSegmentMaxSize = 0;\r
+ PduLengthType bytesCopiedToPdurRxBuffer = 0;\r
+ BufReq_ReturnType ret = BUFREQ_NOT_OK;\r
+\r
+ if (rxRuntime->iso15765.state == RX_WAIT_CONSECUTIVE_FRAME) {\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_EXTENDED) {\r
+ extendedAddress = rxPduData->SduDataPtr[indexCount++];\r
+ }\r
+ segmentNumber = rxPduData->SduDataPtr[indexCount++] & SEGMENT_NUMBER_MASK;\r
+ if (segmentNumber != (rxRuntime->iso15765.framesHandledCount\r
+ & SEGMENT_NUMBER_MASK)) {\r
+ DEBUG(DEBUG_MEDIUM,"Segmentation number error detected - is the sending"\r
+ "unit too fast? Increase STmin (cofig) to slow it down!\n");\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_E_WRONG_SN); /** @req CANTP084 */\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ } else {\r
+ currentSegmentMaxSize = CANIF_PDU_MAX_LENGTH - indexCount;\r
+ bytesLeftToCopy = rxRuntime->transferTotal\r
+ - rxRuntime->transferCount;\r
+ if (bytesLeftToCopy < currentSegmentMaxSize) {\r
+ currentSegmentSize = bytesLeftToCopy; // 1-5.\r
+ } else {\r
+ currentSegmentSize = currentSegmentMaxSize; // 6 or 7, depends on addressing format used.\r
+ }\r
+ // Copy received data to buffer provided by SDUR.\r
+ ret = copySegmentToPduRRxBuffer(rxConfig, rxRuntime,\r
+ &rxPduData->SduDataPtr[indexCount],\r
+ currentSegmentSize,\r
+ &bytesCopiedToPdurRxBuffer);\r
+ if (ret == BUFREQ_NOT_OK) {\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_E_NO_BUFFER); /** @req CANTP084 */\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ } else if (ret == BUFREQ_BUSY) {\r
+ boolean dataCopyFailure = FALSE;\r
+ PduLengthType bytesNotCopiedToPdurRxBuffer =\r
+ currentSegmentSize - bytesCopiedToPdurRxBuffer;\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_STANDARD) {\r
+ if ( copySegmentToLocalRxBuffer(rxRuntime, /** @req CANTP067 */\r
+ &rxPduData->SduDataPtr[1 + bytesCopiedToPdurRxBuffer],\r
+ bytesNotCopiedToPdurRxBuffer ) != TRUE ) {\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ dataCopyFailure = TRUE;\r
+ DEBUG( DEBUG_MEDIUM, "Unexpected error, could not copy 'unaligned leftover' "\r
+ "data to local buffer!\n");\r
+ }\r
+ } else {\r
+ if ( copySegmentToLocalRxBuffer(rxRuntime, /** @req CANTP067 */\r
+ &rxPduData->SduDataPtr[2 + bytesCopiedToPdurRxBuffer],\r
+ bytesNotCopiedToPdurRxBuffer) != TRUE ) {\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ dataCopyFailure = TRUE;\r
+ DEBUG( DEBUG_MEDIUM, "Unexpected error, could not copy 'unaligned leftover' "\r
+ "data to local buffer!\n");\r
+ }\r
+ }\r
+ if ( dataCopyFailure == FALSE ) {\r
+ rxRuntime->iso15765.framesHandledCount++;\r
+ rxRuntime->iso15765.stateTimeoutCount = CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNbr);\r
+ rxRuntime->iso15765.state = RX_WAIT_SDU_BUFFER;\r
+ rxRuntime->mode = CANTP_RX_PROCESSING;\r
+ sendFlowControlFrame(rxConfig, rxRuntime, ret); /** @req CANTP082 */\r
+ }\r
+ } else if (ret == BUFREQ_OK) {\r
+ bytesLeftToTransfer = rxRuntime->transferTotal - rxRuntime->transferCount;\r
+ if (bytesLeftToTransfer > 0) {\r
+ rxRuntime->iso15765.framesHandledCount++;\r
+ COUNT_DECREMENT(rxRuntime->iso15765.nextFlowControlCount);\r
+ if (rxRuntime->iso15765.nextFlowControlCount == 0) {\r
+ sendFlowControlFrame(rxConfig, rxRuntime, BUFREQ_OK);\r
+ } else {\r
+ rxRuntime->iso15765.stateTimeoutCount = //UH\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNcr);\r
+ }\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM,"ISO15765-Rx session finished, going back to IDLE!\n");\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_OK); /** @req CANTP084 */\r
+ }\r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE Std_ReturnType sendConsecutiveFrame(\r
+ const CanTp_TxNSduType *txConfig, CanTp_ChannelPrivateType *txRuntime) {\r
+ BufReq_ReturnType ret = BUFREQ_NOT_OK;\r
+ uint8 sduData[CANIF_PDU_MAX_LENGTH];\r
+ PduLengthType consecutiveFrameMaxPayload = 0;\r
+ PduLengthType consecutiveFrameActualPayload = 0;\r
+ PduLengthType remaningSduDataSize = 0;\r
+ PduInfoType pduInfo;\r
+ int copyCount = 0;\r
+ int indexCount = 0;\r
+\r
+ if (txConfig->CanTpAddressingMode == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
+ sduData[indexCount++] = (uint8) txConfig->CanTpNTa->CanTpNTa; // Target address.\r
+ }\r
+ sduData[indexCount++] = ISO15765_TPCI_CF | (uint8)(\r
+ (txRuntime->iso15765.framesHandledCount + 1) & ISO15765_TPCI_FS_MASK); // + 1 is because the consecutive frame numbering begins with 1 and not 0.\r
+\r
+ // Always copy from the PDUR buffer data to the canFrameBuffer because if\r
+ // we are unlucky the application give us very small buffers.\r
+ consecutiveFrameMaxPayload = CANIF_PDU_MAX_LENGTH - indexCount;\r
+ remaningSduDataSize = txRuntime->transferTotal\r
+ - txRuntime->transferCount;\r
+\r
+ // Calculate number of valid bytes that reside in this CF.\r
+ if ( remaningSduDataSize < consecutiveFrameMaxPayload ) {\r
+ consecutiveFrameActualPayload = remaningSduDataSize; // Last frame.\r
+ } else {\r
+ consecutiveFrameActualPayload = consecutiveFrameMaxPayload;\r
+ }\r
+ copyCount = txRuntime->canFrameBuffer.byteCount; // maybe some bytes already reside in the local buffer before we proceed asking for more data from application.\r
+ while (copyCount < consecutiveFrameActualPayload) {\r
+ if ( txRuntime->pdurBuffer->SduLength > txRuntime->pdurBufferCount ) {\r
+ txRuntime->canFrameBuffer.data[copyCount] =\r
+ txRuntime->pdurBuffer->SduDataPtr[txRuntime->pdurBufferCount++];\r
+ copyCount++;\r
+ txRuntime->canFrameBuffer.byteCount++;\r
+ } else {\r
+ BufReq_ReturnType pdurResp = PduR_CanTpProvideTxBuffer(txConfig->PduR_PduId, /** @req CANTP226 */ /** @req CANTP086 */ /** @req CANTP117 */\r
+ &txRuntime->pdurBuffer, 0);\r
+ if (pdurResp == BUFREQ_OK) {\r
+ txRuntime->pdurBufferCount = 0;\r
+ continue;\r
+ } else if (pdurResp == BUFREQ_BUSY) {\r
+ ret = E_OK; // We will remain in this state, called again later, not data lost/destoryed?\r
+ } else {\r
+ /** @req CANTP087 */\r
+ DEBUG( DEBUG_MEDIUM, "sendConsecutiveFrame failed, no buffer provided!\n");\r
+ ret = E_NOT_OK; // Serious malfunction, function caller should cancel this transfer.\r
+ break;\r
+ }\r
+ }\r
+ }\r
+ if (copyCount == consecutiveFrameActualPayload) {\r
+ for (int i=0; i<txRuntime->canFrameBuffer.byteCount; i++) {\r
+ sduData[indexCount++] = txRuntime->canFrameBuffer.data[i];\r
+ }\r
+ pduInfo.SduDataPtr = sduData;\r
+ pduInfo.SduLength = indexCount; // also includes consecutive frame header.\r
+ ret = canTansmitPaddingHelper(txConfig, txRuntime, &pduInfo);\r
+ if (ret == E_OK) {\r
+ // Now we consider this frame sent and we can not handle\r
+ // the scenario where the CAN queue is full.\r
+ txRuntime->iso15765.framesHandledCount++;\r
+ COUNT_DECREMENT(txRuntime->iso15765.nextFlowControlCount);\r
+ txRuntime->transferCount += txRuntime->canFrameBuffer.byteCount;\r
+ txRuntime->canFrameBuffer.byteCount = 0;\r
+ DEBUG( DEBUG_MEDIUM, "transferCount:%d\n", txRuntime->transferCount);\r
+ }\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "Unexpected error, should not happen!\n");\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE void handleConsecutiveFrameSent(\r
+ const CanTp_TxNSduType *txConfig, CanTp_ChannelPrivateType *txRuntime) {\r
+\r
+ if (txRuntime->transferTotal <= txRuntime->transferCount) {\r
+ // Transfer finished!\r
+ txRuntime->iso15765.state = IDLE;\r
+ txRuntime->mode = CANTP_TX_WAIT;\r
+ PduR_CanTpTxConfirmation(txConfig->PduR_PduId, NTFRSLT_OK); /** @req CANTP074 *//** @req CANTP09 *//** @req CANTP204 */\r
+ } else if (txRuntime->iso15765.nextFlowControlCount == 0) {\r
+ if (txRuntime->iso15765.BS) { // Check if receiver expects flow control.\r
+ // Time to send flow control!\r
+ txRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(txConfig->CanTpNbs); /*CanTp: 264*/\r
+ txRuntime->iso15765.state = TX_WAIT_FLOW_CONTROL;\r
+ } else {\r
+ // Send next consecutive frame!\r
+ txRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(txRuntime->iso15765.STmin);\r
+ txRuntime->iso15765.state = TX_WAIT_SEND_CONSECUTIVE_FRAME;\r
+ }\r
+ } else {\r
+ // Send next consecutive frame!\r
+ txRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(txRuntime->iso15765.STmin);\r
+ txRuntime->iso15765.state = TX_WAIT_SEND_CONSECUTIVE_FRAME;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE void handleFlowControlFrame(const CanTp_TxNSduType *txConfig,\r
+ CanTp_ChannelPrivateType *txRuntime, const PduInfoType *txPduData) {\r
+ int indexCount = 0;\r
+ uint8 extendedAddress = 0;\r
+ Std_ReturnType ret;\r
+\r
+\r
+ if ( txRuntime->iso15765.state == TX_WAIT_FLOW_CONTROL ) {\r
+ if (txConfig->CanTpAddressingMode == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
+ extendedAddress = txPduData->SduDataPtr[indexCount++];\r
+ }\r
+ switch (txPduData->SduDataPtr[indexCount++] & ISO15765_TPCI_FS_MASK) {\r
+ case ISO15765_FLOW_CONTROL_STATUS_CTS:\r
+ txRuntime->iso15765.BS = txPduData->SduDataPtr[indexCount++];\r
+ txRuntime->iso15765.nextFlowControlCount = txRuntime->iso15765.BS;\r
+ txRuntime->iso15765.STmin = txPduData->SduDataPtr[indexCount++];\r
+ DEBUG( DEBUG_MEDIUM, "txRuntime->iso15765.STmin = %d\n", txRuntime->iso15765.STmin);\r
+ ret = sendConsecutiveFrame(txConfig, txRuntime);\r
+ if (ret == E_OK) {\r
+ handleConsecutiveFrameSent(txConfig, txRuntime);\r
+ } else {\r
+ PduR_CanTpRxIndication(txConfig->PduR_PduId, NTFRSLT_E_NOT_OK); /** @req CANTP177 */ /** @req CANTP084 */\r
+ txRuntime->iso15765.state = IDLE;\r
+ txRuntime->mode = CANTP_TX_WAIT;\r
+ }\r
+ break;\r
+ case ISO15765_FLOW_CONTROL_STATUS_WAIT:\r
+ txRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(txConfig->CanTpNbs); /*CanTp: 264*/\r
+ txRuntime->iso15765.state = TX_WAIT_FLOW_CONTROL;\r
+ break;\r
+ case ISO15765_FLOW_CONTROL_STATUS_OVFLW:\r
+ PduR_CanTpRxIndication(txConfig->PduR_PduId, NTFRSLT_E_NOT_OK);\r
+ txRuntime->iso15765.state = IDLE;\r
+ txRuntime->mode = CANTP_TX_WAIT;\r
+ break;\r
+ }\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "Ignoring flow control, we do not expect it!");\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE void handleSingleFrame(const CanTp_RxNSduType *rxConfig,\r
+ CanTp_ChannelPrivateType *rxRuntime, const PduInfoType *rxPduData) {\r
+ BufReq_ReturnType ret;\r
+ PduLengthType pduLength;\r
+ uint8 *data = NULL;\r
+ PduLengthType bytesWrittenToSduRBuffer;\r
+\r
+\r
+ if (rxRuntime->iso15765.state != IDLE) {\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_E_NOT_OK); // Abort current reception, we need to tell the current receiver it has been aborted.\r
+ DEBUG( DEBUG_MEDIUM, "Single frame received and channel not IDLE!\n");\r
+ }\r
+ (void) initRx15765RuntimeData(rxConfig, rxRuntime); /** @req CANTP124 */\r
+ pduLength = getPduLength(&rxConfig->CanTpAddressingFormant, SINGLE_FRAME,\r
+ rxPduData);\r
+\r
+ VALIDATE_NO_RV( rxRuntime->pdurBuffer->SduDataPtr != NULL,\r
+ SERVICE_ID_CANTP_RX_INDICATION, CANTP_E_INVALID_RX_LENGTH );\r
+\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_STANDARD) { /** @req CANTP094 *//** @req CANTP095 */\r
+ data = &rxPduData->SduDataPtr[1];\r
+ } else {\r
+ data = &rxPduData->SduDataPtr[2];\r
+ }\r
+ rxRuntime->transferTotal = pduLength;\r
+ rxRuntime->iso15765.state = SF_OR_FF_RECEIVED_WAITING_PDUR_BUFFER;\r
+ rxRuntime->mode = CANTP_RX_PROCESSING;\r
+ rxRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNbr); /** @req CANTP166 */\r
+\r
+ ret = copySegmentToPduRRxBuffer(rxConfig, rxRuntime, data, pduLength,\r
+ &bytesWrittenToSduRBuffer);\r
+\r
+ if (ret == BUFREQ_OK) {\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_OK);\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ } else if (ret == BUFREQ_BUSY) {\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_STANDARD) {\r
+ data = &rxPduData->SduDataPtr[1];\r
+ } else {\r
+ data = &rxPduData->SduDataPtr[2];\r
+ }\r
+ (void)copySegmentToLocalRxBuffer(rxRuntime, data, pduLength ); /** @req CANTP067 */\r
+ rxRuntime->iso15765.state = RX_WAIT_SDU_BUFFER;\r
+ rxRuntime->mode = CANTP_RX_PROCESSING;\r
+ } else {\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_E_NO_BUFFER);\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+\r
+static INLINE void handleFirstFrame(const CanTp_RxNSduType *rxConfig,\r
+ CanTp_ChannelPrivateType *rxRuntime, const PduInfoType *rxPduData) {\r
+ BufReq_ReturnType ret;\r
+ PduLengthType pduLength = 0;\r
+ PduLengthType bytesWrittenToSduRBuffer;\r
+\r
+ if (rxRuntime->iso15765.state != IDLE) {\r
+ DEBUG( DEBUG_MEDIUM, "First frame received during Rx-session!\n" );\r
+ PduR_CanTpRxIndication(rxConfig->PduR_PduId, NTFRSLT_E_NOT_OK); // Abort current reception, we need to tell the current receiver it has been aborted.\r
+ }\r
+\r
+ (void) initRx15765RuntimeData(rxConfig, rxRuntime); /** @req CANTP124 */\r
+ pduLength = getPduLength(&rxConfig->CanTpAddressingFormant, FIRST_FRAME,\r
+ rxPduData);\r
+ rxRuntime->transferTotal = pduLength;\r
+\r
+ VALIDATE_NO_RV( rxRuntime->transferTotal != 0,\r
+ SERVICE_ID_CANTP_RX_INDICATION, CANTP_E_INVALID_RX_LENGTH );\r
+\r
+ // Validate that that there is a reason for using the segmented transfers and\r
+ // if not simply skip (single frame should have been used).\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_STANDARD) { /** @req CANTP094 *//** @req CANTP095 */\r
+ if (pduLength <= MAX_PAYLOAD_SF_STD_ADDR)\r
+ return;\r
+ } else {\r
+ if (pduLength <= MAX_PAYLOAD_SF_EXT_ADDR)\r
+ return;\r
+ }\r
+ // Validate that the SDU is full length in this first frame.\r
+ if (rxPduData->SduLength < CANIF_PDU_MAX_LENGTH) {\r
+ return;\r
+ }\r
+\r
+ rxRuntime->iso15765.framesHandledCount = 1; // Segment count begins with 1 and not 0 according to Movimento Puma.\r
+ rxRuntime->iso15765.state = SF_OR_FF_RECEIVED_WAITING_PDUR_BUFFER;\r
+ rxRuntime->mode = CANTP_RX_PROCESSING;\r
+ rxRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNbr); /** @req CANTP166 */\r
+\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_STANDARD) {\r
+ ret = copySegmentToPduRRxBuffer(rxConfig, rxRuntime,\r
+ &rxPduData->SduDataPtr[2],\r
+ MAX_PAYLOAD_FF_STD_ADDR,\r
+ &bytesWrittenToSduRBuffer);\r
+ } else {\r
+ ret = copySegmentToPduRRxBuffer(rxConfig, rxRuntime,\r
+ &rxPduData->SduDataPtr[3],\r
+ MAX_PAYLOAD_FF_EXT_ADDR,\r
+ &bytesWrittenToSduRBuffer);\r
+ }\r
+ if (ret == BUFREQ_OK) {\r
+ rxRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNcr);\r
+ rxRuntime->iso15765.state = RX_WAIT_CONSECUTIVE_FRAME;\r
+ rxRuntime->mode = CANTP_RX_PROCESSING;\r
+ sendFlowControlFrame(rxConfig, rxRuntime, ret);\r
+ } else if (ret == BUFREQ_BUSY) {\r
+ /** @req CANTP222 */\r
+ if (rxConfig->CanTpAddressingFormant == CANTP_STANDARD) {\r
+ (void)copySegmentToLocalRxBuffer(rxRuntime,\r
+ &rxPduData->SduDataPtr[2], MAX_PAYLOAD_FF_STD_ADDR );\r
+ } else {\r
+ (void)copySegmentToLocalRxBuffer(rxRuntime,\r
+ &rxPduData->SduDataPtr[3], MAX_PAYLOAD_FF_EXT_ADDR );\r
+ }\r
+ rxRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfig->CanTpNbr);\r
+ rxRuntime->iso15765.state = RX_WAIT_SDU_BUFFER;\r
+ rxRuntime->mode = CANTP_RX_PROCESSING;\r
+ sendFlowControlFrame(rxConfig, rxRuntime, ret); /** @req CANTP082 */\r
+ } else if (ret == BUFREQ_OVFL) {\r
+ sendFlowControlFrame(rxConfig, rxRuntime, ret); /** @req CANTP081 */\r
+ rxRuntime->iso15765.state = IDLE;\r
+ rxRuntime->mode = CANTP_RX_WAIT;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE Std_ReturnType calcRequiredProtocolFrameType(\r
+ const CanTp_TxNSduType *txConfig, CanTp_ChannelPrivateType *txRuntime,\r
+ ISO15765FrameType *iso15765Frame) {\r
+\r
+ Std_ReturnType ret;\r
+ if (txConfig->CanTpAddressingMode == CANTP_EXTENDED) {\r
+ if ( txRuntime->transferTotal > MAX_PAYLOAD_CF_EXT_ADDR ) {\r
+ VALIDATE( txConfig->CanTpTxTaType == CANTP_FUNCTIONAL,\r
+ SERVICE_ID_CANTP_TRANSMIT, CANTP_E_INVALID_TATYPE );\r
+ }\r
+ if (txRuntime->transferTotal > MAX_PAYLOAD_CF_EXT_ADDR) {\r
+ if (txConfig->CanTpTxTaType == CANTP_PHYSICAL) {\r
+ *iso15765Frame = FIRST_FRAME;\r
+ ret = E_OK;\r
+ } else {\r
+ *iso15765Frame = NONE;\r
+ ret = E_NOT_OK;\r
+ }\r
+ } else {\r
+ *iso15765Frame = SINGLE_FRAME;\r
+ ret = E_OK;\r
+ }\r
+ } else {\r
+ if ( txRuntime->transferTotal > MAX_PAYLOAD_CF_EXT_ADDR ) {\r
+ VALIDATE( txConfig->CanTpTxTaType == CANTP_FUNCTIONAL,\r
+ SERVICE_ID_CANTP_TRANSMIT, CANTP_E_INVALID_TATYPE );\r
+ }\r
+ if (txRuntime->transferTotal > MAX_PAYLOAD_CF_STD_ADDR) {\r
+ if (txConfig->CanTpTxTaType == CANTP_PHYSICAL) {\r
+ *iso15765Frame = FIRST_FRAME;\r
+ ret = E_OK;\r
+ } else {\r
+ *iso15765Frame = NONE;\r
+ ret = E_NOT_OK;\r
+ }\r
+ } else {\r
+ *iso15765Frame = SINGLE_FRAME;\r
+ ret = E_OK;\r
+ }\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+\r
+static INLINE Std_ReturnType sendSingleFrame(const CanTp_TxNSduType *txConfig,\r
+ CanTp_ChannelPrivateType *txRuntime) {\r
+ Std_ReturnType ret;\r
+ int indexCount = 0;\r
+ PduInfoType pduInfo;\r
+ uint8 sduData[CANIF_PDU_MAX_LENGTH];\r
+\r
+\r
+ if (txConfig->CanTpAddressingMode == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
+ sduData[indexCount++] = (uint8) txConfig->CanTpNTa->CanTpNTa; // Target address.\r
+ }\r
+ sduData[indexCount++] = ISO15765_TPCI_SF | txRuntime->transferTotal;\r
+ for (int i = 0; i < txRuntime->transferTotal; i++) {\r
+ sduData[indexCount++] = txRuntime->pdurBuffer->SduDataPtr[i];\r
+ }\r
+\r
+ pduInfo.SduDataPtr = sduData;\r
+ pduInfo.SduLength = indexCount;\r
+ ret = canTansmitPaddingHelper(txConfig, txRuntime, &pduInfo);\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE Std_ReturnType sendFirstFrame(const CanTp_TxNSduType *txConfig,\r
+ CanTp_ChannelPrivateType *txRuntime) {\r
+ Std_ReturnType ret;\r
+ int indexCount = 0;\r
+ int i = 0;\r
+ PduInfoType pduInfo;\r
+ uint8 sduData[CANIF_PDU_MAX_LENGTH];\r
+\r
+ DEBUG( DEBUG_MEDIUM, "sendFirstFrame called!\n");\r
+\r
+ if (txConfig->CanTpAddressingMode == CANTP_EXTENDED) { /** @req CANTP094 *//** @req CANTP095 */\r
+ sduData[indexCount++] = (uint8) txConfig->CanTpNTa->CanTpNTa; // Target address.\r
+ }\r
+ sduData[indexCount++] = ISO15765_TPCI_FF | (uint8)(\r
+ (txRuntime->transferTotal & 0xf00) >> 8);\r
+ sduData[indexCount++] = (uint8)(txRuntime->transferTotal & 0xff);\r
+ for (i = 0; indexCount < CANIF_PDU_MAX_LENGTH; i++) {\r
+ sduData[indexCount++] = txRuntime->pdurBuffer->SduDataPtr[i];\r
+ txRuntime->pdurBufferCount++;\r
+ if (txRuntime->pdurBufferCount > txRuntime->pdurBuffer->SduLength) {\r
+ // qqq: TODO: Report failure - this is unexpected.\r
+ }\r
+ txRuntime->transferCount++;\r
+ }\r
+ pduInfo.SduDataPtr = sduData;\r
+ pduInfo.SduLength = indexCount;\r
+ ret = canTansmitPaddingHelper(txConfig, txRuntime, &pduInfo);\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+static INLINE BufReq_ReturnType canTpTransmitHelper(const CanTp_TxNSduType *txConfig,\r
+ CanTp_ChannelPrivateType *txRuntime) {\r
+\r
+ BufReq_ReturnType pdurResp = BUFREQ_NOT_OK;\r
+ Std_ReturnType res = E_NOT_OK;\r
+ ISO15765FrameType iso15765Frame = INVALID_FRAME;\r
+\r
+ pdurResp = PduR_CanTpProvideTxBuffer(txConfig->PduR_PduId,\r
+ &txRuntime->pdurBuffer, 0); /** @req CANTP226 */ /** @req CANTP186 */\r
+ //if (txRuntime->iso15765.stateTimeoutCount != 0) { qqq: WHY WAS THIS DONE?\r
+ VALIDATE( txRuntime->pdurBuffer->SduDataPtr != NULL,\r
+ SERVICE_ID_CANTP_TRANSMIT, CANTP_E_INVALID_TX_BUFFER );\r
+ if (pdurResp == BUFREQ_OK) {\r
+ res = calcRequiredProtocolFrameType(txConfig, txRuntime, &iso15765Frame);\r
+ switch (iso15765Frame) {\r
+ case SINGLE_FRAME:\r
+ res = sendSingleFrame(txConfig, txRuntime); /** @req CANTP231 */\r
+ if (res == E_OK) {\r
+ PduR_CanTpTxConfirmation(txConfig->PduR_PduId, NTFRSLT_OK); /** @req CANTP204 */\r
+ } else {\r
+ PduR_CanTpTxConfirmation(txConfig->PduR_PduId, NTFRSLT_E_NOT_OK); /** @req CANTP204 */\r
+ }\r
+ txRuntime->iso15765.state = IDLE;\r
+ txRuntime->mode = CANTP_TX_WAIT;\r
+ break;\r
+ case FIRST_FRAME: {\r
+ txRuntime->iso15765.stateTimeoutCount = CANTP_CONVERT_MS_TO_MAIN_CYCLES(txConfig->CanTpNbs * 1000); /*CanTp: 264*/\r
+ if ( txRuntime->iso15765.stateTimeoutCount == 0 ) {\r
+ DEBUG( DEBUG_MEDIUM, "WARNING! Too low CanTpNbs timeout!\n" );\r
+ }\r
+ txRuntime->iso15765.state = TX_WAIT_FLOW_CONTROL; // We will always expect a flow control at this stage.\r
+ res = sendFirstFrame(txConfig, txRuntime); /** @req CANTP231 */\r
+ if (res == E_OK) {\r
+ txRuntime->mode = CANTP_TX_PROCESSING;\r
+ }\r
+ break;\r
+ }\r
+ case INVALID_FRAME:\r
+ default:\r
+ PduR_CanTpTxConfirmation(txConfig->PduR_PduId, NTFRSLT_E_NOT_OK); /** @req CANTP204 */\r
+ txRuntime->iso15765.state = IDLE;\r
+ txRuntime->mode = CANTP_TX_WAIT;\r
+ break;\r
+ }\r
+ } else if (pdurResp == BUFREQ_NOT_OK) {\r
+ PduR_CanTpTxConfirmation(txConfig->PduR_PduId, NTFRSLT_E_NOT_OK); /** @req CANTP204 */\r
+ txRuntime->iso15765.state = IDLE;\r
+ txRuntime->mode = CANTP_TX_WAIT;\r
+ } else if (pdurResp == BUFREQ_BUSY) {\r
+ /** @req CANTP184 */\r
+ txRuntime->iso15765.state = TX_WAIT_CAN_TP_TRANSMIT_PENDING; // We have to issue this request later from main until timeout.\r
+ txRuntime->mode = CANTP_TX_PROCESSING;\r
+ }\r
+ //} else {\r
+ // qqq: TDDO: Put this in a logfile? Error response should have been\r
+ // sent from main.\r
+ //}\r
+ return pdurResp;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+\r
+Std_ReturnType CanTp_Transmit(PduIdType CanTpTxSduId,\r
+ const PduInfoType *CanTpTxInfoPtr) /** @req CANTP176 */\r
+{\r
+ const CanTp_TxNSduType *txConfig = NULL;\r
+ CanTp_ChannelPrivateType *txRuntime = NULL;\r
+ BufReq_ReturnType res = BUFREQ_NOT_OK;\r
+ Std_ReturnType ret = 0;\r
+\r
+ DEBUG( DEBUG_MEDIUM, "CanTp_Transmit called in polite index: %d!\n", CanTpTxSduId);\r
+\r
+ VALIDATE( CanTpTxInfoPtr != NULL,\r
+ SERVICE_ID_CANTP_TRANSMIT, CANTP_E_PARAM_ADDRESS ); /** @req CANTP031 */\r
+ VALIDATE( CanTpRunTimeData.internalState == CANTP_ON, /** @req CANTP238 */\r
+ SERVICE_ID_CANTP_TRANSMIT, CANTP_E_UNINIT ); /** @req CANTP031 */\r
+ VALIDATE( CanTpTxSduId < CANTP_NSDU_CONFIG_LIST_SIZE, SERVICE_ID_CANTP_TRANSMIT, CANTP_E_INVALID_TX_ID );\r
+\r
+ txConfig = (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[CanTpTxSduId].configData;\r
+\r
+ txRuntime = &CanTpRunTimeData.runtimeDataList[txConfig->CanTpTxChannel]; // Runtime data.\r
+ if (txRuntime->iso15765.state == IDLE) {\r
+ txRuntime->pdurBufferCount = 0;\r
+ txRuntime->pdurBufferCount = 0;\r
+ txRuntime->transferCount = 0;\r
+ txRuntime->iso15765.framesHandledCount = 0;\r
+ txRuntime->transferTotal = CanTpTxInfoPtr->SduLength; /** @req CANTP225 */\r
+ txRuntime->iso15765.stateTimeoutCount =\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(txConfig->CanTpNcs);\r
+ txRuntime->mode = CANTP_TX_PROCESSING;\r
+ txRuntime->iso15765.state\r
+ = TX_WAIT_CAN_TP_TRANSMIT_CAN_TP_PROVIDE_TX_BUFFER;\r
+\r
+ res = canTpTransmitHelper(txConfig, txRuntime);\r
+ switch (res) {\r
+ case BUFREQ_OK:\r
+ case BUFREQ_BUSY:\r
+ ret = E_OK;\r
+ break;\r
+ case BUFREQ_NOT_OK:\r
+ ret = E_NOT_OK; /** @req CANTP072 */\r
+ break;\r
+ default:\r
+ ret = E_NOT_OK;\r
+ break;\r
+ }\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "CanTp can't transmit, it is already occupied!\n", CanTpTxSduId);\r
+ ret = E_NOT_OK; /** @req CANTP123 *//** @req CANTP206 */\r
+ }\r
+ return ret; // CAN level error code.\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+#if FRTP_CANCEL_TRANSMIT_REQUEST\r
+Std_ReturnType FrTp_CancelTransmitRequest(PduIdType FrTpTxPduId,\r
+ FrTp_CancelReasonType FrTpCancelReason) /** req : CanTp246 **/\r
+{\r
+ return E_NOT_OK;\r
+}\r
+#endif\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+\r
+void CanTp_Init() /** @req CANTP208 */\r
+{\r
+ CanTp_ChannelPrivateType *runtimeData;\r
+ const CanTp_TxNSduType *txConfigParams;\r
+ const CanTp_RxNSduType *rxConfigParams;\r
+\r
+ for (int i=0; i < CANTP_NSDU_CONFIG_LIST_SIZE; i++) {\r
+ if ( CanTpConfig.CanTpNSduList[i].direction == IS015765_TRANSMIT ) {\r
+ txConfigParams = (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[i].configData;\r
+ if (txConfigParams->CanTpTxChannel < CANTP_NSDU_RUNTIME_LIST_SIZE) {\r
+ runtimeData = &CanTpRunTimeData.runtimeDataList[txConfigParams->CanTpTxChannel];\r
+ } else {\r
+ runtimeData = &CanTpRunTimeData.runtimeDataList[CANTP_NSDU_RUNTIME_LIST_SIZE-1];\r
+ }\r
+ initTx15765RuntimeData( txConfigParams, runtimeData);\r
+ } else {\r
+ rxConfigParams = (CanTp_RxNSduType*)&CanTpConfig.CanTpNSduList[i].configData;\r
+ if (rxConfigParams->CanTpRxChannel < CANTP_NSDU_RUNTIME_LIST_SIZE) {\r
+ runtimeData = &CanTpRunTimeData.runtimeDataList[rxConfigParams->CanTpRxChannel];\r
+ } else {\r
+ runtimeData = &CanTpRunTimeData.runtimeDataList[CANTP_NSDU_RUNTIME_LIST_SIZE-1];\r
+ }\r
+ initRx15765RuntimeData( rxConfigParams, runtimeData);\r
+ }\r
+ }\r
+ fifoQueueInit( &CanTpRunTimeData.fifo );\r
+ CanTpRunTimeData.internalState = CANTP_ON; /** @req CANTP170 */\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+void CanTp_RxIndication(PduIdType CanTpRxPduId, /** @req CANTP078 */ /** @req CANTP035 */\r
+ const PduInfoType *CanTpRxPduPtr) /** req : CanTp214. **/\r
+{\r
+ CanTpFifoQueueItem item;\r
+ VALIDATE_NO_RV( CanTpRunTimeData.internalState == CANTP_ON,\r
+ SERVICE_ID_CANTP_RX_INDICATION, CANTP_E_UNINIT ); /** @req CANTP238 */ /** @req CANTP031 */\r
+\r
+ item.PduId = CanTpRxPduId;\r
+ item.SduLength = CanTpRxPduPtr->SduLength;\r
+ for (int i=0; i<item.SduLength; i++) {\r
+ item.SduData[i] = CanTpRxPduPtr->SduDataPtr[i];\r
+ }\r
+ if ( fifoQueueWrite( &CanTpRunTimeData.fifo, &item ) == FALSE ) { /** @req CANTP077 *//** @req CANTP235 */\r
+ DEBUG( DEBUG_MEDIUM, "WARNING!: Frames are lost!\n");\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+void CanTp_RxIndication_Main(PduIdType CanTpRxPduId,\r
+ const PduInfoType *CanTpRxPduPtr) /** req : CanTp214. **/\r
+{\r
+ const CanTp_RxNSduType *rxConfigParams; // Params reside in ROM.\r
+ const CanTp_TxNSduType *txConfigParams;\r
+ const CanTp_AddressingFormantType *addressingFormat; // Configured\r
+ CanTp_ChannelPrivateType *runtimeParams; // Params reside in RAM.\r
+ ISO15765FrameType frameType;\r
+\r
+ DEBUG( DEBUG_MEDIUM, "CanTp_RxIndication: PduId=%d, [", CanTpRxPduId);\r
+ for (int i=0; i<CanTpRxPduPtr->SduLength; i++) {\r
+ DEBUG( DEBUG_MEDIUM, "%x, ", CanTpRxPduPtr->SduDataPtr[i]);\r
+ }\r
+ DEBUG( DEBUG_MEDIUM, "]");\r
+\r
+ VALIDATE_NO_RV( CanTpRunTimeData.internalState == CANTP_ON,\r
+ SERVICE_ID_CANTP_RX_INDICATION, CANTP_E_UNINIT ); /** @req CANTP031 */\r
+\r
+ if ( CanTpConfig.CanTpNSduList[CanTpRxPduId].direction == IS015765_TRANSMIT ) {\r
+ txConfigParams =\r
+ (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[CanTpRxPduId].configData; /** @req CANTP120 */\r
+ addressingFormat = &txConfigParams->CanTpAddressingMode;\r
+ runtimeParams = &CanTpRunTimeData.runtimeDataList[txConfigParams->CanTpTxChannel]; /** @req CANTP096 *//** @req CANTP121 *//** @req CANTP122 *//** @req CANTP190 */\r
+ rxConfigParams = NULL;\r
+ } else {\r
+ rxConfigParams =\r
+ (CanTp_RxNSduType*)&CanTpConfig.CanTpNSduList[CanTpRxPduId].configData; /** @req CANTP120 */\r
+ addressingFormat = &rxConfigParams->CanTpAddressingFormant;\r
+ runtimeParams = &CanTpRunTimeData.runtimeDataList[rxConfigParams->CanTpRxChannel]; /** @req CANTP096 *//** @req CANTP121 *//** @req CANTP122 *//** @req CANTP190 */\r
+ txConfigParams = NULL;\r
+ }\r
+\r
+ frameType = getFrameType(addressingFormat, CanTpRxPduPtr); /** @req CANTP094 *//** @req CANTP095 */\r
+ switch (frameType) {\r
+ case SINGLE_FRAME: {\r
+ if (rxConfigParams != NULL) {\r
+ DEBUG( DEBUG_MEDIUM, "calling handleSingleFrame!\n");\r
+ handleSingleFrame(rxConfigParams, runtimeParams, CanTpRxPduPtr);\r
+ }\r
+ else\r
+ DEBUG( DEBUG_MEDIUM, "Single frame received on ISO15765-Tx - is ignored!\n");\r
+ break;\r
+ }\r
+ case FIRST_FRAME: {\r
+ if (rxConfigParams != NULL) {\r
+ DEBUG( DEBUG_MEDIUM, "calling handleFirstFrame!\n");\r
+ handleFirstFrame(rxConfigParams, runtimeParams, CanTpRxPduPtr);\r
+ } else\r
+ DEBUG( DEBUG_MEDIUM, "First frame received on ISO15765-Tx - is ignored!\n");\r
+ break;\r
+ }\r
+ case CONSECUTIVE_FRAME: {\r
+ if (rxConfigParams != NULL) {\r
+ DEBUG( DEBUG_MEDIUM, "calling handleConsecutiveFrame!\n");\r
+ handleConsecutiveFrame(rxConfigParams, runtimeParams, CanTpRxPduPtr);\r
+ } else\r
+ DEBUG( DEBUG_MEDIUM, "Consecutive frame received on ISO15765-Tx - is ignored!\n");\r
+ break;\r
+ }\r
+ case FLOW_CONTROL_CTS_FRAME: {\r
+ if (txConfigParams != NULL) {\r
+ DEBUG( DEBUG_MEDIUM, "calling handleFlowControlFrame!\n");\r
+ handleFlowControlFrame(txConfigParams, runtimeParams, CanTpRxPduPtr);\r
+ } else\r
+ DEBUG( DEBUG_MEDIUM, "Flow control frame received on ISO15765-Rx - is ignored!\n");\r
+ break;\r
+ }\r
+ case INVALID_FRAME: {\r
+ DEBUG( DEBUG_MEDIUM, "INVALID_FRAME received - is ignored!\n!\n");\r
+ break;\r
+ }\r
+ default:\r
+ break;\r
+ }\r
+ DEBUG( DEBUG_LOW, "CanTp_RxIndication_Main exit!\n");\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+#if (CANTP_VERSION_INFO_API == STD_ON)\r
+void CanTp_GetVersionInfo(Std_VersionInfoType* versionInfo) /** req : CanTp210 **/\r
+{\r
+ memcpy(versionInfo, &_CanTp_VersionInfo, sizeof(Std_VersionInfoType));\r
+}\r
+#endif /* DEM_VERSION_INFO_API */\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+void CanTp_TxConfirmation(PduIdType PduId) /** req: CanTp215 **/ /** @req CANTP076 *//** @req CANTP215 */\r
+{\r
+ const CanTp_RxNSduType *rxConfigParams = NULL;\r
+ const CanTp_TxNSduType *txConfigParams = NULL;\r
+\r
+ DEBUG( DEBUG_MEDIUM, "CanTp_TxConfirmation called.\n" );\r
+\r
+ VALIDATE_NO_RV( CanTpRunTimeData.internalState == CANTP_ON,\r
+ SERVICE_ID_CANTP_TX_CONFIRMATION, CANTP_E_UNINIT ); /** @req CANTP031 */\r
+ VALIDATE_NO_RV( PduId < CANTP_NSDU_CONFIG_LIST_SIZE,\r
+ SERVICE_ID_CANTP_TX_CONFIRMATION, CANTP_E_INVALID_TX_ID ); /** @req CANTP158 */\r
+\r
+ /** @req CANTP236 */\r
+ if ( CanTpConfig.CanTpNSduList[PduId].direction == IS015765_TRANSMIT ) {\r
+ txConfigParams =\r
+ (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[PduId].configData;\r
+ CanTpRunTimeData.runtimeDataList[txConfigParams->CanTpTxChannel]\r
+ .iso15765.NasNarPending = FALSE;\r
+ } else {\r
+ rxConfigParams =\r
+ (CanTp_RxNSduType*)&CanTpConfig.CanTpNSduList[PduId].configData;\r
+ CanTpRunTimeData.runtimeDataList[rxConfigParams->CanTpRxChannel]\r
+ .iso15765.NasNarPending = FALSE;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+void CanTp_Shutdown() /** req : CanTp202 **//** req : CanTp200 **//** req : CanTp211 **//** @req CANTP010 */\r
+{\r
+ VALIDATE_NO_RV( CanTpRunTimeData.internalState == CANTP_ON,\r
+ SERVICE_ID_CANTP_SHUTDOWN, CANTP_E_UNINIT ); /** @req CANTP031 */\r
+\r
+ CanTpRunTimeData.internalState = CANTP_OFF;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+\r
+static inline boolean checkNasNarTimeout(CanTp_ChannelPrivateType *runtimeData) {\r
+ boolean ret = FALSE;\r
+ if (runtimeData->iso15765.NasNarPending) {\r
+ TIMER_DECREMENT(runtimeData->iso15765.NasNarTimeoutCount);\r
+ if (runtimeData->iso15765.NasNarTimeoutCount == 0) {\r
+ DEBUG( DEBUG_MEDIUM, "NAS timed out.\n" );\r
+ runtimeData->iso15765.state = IDLE;\r
+ runtimeData->iso15765.NasNarPending = FALSE;\r
+ ret = TRUE;\r
+ }\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - -\r
+\r
+\r
+void CanTp_MainFunction() /** @req CANTP213 */\r
+{\r
+ BufReq_ReturnType ret;\r
+ CanTpFifoQueueItem item;\r
+ PduLengthType bytesWrittenToSduRBuffer;\r
+\r
+ CanTp_ChannelPrivateType *txRuntimeListItem = NULL;\r
+ CanTp_ChannelPrivateType *rxRuntimeListItem = NULL;\r
+\r
+ const CanTp_TxNSduType *txConfigListItem = NULL;\r
+ const CanTp_RxNSduType *rxConfigListItem = NULL;\r
+\r
+ VALIDATE_NO_RV( CanTpRunTimeData.internalState == CANTP_ON,\r
+ SERVICE_ID_CANTP_MAIN_FUNCTION, CANTP_E_UNINIT ); /** @req CANTP031 */\r
+\r
+ // Dispatch the messages that resides in the FIFO to CanTp_RxIndication_Main.\r
+ while ( fifoQueueRead( &CanTpRunTimeData.fifo, &item ) == TRUE ) {\r
+ PduInfoType pduInfo;\r
+ pduInfo.SduDataPtr = item.SduData;\r
+ pduInfo.SduLength = item.SduLength;\r
+ CanTp_RxIndication_Main( item.PduId, &pduInfo );\r
+ }\r
+\r
+ for( int i=0; i < CANTP_NSDU_CONFIG_LIST_SIZE; i++ ) {\r
+#if 0 // TODO: Not tested yet\r
+ if (checkNasNarTimeout( txRuntimeListItem )) { /** @req CANTP075 */\r
+ PduR_CanTpTxConfirmation(txConfigListItem->PduR_CanTpTxPduId, NTFRSLT_NOT_OK); /** @req CANTP074 */ /** @req CANTP204 */\r
+ continue;\r
+ }\r
+#endif\r
+ if ( CanTpConfig.CanTpNSduList[i].direction == IS015765_TRANSMIT ) {\r
+ txConfigListItem = (CanTp_TxNSduType*)&CanTpConfig.CanTpNSduList[i].configData;\r
+ txRuntimeListItem = &CanTpRunTimeData.runtimeDataList[txConfigListItem->CanTpTxChannel];\r
+\r
+ switch (txRuntimeListItem->iso15765.state) {\r
+ case TX_WAIT_CAN_TP_TRANSMIT_CAN_TP_PROVIDE_TX_BUFFER:\r
+ {\r
+ TIMER_DECREMENT(txRuntimeListItem->iso15765.stateTimeoutCount); /** @req CANTP185 */\r
+ if (txRuntimeListItem->iso15765.stateTimeoutCount == 0)\r
+ PduR_CanTpTxConfirmation(txConfigListItem->PduR_PduId,\r
+ NTFRSLT_E_NOT_OK); /** @req CANTP204 *//** @req CANTP185 */\r
+ txRuntimeListItem->iso15765.state = IDLE;\r
+ txRuntimeListItem->mode = CANTP_TX_WAIT;\r
+ break;\r
+ }\r
+ case TX_WAIT_CAN_TP_TRANSMIT_PENDING: {\r
+ (void) canTpTransmitHelper(txConfigListItem, txRuntimeListItem);/** @req CANTP184 */ /** @req CANTP089 */\r
+ break;\r
+ }\r
+ case TX_WAIT_SEND_CONSECUTIVE_FRAME: {\r
+ TIMER_DECREMENT(txRuntimeListItem->iso15765.stateTimeoutCount); // Make sure that STmin timer has expired.\r
+ if (txRuntimeListItem->iso15765.stateTimeoutCount == 0) {\r
+ ret = sendConsecutiveFrame(txConfigListItem, txRuntimeListItem);\r
+ if ( ret == E_OK ) {\r
+ handleConsecutiveFrameSent(txConfigListItem, txRuntimeListItem);\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "ERROR: Consecutive frame could not be sent!\n");\r
+ txRuntimeListItem->iso15765.state = IDLE;\r
+ txRuntimeListItem->mode = CANTP_TX_WAIT;\r
+ PduR_CanTpTxConfirmation(txConfigListItem->PduR_PduId,\r
+ NTFRSLT_E_NOT_OK); /** @req CANTP204 */\r
+ }\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "Waiting for STmin timer to expire!\n");\r
+ }\r
+ break;\r
+ }\r
+ case TX_WAIT_FLOW_CONTROL:\r
+ //DEBUG( DEBUG_MEDIUM, "Waiting for flow control!\n");\r
+ if (txRuntimeListItem->iso15765.stateTimeoutCount == 0) {\r
+ DEBUG( DEBUG_MEDIUM, "State TX_WAIT_FLOW_CONTROL timed out!\n");\r
+ txRuntimeListItem->iso15765.state = IDLE;\r
+ txRuntimeListItem->mode = CANTP_TX_WAIT;\r
+ PduR_CanTpTxConfirmation(txConfigListItem->PduR_PduId,\r
+ NTFRSLT_E_NOT_OK); /** @req CANTP204 */ /** @req CANTP185 */\r
+ }\r
+ break;\r
+ default:\r
+ break;\r
+ }\r
+ } else {\r
+ rxConfigListItem = (CanTp_RxNSduType*)&CanTpConfig.CanTpNSduList[i].configData;\r
+ rxRuntimeListItem = &CanTpRunTimeData.runtimeDataList[rxConfigListItem->CanTpRxChannel];\r
+ switch (rxRuntimeListItem->iso15765.state) {\r
+ case RX_WAIT_CONSECUTIVE_FRAME: {\r
+ TIMER_DECREMENT (rxRuntimeListItem->iso15765.stateTimeoutCount);\r
+ if (rxRuntimeListItem->iso15765.stateTimeoutCount == 0) {\r
+ DEBUG( DEBUG_MEDIUM, "TIMEOUT!\n");\r
+ rxRuntimeListItem->iso15765.state = IDLE;\r
+ rxRuntimeListItem->mode = CANTP_RX_WAIT;\r
+ PduR_CanTpRxIndication(rxConfigListItem->PduR_PduId,\r
+ NTFRSLT_E_NOT_OK);\r
+ }\r
+ break;\r
+ }\r
+ case RX_WAIT_SDU_BUFFER: {\r
+ TIMER_DECREMENT (rxRuntimeListItem->iso15765.stateTimeoutCount);\r
+ /* We end up here if we have requested a buffer from the\r
+ * PDUR but the response have been BUSY. We assume\r
+ * we have data in our local buffer and we are expected\r
+ * to send a flow-control clear to send (CTS).\r
+ */\r
+ if (rxRuntimeListItem->iso15765.stateTimeoutCount == 0) { /** @req CANTP223 */\r
+ PduR_CanTpRxIndication(rxConfigListItem->PduR_PduId,\r
+ NTFRSLT_E_NOT_OK); /** @req CANTP204 */\r
+ rxRuntimeListItem->iso15765.state = IDLE;\r
+ rxRuntimeListItem->mode = CANTP_RX_WAIT;\r
+ } else { /** @req CANTP222 */\r
+ PduLengthType bytesRemaining = 0;\r
+ ret = copySegmentToPduRRxBuffer(rxConfigListItem, /** @req CANTP067, copies from local buffer to PDUR buffer. */\r
+ rxRuntimeListItem,\r
+ rxRuntimeListItem->canFrameBuffer.data,\r
+ rxRuntimeListItem->canFrameBuffer.byteCount,\r
+ &bytesWrittenToSduRBuffer);\r
+ bytesRemaining = rxRuntimeListItem->transferTotal -\r
+ rxRuntimeListItem->transferCount;\r
+ if (bytesRemaining > 0) {\r
+ sendFlowControlFrame( rxConfigListItem, rxRuntimeListItem, ret ); /** @req CANTP224 (Busy or CTS) */\r
+ }\r
+ if (ret == BUFREQ_OK) {\r
+ if ( bytesRemaining > 0 ) {\r
+ rxRuntimeListItem->iso15765.stateTimeoutCount = //UH\r
+ CANTP_CONVERT_MS_TO_MAIN_CYCLES(rxConfigListItem->CanTpNcr);\r
+ rxRuntimeListItem->iso15765.state = RX_WAIT_CONSECUTIVE_FRAME;\r
+ } else {\r
+ PduR_CanTpRxIndication(rxConfigListItem->PduR_PduId, NTFRSLT_OK);\r
+ rxRuntimeListItem->iso15765.state = IDLE;\r
+ rxRuntimeListItem->mode = CANTP_RX_WAIT;\r
+ }\r
+ } else if (ret == BUFREQ_NOT_OK ) {\r
+ rxRuntimeListItem->iso15765.state = IDLE;\r
+ rxRuntimeListItem->mode = CANTP_RX_WAIT;\r
+ PduR_CanTpRxIndication(rxConfigListItem->PduR_PduId,\r
+ NTFRSLT_E_NOT_OK); /** @req CANTP205 */\r
+ } else if ( ret == BUFREQ_BUSY ) {\r
+ DEBUG( DEBUG_MEDIUM, "Still busy!\n");\r
+ }\r
+ }\r
+ break;\r
+ }\r
+ default:\r
+ break;\r
+ }\r
+ }\r
+ }\r
+}\r
+\r
+\r
+#include <assert.h>
#include <stdlib.h>\r
//#include <stdio.h>\r
#include <string.h>\r
\r
const Com_ConfigType * ComConfig;\r
\r
-Com_Arc_IPdu_type Com_Arc_IPdu[COM_MAX_NR_IPDU];\r
-Com_Arc_Signal_type Com_Arc_Signal[COM_MAX_NR_SIGNAL];\r
-Com_Arc_GroupSignal_type Com_Arc_GroupSignal[COM_MAX_NR_GROUPSIGNAL];\r
+Com_Arc_IPdu_type Com_Arc_IPdu[COM_N_IPDUS];\r
+Com_Arc_Signal_type Com_Arc_Signal[COM_N_SIGNALS];\r
+Com_Arc_GroupSignal_type Com_Arc_GroupSignal[COM_N_GROUP_SIGNALS];\r
\r
Com_Arc_Config_type Com_Arc_Config = {\r
.ComIPdu = Com_Arc_IPdu,\r
ComGetArcIPdu(i);\r
\r
if (i >= COM_MAX_NR_IPDU) {\r
- DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_TOO_MANY_IPDU);\r
+ DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_TOO_MANY_IPDU);
+ assert(0);\r
failure = 1;\r
break;\r
}\r
memset(Arc_IPdu->ComIPduDataPtr, IPdu->ComTxIPdu.ComTxIPduUnusedAreasDefault, IPdu->ComIPduSize);\r
}\r
\r
- // For each signal in this PDU.\r
- for (int j = 0; IPdu->ComIPduSignalRef[j] != NULL; j++) {\r
+ // For each signal in this PDU.
+ Arc_IPdu->NComIPduSignalRef = 0;\r
+ for (int j = 0; IPdu->ComIPduSignalRef != NULL && IPdu->ComIPduSignalRef[j] != NULL; j++) {\r
Signal = IPdu->ComIPduSignalRef[j];\r
ComGetArcSignal(Signal->ComHandleId);\r
\r
// If this signal already has been configured this is most likely an error.\r
if (Arc_Signal->ComIPduDataPtr != NULL) {\r
- DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_INVALID_SIGNAL_CONFIGURATION);\r
- failure = 1;\r
+ // DET_REPORTERROR(COM_MODULE_ID, COM_INSTANCE_ID, 0x01, COM_E_INVALID_SIGNAL_CONFIGURATION);\r
+ // failure = 1;\r
}\r
\r
// Configure signal deadline monitoring if used.\r
// Increment helper counters\r
Arc_IPdu->NComIPduSignalRef = j + 1;\r
\r
- //IPdu->Com_Arc_NIPduSignalGroupRef = j + 1;\r
-\r
Arc_Signal->ComIPduDataPtr = Arc_IPdu->ComIPduDataPtr;\r
Arc_Signal->ComIPduHandleId = i;\r
\r
ComGetArcGroupSignal(GroupSignal->ComHandleId);\r
// Set pointer to shadow buffer\r
Arc_GroupSignal->Com_Arc_ShadowBuffer = Arc_Signal->Com_Arc_ShadowBuffer;\r
- // Initialize group signal data.\r
- Com_CopyData(Arc_IPdu->ComIPduDataPtr, &GroupSignal->ComSignalInitValue, GroupSignal->ComBitSize, GroupSignal->ComBitPosition, 0);\r
+ // Initialize group signal data.
+ Com_WriteGroupSignalDataToPdu(Signal->ComHandleId, GroupSignal->ComHandleId, GroupSignal->ComSignalInitValue);\r
}\r
\r
} else {\r
- // Initialize signal data.\r
- Com_CopyData(Arc_IPdu->ComIPduDataPtr, &Signal->ComSignalInitValue, Signal->ComBitSize, Signal->ComBitPosition, 0);\r
+ // Initialize signal data.
+ Com_WriteSignalDataToPdu(Signal->ComHandleId, Signal->ComSignalInitValue);\r
}\r
\r
// Check filter configuration\r
}\r
\r
// Configure per I-PDU based deadline monitoring.\r
- for (int j = 0; IPdu->ComIPduSignalRef[j] != NULL; j++) {\r
+ for (int j = 0; IPdu->ComIPduSignalRef != NULL && IPdu->ComIPduSignalRef[j] != NULL; j++) {\r
Signal = IPdu->ComIPduSignalRef[j];\r
ComGetArcSignal(Signal->ComHandleId);\r
\r
\r
//DEBUG(DEBUG_LOW, "Com_SendSignal: id %d, nBytes %d, BitPosition %d, intVal %d\n", SignalId, nBytes, signal->ComBitPosition, (uint32)*(uint8 *)SignalDataPtr);\r
\r
- void *dataPtr = (void *)SignalDataPtr;\r
-\r
- if (Signal->ComSignalEndianess == BIG_ENDIAN) {\r
- if (Signal->ComSignalType == UINT16) {\r
- uint16 data;\r
- memcpy(&data, SignalDataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
- data = bswap16(data);\r
- dataPtr = &data;\r
-\r
- } else if (Signal->ComSignalType == UINT32) {\r
- uint32 data;\r
- memcpy(&data, SignalDataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
- data = bswap32(data);\r
- dataPtr = &data;\r
-\r
- } else if (Signal->ComSignalType == SINT16) {\r
- sint16 data;\r
- memcpy(&data, SignalDataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
- data = bswap16(data);\r
- dataPtr = &data;\r
-\r
- } else if (Signal->ComSignalType == SINT32) {\r
- sint32 data;\r
- memcpy(&data, SignalDataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
- data = bswap32(data);\r
- dataPtr = &data;\r
- }\r
-\r
- }\r
-\r
- Com_CopyData(Arc_IPdu->ComIPduDataPtr, dataPtr, Signal->ComBitSize, Signal->ComBitPosition, 0);\r
+ // TODO: CopyData\r
+ // Com_CopyData(Arc_IPdu->ComIPduDataPtr, dataPtr, Signal->ComBitSize, Signal->ComBitPosition, 0);
+ Com_WriteSignalDataToPdu(Signal->ComHandleId, SignalDataPtr);\r
\r
// If the signal has an update bit. Set it!\r
if (Signal->ComSignalArcUseUpdateBit) {\r
}\r
\r
uint8 Com_ReceiveSignal(Com_SignalIdType SignalId, void* SignalDataPtr) {\r
- ComGetSignal(SignalId);\r
COM_VALIDATE_SIGNAL(SignalId, 0x0b, E_NOT_OK);\r
DEBUG(DEBUG_LOW, "Com_ReceiveSignal: SignalId %d\n", SignalId);\r
\r
- Com_CopyFromSignal(&ComConfig->ComSignal[SignalId], SignalDataPtr);\r
-\r
- if (Signal->ComSignalEndianess == BIG_ENDIAN) {\r
- if (Signal->ComSignalType == UINT16) {\r
- *(uint16*)SignalDataPtr = bswap16(*(uint16*)SignalDataPtr);\r
- //memcpy(SignalDataPtr, dataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
-\r
- } else if (Signal->ComSignalType == UINT32) {\r
- *(uint32*)SignalDataPtr = bswap32(*(uint32*)SignalDataPtr);\r
- //memcpy(SignalDataPtr, dataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
-\r
- } else if (Signal->ComSignalType == SINT16) {\r
- *(sint16*)SignalDataPtr = bswap16(*(sint16*)SignalDataPtr);\r
- //memcpy(SignalDataPtr, dataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
-\r
- } else if (Signal->ComSignalType == SINT32) {\r
- *(sint32*)SignalDataPtr = bswap32(*(sint32*)SignalDataPtr);\r
- //memcpy(SignalDataPtr, dataPtr, SignalTypeToSize(Signal->ComSignalType,Signal->ComSignalLength));\r
- }\r
- }\r
-\r
-\r
+ // Com_CopyFromSignal(&ComConfig->ComSignal[SignalId], SignalDataPtr);
+ Com_ReadSignalDataFromPdu(SignalId, SignalDataPtr);\r
\r
//uint16 val = *(uint16 *)SignalDataPtr;\r
//val = bswap16(val);\r
}\r
\r
// Send IPdu!\r
- if (PduR_ComTransmit(ComTxPduId, &Com_Arc_Config.OutgoingPdu) == E_OK) {\r
+ if (PduR_ComTransmit(IPdu->ArcIPduOutgoingId, &Com_Arc_Config.OutgoingPdu) == E_OK) {\r
// Clear all update bits for the contained signals\r
for (int i = 0; i < Arc_IPdu->NComIPduSignalRef; i++) {\r
if (IPdu->ComIPduSignalRef[i]->ComSignalArcUseUpdateBit) {\r
}\r
//}\r
} else {\r
- DEBUG(DEBUG_LOW, "Com_RxIndication: Ignored signal %d of I-PDU %d since its update bit was not set\n", signal->ComHandleId, IPdu->ComIPduRxHandleId);\r
+ DEBUG(DEBUG_LOW, "Com_RxIndication: Ignored signal %d of I-PD %d since its update bit was not set\n", signal->ComHandleId, ComRxPduId);\r
}\r
}\r
\r
// Copy shadow buffer to Ipdu data space\r
const ComGroupSignal_type *groupSignal;\r
for (int i = 0; Signal->ComGroupSignal[i] != NULL; i++) {\r
- groupSignal = Signal->ComGroupSignal[i];\r
- Com_CopyData(Arc_IPdu->ComIPduDataPtr, Arc_Signal->Com_Arc_ShadowBuffer, groupSignal->ComBitSize, groupSignal->ComBitPosition, groupSignal->ComBitPosition);\r
+ groupSignal = Signal->ComGroupSignal[i];
+ // TODO CopyData\r
+ // Com_CopyData(Arc_IPdu->ComIPduDataPtr, Arc_Signal->Com_Arc_ShadowBuffer, groupSignal->ComBitSize, groupSignal->ComBitPosition, groupSignal->ComBitPosition);
+ Com_WriteGroupSignalDataToPdu(Signal->ComHandleId, groupSignal->ComHandleId, Arc_Signal->Com_Arc_ShadowBuffer);\r
}\r
\r
// If the signal has an update bit. Set it!\r
//#warning Com_ReceiveSignalGroup should be performed atomically. Should we disable interrupts here?\r
ComGetSignal(SignalGroupId);\r
ComGetArcSignal(SignalGroupId);\r
- ComGetArcIPdu(Arc_Signal->ComIPduHandleId);\r
\r
// Copy Ipdu data buffer to shadow buffer.\r
const ComGroupSignal_type *groupSignal;\r
for (int i = 0; Signal->ComGroupSignal[i] != NULL; i++) {\r
- groupSignal = Signal->ComGroupSignal[i];\r
- Com_CopyData(Arc_Signal->Com_Arc_ShadowBuffer, Arc_IPdu->ComIPduDataPtr, groupSignal->ComBitSize, groupSignal->ComBitPosition, groupSignal->ComBitPosition);\r
+ groupSignal = Signal->ComGroupSignal[i];
+ // TODO: CopyData\r
+ // Com_CopyData(Arc_Signal->Com_Arc_ShadowBuffer, Arc_IPdu->ComIPduDataPtr, groupSignal->ComBitSize, groupSignal->ComBitPosition, groupSignal->ComBitPosition);
+ Com_ReadSignalDataFromPdu(groupSignal->ComHandleId, (void *)Arc_Signal->Com_Arc_ShadowBuffer);\r
}\r
\r
\r
}\r
\r
void Com_UpdateShadowSignal(Com_SignalIdType SignalId, const void *SignalDataPtr) {\r
- ComGetGroupSignal(SignalId);\r
- ComGetArcGroupSignal(SignalId);\r
- Com_CopyData(Arc_GroupSignal->Com_Arc_ShadowBuffer, SignalDataPtr, GroupSignal->ComBitSize, GroupSignal->ComBitPosition, 0);\r
+ ComGetArcGroupSignal(SignalId);
+ // TODO: CopyData\r
+ // Com_CopyData(Arc_GroupSignal->Com_Arc_ShadowBuffer, SignalDataPtr, GroupSignal->ComBitSize, GroupSignal->ComBitPosition, 0);
+ Com_WriteSignalDataToPduBuffer(SignalId, TRUE, SignalDataPtr, (void *)Arc_GroupSignal->Com_Arc_ShadowBuffer);\r
}\r
\r
void Com_ReceiveShadowSignal(Com_SignalIdType SignalId, void *SignalDataPtr) {\r
- ComGetGroupSignal(SignalId);\r
- ComGetArcGroupSignal(SignalId);\r
- Com_CopyData(SignalDataPtr, Arc_GroupSignal->Com_Arc_ShadowBuffer, GroupSignal->ComBitSize, 0, GroupSignal->ComBitPosition);\r
+ ComGetArcGroupSignal(SignalId);
+ // TODO: CopyData\r
+ // Com_CopyData(SignalDataPtr, Arc_GroupSignal->Com_Arc_ShadowBuffer, GroupSignal->ComBitSize, 0, GroupSignal->ComBitPosition);
+ Com_ReadSignalDataFromPduBuffer(SignalId, TRUE, SignalDataPtr, (void *)Arc_GroupSignal->Com_Arc_ShadowBuffer);\r
}\r
// Check if a timeout has occurred.\r
if (Arc_Signal->Com_Arc_DeadlineCounter == 0) {\r
if (signal->ComRxDataTimeoutAction == COM_TIMEOUT_DATA_ACTION_REPLACE) {\r
- // Replace signal data.\r
- uint32 signalInitData;\r
- memset(&signalInitData, signal->ComSignalInitValue, sizeof(uint32));\r
-\r
- Com_CopyData(Arc_IPdu->ComIPduDataPtr, &signalInitData, signal->ComBitSize, signal->ComBitPosition, 0);\r
+ // Replace signal data.
+ Com_WriteSignalDataToPdu(signal->ComHandleId, signal->ComSignalInitValue);\r
\r
}\r
\r
}\r
}\r
\r
- if (Arc_Signal->ComSignalUpdated) {\r
- ComConfig->ComSignal[i].ComNotification();\r
+ if (Arc_Signal->ComSignalUpdated) {
+ if (ComConfig->ComSignal[i].ComNotification != NULL) {
+ ComConfig->ComSignal[i].ComNotification();
+ }\r
Arc_Signal->ComSignalUpdated = 0;\r
}\r
}\r
if (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer == 0\r
&& Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) {\r
\r
- Com_TriggerIPduSend(IPdu->ComIPduRxHandleId);\r
+ Com_TriggerIPduSend(i);\r
\r
// Reset periodic timer\r
Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer = IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeRepetitionPeriodFactor;\r
// Is it time for a cyclic transmission?\r
if (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeTimePeriodTimer == 0 && Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) {\r
\r
- Com_TriggerIPduSend(IPdu->ComIPduRxHandleId); // Send IPDU!\r
+ Com_TriggerIPduSend(i);\r
\r
// Reset periodic timer.\r
Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeTimePeriodTimer = IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeTimePeriodFactor;\r
\r
// Is it time for a transmission?\r
if (Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer == 0 && Arc_IPdu->Com_Arc_TxIPduTimers.ComTxIPduMinimumDelayTimer == 0) {\r
- Com_TriggerIPduSend(IPdu->ComIPduRxHandleId);\r
+ Com_TriggerIPduSend(i);\r
\r
// Reset periodic timer\r
Arc_IPdu->Com_Arc_TxIPduTimers.ComTxModeRepetitionPeriodTimer = IPdu->ComTxIPdu.ComTxModeTrue.ComTxModeRepetitionPeriodFactor;\r
#include <stdlib.h>\r
#include <string.h>\r
#include "Com_misc.h"\r
+
\r
-\r
-void Com_CopyFromSignal(const ComSignal_type *signal, void *Destination) {\r
- // Reset destination (for easier sign extension)\r
- memset(Destination, 0, SignalTypeToSize(signal->ComSignalType, signal->ComSignalLength));\r
-\r
- // Variables to store the source and destination bytes we are currently looking at.\r
- uint8 sourceByte;\r
- uint8 destByte;\r
-\r
- // Pointer to a byte of the source and dest respectively.\r
- ComGetArcSignal(signal->ComHandleId);\r
- ComGetArcIPdu(Arc_Signal->ComIPduHandleId);\r
- uint8 *source = (uint8 *)Arc_IPdu->ComIPduDataPtr;\r
- uint8 *dest = (uint8 *)Destination;\r
-\r
- uint8 signBit = 0;\r
-\r
-\r
- if (signal->ComSignalEndianess != CPU_ENDIANESS && 0) {\r
-\r
- uint8 numBytes = ((signal->ComBitPosition + signal->ComBitSize) / 8) + 1;\r
- uint8 *sourceEndianConverted = malloc(numBytes) ; // NOT OK TO USE MALLOC! BUT IS THERE ANOTHER WAY?\r
- //memcpy(sourceEndianConverted, source, numBytes);\r
-\r
- // Reverse all bits in this temporary IPdu.\r
- for(int i = 0; i < numBytes * 8; i++) {\r
- sourceByte = i / 8; // Find out what byte this bit belongs to in the source.\r
- destByte = i / 8; // Find the target byte.\r
- if ( *(source + sourceByte) & (1 << (i % 8))) { // Is the bit set?\r
- // Then set the target bit.\r
- *(sourceEndianConverted + destByte) |= (1 << (7 - (i % 8)));\r
- } else {\r
- // Otherwise clear the target bit.\r
- *(sourceEndianConverted + destByte) &= ~(1 << (7 - (i % 8)));\r
- }\r
- }\r
-\r
- source = sourceEndianConverted;\r
- }\r
-\r
- signBit = Com_CopyData(dest, source, signal->ComBitSize, 0, signal->ComBitPosition);\r
-\r
- // Sign extend!\r
- // ############### THIS is NOT WORKING!\r
- // Are there any unfilled bits in the destination?\r
- if (signal->ComBitSize < SignalTypeToSize(signal->ComSignalType, signal->ComSignalLength) * 8) {\r
- // These bits needs to be sign extended.\r
- if ((signal->ComSignalType == SINT8\r
- || signal->ComSignalType == SINT16\r
- || signal->ComSignalType == SINT32)\r
- && signBit) {\r
-\r
- for (int i = signal->ComBitSize; i < SignalTypeToSize(signal->ComSignalType, signal->ComSignalLength) * 8; i++) {\r
- destByte = i / 8;\r
- *(dest + destByte) |= (1 << i % 8);\r
- }\r
- }\r
- }\r
-\r
- if (signal->ComSignalEndianess != CPU_ENDIANESS) {\r
- free(source);\r
- }\r
+void Com_ReadSignalDataFromPdu(
+ const Com_SignalIdType signalId,
+ void *signalData) {
+
+ // Get PDU
+ ComGetSignal(signalId);
+ ComGetArcSignal(Signal->ComHandleId);
+ ComGetArcIPdu(Arc_Signal->ComIPduHandleId);
+
+ // Get data
+ Com_ReadSignalDataFromPduBuffer(
+ signalId,
+ FALSE,
+ signalData,
+ Arc_IPdu->ComIPduDataPtr);
+}
+
+void Com_ReadGroupSignalDataFromPdu(
+ const Com_SignalIdType parentSignalId,
+ const Com_SignalIdType groupSignalId,
+ void *signalData) {
+
+ // Get PDU
+ ComGetSignal(parentSignalId);
+ ComGetArcSignal(Signal->ComHandleId);
+ ComGetArcIPdu(Arc_Signal->ComIPduHandleId);
+
+ // Get data
+ Com_ReadSignalDataFromPduBuffer(
+ groupSignalId,
+ TRUE,
+ signalData,
+ Arc_IPdu->ComIPduDataPtr);
+}
+
+void Com_ReadSignalDataFromPduBuffer(
+ const uint16 signalId,
+ const boolean isGroupSignal,
+ void *signalData,
+ const void *pduBuffer) {
+
+ Com_SignalType signalType;
+ ComSignalEndianess_type signalEndianess;
+ uint8 signalLength;
+ uint8 bitPosition;
+ uint8 bitSize;
+
+ if (!isGroupSignal) {
+ ComGetSignal(signalId);
+ signalType = Signal->ComSignalType;
+ signalEndianess = Signal->ComSignalEndianess;
+ signalLength = Signal->ComBitSize / 8;
+ bitPosition = Signal->ComBitPosition;
+ bitSize = Signal->ComBitSize;
+ } else {
+ ComGetGroupSignal(signalId);
+ signalType = GroupSignal->ComSignalType;
+ signalEndianess = GroupSignal->ComSignalEndianess;
+ signalLength = GroupSignal->ComBitSize / 8;
+ bitPosition = GroupSignal->ComBitPosition;
+ bitSize = GroupSignal->ComBitSize;
+ }
+
+ uint8 destSize = SignalTypeToSize(signalType, signalLength);\r
+
+ // Pointer to a byte of the source and dest respectively.
+ uint8 *signalDataBytes = (uint8 *)signalData;
+ uint8 *pduBufferBytes = (uint8 *)pduBuffer;
+ uint8 startBitOffset = 0;
+
+ if (signalEndianess != CPU_ENDIANESS) {
+ // Swap source bytes before reading
+ // TODO: Must adapt to larger PDUs!
+ uint8 pduBufferBytes_swap[8];
+ int i = 0;
+ for (i = 0; i < 8; ++i) {
+ pduBufferBytes_swap[i] = pduBufferBytes[7 - i];
+ }
+ startBitOffset = intelBitNrToPduOffset(bitPosition, bitSize, 64);
+ Com_ReadDataSegment(
+ signalDataBytes, pduBufferBytes_swap, destSize,
+ startBitOffset, bitSize,
+ SignalTypeSignedness(signalType));
+
+ } else {
+ startBitOffset = motorolaBitNrToPduOffset(bitPosition);
+ Com_ReadDataSegment(
+ signalDataBytes, pduBufferBytes, destSize,
+ startBitOffset, bitSize,
+ SignalTypeSignedness(signalType));
+ }
}\r
-\r
-\r
-void Com_CopyToSignal(ComSignal_type *signal, const void *Source) {\r
- ComGetArcSignal(signal->ComHandleId);\r
- ComGetArcIPdu(Arc_Signal->ComIPduHandleId);\r
- Com_CopyData(Arc_IPdu->ComIPduDataPtr, Source, signal->ComBitSize, signal->ComBitPosition, 0);\r
+
+
+void Com_WriteSignalDataToPdu(
+ const Com_SignalIdType signalId,
+ const void *signalData) {
+
+ // Get PDU
+ ComGetSignal(signalId);
+ ComGetArcSignal(Signal->ComHandleId);
+ ComGetArcIPdu(Arc_Signal->ComIPduHandleId);
+
+ // Get data
+ Com_WriteSignalDataToPduBuffer(
+ signalId,
+ FALSE,
+ signalData,
+ Arc_IPdu->ComIPduDataPtr);
+}
+
+void Com_WriteGroupSignalDataToPdu(
+ const Com_SignalIdType parentSignalId,
+ const Com_SignalIdType groupSignalId,
+ const void *signalData) {
+
+ // Get PDU
+ ComGetSignal(parentSignalId);
+ ComGetArcSignal(Signal->ComHandleId);
+ ComGetArcIPdu(Arc_Signal->ComIPduHandleId);
+
+ // Get data
+ Com_WriteSignalDataToPduBuffer(
+ groupSignalId,
+ TRUE,
+ signalData,
+ Arc_IPdu->ComIPduDataPtr);
}\r
+
\r
-uint8 Com_CopyData(void *Destination, const void *Source, uint8 numBits, uint8 destOffset, uint8 sourceOffset) {\r
-\r
- uint8 signBit;\r
- // Variables to store the source and destination bytes we are currently looking at.\r
- uint8 sourceByte;\r
- uint8 destByte;\r
-\r
- // Pointer to the first byte of the source and dest respectively.\r
- uint8 *source = (uint8 *)Source;\r
- uint8 *dest = (uint8 *)Destination;\r
-\r
-\r
- // For every bit of the signal\r
- for(int i = 0; i < numBits; i++) {\r
- sourceByte = (i + sourceOffset) / 8; // Find out what byte this bit belongs to in the source.\r
- destByte = (i + destOffset) / 8; // Find the target byte.\r
- if ( testBit(source, (i + sourceOffset))) { // Is the bit set?\r
- // Then set the target bit.\r
- setBit(dest, (i + destOffset)); //*(dest + destByte) |= (1 << ((i + signal->ComBitPosition) % 8));\r
- signBit = 1;\r
- } else {\r
- // Otherwise clear the target bit.\r
- clearBit(dest, (i + destOffset)); //*(dest + destByte) &= ~(1 << ((i + signal->ComBitPosition) % 8));\r
- signBit = 0;\r
- }\r
- }\r
- return signBit;\r
+void Com_WriteSignalDataToPduBuffer(
+ const uint16 signalId,
+ const boolean isGroupSignal,
+ const void *signalData,
+ void *pduBuffer) {
+ // TODO: Implement writing little-endian signals
+
+ Com_SignalType signalType;
+ uint8 signalLength;
+ uint8 bitPosition;
+ uint8 bitSize;
+
+ if (!isGroupSignal) {
+ ComGetSignal(signalId);
+ signalType = Signal->ComSignalType;
+ signalLength = Signal->ComBitSize / 8;
+ bitPosition = Signal->ComBitPosition;
+ bitSize = Signal->ComBitSize;
+ } else {
+ ComGetGroupSignal(signalId);
+ signalType = GroupSignal->ComSignalType;
+ signalLength = GroupSignal->ComBitSize / 8;
+ bitPosition = GroupSignal->ComBitPosition;
+ bitSize = GroupSignal->ComBitSize;
+ }
+
+
+ uint8 *signalDataBytes = (uint8 *)signalData;
+ uint8 *pduBufferBytes = (uint8 *)pduBuffer;
+ uint8 startBitOffset = motorolaBitNrToPduOffset(bitPosition);
+ uint8 signalBufferSize = SignalTypeToSize(signalType, signalLength);
+
+ Com_WriteDataSegment(pduBufferBytes, signalDataBytes, signalBufferSize, startBitOffset, bitSize);\r
}\r
\r
-\r
uint8 Com_Filter(ComSignal_type *signal) {\r
ComGetArcSignal(signal->ComHandleId);\r
const ComFilter_type * filter = &signal->ComFilter;\r
Arc_Signal->ComFilter.ComFilterArcOldValue = filter->ComFilterArcNewValue;\r
return 1;\r
} else return 0;\r
+}
+
+
+/*
+ * Read an arbitrary signal segment from buffer.
+ * dest: pointer to start of destination buffer
+ * source: pointer to start of source buffer
+ * destByteLength: size of destination buffer in bytes
+ * segmentStartBitOffset: bit offset to signal segment (from first bit in *source data)
+ * segmentBitLength: length in bits of the signal segment to be read
+ *
+ * Example:
+ * Source data: (ABC... = signal segment)
+ * | -----ABC | DEFGHIJK | LMNOPQ-- |
+ * B0 B1 B2
+ * Parameters:
+ * dest: pointer to 32 bit space (needs to be at least 3 bytes to keep the 17 signal bits)
+ * destByteLength: 4
+ * source: *B0
+ * segmentStartBitOffset: 5
+ * segmentBitLength: 17
+ *
+ * Result:
+ * Destination:
+ * | -------- | -------A | BCDEFGHI | JKLMNOPQ |
+ *
+ */
+void Com_ReadDataSegment(uint8 *dest, const uint8 *source, uint8 destByteLength,
+ uint8 segmentStartBitOffset, uint8 segmentBitLength, boolean signedOutput) {
+
+ uint8 sourceEndBitOffset = segmentStartBitOffset + segmentBitLength - 1;
+ uint8 sourceStartByte = segmentStartBitOffset / 8;
+ uint8 sourceEndByte = (sourceEndBitOffset) / 8;
+ uint8 sourceByteLength = sourceEndByte - sourceStartByte;
+
+ uint8 segmentStartBitOffsetInsideByte = segmentStartBitOffset % 8;
+ uint16 sourceStartByteMask;
+
+ uint8 sourceAlignmentShift = 7 - (sourceEndBitOffset % 8);
+ uint8 segmentByteLength = 1 + (segmentBitLength - 1) / 8;
+ uint8 sourceByteNr = 0;
+ uint8 destByteNr = 0;
+
+ uint16 shiftReg = 0;
+
+ boolean negative;
+
+ if ( signedOutput && (*(source + sourceStartByte) & (0x80 >> segmentStartBitOffsetInsideByte)) ) {
+ negative = TRUE;
+ sourceStartByteMask = (0xFF00 >> segmentStartBitOffsetInsideByte);
+ memset(dest, 0xFF, destByteLength);
+ } else {
+ negative = FALSE;
+ sourceStartByteMask = (0x00FF >> segmentStartBitOffsetInsideByte);
+ memset(dest, 0x00, destByteLength);
+ }
+
+ // setup to point to end (LSB) of buffers
+ source += sourceEndByte;
+ dest += destByteLength - 1;
+
+ if (negative) {
+ // compiles and writes one destination byte on each iteration
+ do {
+ shiftReg = *(source - sourceByteNr) | 0xFF00; // read source byte (already matching "byte space")
+ if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..
+ shiftReg |= sourceStartByteMask; // ..we need to mask out stuff we don't want
+ }
+ shiftReg >>= sourceAlignmentShift; // shift down to align
+ *(dest - destByteNr) &= shiftReg | 0xFF00; // write into destination byte
+
+ sourceByteNr++; // move to next source byte
+ if (sourceAlignmentShift != 0 // do we have more bits for current dest. byte in this source byte?
+ && sourceByteNr <= sourceByteLength) {
+ shiftReg = *(source - sourceByteNr) | 0xFF00; // read next source byte
+ if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..
+ shiftReg |= sourceStartByteMask; // ..we need to mask out stuff we don't want
+ }
+ shiftReg = ~(shiftReg); // shifting inverted to shift in 1:s
+ shiftReg <<= 8; // shift up (to match destination "byte space")
+ shiftReg = ~(shiftReg);
+ shiftReg >>= sourceAlignmentShift; // shift down to align
+ *(dest - destByteNr) &= shiftReg | 0xFF00; // write into destination byte
+ }
+ destByteNr++;
+ } while (destByteNr < segmentByteLength);
+ } else { // positive
+ do {
+ shiftReg = *(source - sourceByteNr) & 0x00FF; // read source byte (already matching "byte space")
+ if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..
+ shiftReg &= sourceStartByteMask; // ..we need to mask out stuff we don't want
+ }
+ shiftReg >>= sourceAlignmentShift; // shift down to align
+ *(dest - destByteNr) |= shiftReg & 0x00FF; // write into destination byte
+
+ sourceByteNr++; // move to next source byte
+ if (sourceAlignmentShift != 0 // do we have more bits for current dest. byte in this source byte?
+ && sourceByteNr <= sourceByteLength) {
+ shiftReg = *(source - sourceByteNr) & 0x00FF; // read next source byte
+ if (sourceByteNr == sourceByteLength) { // if we are on the last source byte..
+ shiftReg &= sourceStartByteMask; // ..we need to mask out stuff we don't want
+ }
+ shiftReg <<= 8; // shift up (to match destination "byte space")
+ shiftReg >>= sourceAlignmentShift; // shift down to align
+ *(dest - destByteNr) |= shiftReg & 0x00FF; // write into destination byte
+ }
+ destByteNr++;
+ } while (destByteNr < segmentByteLength);
+ }
+}
+
+/*
+ * Copies the <segmentBitLength> least significant bits from <signal> into <pdu>.
+ * The bit segment is placed in <pdu> som that the most significant bit ends up
+ * at <segmentStartBitOffset> from the msb of <pdu>.
+ */
+void Com_WriteDataSegment(uint8 *pdu, const uint8 *signal, uint8 destByteLength,
+ uint8 segmentStartBitOffset, uint8 segmentBitLength) {
+ uint8 pduEndBitOffset = segmentStartBitOffset + segmentBitLength - 1;
+ uint8 pduStartByte = segmentStartBitOffset / 8;
+ uint8 pduEndByte = (pduEndBitOffset) / 8;
+ uint8 pduByteLength = pduEndByte - pduStartByte;
+
+ uint8 segmentStartBitOffsetInsideByte = segmentStartBitOffset % 8;
+ uint8 pduStartByteMask = (0xFF >> segmentStartBitOffsetInsideByte);
+
+ uint8 pduAlignmentShift = 7 - (pduEndBitOffset % 8);
+ uint8 segmentByteLength = 1 + (segmentBitLength - 1) / 8;
+ uint8 pduByteNr = 0;
+ uint8 signalByteNr = 0;
+
+ uint16 shiftReg = 0;
+ uint16 clearReg = 0;
+
+ // setup to point to end (LSB) of buffers
+ pdu += pduEndByte;
+ signal += destByteLength - 1;
+
+ // splits and writes one source byte on each iteration
+ do {
+ shiftReg = *(signal - signalByteNr) & 0x00FF;
+ clearReg = 0x00FF;
+ shiftReg <<= pduAlignmentShift;
+ clearReg <<= pduAlignmentShift;
+ if (pduByteNr == pduByteLength) {
+ shiftReg &= pduStartByteMask;
+ clearReg &= pduStartByteMask;
+ }
+ *(pdu - pduByteNr) &= ~(clearReg & 0x00FF);
+ *(pdu - pduByteNr) |= shiftReg & 0x00FF;
+
+ pduByteNr++;
+ if (pduAlignmentShift != 0
+ && pduByteNr <= pduByteLength) {
+ shiftReg = *(signal - signalByteNr) & 0x00FF;
+ clearReg = 0x00FF;
+ shiftReg <<= pduAlignmentShift;
+ clearReg <<= pduAlignmentShift;
+ shiftReg >>= 8;
+ clearReg >>= 8;
+ if (pduByteNr == pduByteLength) {
+ shiftReg &= pduStartByteMask;
+ clearReg &= pduStartByteMask;
+ }
+ *(pdu - pduByteNr) &= ~(clearReg & 0x00FF);
+ *(pdu - pduByteNr) |= shiftReg & 0x00FF;
+ }
+ signalByteNr++;
+ } while (signalByteNr < segmentByteLength);
+}
+
+/*
+ * Converts from motorola CAN bit nr to PDU bit offset
+ *
+ * motorolaBitNr: 7 6 5 4 3 2 1 0 15 14 13 12 ...
+ * motorolaBitNrToPduOffset: 0 1 2 3 4 5 6 7 8 9 10 11 ...
+ */
+uint8 motorolaBitNrToPduOffset (uint8 motorolaBitNr) {
+ uint8 byte = motorolaBitNr / 8;
+ uint8 offsetInsideByte = motorolaBitNr % 8;
+ return byte * 8 + (7 - offsetInsideByte);
}\r
+
+/*
+ * Converts from intel CAN bit nr to PDU bit offset
+ *
+ * pduNumBits: 40
+ * intelBitNr (after PDU byte-swap): 39 38 37 36 35 34 33 32 31 ... 3 2 1 0
+ * intelBitNrToPduOffset: 0 1 2 3 4 5 6 7 8 ... 36 37 38 39
+ */
+uint8 intelBitNrToPduOffset (uint8 intelBitNr, uint8 segmentBitLength, uint8 pduBitLenght) {
+ return pduBitLenght - (intelBitNr + segmentBitLength);
+}
* The following function are exported only for testing purposes.\r
*/\r
uint8 Com_Filter(ComSignal_type *signal);\r
-void Com_CopyFromSignal(const ComSignal_type *signal, void *Destination);\r
-void Com_CopyToSignal(ComSignal_type *signal, const void *Source);\r
+
+// Read data from PDU
+void Com_ReadSignalDataFromPdu(
+ const Com_SignalIdType signalId,
+ void *signalData);
+
+void Com_ReadGroupSignalDataFromPdu(
+ const Com_SignalIdType parentSignalId,
+ const Com_SignalIdType groupSignalId,
+ void *signalData);
+
+void Com_ReadSignalDataFromPduBuffer(
+ const uint16 signalId,
+ const boolean isGroupSignal,
+ void *signalData,
+ const void *pduBuffer);
+
+// write data to PDU
+void Com_WriteSignalDataToPdu(
+ const Com_SignalIdType signalId,
+ const void *signalData);
+
+void Com_WriteGroupSignalDataToPdu(
+ const Com_SignalIdType parentSignalId,
+ const Com_SignalIdType groupSignalId,
+ const void *signalData);
+
+void Com_WriteSignalDataToPduBuffer(
+ const uint16 signalId,
+ const boolean isGroupSignal,
+ const void *signalData,
+ void *pduBuffer);
\r
/*\r
* This function copies numBits bits of data from Source to Destination with the possibility to offset\r
*\r
* Return value: the last bit it copies (sign bit).
*/\r
-uint8 Com_CopyData(void *Destination, const void *Source, uint8 numBits, uint8 destOffset, uint8 sourceOffset);\r
+//uint8 Com_CopyData(void *Destination, const void *Source, uint8 numBits, uint8 destOffset, uint8 sourceOffset);
+
+//void Com_CopyData2(char *dest, const char *source, uint8 destByteLength, uint8 segmentStartBitOffset, uint8 segmentBitLength);
+
+void Com_ReadDataSegment(uint8 *dest, const uint8 *source, uint8 destByteLength,
+ uint8 segmentStartBitOffset, uint8 segmentBitLength, boolean signedOutput);
+
+void Com_WriteDataSegment(uint8 *pdu, const uint8 *signal, uint8 destByteLength,
+ uint8 segmentStartBitOffset, uint8 segmentBitLength);
+
+uint8 motorolaBitNrToPduOffset (uint8 motorolaBitNr);
+uint8 intelBitNrToPduOffset (uint8 intelBitNr, uint8 segmentBitLength, uint8 pduBitLenght);\r
+
+
#endif /* COM_MISC_H_ */\r
#include "Dem.h"\r
#endif
#include "PduR.h"\r
-#include "PduR_Com.h"\r
-#include "PduR_CanIf.h"\r
-#include "PduR_LinIf.h"\r
-#include "PduR_Ipdum.h"\r
#include "Mcu.h"\r
#include "debug.h"\r
\r
/* ############### Zero Cost Operation Mode ############# */\r
/* Only define the following functions if zero cost operation\r
* mode is not used! They are defined as macros in PduR.h otherwise. */\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
+#if PDUR_ZERO_COST_OPERATION == STD_OFF\r
\r
/*\r
* Initializes the PDU Router.
// Otherwise raise an error.\r
if (PduRState != PDUR_UNINIT) {\r
// Raise error and return.\r
- DET_REPORTERROR(PDUR_MODULE_ID, PDUR_INSTANCE_ID, 0x00, PDUR_E_INVALID_REQUEST);\r
+ DET_REPORTERROR(MODULE_ID_PDUR, PDUR_INSTANCE_ID, 0x00, PDUR_E_INVALID_REQUEST);\r
return;\r
}\r
\r
if (ConfigPtr == NULL) {\r
- DET_REPORTERROR(PDUR_MODULE_ID, PDUR_INSTANCE_ID, 0x00, PDUR_E_CONFIG_PTR_INVALID);\r
+ DET_REPORTERROR(MODULE_ID_PDUR, PDUR_INSTANCE_ID, 0x00, PDUR_E_CONFIG_PTR_INVALID);\r
return;\r
} else {\r
PduRConfig = ConfigPtr;\r
\r
uint8 failed = 0;\r
\r
- // TODO Initialize DestPduIds!!!!!\r
-\r
- // TODO Initialize NRoutingPaths.\r
-\r
// Initialize buffers.\r
int bufferNr = 0;\r
int i = 0;\r
- PduRRoutingPath_type *path;\r
+ PduRRoutingPath_type *path;
+ PduRConfig->PduRRoutingTable->NRoutingPaths = 0;\r
for (i = 0; !PduRConfig->PduRRoutingTable->PduRRoutingPath[i].PduR_Arc_EOL && !failed; i++) {\r
PduRConfig->PduRRoutingTable->NRoutingPaths++;\r
path = &PduRConfig->PduRRoutingTable->PduRRoutingPath[i];\r
}\r
\r
\r
-#ifdef PDUR_VERSION_INFO_API\r
+#if PDUR_VERSION_INFO_API == STD_ON\r
void PduR_GetVersionInfo (Std_VersionInfoType* versionInfo){\r
- versionInfo->moduleID = (uint16)PDUR_MODULE_ID;\r
+ versionInfo->moduleID = (uint16)MODULE_ID_PDUR;\r
versionInfo->vendorID = (uint16)1;\r
\r
// TODO Add vendor specific version numbers.\r
#endif // End of not Zero Cost Operation Mode\r
\r
Std_ReturnType PduR_CancelTransmitRequest(PduR_CancelReasonType PduCancelReason, PduIdType PduId) {\r
- Enter(PduId,E_NOT_OK);\r
// TODO Implement!\r
-\r
- Exit();\r
return E_NOT_OK;\r
}\r
\r
void PduR_ChangeParameterRequest(PduR_ParameterValueType PduParameterValue, PduIdType PduId) {\r
- Enter(0);\r
// TODO Implement!\r
\r
}\r
-\r
-\r
-// If we are using the simulator CANIF and LINIF are not available.\r
-// Therefore the functions needed by the functions pointer tables below needs to be stubbed.\r
-#if !defined(USE_CANIF)\r
-Std_ReturnType CanIf_Transmit(PduIdType CanTxPduId, const PduInfoType *PduInfoPtr) {\r
- // Just a stub\r
- return E_OK;\r
-}\r
-\r
-// If CAN are available we include these functions directly\r
-#else\r
-#include "CanIf.h"\r
-#endif\r
-\r
-\r
-#if !defined(USE_LINIF)\r
-Std_ReturnType LinIf_Transmit(PduIdType LinTxPduId,const PduInfoType* PduInfoPtr) {\r
- // Just a stub\r
- return E_OK;\r
-}\r
-\r
-// If LIN are available we include these functions directly\r
-#else\r
-#include "LinIf.h"\r
-#endif\r
-
-#include "Com.h"
-\r
-PduR_FctPtrType PduR_StdLinFctPtrs = {\r
- .TargetIndicationFctPtr = Com_RxIndication,\r
- .TargetTransmitFctPtr = LinIf_Transmit,\r
- .TargetConfirmationFctPtr = Com_TxConfirmation,\r
- .TargetTriggerTransmitFctPtr = Com_TriggerTransmit,\r
-};
-
-
-\r
-PduR_FctPtrType PduR_StdCanFctPtrs = {\r
- .TargetIndicationFctPtr = Com_RxIndication,\r
- .TargetTransmitFctPtr = CanIf_Transmit,\r
- .TargetConfirmationFctPtr = Com_TxConfirmation,\r
- .TargetTriggerTransmitFctPtr = Com_TriggerTransmit,\r
-};\r
-
+#include "PduR.h"
-
-#include "Det.h"\r
-#include "PduR_CanIf.h"\r
-#include "PduR_If.h"\r
-#include "debug.h"\r
-\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
-#ifdef PDUR_CANIF_SUPPORT\r
-\r
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
\r
-void PduR_CanIfRxIndication(PduIdType CanRxPduId,const uint8* CanSduPtr) {\r
- Enter(CanRxPduId);\r
+#include "Det.h"
+#include "debug.h"
+
+void PduR_CanIfRxIndication(PduIdType CanRxPduId,const uint8* CanSduPtr) {
+#if (PDUR_CANIF_SUPPORT == STD_ON)\r
DevCheck(CanRxPduId,CanSduPtr,0x0e);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
\r
PduR_LoIfRxIndication(CanRxPduId, CanSduPtr);\r
\r
- DEBUG(DEBUG_LOW,"----------------------\n");\r
- Exit();\r
+ DEBUG(DEBUG_LOW,"----------------------\n");
+#endif\r
}\r
\r
void PduR_CanIfTxConfirmation(PduIdType CanTxPduId) {\r
- Enter(CanTxPduId);\r
+#if (PDUR_CANIF_SUPPORT == STD_ON)
DevCheck(CanTxPduId,1,0x0f);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
\r
PduR_LoIfTxConfirmation(CanTxPduId);\r
\r
- DEBUG(DEBUG_LOW,"----------------------\n");\r
- Exit();\r
+ DEBUG(DEBUG_LOW,"----------------------\n");
+#endif\r
}\r
\r
#endif\r
-#endif\r
#ifndef PDUR_CANIF_H_\r
#define PDUR_CANIF_H_\r
\r
-#include "PduR.h"\r
-\r
-#ifdef PDUR_CANIF_SUPPORT\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
-\r
-void PduR_CanIfRxIndication (PduIdType CanRxPduId, const uint8 *CanSudPtr );\r
-void PduR_CanIfTxConfirmation(PduIdType CanTxPduId);\r
-\r
-\r
-#else // Zero cost operation active\r
-\r
-#define PduR_CanIfRxIndication Com_RxIndication\r
-#define PduR_CanIfTxConfirmation Com_TxConfirmation\r
-\r
-#endif\r
-#endif\r
+#include "PduR.h"
+
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)
+
+ void PduR_CanIfRxIndication (PduIdType CanRxPduId, const uint8 *CanSudPtr );
+ void PduR_CanIfTxConfirmation(PduIdType CanTxPduId);
+
+#else // Zero cost operation active
+
+ #if (PDUR_COM_SUPPORT == STD_ON)
+
+ #include "Com_Com.h"
+
+ #define PduR_CanIfRxIndication Com_RxIndication
+ #define PduR_CanIfTxConfirmation Com_TxConfirmation
+
+ #else
+
+ #define PduR_CanIfRxIndication(... )
+ #define PduR_CanIfTxConfirmation(...)
+
+ #endif
+
+#endif // Zero cost operation active
\r
+
#endif /* PDUR_CANIF_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "PduR.h"\r
+\r
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
+#include "Det.h"\r
+#include "debug.h"\r
+\r
+\r
+BufReq_ReturnType PduR_CanTpProvideRxBuffer(PduIdType CanTpRxPduId, PduLengthType TpSduLength, PduInfoType** PduInfoPtr) {\r
+ BufReq_ReturnType retVal = BUFREQ_NOT_OK;\r
+#if (PDUR_CANTP_SUPPORT == STD_ON)\r
+ /* Gateway and multicast modes not supported. */\r
+ PduRRoutingPath_type *route = &PduRConfig->PduRRoutingTable->PduRRoutingPath[CanTpRxPduId];\r
+ retVal = Dcm_ProvideRxBuffer(route->PduRDestPdu.DestPduId, TpSduLength, PduInfoPtr);\r
+#endif\r
+ return retVal;\r
+}\r
+\r
+\r
+void PduR_CanTpRxIndication(PduIdType CanTpRxPduId, NotifResultType Result) {\r
+#if (PDUR_CANTP_SUPPORT == STD_ON)\r
+\r
+ DEBUG(DEBUG_LOW,"----------------------\n");\r
+ DEBUG(DEBUG_LOW,"PduR_CanTpRxIndication: received indication with id %d and data %d\n", CanTpRxPduId);\r
+\r
+ /* Note that there is no support for CAN TP and gateway operation mode */\r
+ PduRRoutingPath_type *route = &PduRConfig->PduRRoutingTable->PduRRoutingPath[CanTpRxPduId];\r
+ Dcm_RxIndication(route->PduRDestPdu.DestPduId, Result); // Send PDU to next receptor.\r
+\r
+ DEBUG(DEBUG_LOW,"----------------------\n");\r
+#endif\r
+}\r
+\r
+\r
+BufReq_ReturnType PduR_CanTpProvideTxBuffer(PduIdType CanTpTxPduId, PduInfoType** PduInfoPtr, uint16 Length) {\r
+ BufReq_ReturnType retVal = BUFREQ_NOT_OK;\r
+#if (PDUR_CANTP_SUPPORT == STD_ON)\r
+ /* Gateway and multicast modes not supported. */\r
+ PduRRoutingPath_type *route = &PduRConfig->PduRRoutingTable->PduRRoutingPath[CanTpTxPduId];\r
+ retVal = Dcm_ProvideTxBuffer(route->PduRSrcPdu.SrcPduId, PduInfoPtr, Length);\r
+#endif\r
+ return retVal;\r
+}\r
+\r
+\r
+void PduR_CanTpTxConfirmation(PduIdType CanTpTxPduId, NotifResultType Result) {\r
+#if (PDUR_CANTP_SUPPORT == STD_ON)\r
+ DevCheck(CanTpTxPduId,1,0x0f);\r
+\r
+ DEBUG(DEBUG_LOW,"----------------------\n");\r
+ DEBUG(DEBUG_LOW,"PduR_CanIfTxConfirmation: received confirmation with id %d\n", CanTxPduId);\r
+\r
+ PduRRoutingPath_type *route = &PduRConfig->PduRRoutingTable->PduRRoutingPath[CanTpTxPduId];\r
+ Dcm_TxConfirmation(route->PduRSrcPdu.SrcPduId, Result); // Forward confirmation\r
+\r
+ DEBUG(DEBUG_LOW,"----------------------\n");\r
+#endif\r
+}\r
+\r
+\r
+#endif\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+#ifndef PDUR_CANTP_H_\r
+#define PDUR_CANTP_H_\r
+\r
+#include "PduR.h"\r
+\r
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
+\r
+ BufReq_ReturnType PduR_CanTpProvideRxBuffer(PduIdType CanTpRxPduId, PduLengthType TpSduLength, PduInfoType** PduInfoPtr);\r
+ void PduR_CanTpRxIndication(PduIdType CanTpRxPduId, NotifResultType Result);\r
+ BufReq_ReturnType PduR_CanTpProvideTxBuffer(PduIdType CanTpTxPduId, PduInfoType** PduInfoPtr, uint16 Length);\r
+ void PduR_CanTpTxConfirmation(PduIdType CanTpTxPduId, NotifResultType Result);\r
+\r
+#else // Zero cost operation active\r
+\r
+ #if (PDUR_DCM_SUPPORT == STD_ON)\r
+\r
+ #include "Dcm_Cbk.h"\r
+\r
+ #define PduR_CanTpProvideRxBuffer Dcm_ProvideRxBuffer\r
+ #define PduR_CanTpRxIndication Dcm_RxIndication\r
+ #define PduR_CanTpProvideTxBuffer Dcm_ProvideTxBuffer\r
+ #define PduR_CanTpTxConfirmation Dcm_TxConfirmation\r
+\r
+ #else\r
+\r
+ #define PduR_CanTpProvideRxBuffer(...)\r
+ #define PduR_CanTpRxIndication(...)\r
+ #define PduR_CanTpProvideTxBuffer(...)\r
+ #define PduR_CanTpTxConfirmation(...)\r
+\r
+ #endif\r
+\r
+#endif // Zero cost operation active\r
+\r
+#endif /* PDUR_CANTP_H_ */\r
+#include "PduR.h"
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
+#include "Det.h"
-#include "Det.h"\r
-#include "PduR_Com.h"\r
-\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
-#ifdef PDUR_COM_SUPPORT\r
\r
/**\r
* Called by the COM-layer in order to send a PDU through a protocol interface.
*/\r
Std_ReturnType PduR_ComTransmit(PduIdType ComTxPduId, const PduInfoType* PduInfoPtr) {\r
- Enter(ComTxPduId, E_NOT_OK);\r
+ BufReq_ReturnType retVal = BUFREQ_NOT_OK;
+#if (PDUR_COM_SUPPORT == STD_ON)
DevCheck(ComTxPduId,PduInfoPtr,0x15, E_NOT_OK);\r
\r
//DEBUG(DEBUG_LOW,"PduR_ComTransmit: received transmit request with id %d and data %d\n", ComTxPduId, *PduInfoPtr->SduDataPtr);\r
PduRRoutingPath_type *route = &PduRConfig->PduRRoutingTable->PduRRoutingPath[ComTxPduId];\r
- Std_ReturnType retVal = route->FctPtrs->TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, PduInfoPtr);\r
- Exit();\r
- return retVal;\r
+ retVal = route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, PduInfoPtr);\r
+#endif
+ return retVal;
}\r
\r
#endif\r
-#endif\r
#define PDUR_COM_H_\r
\r
#include "PduR.h"\r
-\r
-#ifdef PDUR_COM_SUPPORT\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
-\r
-Std_ReturnType PduR_ComTransmit(PduIdType ComTxPduId, const PduInfoType* PduInfoPtr);\r
-\r
-#else\r
-\r
-#if PDUR_SINGLE_IF == CAN_IF\r
-\r
-#define PduR_ComTransmit CanIf_Transmit\r
-\r
-#elif PDUR_SINGLE_IF == LIN_IF\r
-\r
-#define PduR_ComTransmit LinIf_Transmit\r
-\r
-#endif\r
-\r
-#endif\r
-#endif\r
+
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)
+
+ Std_ReturnType PduR_ComTransmit(PduIdType ComTxPduId, const PduInfoType* PduInfoPtr);
+
+#else // Zero cost operation active
+
+ #if (PDUR_CANIF_SUPPORT == STD_ON)
+
+ #include "CanIf.h"
+
+ #define PduR_ComTransmit CanIf_Transmit
+
+ #else
+
+ #define PduR_ComTransmit(... )
+
+ #endif
+
+#endif // Zero cost operation active
\r
#endif /* PDUR_COM_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "PduR.h"\r
+\r
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
+\r
+#include "debug.h"\r
+\r
+#if (PDUR_DCM_SUPPORT == STD_ON)\r
+\r
+Std_ReturnType PduR_DcmTransmit(PduIdType DcmTxPduId, const PduInfoType* PduInfoPtr) {\r
+ BufReq_ReturnType retVal = BUFREQ_NOT_OK;\r
+#if (PDUR_DCM_SUPPORT == STD_ON)\r
+ DevCheck(DcmTxPduId,PduInfoPtr,0x15, E_NOT_OK);\r
+\r
+ //DEBUG(DEBUG_LOW,"PduR_ComTransmit: received transmit request with id %d and data %d\n", ComTxPduId, *PduInfoPtr->SduDataPtr);\r
+\r
+\r
+ PduRRoutingPath_type *route = &PduRConfig->PduRRoutingTable->PduRRoutingPath[DcmTxPduId];\r
+ retVal = route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, PduInfoPtr);\r
+#endif\r
+ return retVal;\r
+}\r
+\r
+#endif\r
+\r
+#endif\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-#include "PduR_Ipdum.h"\r
-\r
-#ifdef PDUR_IPDUM_SUPPORT\r
-\r
-Std_ReturnType PduR_IpdumTransmit(PduIdType IpdumTxPduId, const PduInfoType* PduInfoPtr) {\r
-\r
-#ifdef PDUR_DEV_ERROR_DETECT\r
- DevCheck(IpdumTxPduId,PduInfoPtr,0x19);\r
-#endif\r
-\r
-}\r
-\r
-void PduR_IpdumTxConfirmation(PduIdType IpdumLoTxPduId) {\r
-\r
-#ifdef PDUR_DEV_ERROR_DETECT\r
- DevCheck(IpdumLoTxPduId,0,0x1a);\r
-#endif\r
-\r
-}\r
-\r
-void PduR_IpdumRxIndication(PduIdType IpdumLoRxPduId, const uint8* IpdumSduPtr) {\r
-\r
-#ifdef PDUR_DEV_ERROR_DETECT\r
- DevCheck(IpdumLoRxPduId,IpdumSduPtr,0x1b);\r
-#endif\r
-\r
-}\r
-\r
-#endif\r
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+#ifndef PDUR_DCM_H_\r
+#define PDUR_DCM_H_\r
+\r
+#include "PduR.h"\r
+\r
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
+\r
+ Std_ReturnType PduR_DcmTransmit(PduIdType DcmTxPduId, const PduInfoType* PduInfoPtr);\r
+\r
+#else // Zero cost operation active\r
+\r
+ #if (PDUR_CANTP_SUPPORT == STD_ON)\r
+\r
+ #include "CanTp.h"\r
+\r
+ #define PduR_DcmTransmit CanTp_Transmit\r
+\r
+ #else\r
+\r
+ #define PduR_DcmTransmit(... )\r
+\r
+ #endif\r
+\r
+#endif // Zero cost operation active\r
+\r
+\r
+#endif /*PDUR_DCM_H_*/\r
+\r
+\r
+\r
-#include <string.h>\r
-#include "PduR_If.h"\r
-#include "debug.h"\r
-\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
+#include "PduR.h"
+
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
\r
+#include <string.h>
+#include "debug.h"
+#if defined(USE_DEM)
+#include "Dem.h"
+#endif
+
/**\r
* Helper function for the PduR_<LO>IfRxIndication functions. This helper performs the actions specified by PDUR255 and PDUR258.
* @param LinRxPduId - The id of the PDU to be routed.
\r
if (route->PduR_GatewayMode == 0) {\r
// This is an ordinary request.\r
- route->FctPtrs->TargetIndicationFctPtr(route->PduRDestPdu.DestPduId, SduPtr); // Send PDU to next receptor.\r
+ route->FctPtrs.TargetIndicationFctPtr(route->PduRDestPdu.DestPduId, SduPtr); // Send PDU to next receptor.\r
\r
\r
} else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) {\r
.SduDataPtr = (uint8 *)SduPtr,\r
.SduLength = route->SduLength\r
};\r
- route->FctPtrs->TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo); // Send PDU to next receptor.\r
+ route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo); // Send PDU to next receptor.\r
\r
\r
} else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) {\r
};\r
PduR_BufferDeQueue(route->PduRDestPdu.TxBufferRef, val);\r
PduR_BufferQueue(route->PduRDestPdu.TxBufferRef, SduPtr);\r
- if (route->FctPtrs->TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo) == E_OK) {\r
+ if (route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo) == E_OK) {\r
setTxConfP(route);\r
}\r
}\r
.SduDataPtr = (uint8 *)SduPtr,\r
.SduLength = route->SduLength\r
};\r
- if (route->FctPtrs->TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfoPtr) == E_OK) {\r
+ if (route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfoPtr) == E_OK) {\r
setTxConfP(route);\r
\r
\r
\r
if (route->PduR_GatewayMode == 0) {\r
// This is an ordinary request.\r
- route->FctPtrs->TargetConfirmationFctPtr(route->PduRDestPdu.DestPduId); // Forward confirmation\r
+ route->FctPtrs.TargetConfirmationFctPtr(route->PduRDestPdu.DestPduId); // Forward confirmation\r
\r
} else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) {\r
// A gateway request without provision. Just forward confirmation.\r
- route->FctPtrs->TargetConfirmationFctPtr(route->PduRDestPdu.DestPduId); // Forward confirmation\r
+ route->FctPtrs.TargetConfirmationFctPtr(route->PduRDestPdu.DestPduId); // Forward confirmation\r
\r
\r
} else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) {\r
.SduLength = route->SduLength\r
};\r
// Transmit this item.\r
- if (route->FctPtrs->TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo) == E_OK) {\r
+ if (route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo) == E_OK) {\r
DEBUG(DEBUG_LOW,"\tTransmit succeeded.\n");\r
break;\r
\r
.SduLength = route->SduLength\r
};\r
// Transmit this item.\r
- if (route->FctPtrs->TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo) == E_OK) {\r
+ if (route->FctPtrs.TargetTransmitFctPtr(route->PduRDestPdu.DestPduId, &PduInfo) == E_OK) {\r
DEBUG(DEBUG_LOW,"\tTransmit succeeded.\n");\r
break;\r
\r
// Find out if this is a gateway or ordinary trigger.\r
//if (route->PduRDestPdu.DataProvision == PDUR_NO_PROVISION) { // This is an ordinary trigger.\r
if (route->PduR_GatewayMode == 0) { // This is an ordinary trigger.\r
- route->FctPtrs->TargetTriggerTransmitFctPtr(route->PduRDestPdu.DestPduId, SduPtr);\r
+ route->FctPtrs.TargetTriggerTransmitFctPtr(route->PduRDestPdu.DestPduId, SduPtr);\r
\r
} else if (route->PduR_GatewayMode == 1 && route->PduRDestPdu.DataProvision == PDUR_TRIGGER_TRANSMIT) { // The route is using a trigger transmit fifo. PDUR256\r
DEBUG(DEBUG_LOW,"\tUsing gateway mode with trigger transmit data provision.\n", PduId);\r
+#include "PduR.h"
-
-#include "PduR_LinIf.h"\r
-//#include "LinIf.h"\r
-#include "PduR_If.h"\r
-#include "debug.h"\r
-\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
-#ifdef PDUR_LINIF_SUPPORT\r
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)\r
\r
+#include "debug.h"
+
void PduR_LinIfRxIndication(PduIdType LinRxPduId, const uint8* LinSduPtr) {\r
- Enter(LinRxPduId);\r
+#if (PDUR_LINIF_SUPPORT == STD_ON)
DevCheck(LinRxPduId,LinSduPtr,0x0e);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
PduR_LoIfRxIndication(LinRxPduId, LinSduPtr);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
- Exit();\r
+#endif
}\r
\r
void PduR_LinIfTxConfirmation(PduIdType LinTxPduId) {\r
- Enter(LinTxPduId);\r
+#if (PDUR_LINIF_SUPPORT == STD_ON)
DevCheck(LinTxPduId,1,0x0f);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
PduR_LoIfTxConfirmation(LinTxPduId);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
- Exit();\r
+#endif
}\r
\r
void PduR_LinIfTriggerTransmit(PduIdType LinTxPduId, uint8* LinSduPtr) {\r
- Enter(LinTxPduId);\r
+#if (PDUR_LINIF_SUPPORT == STD_ON)
DevCheck(LinTxPduId,LinSduPtr,0x10);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
PduR_LoIfTriggerTransmit(LinTxPduId, LinSduPtr);\r
\r
DEBUG(DEBUG_LOW,"----------------------\n");\r
- Exit();\r
+#endif
}\r
\r
#endif\r
-#endif\r
\r
#include "PduR.h"\r
\r
-\r
-#ifdef PDUR_LINIF_SUPPORT\r
-#ifndef PDUR_ZERO_COST_OPERATION\r
-\r
-void PduR_LinIfRxIndication(PduIdType LinRxPduId,const uint8* LinSduPtr);\r
-void PduR_LinIfTxConfirmation(PduIdType LinTxPduId);\r
-void PduR_LinIfTriggerTransmit(PduIdType LinTxPduId,uint8* LinSduPtr);\r
-\r
-#else\r
-\r
-#define PduR_LinIfRxIndication Com_RxIndication\r
-#define PduR_LinIfTxConfirmation Com_TxConfirmation\r
-#define PduR_LinIfTriggerTransmit Com_TriggerTransmit\r
-\r
-#endif\r
-#endif\r
-\r
+#if (PDUR_ZERO_COST_OPERATION == STD_OFF)
+
+ void PduR_LinIfRxIndication(PduIdType LinRxPduId,const uint8* LinSduPtr);
+ void PduR_LinIfTxConfirmation(PduIdType LinTxPduId);
+ void PduR_LinIfTriggerTransmit(PduIdType LinTxPduId,uint8* LinSduPtr);
+
+#else // Zero cost operation active
+
+ #if (PDUR_LINIF_SUPPORT == STD_ON)
+
+ #define PduR_LinIfRxIndication Com_RxIndication
+ #define PduR_LinIfTxConfirmation Com_TxConfirmation
+ #define PduR_LinIfTriggerTransmit Com_TriggerTransmit
+
+ #else
+
+ #define PduR_LinIfRxIndication(...)
+ #define PduR_LinIfTxConfirmation(...)
+ #define PduR_LinIfTriggerTransmit(...)
+
+ #endif
+
+#endif // Zero cost operation active
+
#endif /*PDUR_LINIF_H_*/\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-#include "PduR.h"\r
-\r
-PduIdType LOIf_ReceivedPduId;\r
-uint8 LOIf_ReceivedData[] = {9,9,9,9,9,9,9,9};\r
-uint8 LOIf_TriggerMode = 0; // 1 => TriggerTransmit mode. 0 => Ordinary mode.\r
-uint8 LOIf_SendConfirmation = 1; // 0 => No confirmation.\r
-Std_ReturnType LOIf_Transmit_TEST(PduIdType LOTxPduId,const PduInfoType* PduInfoPtr)\r
-{\r
- //debug("LinIf_Transmit_TEST: Received data with id %d\n", LinTxPduId);\r
- LOIf_ReceivedPduId = LOTxPduId;\r
-\r
- if (LOIf_TriggerMode) {\r
- PduR_LinIfTriggerTransmit(LOTxPduId, LOIf_ReceivedData);\r
- } else {\r
- memcpy(&LOIf_ReceivedData, PduInfoPtr->SduDataPtr, PduInfoPtr->SduLength * (sizeof (uint8)));\r
- }\r
-\r
- if (LOIf_SendConfirmation) {\r
- PduR_LinIfTxConfirmation(LOTxPduId);\r
- }\r
-\r
- return E_OK;\r
-}\r
-\r
-Std_ReturnType LOIf_ErroneousTransmit_TEST(PduIdType LOTxPduId,const PduInfoType* PduInfoPtr) {\r
- return E_NOT_OK;\r
-}\r
-\r
-PduIdType UP_ReceivedPduId;\r
-const uint8 UP_ReceivedData[] = {9,9,9,9,9,9,9,9};\r
-Std_ReturnType UP_RxIndication_TEST(PduIdType UPRxPduId, const uint8* PduInfoPtr)\r
-{\r
- //debug("Com_RxIndication_TEST: received indication with id %d and data %d\n", ComRxPduId, *PduInfoPtr);\r
- UP_ReceivedPduId = UPRxPduId;\r
-\r
- memcpy(&UP_ReceivedData, PduInfoPtr, PduR_RTable_LoIf.RoutingTable[UPRxPduId].SduLength * (sizeof (uint8)));\r
- return E_OK;\r
-}\r
-\r
-Std_ReturnType UP_TxConfirmation_TEST(PduIdType PduId) {\r
- //debug("Com_TxConfirmation_TEST: Received confirmation with id %d\n", PduId);\r
- UP_ReceivedPduId = PduId;\r
- return E_OK;\r
-}\r
-\r
-Std_ReturnType UP_TriggerTransmit_TEST(PduIdType PduId, uint8 *PduInfoPtr) {\r
- //debug("Com_TriggerTransmit: Received trigger with id %d and data %d\n", PduId, *PduInfoPtr);\r
- UP_ReceivedPduId = PduId;\r
- memcpy(PduInfoPtr, &CanSduPtr, PduR_RTable_LoIf.RoutingTable[PduId].SduLength * (sizeof (uint8)));\r
- return E_OK;\r
-}\r
-\r
-PduR_FctPtrType PduR_Callbacks_TEST = {\r
- .TargetIndicationFctPtr = UP_RxIndication_TEST,\r
- .TargetTransmitFctPtr = LOIf_Transmit_TEST,\r
- .TargetConfirmationFctPtr = UP_TxConfirmation_TEST,\r
- .TargetTriggerTransmitFctPtr = UP_TriggerTransmit_TEST,\r
-};\r
-\r
-PduR_FctPtrType PduR_ErroneousCallbacks_TEST = {\r
- //.TargetIndicationFctPtr = UP_RxIndication_TEST,\r
- .TargetTransmitFctPtr = LOIf_ErroneousTransmit_TEST,\r
- //.TargetConfirmationFctPtr = UP_TxConfirmation_TEST,\r
- //.TargetTriggerTransmitFctPtr = UP_TriggerTransmit_TEST,\r
-};\r
-\r
-\r
-// DET_REPORTERROR(PDUR_MODULE_ID, PDUR_INSTANCE_ID, 0x00, PDUR_E_CONFIG_PTR_INVALID);\r
-\r
-void PduRclearError(void)\r
-{\r
- error.ApiId=0;\r
- error.ErrorId=0;\r
- error.InstanceId=0;\r
- error.ModuleId=0;\r
-\r
- UP_ReceivedPduId = -1;\r
- memset(&UP_ReceivedData, 9, sizeof(uint8) * 8);\r
-\r
- LOIf_ReceivedPduId = -1;\r
- memset(&LOIf_ReceivedData, 9, sizeof(uint8) * 8);\r
-}\r
/**
* PDU identifier assigned by the PDU router.
*/\r
- uint16 HandleId;\r
+ uint16 SrcPduId;\r
\r
/**
* Reference to unique PDU identifier.
/**
* Not part of standard
*/\r
- PduR_FctPtrType *FctPtrs;\r
+ PduR_FctPtrType FctPtrs;\r
uint8 PduR_Arc_EOL;\r
uint8 PduR_GatewayMode;\r
\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+#include <string.h>
+#include "Dcm.h"
+#include "Dcm_Internal.h"
+#include "Dem.h"
+#include "Det.h"
+#include "MemMap.h"
+//#include "SchM_Dcm.h"
+#include "ComM_Dcm.h"
+#include "PduR_Dcm.h"
+#include "ComStack_Types.h"
+#include "Mcu.h"
+
+// State variable
+typedef enum
+{
+ DCM_UNINITIALIZED = 0,
+ DCM_INITIALIZED
+} Dcm_StateType;
+
+static Dcm_StateType dcmState = DCM_UNINITIALIZED;
+
+#if (DCM_VERSION_INFO_API == STD_ON)
+static Std_VersionInfoType _Dcm_VersionInfo =
+{
+ .vendorID = (uint16)1,
+ .moduleID = (uint16)1,
+ .instanceID = (uint8)1,
+ .sw_major_version = (uint8)DCM_SW_MAJOR_VERSION,
+ .sw_minor_version = (uint8)DCM_SW_MINOR_VERSION,
+ .sw_patch_version = (uint8)DCM_SW_PATCH_VERSION,
+ .ar_major_version = (uint8)DCM_AR_MAJOR_VERSION,
+ .ar_minor_version = (uint8)DCM_AR_MINOR_VERSION,
+ .ar_patch_version = (uint8)DCM_AR_PATCH_VERSION,
+};
+#endif /* DCM_VERSION_INFO_API */
+
+
+
+/*********************************************
+ * Interface for upper layer modules (8.3.1) *
+ *********************************************/
+
+/*
+ * Procedure: Dcm_GetVersionInfo
+ * Reentrant: Yes
+ */
+#if (DCM_VERSION_INFO_API == STD_ON)
+void Dcm_GetVersionInfo(Std_VersionInfoType *versionInfo) {
+ memcpy(versionInfo, &_Dcm_VersionInfo, sizeof(Std_VersionInfoType));
+}
+#endif /* DCM_VERSION_INFO_API */
+
+
+
+/*
+ * Procedure: Dcm_Init
+ * Reentrant: No
+ */
+void Dcm_Init(void)
+{
+ if ((DCM_Config.Dsl == NULL) || (DCM_Config.Dsd == NULL) || (DCM_Config.Dsp == NULL)) {
+#if (DCM_DEV_ERROR_DETECT == STD_ON)
+ Det_ReportError(MODULE_ID_DCM, 0, DCM_INIT_ID, DCM_E_CONFIG_INVALID);
+#endif
+
+ }
+ else {
+ DslInit();
+ DsdInit();
+ DspInit();
+
+ dcmState = DCM_INITIALIZED;
+ }
+
+ return;
+}
+
+
+/*
+ * Interface for basic software scheduler
+ */
+void Dcm_MainFunction(void)
+{
+ DsdMain();
+ DspMain();
+ DslMain();
+}
+
+/***********************************************
+ * Interface for BSW modules and SW-Cs (8.3.2) *
+ ***********************************************/
+BufReq_ReturnType Dcm_ProvideRxBuffer(PduIdType dcmRxPduId, PduLengthType tpSduLength, PduInfoType **pduInfoPtr)
+{
+ BufReq_ReturnType returnCode = BUFREQ_OK;
+
+ returnCode = DslProvideRxBufferToPdur(dcmRxPduId, tpSduLength, (const PduInfoType**)pduInfoPtr);
+
+ return returnCode;
+}
+
+
+void Dcm_RxIndication(PduIdType dcmRxPduId, NotifResultType result)
+{
+ DslRxIndicationFromPduR(dcmRxPduId, result);
+}
+
+
+Std_ReturnType Dcm_GetActiveProtocol(Dcm_ProtocolType *protocolId)
+{
+ Std_ReturnType returnCode = E_OK;
+
+ returnCode = DslGetActiveProtocol(protocolId);
+
+ return returnCode;
+}
+
+
+Std_ReturnType Dcm_GetSecurityLevel(Dcm_SecLevelType *secLevel)
+{
+ Std_ReturnType returnCode = E_OK;
+
+ returnCode = DslGetSecurityLevel(secLevel);
+
+ return returnCode;
+}
+
+
+Std_ReturnType Dcm_GetSesCtrlType(Dcm_SesCtrlType *sesCtrlType)
+{
+ Std_ReturnType returnCode = E_OK;
+
+ returnCode = DslGetSesCtrlType(sesCtrlType);
+
+ return returnCode;
+}
+
+BufReq_ReturnType Dcm_ProvideTxBuffer(PduIdType dcmTxPduId, PduInfoType **pduInfoPtr, PduLengthType length)
+{
+ BufReq_ReturnType returnCode = BUFREQ_OK;
+
+ returnCode = DslProvideTxBuffer(dcmTxPduId, (const PduInfoType**)pduInfoPtr, length);
+
+ return returnCode;
+}
+
+void Dcm_TxConfirmation(PduIdType dcmTxPduId, NotifResultType result)
+{
+ DslTxConfirmation(dcmTxPduId, result);
+}
+
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+#include <string.h>\r
+#include "Dcm.h"\r
+#include "Dcm_Internal.h"\r
+#include "Det.h"\r
+#include "MemMap.h"\r
+\r
+typedef struct {\r
+ const PduInfoType *pduRxData;\r
+ PduInfoType *pduTxData;\r
+ const Dcm_DsdServiceTableType *serviceTable;\r
+ Dcm_ProtocolAddrTypeType addrType;\r
+ PduIdType txPduId;\r
+ PduIdType rxPduId;\r
+} MsgDataType;\r
+\r
+// In "queue" to DSD\r
+static boolean dsdDslDataIndication = FALSE;\r
+static MsgDataType msgData;\r
+\r
+static uint8 currentSid;\r
+static boolean suppressPosRspMsg;\r
+\r
+void DsdInit(void)\r
+{\r
+\r
+}\r
+\r
+\r
+void DsdMain(void)\r
+{\r
+ if (dsdDslDataIndication) {\r
+ dsdDslDataIndication = FALSE;\r
+ DsdHandleRequest();\r
+ }\r
+}\r
+\r
+\r
+boolean DsdLookupSid(uint8 sid, const Dcm_DsdServiceType **sidPtr)\r
+{\r
+ boolean returnStatus = TRUE;\r
+ const Dcm_DsdServiceType *service = msgData.serviceTable->DsdService;\r
+\r
+ while ((service->DsdSidTabServiceId != sid) && !service->Arc_EOL) {\r
+ service++;\r
+ }\r
+\r
+ if (!service->Arc_EOL) {\r
+ *sidPtr = service;\r
+ }\r
+ else {\r
+ returnStatus = FALSE;\r
+ *sidPtr = NULL;\r
+ }\r
+\r
+ return returnStatus;\r
+}\r
+\r
+\r
+boolean DsdAskApplicationForServicePermission(uint8 *requestData, uint16 dataSize)\r
+{\r
+ Std_ReturnType returnCode = E_OK;\r
+ const Dcm_DslServiceRequestIndicationType *serviceRequestIndication = DCM_Config.Dsl->DslServiceRequestIndication;\r
+ Std_ReturnType result;\r
+\r
+ while (!serviceRequestIndication->Arc_EOL && (returnCode != E_REQUEST_NOT_ACCEPTED)) {\r
+ if (serviceRequestIndication->Indication != NULL) {\r
+ result = serviceRequestIndication->Indication(requestData, dataSize);\r
+ if (result != E_OK)\r
+ returnCode = result;\r
+ }\r
+ serviceRequestIndication++;\r
+ }\r
+\r
+ return returnCode;\r
+}\r
+\r
+\r
+void DsdCreateAndSendNcr(Dcm_NegativeResponseCodeType responseCode)\r
+{\r
+ if (!((msgData.addrType == DCM_PROTOCOL_FUNCTIONAL_ADDR_TYPE)\r
+ && ((responseCode == DCM_E_SERVICENOTSUPPORTED) || (responseCode == DCM_E_SUBFUNCTIONNOTSUPPORTED) || (responseCode == DCM_E_REQUESTOUTOFRANGE)))) { /** @req DCM001 **/\r
+ msgData.pduTxData->SduDataPtr[0] = SID_NEGATIVE_RESPONSE;\r
+ msgData.pduTxData->SduDataPtr[1] = currentSid;\r
+ msgData.pduTxData->SduDataPtr[2] = responseCode;\r
+ msgData.pduTxData->SduLength = 3;\r
+ DslDsdProcessingDone(msgData.rxPduId, DSD_TX_RESPONSE_READY); /** @req DCM114 **/ /** @req DCM232.1 **/\r
+ }\r
+ else {\r
+ DslDsdProcessingDone(msgData.rxPduId, DSD_TX_RESPONSE_SUPPRESSED);\r
+ }\r
+}\r
+\r
+\r
+void DsdSelectServiceFunction(uint8 sid)\r
+{\r
+ switch (sid) /** @req DCM221 **/\r
+ {\r
+ case SID_DIAGNOSTIC_SESSION_CONTROL:\r
+ DspUdsDiagnosticSessionControl(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_ECU_RESET:\r
+ DspUdsEcuReset(msgData.pduRxData, msgData.txPduId, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_CLEAR_DIAGNOSTIC_INFORMATION:\r
+ DspUdsClearDiagnosticInformation(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_READ_DTC_INFORMATION:\r
+ DspUdsReadDtcInformation(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_READ_DATA_BY_IDENTIFIER:\r
+ DspUdsReadDataByIdentifier(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_READ_SCALING_DATA_BY_IDENTIFIER:\r
+ DspUdsReadScalingDataByIdentifier(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_SECURITY_ACCESS:\r
+ DspUdsSecurityAccess(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_WRITE_DATA_BY_IDENTIFIER:\r
+ DspUdsWriteDataByIdentifier(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_TESTER_PRESENT:\r
+ DspUdsTesterPresent(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_CONTROL_DTC_SETTING:\r
+ DspUdsControlDtcSetting(msgData.pduRxData, msgData.pduTxData);\r
+ break;\r
+\r
+ case SID_READ_DATA_BY_PERIODIC_IDENTIFIER:\r
+ case SID_DYNAMICALLY_DEFINE_DATA_IDENTIFIER:\r
+ case SID_INPUT_OUTPUT_CONTROL_BY_IDENTIFIER:\r
+ case SID_ROUTINE_CONTROL:\r
+ default:\r
+ /* Non implemented service */\r
+ DsdCreateAndSendNcr(DCM_E_SERVICENOTSUPPORTED);\r
+ break;\r
+ }\r
+}\r
+\r
+\r
+void DsdHandleRequest(void)\r
+{\r
+ Std_ReturnType result;\r
+ const Dcm_DsdServiceType *sidConfPtr = NULL;\r
+\r
+ currentSid = msgData.pduRxData->SduDataPtr[0]; /** @req DCM198 **/\r
+\r
+ /** @req DCM178 **/\r
+ if (DCM_RESPOND_ALL_REQUEST || ((currentSid & 0x7F) < 0x40)) { /** @req DCM084 **/\r
+ if (DsdLookupSid(currentSid, &sidConfPtr)) { /** @req DCM192 **/ /** @req DCM193 **/ /** @req DCM196 **/\r
+ // SID found!\r
+ if (DspCheckSessionLevel(sidConfPtr->DsdSidTabSessionLevelRef)) { /** @req DCM211 **/\r
+ if (DspCheckSecurityLevel(sidConfPtr->DsdSidTabSecurityLevelRef)) { /** @req DCM217 **/\r
+ if (DCM_REQUEST_INDICATION_ENABLED) { /** @req DCM218 **/\r
+ result = DsdAskApplicationForServicePermission(msgData.pduRxData->SduDataPtr, msgData.pduRxData->SduLength);\r
+ }\r
+ if (!DCM_REQUEST_INDICATION_ENABLED || result == E_OK) {\r
+ // Yes! All conditions met!\r
+ // Check if response shall be suppressed\r
+ if (sidConfPtr->DsdSidTabSubfuncAvail && (msgData.pduRxData->SduDataPtr[1] & SUPPRESS_POS_RESP_BIT)) { /** @req DCM204 **/\r
+ suppressPosRspMsg = TRUE; /** @req DCM202 **/\r
+ msgData.pduRxData->SduDataPtr[1] &= ~SUPPRESS_POS_RESP_BIT; /** @req DCM201 **/\r
+ }\r
+ else\r
+ {\r
+ suppressPosRspMsg = FALSE; /** @req DCM202 **/\r
+ }\r
+ DsdSelectServiceFunction(currentSid);\r
+ }\r
+ else {\r
+ if (result == E_REQUEST_ENV_NOK) {\r
+ DsdCreateAndSendNcr(DCM_E_CONDITIONSNOTCORRECT); /** @req DCM463 **/\r
+ }\r
+ else {\r
+ // Do not send any response /** @req DCM462 **/\r
+ DslDsdProcessingDone(msgData.rxPduId, DSD_TX_RESPONSE_SUPPRESSED);\r
+ }\r
+ }\r
+ }\r
+ else {\r
+ DsdCreateAndSendNcr(DCM_E_SECUTITYACCESSDENIED); /** @req DCM217 **/\r
+ }\r
+ }\r
+ else {\r
+ DsdCreateAndSendNcr(DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION); /** @req DCM211 **/\r
+ }\r
+ }\r
+ else {\r
+ DsdCreateAndSendNcr(DCM_E_SERVICENOTSUPPORTED); /** @req DCM197 **/\r
+ }\r
+ }\r
+ else {\r
+ // Inform DSL that message has been discard\r
+ DslDsdProcessingDone(msgData.rxPduId, DSD_TX_RESPONSE_SUPPRESSED);\r
+ }\r
+}\r
+\r
+\r
+void DsdDspProcessingDone(Dcm_NegativeResponseCodeType responseCode)\r
+{\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ if (!suppressPosRspMsg) { /** @req DCM200 **/ /** @req DCM231 **/\r
+ /** @req DCM222 **/\r
+ msgData.pduTxData->SduDataPtr[0] = currentSid | SID_RESPONSE_BIT; /** @req DCM223 **/ /** @req DCM224 **/\r
+ DslDsdProcessingDone(msgData.rxPduId, DSD_TX_RESPONSE_READY); /** @req DCM114 **/ /** @req DCM225 **/ /** @req DCM232.2 **/\r
+ }\r
+ else {\r
+ DspDcmConfirmation(msgData.txPduId); /** @req DCM236 **/ /** @req DCM240 **/\r
+ DslDsdProcessingDone(msgData.rxPduId, DSD_TX_RESPONSE_SUPPRESSED);\r
+ }\r
+ }\r
+ else {\r
+ DsdCreateAndSendNcr(responseCode); /** @req DCM228 **/\r
+ }\r
+\r
+}\r
+\r
+\r
+void DsdDataConfirmation(PduIdType confirmPduId, NotifResultType result)\r
+{\r
+ DspDcmConfirmation(confirmPduId); /** @req DCM236 **/\r
+}\r
+\r
+\r
+void DsdDslDataIndication(const PduInfoType *pduRxData, const Dcm_DsdServiceTableType *protocolSIDTable, Dcm_ProtocolAddrTypeType addrType, PduIdType txPduId, PduInfoType *pduTxData, PduIdType rxContextPduId)\r
+{\r
+ msgData.rxPduId = rxContextPduId;\r
+ msgData.txPduId = txPduId;\r
+ msgData.pduRxData = pduRxData;\r
+ msgData.pduTxData = pduTxData;\r
+ msgData.addrType = addrType;\r
+ msgData.serviceTable = protocolSIDTable;\r
+\r
+ dsdDslDataIndication = TRUE;\r
+}\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#include <string.h>\r
+#include "Mcu.h"\r
+#include "Dcm.h"\r
+#include "Dcm_Internal.h"\r
+#include "Det.h"\r
+#include "MemMap.h"\r
+#include "ComM_Dcm.h"\r
+#include "PduR_Dcm.h"\r
+#include "ComStack_Types.h"\r
+//#define USE_DEBUG_PRINTF\r
+#include "debug.h"\r
+\r
+#define DECREMENT(timer) { if (timer > 0) timer--; }\r
+#define DCM_CONVERT_MS_TO_MAIN_CYCLES(x) ((x)/DCM_MAIN_FUNCTION_PERIOD_TIME_MS)\r
+\r
+\r
+/*\r
+ * Type definitions.\r
+ */\r
+typedef struct {\r
+ const Dcm_DslProtocolRxType *protocolRx;\r
+ const Dcm_DslMainConnectionType *mainConnection;\r
+ const Dcm_DslConnectionType *connection;\r
+ const Dcm_DslProtocolRowType *protocolRow;\r
+} DcmDsl_ProtocolConfigurationType;\r
+\r
+#define MAX_PARALLEL_PROTOCOLS_ALLOWED 1\r
+\r
+typedef struct {\r
+ boolean initRun;\r
+ //boolean diagnosticRequestPending; // This is a "semaphore" because DSD and DCM can handle multiple/parallel request at the moment.\r
+ const Dcm_DslProtocolRowType *preemptedProtocol; // Points to the currently active protocol.\r
+ const Dcm_DslProtocolRowType *activeProtocol; // Points to the currently active protocol.\r
+ Dcm_DslRunTimeProtocolParametersType\r
+ protocolList[MAX_PARALLEL_PROTOCOLS_ALLOWED];\r
+} DcmDsl_RunTimeDataType;\r
+\r
+DcmDsl_RunTimeDataType DcmDslRunTimeData = {\r
+ .initRun = FALSE,\r
+ .preemptedProtocol = NULL,\r
+ .activeProtocol = NULL };\r
+\r
+// ################# DUMMIES START #################\r
+\r
+/*\r
+ * Local types\r
+ */\r
+\r
+// Global service table, set by DSL used by DSD\r
+Dcm_DsdServiceTableType *DslCurrentServiceTable = NULL;\r
+\r
+void ComM_DCM_ActivateDiagnostic() {\r
+ ;\r
+}\r
+\r
+void ComM_DCM_InactivateDiagnostic() {\r
+ ;\r
+}\r
+\r
+// ################# HELPER FUNCTIONS START #################\r
+\r
+//\r
+// This function reset/stars the session (S3) timer. See requirement\r
+// @DCM141 when that action should be taken.\r
+//\r
+void startS3SessionTimer(Dcm_DslRunTimeProtocolParametersType *runtime,\r
+ const Dcm_DslProtocolRowType *protocolRow) {\r
+ const Dcm_DslProtocolTimingRowType *timeParams;\r
+ timeParams = protocolRow->DslProtocolTimeLimit;\r
+ runtime->S3ServerTimeoutCount = DCM_CONVERT_MS_TO_MAIN_CYCLES(\r
+ timeParams->TimStrS3Server);\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+//\r
+// This function reset/stars the session (S3) timer. See requirement\r
+// @DCM141 when that action should be taken.\r
+//\r
+void stopS3SessionTimer(Dcm_DslRunTimeProtocolParametersType *runtime) {\r
+ runtime->S3ServerTimeoutCount = 0;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+//\r
+// This function implements the requirement @DCM139 when\r
+// transition from one session to another.\r
+//\r
+void changeDiagnosticSession(Dcm_DslRunTimeProtocolParametersType *runtime,\r
+ Dcm_SesCtrlType newSession) {\r
+\r
+ /** @req DCM139 **/\r
+\r
+ switch (runtime->sessionControl) {\r
+ case DCM_DEFAULT_SESSION: // "default".\r
+ break;\r
+\r
+ case DCM_PROGRAMMING_SESSION:\r
+ case DCM_EXTENDED_DIAGNOSTIC_SESSION:\r
+ case DCM_SAFTEY_SYSTEM_DIAGNOSTIC_SESSION:\r
+ case DCM_ALL_SESSION_LEVEL:\r
+ runtime->securityLevel = DCM_SEC_LEV_LOCKED; // "0x00".\r
+ break;\r
+\r
+ default:\r
+ // TODO: Log this error.\r
+ DEBUG(DEBUG_MEDIUM, "Old session invalid")\r
+ break;\r
+ }\r
+\r
+ switch (newSession) {\r
+ case DCM_DEFAULT_SESSION: // "default".\r
+ case DCM_PROGRAMMING_SESSION:\r
+ case DCM_EXTENDED_DIAGNOSTIC_SESSION:\r
+ case DCM_SAFTEY_SYSTEM_DIAGNOSTIC_SESSION:\r
+ case DCM_ALL_SESSION_LEVEL:\r
+ runtime->sessionControl = newSession;\r
+ break;\r
+\r
+ default:\r
+ // TODO: Log this error.\r
+ DEBUG(DEBUG_MEDIUM, "New session invalid")\r
+ break;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+void DslResetSessionTimeoutTimer() {\r
+ const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ activeProtocol = DcmDslRunTimeData.activeProtocol;\r
+ runtime = activeProtocol->DslRunTimeProtocolParameters;\r
+ startS3SessionTimer(runtime, activeProtocol); // @DCM141\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+void DslGetCurrentServiceTable(\r
+ const Dcm_DsdServiceTableType **currentServiceTable) {\r
+ const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ activeProtocol = DcmDslRunTimeData.activeProtocol;\r
+ if (activeProtocol != NULL) {\r
+ *currentServiceTable = activeProtocol->DslProtocolSIDTable;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+Std_ReturnType DslGetActiveProtocol(Dcm_ProtocolType *protocolId) { /** @req DCM340 **/\r
+ Std_ReturnType ret = E_NOT_OK;\r
+ const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ activeProtocol = DcmDslRunTimeData.activeProtocol;\r
+ if (activeProtocol != NULL) {\r
+ *protocolId = activeProtocol->DslProtocolID;\r
+ ret = E_OK;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+void DslSetSecurityLevel(Dcm_SecLevelType secLevel) { /** @req DCM020 **/\r
+ const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ activeProtocol = DcmDslRunTimeData.activeProtocol;\r
+ runtime = activeProtocol->DslRunTimeProtocolParameters;\r
+ runtime->securityLevel = secLevel;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+Std_ReturnType DslGetSecurityLevel(Dcm_SecLevelType *secLevel) { /** @req DCM020 **//** @req DCM338 **/\r
+ Std_ReturnType ret = E_NOT_OK;\r
+ const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ activeProtocol = DcmDslRunTimeData.activeProtocol;\r
+ if (activeProtocol != NULL) {\r
+ runtime = activeProtocol->DslRunTimeProtocolParameters;\r
+ *secLevel = runtime->securityLevel;\r
+ ret = E_OK;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+void DslSetSesCtrlType(Dcm_SesCtrlType sesCtrl) { /** @req DCM022 **/\r
+ const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ activeProtocol = DcmDslRunTimeData.activeProtocol;\r
+ if (activeProtocol != NULL) {\r
+ runtime = activeProtocol->DslRunTimeProtocolParameters;\r
+ if (runtime->sessionControl != sesCtrl) {\r
+ changeDiagnosticSession(runtime, sesCtrl);\r
+ DslResetSessionTimeoutTimer();\r
+ }\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+Std_ReturnType DslGetSesCtrlType(Dcm_SesCtrlType *sesCtrlType) { /** @req DCM022 **//** @req DCM339 **/\r
+ Std_ReturnType ret = E_NOT_OK;\r
+ const Dcm_DslProtocolRowType *activeProtocol = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ activeProtocol = DcmDslRunTimeData.activeProtocol;\r
+ if (activeProtocol != NULL) {\r
+ runtime = activeProtocol->DslRunTimeProtocolParameters;\r
+ *sesCtrlType = runtime->sessionControl;\r
+ ret = E_OK;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+boolean findRxPduIdParentConfigurationLeafs(PduIdType dcmRxPduId,\r
+ const Dcm_DslProtocolRxType **protocolRx,\r
+ const Dcm_DslMainConnectionType **mainConnection,\r
+ const Dcm_DslConnectionType **connection,\r
+ const Dcm_DslProtocolRowType **protocolRow,\r
+ Dcm_DslRunTimeProtocolParametersType **runtime) {\r
+\r
+ boolean ret = FALSE;\r
+ if (dcmRxPduId < DCM_DSL_RX_PDU_ID_LIST_LENGTH) {\r
+ *protocolRx = &DCM_Config.Dsl->DslProtocol->DslProtocolRxGlobalList[dcmRxPduId];\r
+ *mainConnection = (*protocolRx)->DslMainConnectionParent;\r
+ *connection = (*mainConnection)->DslConnectionParent;\r
+ *protocolRow = (*connection)->DslProtocolRow;\r
+ *runtime = (*protocolRow)->DslRunTimeProtocolParameters;\r
+ ret = TRUE;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+boolean findTxPduIdParentConfigurationLeafs(PduIdType dcmTxPduId,\r
+ const Dcm_DslProtocolTxType **protocolTx,\r
+ const Dcm_DslMainConnectionType **mainConnection,\r
+ const Dcm_DslConnectionType **connection,\r
+ const Dcm_DslProtocolRowType **protocolRow,\r
+ Dcm_DslRunTimeProtocolParametersType **runtime) {\r
+\r
+ boolean ret = FALSE;\r
+ if (dcmTxPduId < DCM_DSL_TX_PDU_ID_LIST_LENGTH) {\r
+ *protocolTx = &DCM_Config.Dsl->DslProtocol->DslProtocolTxGlobalList[dcmTxPduId];\r
+ *mainConnection = (*protocolTx)->DslMainConnectionParent;\r
+ *connection = (*mainConnection)->DslConnectionParent;\r
+ *protocolRow = (*connection)->DslProtocolRow;\r
+ *runtime = (*protocolRow)->DslRunTimeProtocolParameters;\r
+ ret = TRUE;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+void releaseExternalRxTxBuffers(const Dcm_DslProtocolRowType *protocolRow,\r
+ Dcm_DslRunTimeProtocolParametersType *runtime) {\r
+\r
+ protocolRow->DslProtocolTxBufferID->externalBufferRuntimeData->status\r
+ = BUFFER_AVAILABLE;\r
+ protocolRow->DslProtocolRxBufferID->externalBufferRuntimeData->status\r
+ = BUFFER_AVAILABLE;\r
+ runtime->externalTxBufferStatus = NOT_IN_USE; // We are waiting for DSD to return the buffer. qqq.\r
+ runtime->externalRxBufferStatus = NOT_IN_USE; // We are waiting for DSD to return the buffer. qqq.\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+\r
+void releaseExternalRxTxBuffersHelper(PduIdType rxPduIdRef) {\r
+ const Dcm_DslProtocolRxType *protocolRx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
+ if (findRxPduIdParentConfigurationLeafs(rxPduIdRef, &protocolRx, &mainConnection,\r
+ &connection, &protocolRow, &runtime)) {\r
+ releaseExternalRxTxBuffers(protocolRow, runtime);\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+/*\r
+ * This function is called from the DSD module to the DSL when\r
+ * a response to a diagnostic request has been copied into the\r
+ * given TX-buffer and is ready for transmission.\r
+ */\r
+void DslDsdProcessingDone(PduIdType rxPduIdRef,\r
+ DsdProcessingDoneResultType responseResult) {\r
+ const Dcm_DslProtocolRxType *protocolRx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
+ DEBUG( DEBUG_MEDIUM, "DslDsdProcessingDone rxPduIdRef=%d\n", rxPduIdRef);\r
+\r
+ if (findRxPduIdParentConfigurationLeafs(rxPduIdRef, &protocolRx, &mainConnection,\r
+ &connection, &protocolRow, &runtime)) {\r
+ imask_t state = McuE_EnterCriticalSection();\r
+ switch (responseResult) {\r
+ case DSD_TX_RESPONSE_READY:\r
+ runtime->externalTxBufferStatus = DSD_PENDING_RESPONSE_SIGNALED; /** @req DCM114 **/\r
+ break;\r
+ case DSD_TX_RESPONSE_SUPPRESSED:\r
+ DEBUG( DEBUG_MEDIUM, "DslDsdProcessingDone called with DSD_TX_RESPONSE_SUPPRESSED.\n");\r
+ releaseExternalRxTxBuffersHelper(rxPduIdRef);\r
+ break;\r
+ default:\r
+ DEBUG( DEBUG_MEDIUM, "Unknown response result from DslDsdProcessingDone!\n");\r
+ break;\r
+ }\r
+ McuE_ExitCriticalSection(state);\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+/*\r
+ * This function preparing transmission of response\r
+ * pending message to tester.\r
+ */\r
+void sendResponse(const Dcm_DslProtocolRowType *protocol,\r
+ Dcm_NegativeResponseCodeType responseCode) {\r
+ //Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ const Dcm_DslProtocolRxType *protocolRx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
+ /** @req DCM119 **/\r
+ imask_t state = McuE_EnterCriticalSection();\r
+ if (findRxPduIdParentConfigurationLeafs(protocol->DslRunTimeProtocolParameters->diagReqestRxPduId, &protocolRx, &mainConnection, &connection, &protocolRow, &runtime)) {\r
+ if (runtime->localTxBuffer.status == NOT_IN_USE) {\r
+ runtime->localTxBuffer.status = PROVIDED_TO_DSD;\r
+ runtime->localTxBuffer.buffer[0] = SID_NEGATIVE_RESPONSE;\r
+ runtime->localTxBuffer.buffer[1] = protocol->DslProtocolRxBufferID->pduInfo.SduDataPtr[2];\r
+ runtime->localTxBuffer.buffer[2] = responseCode;\r
+ runtime->localTxBuffer.PduInfo.SduDataPtr = runtime->localTxBuffer.buffer;\r
+ runtime->localTxBuffer.PduInfo.SduLength = 3;\r
+ runtime->localTxBuffer.status = DCM_TRANSMIT_SIGNALED; // In the DslProvideTxBuffer 'callback' this state signals it is the local buffer we are interested in sending.\r
+ PduR_DcmTransmit(mainConnection->DslProtocolTx->DcmDslProtocolTxPduId,\r
+ &(runtime->localTxBuffer.PduInfo));/** @req DCM115, the P2ServerMin has not been implemented. **/\r
+ }\r
+ }\r
+ McuE_ExitCriticalSection(state);\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+Std_ReturnType StartProtocolHelper(Dcm_ProtocolType protocolId) {\r
+ Std_ReturnType ret = E_NOT_OK;\r
+ uint16 i;\r
+\r
+ for (i = 0; !DCM_Config.Dsl->DslCallbackDCMRequestService[i].Arc_EOL; i++) {\r
+ if (DCM_Config.Dsl->DslCallbackDCMRequestService[i].StartProtocol\r
+ != NULL) {\r
+ ret\r
+ = DCM_Config.Dsl->DslCallbackDCMRequestService[i]. StartProtocol(\r
+ protocolId);\r
+ if (ret != E_OK) { // qqq: eqvivalent to DCM_E_OK?\r
+ break;\r
+ }\r
+ }\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - -\r
+\r
+boolean isTesterPresentCommand(const PduInfoType *rxPdu) {\r
+ boolean ret = FALSE;\r
+ if ((rxPdu->SduDataPtr[0] == SID_TESTER_PRESENT) && (rxPdu->SduDataPtr[1]\r
+ & SUPPRESS_POS_RESP_BIT)) {\r
+ return TRUE;\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// Implements 'void Dcm_Init(void)' for DSL.\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+void DslInit(void) { /** @req DCM037 - for DSL submodule. **/\r
+ const Dcm_DslProtocolRowType *listEntry = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
+ listEntry = DCM_Config.Dsl->DslProtocol->DslProtocolRowList;\r
+ while (listEntry->Arc_EOL == FALSE) {\r
+ runtime = listEntry->DslRunTimeProtocolParameters;\r
+ runtime->externalRxBufferStatus = DCM_IDLE;\r
+ runtime->externalTxBufferStatus = DCM_IDLE;\r
+ runtime->localRxBuffer.status = DCM_IDLE;\r
+ runtime->localTxBuffer.status = DCM_IDLE;\r
+ runtime->securityLevel = DCM_SEC_LEV_LOCKED; /** @req DCM033 **/\r
+ runtime->sessionControl = DCM_DEFAULT_SESSION;\r
+ listEntry->DslProtocolRxBufferID->externalBufferRuntimeData->status\r
+ = BUFFER_AVAILABLE;\r
+ listEntry->DslProtocolRxBufferID->externalBufferRuntimeData->status\r
+ = BUFFER_AVAILABLE;\r
+ listEntry++;\r
+ };\r
+ //DcmDslRunTimeData.diagnosticRequestPending = FALSE;\r
+ DcmDslRunTimeData.initRun = TRUE;\r
+}\r
+\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// Implements 'void Dcm_MainFunction(void)' for DSL.\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+\r
+void DslMain(void) {\r
+ const Dcm_DslProtocolRowType *protocolRowEntry = NULL;\r
+ const Dcm_DslProtocolTimingRowType *timeParams = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ int debug_count = 0;\r
+\r
+ protocolRowEntry = DCM_Config.Dsl->DslProtocol->DslProtocolRowList;\r
+ while (protocolRowEntry->Arc_EOL == FALSE) {\r
+ runtime = protocolRowEntry->DslRunTimeProtocolParameters;\r
+ if (runtime != NULL) {\r
+ // #### HANDLE THE TESTER PRESENT PRESENCE ####\r
+ if (runtime->sessionControl != DCM_DEFAULT_SESSION) { // Timeout if tester present is lost.\r
+ DECREMENT(runtime->S3ServerTimeoutCount);\r
+ if (runtime->S3ServerTimeoutCount == 0) {\r
+ changeDiagnosticSession(runtime, DCM_DEFAULT_SESSION); /** @req DCM140 **/\r
+ }\r
+ }\r
+ switch (runtime->externalTxBufferStatus) { // #### TX buffer state. ####\r
+ case NOT_IN_USE:\r
+ //DEBUG( DEBUG_MEDIUM, "state NOT_IN_USE!\n");\r
+ break;\r
+ case PROVIDED_TO_DSD: {\r
+ DEBUG( DEBUG_MEDIUM, "debug_count=%d\n", debug_count);\r
+ DECREMENT(runtime->stateTimeoutCount);\r
+ if (runtime->stateTimeoutCount == 0) {\r
+ DEBUG( DEBUG_MEDIUM, "State PROVIDED_TO_DSD timed out!", debug_count);\r
+ timeParams = protocolRowEntry->DslProtocolTimeLimit;\r
+ runtime->stateTimeoutCount = DCM_CONVERT_MS_TO_MAIN_CYCLES(\r
+ timeParams->TimStrP2ServerMax); /* Reinitiate timer, see 9.2.2. */\r
+ if (DCM_Config.Dsl->DslDiagResp != NULL) {\r
+ if (DCM_Config.Dsl->DslDiagResp->DslDiagRespForceRespPendEn == TRUE) {\r
+ if (runtime->responsePendingCount != 0) {\r
+ sendResponse(protocolRowEntry, DCM_E_RESPONSEPENDING); /** @req DCM024 **/\r
+ DECREMENT( runtime->responsePendingCount );\r
+ } else {\r
+ sendResponse(protocolRowEntry, DCM_E_GENERALREJECT); /** @req DCM120 **/\r
+ releaseExternalRxTxBuffers(protocolRowEntry, runtime);\r
+ }\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "Not configured to send response pending, now sending general reject!\n");\r
+ sendResponse(protocolRowEntry, DCM_E_GENERALREJECT);\r
+ releaseExternalRxTxBuffers(protocolRowEntry, runtime);\r
+ }\r
+ }\r
+ }\r
+ break;\r
+ }\r
+ case DSD_PENDING_RESPONSE_SIGNALED:\r
+ // The DSD has signaled to DSL that the diagnostic response is available in the Tx buffer.\r
+ // Make sure that response pending or general reject have not been issued,\r
+ // if so we can not transmit to PduR because we would not know from where\r
+ // the Tx confirmation resides later.\r
+ DEBUG( DEBUG_MEDIUM, "state DSD_PENDING_RESPONSE_SIGNALED!\n");\r
+ if (runtime->localTxBuffer.status == NOT_IN_USE) { // Make sure that no TxConfirm could be sent by the local buffer and mixed up with this transmission.\r
+ const Dcm_DslProtocolRxType *protocolRx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ if (findRxPduIdParentConfigurationLeafs(runtime->diagReqestRxPduId, &protocolRx, &mainConnection, &connection, &protocolRow, &runtime)) {\r
+ const uint32 txPduId = mainConnection->DslProtocolTx->DcmDslProtocolTxPduId;\r
+ DEBUG( DEBUG_MEDIUM, "runtime->externalTxBufferStatus enter state DCM_TRANSMIT_SIGNALED.\n" );\r
+ runtime->externalTxBufferStatus = DCM_TRANSMIT_SIGNALED;\r
+ PduR_DcmTransmit(txPduId, &runtime->diagnosticResponseFromDsd); /** @req DCM237 **//* Will trigger PduR (CanTP) to call DslProvideTxBuffer(). */\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "***** WARNING, THIS IS UNEXPECTED !!! ********.\n" );\r
+ const uint32 txPduId = protocolRowEntry->DslConnection->DslMainConnection->DslProtocolTx->DcmDslProtocolTxPduId;\r
+ DEBUG( DEBUG_MEDIUM, "runtime->externalTxBufferStatus enter state DSD_PENDING_RESPONSE_SIGNALED.\n", txPduId);\r
+ runtime->externalTxBufferStatus = DCM_TRANSMIT_SIGNALED;\r
+ DEBUG( DEBUG_MEDIUM, "Calling PduR_DcmTransmit with txPduId = %d from DslMain\n", txPduId);\r
+ PduR_DcmTransmit(txPduId, &runtime->diagnosticResponseFromDsd); /** @req DCM237 **//* Will trigger PduR (CanTP) to call DslProvideTxBuffer(). */\r
+ }\r
+ }\r
+ break;\r
+ case DCM_TRANSMIT_SIGNALED:\r
+ //DEBUG( DEBUG_MEDIUM, "state DSD_PENDING_RESPONSE_SIGNALED!\n");\r
+ break;\r
+ case PROVIDED_TO_PDUR: // The valid data is being transmitted by TP-layer.\r
+ //DEBUG( DEBUG_MEDIUM, "state DSD_PENDING_RESPONSE_SIGNALED!\n");\r
+ break;\r
+ default:\r
+ break;\r
+ }\r
+ }\r
+ protocolRowEntry++;\r
+ debug_count++;\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// Implements 'BufReq_ReturnType Dcm_ProvideRxBuffer(PduIdType dcmRxPduId,\r
+// PduLengthType tpSduLength, PduInfoType **pduInfoPtr)'.\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// This function is called called by the PduR typically when CanTp has\r
+// received a FF or a single frame and needs to obtain a buffer from the\r
+// receiver so that received data can be forwarded.\r
+\r
+BufReq_ReturnType DslProvideRxBufferToPdur(PduIdType dcmRxPduId, /** @req DCM094 **/\r
+ PduLengthType tpSduLength, const PduInfoType **pduInfoPtr) {\r
+ BufReq_ReturnType ret = BUFREQ_NOT_OK;\r
+ const Dcm_DslProtocolRxType *protocolRx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
+ DEBUG( DEBUG_MEDIUM, "DslProvideRxBufferToPdur(dcmRxPduId=%d) called!\n", dcmRxPduId);\r
+ imask_t state = McuE_EnterCriticalSection();\r
+ if (findRxPduIdParentConfigurationLeafs(dcmRxPduId, &protocolRx, &mainConnection,\r
+ &connection, &protocolRow, &runtime)) {\r
+ const Dcm_DslBufferType *externalRxBuffer =\r
+ protocolRow->DslProtocolRxBufferID;\r
+ if (externalRxBuffer->pduInfo.SduLength >= tpSduLength) { /** @req DCM443 **/\r
+ if ((runtime->externalRxBufferStatus == NOT_IN_USE)\r
+ && (externalRxBuffer->externalBufferRuntimeData->status == BUFFER_AVAILABLE)) {\r
+ DEBUG( DEBUG_MEDIUM, "External buffer available!\n");\r
+ // ### EXTERNAL BUFFER IS AVAILABLE; GRAB IT AND REMEBER THAT WE OWN IT! ###\r
+ externalRxBuffer->externalBufferRuntimeData->status\r
+ = BUFFER_BUSY;\r
+ runtime->diagnosticRequestFromTester.SduDataPtr\r
+ = externalRxBuffer->pduInfo.SduDataPtr;\r
+ runtime->diagnosticRequestFromTester.SduLength = tpSduLength;\r
+ *pduInfoPtr = &(runtime->diagnosticRequestFromTester);\r
+ runtime->externalRxBufferStatus = PROVIDED_TO_PDUR; /** @req DCM342 **/\r
+ ret = BUFREQ_OK;\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "Local buffer available!\n");\r
+ if (runtime->externalRxBufferStatus == PROVIDED_TO_DSD) {\r
+ // ### EXTERNAL BUFFER IS IN USE BY THE DSD, TRY TO USE LOCAL BUFFER! ###\r
+ if (runtime->localRxBuffer.status == NOT_IN_USE) {\r
+ if (tpSduLength < DCM_DSL_LOCAL_BUFFER_LENGTH) {\r
+ runtime->localRxBuffer.status = PROVIDED_TO_PDUR;\r
+ runtime->localRxBuffer.PduInfo.SduDataPtr\r
+ = runtime->localRxBuffer.buffer;\r
+ runtime->localRxBuffer.PduInfo.SduLength\r
+ = tpSduLength;\r
+ *pduInfoPtr = &(runtime->localRxBuffer.PduInfo);\r
+ ret = BUFREQ_OK;\r
+ } else {\r
+ ret = BUFREQ_BUSY;\r
+ }\r
+ }\r
+ } else {\r
+ // The buffer is in use by the PduR, we can not help this because then\r
+ // we would have two different Rx-indications with same PduId but we\r
+ // will not know which buffer the indication should free.\r
+ ret = BUFREQ_BUSY; /** @req DCM445 **/\r
+ }\r
+ }\r
+ } else {\r
+ ret = BUFREQ_OVFL; /** @req DCM444 **/\r
+ }\r
+ if (ret == BUFREQ_OK) {\r
+ stopS3SessionTimer(runtime); /** @req DCM141 **/\r
+ }\r
+ }\r
+ McuE_ExitCriticalSection(state);\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// Implements 'void Dcm_RxIndication(PduIdType dcmRxPduId, NotifResultType result)'.\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// This function is called called by the PduR typically when CanTp has\r
+// received the diagnostic request, copied it to the provided buffer and need to indicate\r
+// this to the DCM (DSL) module via propritary API.\r
+\r
+void DslRxIndicationFromPduR(PduIdType dcmRxPduId, NotifResultType result) { /** @req DCM093 **/\r
+ const Dcm_DslProtocolRxType *protocolRx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ const Dcm_DslProtocolTimingRowType *timeParams = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ Std_ReturnType higherLayerResp;\r
+ imask_t state;\r
+\r
+ /** @req DCM345, this needs to be verified when connection to CanIf works. **/\r
+\r
+ if (findRxPduIdParentConfigurationLeafs(dcmRxPduId, &protocolRx, &mainConnection,\r
+ &connection, &protocolRow, &runtime)) {\r
+ timeParams = protocolRow->DslProtocolTimeLimit;\r
+ // We need to find out in what buffer we can find our Rx data (it can\r
+ // be either in the normal RX-buffer or the 'extra' buffer for implementing\r
+ // the Concurrent "Test Present" functionality.\r
+ state = McuE_EnterCriticalSection();\r
+ if (runtime->externalRxBufferStatus == PROVIDED_TO_PDUR) {\r
+ if ( result == NTFRSLT_OK ) { /** @req DCM111 **/\r
+ if (isTesterPresentCommand(\r
+ &(protocolRow->DslProtocolRxBufferID->pduInfo))) {\r
+ startS3SessionTimer(runtime, protocolRow); /** @req DCM141 **//** @req DCM112 **//** @req DCM113 **/\r
+ runtime->externalRxBufferStatus = NOT_IN_USE;\r
+ protocolRow->DslProtocolRxBufferID->externalBufferRuntimeData->status = BUFFER_AVAILABLE;\r
+ } else {\r
+ if (runtime->protocolStarted == FALSE) {\r
+ higherLayerResp = StartProtocolHelper(\r
+ protocolRow->DslProtocolID); /** @req DCM036 **/\r
+ if (higherLayerResp == E_OK) {\r
+ runtime->protocolStarted = TRUE;\r
+ DcmDslRunTimeData.activeProtocol = protocolRow;\r
+ }\r
+ }\r
+ if (runtime->protocolStarted == TRUE) {\r
+ if (runtime->diagnosticActiveComM == FALSE) {\r
+ ComM_DCM_ActivateDiagnostic(); /* @DCM163 */\r
+ runtime->diagnosticActiveComM = TRUE;\r
+ }\r
+ timeParams = protocolRow->DslProtocolTimeLimit;\r
+ runtime->stateTimeoutCount = DCM_CONVERT_MS_TO_MAIN_CYCLES(\r
+ timeParams->TimStrP2ServerMax); /* See 9.2.2. */\r
+ runtime->externalRxBufferStatus = PROVIDED_TO_DSD; /** @req DCM241 **/\r
+ if (runtime->externalTxBufferStatus == NOT_IN_USE) {\r
+ DEBUG( DEBUG_MEDIUM, "External Tx buffer available, we can pass it to DSD.\n");\r
+ } else {\r
+ DEBUG( DEBUG_MEDIUM, "External buffer not available, a response is being transmitted?\n");\r
+ }\r
+ runtime->externalTxBufferStatus = PROVIDED_TO_DSD; /** @req DCM241 **/\r
+ runtime->responsePendingCount = DCM_Config.Dsl->DslDiagResp->DslDiagRespMaxNumRespPend;\r
+ runtime->diagnosticResponseFromDsd.SduDataPtr\r
+ = protocolRow->DslProtocolTxBufferID->pduInfo.SduDataPtr;\r
+ runtime->diagnosticResponseFromDsd.SduLength\r
+ = protocolRow->DslProtocolTxBufferID->pduInfo.SduLength;\r
+ DEBUG( DEBUG_MEDIUM, "DsdDslDataIndication(DcmDslProtocolTxPduId=%d, dcmRxPduId=%d)\n",\r
+ mainConnection->DslProtocolTx->DcmDslProtocolTxPduId, dcmRxPduId);\r
+ runtime->diagReqestRxPduId = dcmRxPduId;\r
+ DsdDslDataIndication( // qqq: We are inside a critical section.\r
+ &(runtime->diagnosticRequestFromTester),\r
+ protocolRow->DslProtocolSIDTable,\r
+ protocolRx->DslProtocolAddrType,\r
+ mainConnection->DslProtocolTx->DcmDslProtocolTxPduId,\r
+ &(runtime->diagnosticResponseFromDsd),\r
+ dcmRxPduId);\r
+ }\r
+ }\r
+ } else { /** @req DCM344 **/\r
+ // The indication was not equal to NTFRSLT_OK, release the resources and no forward to DSD.\r
+ runtime->externalRxBufferStatus = NOT_IN_USE;\r
+ protocolRow->DslProtocolRxBufferID->externalBufferRuntimeData->status = BUFFER_AVAILABLE;\r
+ }\r
+ } else {\r
+ // It is the local buffer that was provided to the PduR, that buffer\r
+ // is only used for tester present reception in parallel to diagnostic\r
+ // requests.\r
+ if (runtime->localRxBuffer.status == PROVIDED_TO_PDUR) {\r
+ if ( result == NTFRSLT_OK ) { // Make sure that the data in buffer is valid.\r
+ if (isTesterPresentCommand(&(runtime->localRxBuffer.PduInfo))) {\r
+ startS3SessionTimer(runtime, protocolRow); /** @req DCM141 **//** @req DCM112 **//** @req DCM113 **/\r
+ }\r
+ }\r
+ runtime->localRxBuffer.status = NOT_IN_USE;\r
+ }\r
+ }\r
+ McuE_ExitCriticalSection(state);\r
+ }\r
+}\r
+\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// Implements 'BufReq_ReturnType Dcm_ProvideTxBuffer(PduIdType dcmTxPduId,\r
+// PduInfoType **pduInfoPtr, PduLengthType length)'.\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// This TX-buffer request is likely triggered by the transport layer (i.e. CanTp)\r
+// after PduR_DcmTransmit() has been called (via PduR to CanTp) indicating that something\r
+// is to be sent. The PduR_DcmTransmit() call is done from the DSL main function when\r
+// it has detected that the pending request has been answered by DSD\r
+// (or any other module?).\r
+\r
+BufReq_ReturnType DslProvideTxBuffer(PduIdType dcmTxPduId, /** @req DCM092 **/\r
+ const PduInfoType **pduInfoPtr, PduLengthType length) {\r
+ BufReq_ReturnType ret = BUFREQ_NOT_OK;\r
+ const Dcm_DslProtocolTxType *protocolTx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+\r
+ DEBUG( DEBUG_MEDIUM, "DslProvideTxBuffer=%d\n", dcmTxPduId);\r
+ if (findTxPduIdParentConfigurationLeafs(dcmTxPduId, &protocolTx, &mainConnection,\r
+ &connection, &protocolRow, &runtime)) {\r
+ switch (runtime->externalTxBufferStatus) { // ### EXTERNAL TX BUFFER ###\r
+ case DCM_TRANSMIT_SIGNALED: {\r
+ /** @req DCM346 - length verification is already done if this state is reached. **/\r
+ *pduInfoPtr = &(protocolRow->DslProtocolTxBufferID->pduInfo);\r
+ runtime->externalTxBufferStatus = PROVIDED_TO_PDUR; /** @req DCM349 **/\r
+ ret = BUFREQ_OK;\r
+ break;\r
+ }\r
+ default:\r
+ DEBUG( DEBUG_MEDIUM, "DCM_TRANSMIT_SIGNALED was not signaled in the external buffer\n");\r
+ ret = BUFREQ_NOT_OK;\r
+ break;\r
+ }\r
+ if (ret == BUFREQ_NOT_OK) {\r
+ switch (runtime->localTxBuffer.status) { // ### LOCAL TX BUFFER ###\r
+ case DCM_TRANSMIT_SIGNALED: {\r
+ runtime->localTxBuffer.PduInfo.SduDataPtr\r
+ = runtime->localTxBuffer.buffer;\r
+ runtime->localTxBuffer.PduInfo.SduLength\r
+ = runtime->localTxBuffer.messageLenght;\r
+ *pduInfoPtr = &runtime->localTxBuffer.PduInfo;\r
+ runtime->localTxBuffer.status = PROVIDED_TO_PDUR; // Now the DSL should not touch this Tx-buffer anymore.\r
+ ret = BUFREQ_OK;\r
+ break;\r
+ }\r
+ default:\r
+ DEBUG( DEBUG_MEDIUM, "DCM_TRANSMIT_SIGNALED was not signaled for the local buffer either\n");\r
+ ret = BUFREQ_NOT_OK;\r
+ break;\r
+ }\r
+ }\r
+ }\r
+ return ret;\r
+}\r
+\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// Implements 'void Dcm_TxConfirmation(PduIdType dcmTxPduId, NotifResultType result))'.\r
+// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -\r
+// This function is called by the PduR (which has been trigged by i.e. CanTp)\r
+// when a transmission has been successfully finished, have had errors or\r
+// is even stopped.\r
+\r
+void DslTxConfirmation(PduIdType dcmTxPduId, NotifResultType result) {\r
+ const Dcm_DslProtocolTxType *protocolTx = NULL;\r
+ const Dcm_DslMainConnectionType *mainConnection = NULL;\r
+ const Dcm_DslConnectionType *connection = NULL;\r
+ const Dcm_DslProtocolRowType *protocolRow = NULL;\r
+ Dcm_DslRunTimeProtocolParametersType *runtime = NULL;\r
+ imask_t state;\r
+\r
+ DEBUG( DEBUG_MEDIUM, "DslTxConfirmation=%d, result=%d\n", dcmTxPduId, result);\r
+ if (findTxPduIdParentConfigurationLeafs(dcmTxPduId, &protocolTx, &mainConnection,\r
+ &connection, &protocolRow, &runtime)) {\r
+ boolean externalBufferReleased = FALSE;\r
+\r
+ // Free the buffer and free the Pdu runtime data buffer.\r
+ state = McuE_EnterCriticalSection();\r
+ switch (runtime->externalTxBufferStatus) { // ### EXTERNAL TX BUFFER ###\r
+ case PROVIDED_TO_PDUR: {\r
+ ComM_DCM_InactivateDiagnostic();\r
+ startS3SessionTimer(runtime, protocolRow); // @DCM141\r
+ releaseExternalRxTxBuffers(protocolRow, runtime); /** @req DCM118 **//** @req DCM353 **//** @req DCM354 **/\r
+ externalBufferReleased = TRUE;\r
+ DEBUG( DEBUG_MEDIUM, "Released external buffer OK!\n");\r
+ DsdDataConfirmation(mainConnection->DslProtocolTx->DcmDslProtocolTxPduId, result); /** @req DCM117 **//** @req DCM235 **/\r
+ break;\r
+ }\r
+ default:\r
+ break;\r
+ }\r
+ if (externalBufferReleased == FALSE) {\r
+ switch (runtime->localTxBuffer.status) { // ### LOCAL TX BUFFER ###\r
+ case PROVIDED_TO_PDUR:\r
+ DEBUG( DEBUG_MEDIUM, "Released local buffer buffer OK!\n");\r
+ runtime->localTxBuffer.status = DCM_IDLE;\r
+ break;\r
+ default:\r
+ DEBUG( DEBUG_MEDIUM, "WARNING! DslTxConfirmation could not release external or local buffer!\n");\r
+ break;\r
+ }\r
+ }\r
+ McuE_ExitCriticalSection(state);\r
+ }\r
+}\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+#include <string.h>\r
+#include "Dcm.h"\r
+#include "Dcm_Internal.h"\r
+#include "Dem.h"\r
+#include "Det.h"\r
+#include "MemMap.h"\r
+#include "Mcu.h"\r
+\r
+#define ZERO_SUB_FUNCTION 0x00\r
+\r
+/*\r
+ * Macros\r
+ */\r
+#define BYTES_TO_DTC(hb, mb, lb) (((hb) << 16) | ((mb) << 8) | (lb))\r
+#define DTC_HIGH_BYTE(dtc) (((dtc)>> 16) & 0xFF)\r
+#define DTC_MID_BYTE(dtc) (((dtc)>> 8) & 0xFF)\r
+#define DTC_LOW_BYTE(dtc) ((dtc) & 0xFF)\r
+\r
+\r
+typedef struct {\r
+ boolean resetPending;\r
+ PduIdType resetPduId;\r
+} DspUdsEcuResetDataType;\r
+\r
+static DspUdsEcuResetDataType dspUdsEcuResetData;\r
+\r
+\r
+typedef struct {\r
+ boolean reqInProgress;\r
+ Dcm_SecLevelType reqSecLevel;\r
+ const Dcm_DspSecurityRowType *reqSecLevelRef;\r
+} DspUdsSecurityAccessDataType;\r
+\r
+static DspUdsSecurityAccessDataType dspUdsSecurityAccesData;\r
+\r
+\r
+void DspInit(void)\r
+{\r
+ dspUdsSecurityAccesData.reqInProgress = FALSE;\r
+ dspUdsEcuResetData.resetPending = FALSE;\r
+}\r
+\r
+\r
+void DspMain(void)\r
+{\r
+\r
+}\r
+\r
+\r
+boolean DspCheckSessionLevel(const Dcm_DspSessionRowType **sessionLevelRefTable)\r
+{\r
+ boolean returnStatus = TRUE;\r
+ Dcm_SesCtrlType currentSession;\r
+\r
+ DslGetSesCtrlType(¤tSession);\r
+ while (((*sessionLevelRefTable)->DspSessionLevel != currentSession) && !(*sessionLevelRefTable)->Arc_EOL) {\r
+ sessionLevelRefTable++;\r
+ }\r
+\r
+ if ((*sessionLevelRefTable)->Arc_EOL) {\r
+ returnStatus = FALSE;\r
+ }\r
+\r
+ return returnStatus;\r
+}\r
+\r
+\r
+boolean DspCheckSecurityLevel(const Dcm_DspSecurityRowType **securityLevelRefTable)\r
+{\r
+ boolean returnStatus = TRUE;\r
+ Dcm_SecLevelType currentSecurityLevel;\r
+\r
+ DslGetSecurityLevel(¤tSecurityLevel);\r
+ while (((*securityLevelRefTable)->DspSecurityLevel != currentSecurityLevel) && !(*securityLevelRefTable)->Arc_EOL) {\r
+ securityLevelRefTable++;\r
+ }\r
+ if ((*securityLevelRefTable)->Arc_EOL) {\r
+ returnStatus = FALSE;\r
+ }\r
+\r
+ return returnStatus;\r
+}\r
+\r
+\r
+Std_ReturnType AskApplicationForSessionPermission(Dcm_SesCtrlType newSessionLevel)\r
+{\r
+ Std_ReturnType returnCode = E_OK;\r
+ const Dcm_DslSessionControlType *sesControl = DCM_Config.Dsl->DslSessionControl;\r
+ Dcm_SesCtrlType currentSessionLevel;\r
+ Std_ReturnType result;\r
+\r
+ while (!sesControl->Arc_EOL && (returnCode != E_SESSION_NOT_ALLOWED)) {\r
+ if (sesControl->GetSesChgPermission != NULL) {\r
+ Dcm_GetSesCtrlType(¤tSessionLevel);\r
+ result = sesControl->GetSesChgPermission(currentSessionLevel ,newSessionLevel);\r
+ if (result != E_OK) {\r
+ returnCode = result;\r
+ }\r
+ }\r
+ sesControl++;\r
+ }\r
+\r
+ return returnCode;\r
+}\r
+\r
+\r
+void DspUdsDiagnosticSessionControl(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ // @req DCM250 **/\r
+ const Dcm_DspSessionRowType *sessionRow = DCM_Config.Dsp->DspSession->DspSessionRow;\r
+ Dcm_SesCtrlType reqSessionType;\r
+ Std_ReturnType result;\r
+\r
+ if (pduRxData->SduLength == 2) {\r
+ reqSessionType = pduRxData->SduDataPtr[1];\r
+ // Check if type exist in session table\r
+ while ((sessionRow->DspSessionLevel != reqSessionType) && !sessionRow->Arc_EOL) {\r
+ sessionRow++;\r
+ }\r
+\r
+ if (!sessionRow->Arc_EOL) {\r
+ result = AskApplicationForSessionPermission(reqSessionType);\r
+ if (result == E_OK) {\r
+ DslSetSesCtrlType(reqSessionType); /** @req DCM311 **/\r
+ // Create positive response\r
+ /** @req DCM039.2 **/\r
+ pduTxData->SduDataPtr[1] = reqSessionType;\r
+ pduTxData->SduLength = 2;\r
+ DsdDspProcessingDone(DCM_E_POSITIVERESPONSE); /** @req DCM269.2 **/\r
+ }\r
+ else {\r
+ // TODO: Add handling of special case of E_FORCE_RCRRP (Dcm138)\r
+ DsdDspProcessingDone(DCM_E_CONDITIONSNOTCORRECT); /** @req DCM308 **/\r
+ }\r
+ }\r
+ else {\r
+ DsdDspProcessingDone(DCM_E_SUBFUNCTIONNOTSUPPORTED); /** @req DCM307 **/\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ DsdDspProcessingDone(DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT); /** @req DCM272.1 **/\r
+ }\r
+}\r
+\r
+\r
+void DspUdsEcuReset(const PduInfoType *pduRxData, PduIdType txPduId, PduInfoType *pduTxData)\r
+{\r
+ // @req DCM260 **/\r
+ uint8 reqResetType;\r
+\r
+ if (pduRxData->SduLength == 2) {\r
+ reqResetType = pduRxData->SduDataPtr[1];\r
+\r
+ switch (reqResetType)\r
+ {\r
+ case 0x01: // Hard reset\r
+ // TODO: Ask application for permission (Dcm373) (Dcm375) (Dcm377)\r
+\r
+ // Schedule the reset\r
+ dspUdsEcuResetData.resetPending = TRUE;\r
+ dspUdsEcuResetData.resetPduId = txPduId;\r
+\r
+ // Create positive response\r
+ /** @req DCM039.1 **/\r
+ pduTxData->SduDataPtr[1] = reqResetType;\r
+ pduTxData->SduLength = 2;\r
+ DsdDspProcessingDone(DCM_E_POSITIVERESPONSE); /** @req DCM269.3 **/\r
+ break;\r
+\r
+ default:\r
+ DsdDspProcessingDone(DCM_E_SUBFUNCTIONNOTSUPPORTED); /** @req DCM273.3 **/\r
+ break;\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ DsdDspProcessingDone(DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT); /** @req DCM272.3 **/\r
+ }\r
+}\r
+\r
+\r
+void DspUdsClearDiagnosticInformation(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ uint32 dtc;\r
+ Dem_ReturnClearDTCType result;\r
+\r
+ if (pduRxData->SduLength == 4) {\r
+ dtc = BYTES_TO_DTC(pduRxData->SduDataPtr[1], pduRxData->SduDataPtr[2], pduRxData->SduDataPtr[3]);\r
+\r
+ result = Dem_ClearDTC(dtc, DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_PRIMARY_MEMORY);\r
+\r
+ switch (result)\r
+ {\r
+ case DEM_CLEAR_OK:\r
+ // Create positive response\r
+ /** @req DCM039.1 **/\r
+ pduTxData->SduLength = 1;\r
+ DsdDspProcessingDone(DCM_E_POSITIVERESPONSE); /** @req DCM269.4 **/\r
+ break;\r
+\r
+ default:\r
+ DsdDspProcessingDone(DCM_E_REQUESTOUTOFRANGE);\r
+ break;\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ DsdDspProcessingDone(DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT); /** @req DCM272.1 **/\r
+ }\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x01_0x07_0x11_0x12(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ typedef struct {\r
+ uint8 SID;\r
+ uint8 reportType;\r
+ uint8 dtcStatusAvailabilityMask;\r
+ uint8 dtcFormatIdentifier;\r
+ uint8 dtcCountHighByte;\r
+ uint8 dtcCountLowByte;\r
+ } TxDataType;\r
+\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Dem_ReturnSetDTCFilterType setDtcFilterResult;\r
+\r
+ // Setup the DTC filter\r
+ switch (pduRxData->SduDataPtr[1]) /** @reg DCM293 **/\r
+ {\r
+ case 0x01: // reportNumberOfDTCByStatusMask\r
+ setDtcFilterResult = Dem_SetDTCFilter(pduRxData->SduDataPtr[2], DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_PRIMARY_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ case 0x07: // reportNumberOfDTCBySeverityMaskRecord\r
+ setDtcFilterResult = Dem_SetDTCFilter(pduRxData->SduDataPtr[3], DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_PRIMARY_MEMORY, DEM_FILTER_WITH_SEVERITY_YES, pduRxData->SduDataPtr[2], DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ case 0x11: // reportNumberOfMirrorMemoryDTCByStatusMask\r
+ setDtcFilterResult = Dem_SetDTCFilter(pduRxData->SduDataPtr[2], DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_MIRROR_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ case 0x12: // reportNumberOfEmissionRelatedOBDDTCByStatusMask\r
+ setDtcFilterResult = Dem_SetDTCFilter(pduRxData->SduDataPtr[2], DEM_DTC_KIND_EMISSION_REL_DTCS, DEM_DTC_ORIGIN_PRIMARY_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ default:\r
+ setDtcFilterResult = DEM_WRONG_FILTER;\r
+#if (DCM_DEV_ERROR_DETECT == STD_ON)\r
+ Det_ReportError(MODULE_ID_DCM, 0, DCM_UDS_READ_DTC_INFO, DCM_E_UNEXPECTED_PARAM);\r
+#endif\r
+ break;\r
+ }\r
+\r
+ if (setDtcFilterResult == DEM_FILTER_ACCEPTED) {\r
+ uint16 numberOfFilteredDtc;\r
+ uint8 dtcStatusMask;\r
+ TxDataType *txData = (TxDataType*)pduTxData->SduDataPtr;\r
+\r
+ /** @reg DCM376 **/\r
+ Dem_GetNumberOfFilteredDtc(&numberOfFilteredDtc);\r
+ Dem_GetDTCStatusAvailabilityMask(&dtcStatusMask);\r
+\r
+ // Create positive response (ISO 14229-1 table 251)\r
+ /** @req DCM039.0x19 **/\r
+ txData->reportType = pduRxData->SduDataPtr[1]; // reportType\r
+ txData->dtcStatusAvailabilityMask = dtcStatusMask; // DTCStatusAvailabilityMask\r
+ txData->dtcFormatIdentifier = Dem_GetTranslationType(); // DTCFormatIdentifier\r
+ txData->dtcCountHighByte = (numberOfFilteredDtc >> 8); // DTCCount high byte\r
+ txData->dtcCountLowByte = (numberOfFilteredDtc & 0xFF); // DTCCount low byte\r
+ pduTxData->SduLength = 6;\r
+ }\r
+ else {\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x02_0x0A_0x0F_0x13_0x15(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Dem_ReturnSetDTCFilterType setDtcFilterResult;\r
+\r
+ typedef struct {\r
+ uint8 dtcHighByte;\r
+ uint8 dtcMiddleByte;\r
+ uint8 dtcLowByte;\r
+ uint8 statusOfDtc;\r
+ } dtcAndStatusRecordType;\r
+\r
+ typedef struct {\r
+ uint8 SID;\r
+ uint8 reportType;\r
+ uint8 dtcStatusAvailabilityMask;\r
+ dtcAndStatusRecordType dtcAndStatusRecord[];\r
+ } TxDataType;\r
+\r
+ // Setup the DTC filter\r
+ switch (pduRxData->SduDataPtr[1]) /** @reg DCM378 **/\r
+ {\r
+ case 0x02: // reportDTCByStatusMask\r
+ setDtcFilterResult = Dem_SetDTCFilter(pduRxData->SduDataPtr[2], DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_PRIMARY_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ case 0x0A: // reportSupportedDTC\r
+ setDtcFilterResult = Dem_SetDTCFilter(DEM_DTC_STATUS_MASK_ALL, DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_PRIMARY_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ case 0x0F: // reportMirrorMemoryDTCByStatusMask\r
+ setDtcFilterResult = Dem_SetDTCFilter(pduRxData->SduDataPtr[2], DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_MIRROR_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ case 0x13: // reportEmissionRelatedOBDDTCByStatusMask\r
+ setDtcFilterResult = Dem_SetDTCFilter(pduRxData->SduDataPtr[2], DEM_DTC_KIND_EMISSION_REL_DTCS, DEM_DTC_ORIGIN_PRIMARY_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ case 0x15: // reportDTCWithPermanentStatus\r
+ setDtcFilterResult = Dem_SetDTCFilter(DEM_DTC_STATUS_MASK_ALL, DEM_DTC_KIND_ALL_DTCS, DEM_DTC_ORIGIN_PERMANENT_MEMORY, DEM_FILTER_WITH_SEVERITY_NO, VALUE_IS_NOT_USED, DEM_FILTER_FOR_FDC_NO);\r
+ break;\r
+\r
+ default:\r
+ setDtcFilterResult = DEM_WRONG_FILTER;\r
+#if (DCM_DEV_ERROR_DETECT == STD_ON)\r
+ Det_ReportError(MODULE_ID_DCM, 0, DCM_UDS_READ_DTC_INFO, DCM_E_UNEXPECTED_PARAM);\r
+#endif\r
+ break;\r
+ }\r
+\r
+ if (setDtcFilterResult == DEM_FILTER_ACCEPTED) {\r
+ uint8 dtcStatusMask;\r
+ TxDataType *txData = (TxDataType*)pduTxData->SduDataPtr;\r
+ Dem_ReturnGetNextFilteredDTCType getNextFilteredDtcResult;\r
+ uint32 dtc;\r
+ Dem_EventStatusExtendedType dtcStatus;\r
+ uint16 nrOfDtcs = 0;\r
+\r
+ /** @reg DCM377 **/\r
+ Dem_GetDTCStatusAvailabilityMask(&dtcStatusMask);\r
+\r
+ // Create positive response (ISO 14229-1 table 252)\r
+ /** @req DCM039.0x19 **/\r
+ txData->reportType = pduRxData->SduDataPtr[1];\r
+ txData->dtcStatusAvailabilityMask = dtcStatusMask;\r
+\r
+ if (dtcStatusMask != 0x00) { /** @req DCM008 **/\r
+ getNextFilteredDtcResult = Dem_GetNextFilteredDTC(&dtc, &dtcStatus);\r
+ while (getNextFilteredDtcResult == DEM_FILTERED_OK) {\r
+ txData->dtcAndStatusRecord[nrOfDtcs].dtcHighByte = DTC_HIGH_BYTE(dtc);\r
+ txData->dtcAndStatusRecord[nrOfDtcs].dtcMiddleByte = DTC_MID_BYTE(dtc);\r
+ txData->dtcAndStatusRecord[nrOfDtcs].dtcLowByte = DTC_LOW_BYTE(dtc);\r
+ txData->dtcAndStatusRecord[nrOfDtcs].statusOfDtc = dtcStatus;\r
+ nrOfDtcs++;\r
+ getNextFilteredDtcResult = Dem_GetNextFilteredDTC(&dtc, &dtcStatus);\r
+ }\r
+\r
+ if (getNextFilteredDtcResult != DEM_FILTERED_NO_MATCHING_DTC) {\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+ }\r
+ pduTxData->SduLength = 3 + nrOfDtcs * sizeof(dtcAndStatusRecordType);\r
+ }\r
+ else {\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x08(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // TODO: Not supported yet, (DEM module does not currently support severity).\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x09(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // TODO: Not supported yet, (DEM module does not currently support severity).\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x06_0x10(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ Dem_DTCOriginType dtcOrigin = NULL;\r
+ uint8 startRecNum;\r
+ uint8 endRecNum;\r
+\r
+ // Switch on sub function\r
+ switch (pduRxData->SduDataPtr[1]) /** @reg DCM378 **/\r
+ {\r
+ case 0x06: // reportDTCExtendedDataRecordByDTCNumber\r
+ dtcOrigin = DEM_DTC_ORIGIN_PRIMARY_MEMORY;\r
+ break;\r
+\r
+ case 0x10: // reportMirrorMemoryDTCExtendedDataRecordByDTCNumber\r
+ dtcOrigin = DEM_DTC_ORIGIN_MIRROR_MEMORY;\r
+ break;\r
+\r
+ default:\r
+ responseCode = DCM_E_SUBFUNCTIONNOTSUPPORTED;\r
+#if (DCM_DEV_ERROR_DETECT == STD_ON)\r
+ Det_ReportError(MODULE_ID_DCM, 0, DCM_UDS_READ_DTC_INFO, DCM_E_UNEXPECTED_PARAM);\r
+#endif\r
+ break;\r
+ }\r
+\r
+ // Switch on record number\r
+ switch (pduRxData->SduDataPtr[5])\r
+ {\r
+ case 0xFF: // Report all Extended Data Records for a particular DTC\r
+ startRecNum = 0x00;\r
+ endRecNum = 0xEF;\r
+ break;\r
+\r
+ case 0xFE: // Report all OBD Extended Data Records for a particular DTC\r
+ startRecNum = 0x90;\r
+ endRecNum = 0xEF;\r
+ break;\r
+\r
+ default: // Report one specific Extended Data Records for a particular DTC\r
+ startRecNum = pduRxData->SduDataPtr[5];\r
+ endRecNum = startRecNum;\r
+ break;\r
+ }\r
+\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ Dem_ReturnGetStatusOfDTCType getStatusOfDtcResult;\r
+ uint32 dtc;\r
+ Dem_EventStatusExtendedType statusOfDtc;\r
+\r
+ dtc = BYTES_TO_DTC(pduRxData->SduDataPtr[2], pduRxData->SduDataPtr[3], pduRxData->SduDataPtr[4]);\r
+ getStatusOfDtcResult = Dem_GetStatusOfDTC(dtc, DEM_DTC_KIND_ALL_DTCS, dtcOrigin, &statusOfDtc); /** @req DCM295 **/ /** @req DCM475 **/\r
+ if (getStatusOfDtcResult == DEM_STATUS_OK) {\r
+ Dem_ReturnGetExtendedDataRecordByDTCType getExtendedDataRecordByDtcResult;\r
+ uint16 recNum;\r
+ uint8 recLength;\r
+ uint16 txIndex = 6;\r
+\r
+ /** @req DCM297 **/ /** @req DCM474 **/ /** @req DCM386 **/\r
+ pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1]; // Sub function\r
+ pduTxData->SduDataPtr[2] = DTC_HIGH_BYTE(dtc); // DTC high byte\r
+ pduTxData->SduDataPtr[3] = DTC_MID_BYTE(dtc); // DTC mid byte\r
+ pduTxData->SduDataPtr[4] = DTC_LOW_BYTE(dtc); // DTC low byte\r
+ pduTxData->SduDataPtr[5] = statusOfDtc; // DTC status\r
+ for (recNum = startRecNum; recNum <= endRecNum; recNum++) {\r
+ recLength = pduTxData->SduLength - txIndex -1; // Calculate what's left in buffer\r
+ /** @req DCM296 **/ /** @req DCM476 **/ /** @req DCM382 **/\r
+ getExtendedDataRecordByDtcResult = Dem_GetExtendedDataRecordByDTC(dtc, DEM_DTC_KIND_ALL_DTCS, dtcOrigin, recNum, &pduTxData->SduDataPtr[txIndex+1], &recLength);\r
+ if (getExtendedDataRecordByDtcResult == DEM_RECORD_OK) {\r
+ pduTxData->SduDataPtr[txIndex++] = recNum;\r
+ /* Instead of calling Dem_GetSizeOfExtendedDataRecordByDTC() the result from Dem_GetExtendedDataRecordByDTC() is used */\r
+ /** @req DCM478 **/ /** @req DCM479 **/ /** @req DCM480 **/\r
+ txIndex += recLength;\r
+ }\r
+ else {\r
+ // TODO: What to do here?\r
+ }\r
+ }\r
+ pduTxData->SduLength = txIndex;\r
+ }\r
+ else {\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x03(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // TODO: Not supported yet\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x04(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // TODO: Not supported yet\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x05(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // TODO: Not supported yet\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x0B_0x0C_0x0D_0x0E(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // TODO: Not supported yet\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspUdsReadDtcInfoSub_0x14(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // TODO: Not supported yet\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+\r
+ return responseCode;\r
+}\r
+\r
+\r
+void DspUdsReadDtcInformation(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ /** @reg DCM248 **/\r
+ // Sub function number 0 1 2 3 4 5 6 7 8 9 A B C D E F 10 11 12 13 14 15\r
+ const uint8 sduLength[0x16] = {0, 3, 3, 6, 6, 3, 6, 4, 4, 5, 2, 2, 2, 2, 2, 3, 6, 3, 3, 3, 2, 2};\r
+\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ uint8 subFunctionNumber = pduRxData->SduDataPtr[1];\r
+\r
+ // Check length\r
+ if (subFunctionNumber <= 0x15) {\r
+ if (pduRxData->SduLength == sduLength[subFunctionNumber]) {\r
+ switch (subFunctionNumber)\r
+ {\r
+ case 0x01: // reportNumberOfDTCByStatusMask\r
+ case 0x07: // reportNumberOfDTCBySeverityMaskRecord\r
+ case 0x11: // reportNumberOfMirrorMemoryDTCByStatusMask\r
+ case 0x12: // reportNumberOfEmissionRelatedOBDDTCByStatusMask\r
+ responseCode = DspUdsReadDtcInfoSub_0x01_0x07_0x11_0x12(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x02: // reportDTCByStatusMask\r
+ case 0x0A: // reportSupportedDTC\r
+ case 0x0F: // reportMirrorMemoryDTCByStatusMask\r
+ case 0x13: // reportEmissionRelatedOBDDTCByStatusMask\r
+ case 0x15: // reportDTCWithPermanentStatus\r
+ responseCode = DspUdsReadDtcInfoSub_0x02_0x0A_0x0F_0x13_0x15(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x08: // reportDTCBySeverityMaskRecord\r
+ responseCode = DspUdsReadDtcInfoSub_0x08(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x09: // reportSeverityInformationOfDTC\r
+ responseCode = DspUdsReadDtcInfoSub_0x09(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x06: // reportDTCExtendedDataRecordByDTCNumber\r
+ case 0x10: // reportMirrorMemoryDTCExtendedDataRecordByDTCNumber\r
+ responseCode = DspUdsReadDtcInfoSub_0x06_0x10(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x03: // reportDTCSnapshotIdentidication\r
+ responseCode = DspUdsReadDtcInfoSub_0x03(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x04: // reportDTCSnapshotByDtcNumber\r
+ responseCode = DspUdsReadDtcInfoSub_0x04(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x05: // reportDTCSnapshotRecordNumber\r
+ responseCode = DspUdsReadDtcInfoSub_0x05(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x0B: // reportFirstTestFailedDTC\r
+ case 0x0C: // reportFirstConfirmedDTC\r
+ case 0x0D: // reportMostRecentTestFailedDTC\r
+ case 0x0E: // reportMostRecentConfirmedDTC\r
+ responseCode = DspUdsReadDtcInfoSub_0x0B_0x0C_0x0D_0x0E(pduRxData, pduTxData);\r
+ break;\r
+\r
+ case 0x14: // reportDTCFaultDetectionCounter\r
+ responseCode = DspUdsReadDtcInfoSub_0x14(pduRxData, pduTxData);\r
+ break;\r
+\r
+ default:\r
+ // Unknown sub function\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ break;\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT; /** @req DCM272.0x19 **/\r
+ }\r
+ }\r
+ else {\r
+ // Sub function out of range\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+\r
+ DsdDspProcessingDone(responseCode);\r
+}\r
+\r
+\r
+boolean DspLookupDid(uint16 didNr, const Dcm_DspDidType **didPtr)\r
+{\r
+ const Dcm_DspDidType *dspDid = DCM_Config.Dsp->DspDid;\r
+ boolean didFound = FALSE;\r
+\r
+ while ((dspDid->DspDidIdentifier != didNr) && !dspDid->Arc_EOL) {\r
+ dspDid++;\r
+ }\r
+\r
+ if (!dspDid->Arc_EOL) {\r
+ didFound = TRUE;\r
+ *didPtr = dspDid;\r
+ }\r
+\r
+ return didFound;\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspReadDidData(const Dcm_DspDidType *didPtr, PduInfoType *pduTxData, uint16 *txPos)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ if ((didPtr->DspDidInfoRef->DspDidAccess.DspDidRead != NULL) && (didPtr->DspDidConditionCheckReadFnc != NULL) && (didPtr->DspDidReadDataFnc != NULL)) { /** @req DCM433 **/\r
+ if (DspCheckSessionLevel(didPtr->DspDidInfoRef->DspDidAccess.DspDidRead->DspDidReadSessionRef)) { /** @req DCM434 **/\r
+ if (DspCheckSecurityLevel(didPtr->DspDidInfoRef->DspDidAccess.DspDidRead->DspDidReadSecurityLevelRef)) { /** @req DCM435 **/\r
+ Std_ReturnType result;\r
+ Dcm_NegativeResponseCodeType errorCode;\r
+ result = didPtr->DspDidConditionCheckReadFnc(&errorCode);\r
+ if ((result == E_OK) && (errorCode == DCM_E_POSITIVERESPONSE)) { /** @req DCM439 **/\r
+ uint16 didLen;\r
+ result = E_NOT_OK;\r
+ if (didPtr->DspDidInfoRef->DspDidFixedLength) { /** @req DCM436 **/\r
+ didLen = didPtr->DspDidSize;\r
+ result = E_OK;\r
+ }\r
+ else {\r
+ if (didPtr->DspDidReadDataLengthFnc != NULL) {\r
+ result = didPtr->DspDidReadDataLengthFnc(&didLen);\r
+ }\r
+ }\r
+\r
+ if (result == E_OK) {\r
+ // Now ready for reading the data!\r
+ if ((*txPos + didLen + 2) <= pduTxData->SduLength) {\r
+ pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 8) & 0xFF;\r
+ (*txPos)++;\r
+ pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 0) & 0xFF;\r
+ (*txPos)++;\r
+ result = didPtr->DspDidReadDataFnc(&pduTxData->SduDataPtr[*txPos]); /** @req DCM437 **/\r
+ *txPos += didLen;\r
+\r
+ if (result != E_OK) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else { // tx buffer full\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+ }\r
+ else { // Not possible to obtain did length\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else { // CheckRead failed\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else { // Not allowed in current security level\r
+ responseCode = DCM_E_SECUTITYACCESSDENIED;\r
+ }\r
+ }\r
+ else { // Not allowed in current session\r
+ responseCode = DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION;\r
+ }\r
+ }\r
+ else { // Read access not configured\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ // Recurse trough the rest of the dids. /** @req DCM440 **/\r
+ uint16 i;\r
+ for (i=0; (!didPtr->DspDidRef[i]->Arc_EOL) && (responseCode == DCM_E_POSITIVERESPONSE); i++) {\r
+ responseCode = DspReadDidData(didPtr->DspDidRef[i], pduTxData, txPos);\r
+ }\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+void DspUdsReadDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ /** @req DCM253 **/\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ uint8 nrOfDids;\r
+ uint16 didNr;\r
+ const Dcm_DspDidType *didPtr = NULL;\r
+\r
+ uint16 txPos = 1;\r
+ uint16 i;\r
+\r
+ if ((pduRxData->SduLength - 1) % 2 == 0 ) {\r
+ nrOfDids = (pduRxData->SduLength - 1) / 2;\r
+\r
+ for (i = 0; (i < nrOfDids) && (responseCode == DCM_E_POSITIVERESPONSE); i++) {\r
+ didNr = (pduRxData->SduDataPtr[1+i*2] << 8) + pduRxData->SduDataPtr[2+i*2];\r
+ if (DspLookupDid(didNr, &didPtr)) { /** @req DCM438 **/\r
+ responseCode = DspReadDidData(didPtr, pduTxData, &txPos);\r
+ }\r
+ else { // DID not found\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ pduTxData->SduLength = txPos;\r
+ }\r
+\r
+ DsdDspProcessingDone(responseCode);\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspReadDidScalingData(const Dcm_DspDidType *didPtr, PduInfoType *pduTxData, uint16 *txPos)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ if (didPtr->DspDidGetScalingInfoFnc != NULL) {\r
+ uint16 scalingInfoLen;\r
+\r
+ scalingInfoLen = didPtr->DspDidInfoRef->DspDidScalingInfoSize;\r
+ if ((*txPos + scalingInfoLen + 2) <= pduTxData->SduLength) {\r
+ Std_ReturnType result;\r
+ Dcm_NegativeResponseCodeType errorCode;\r
+\r
+ pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 8) & 0xFF;\r
+ (*txPos)++;\r
+ pduTxData->SduDataPtr[*txPos] = (didPtr->DspDidIdentifier >> 0) & 0xFF;\r
+ (*txPos)++;\r
+ result = didPtr->DspDidGetScalingInfoFnc(&pduTxData->SduDataPtr[*txPos], &errorCode); /** @req DCM394 **/\r
+ *txPos += scalingInfoLen;\r
+\r
+ if ((result != E_OK) || (errorCode != DCM_E_POSITIVERESPONSE)) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else { // tx buffer full\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+ }\r
+ else { // DspDidGetScalingInfoFnc null pointer\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+void DspUdsReadScalingDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ /** @req DCM258 **/\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ uint16 didNr;\r
+ const Dcm_DspDidType *didPtr = NULL;\r
+\r
+ uint16 txPos = 1;\r
+\r
+ if (pduRxData->SduLength == 3) {\r
+ didNr = (pduRxData->SduDataPtr[1] << 8) + pduRxData->SduDataPtr[2];\r
+ if (DspLookupDid(didNr, &didPtr)) {\r
+ responseCode = DspReadDidScalingData(didPtr, pduTxData, &txPos);\r
+ }\r
+ else { // DID not found\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ pduTxData->SduLength = txPos;\r
+ }\r
+ }\r
+ else {\r
+ // Length not ok\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+\r
+ DsdDspProcessingDone(responseCode);\r
+}\r
+\r
+\r
+Dcm_NegativeResponseCodeType DspWriteDidData(const Dcm_DspDidType *didPtr, const PduInfoType *pduRxData, uint16 writeDidLen)\r
+{\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ if ((didPtr->DspDidInfoRef->DspDidAccess.DspDidWrite != NULL) && (didPtr->DspDidConditionCheckWriteFnc != NULL) && (didPtr->DspDidWriteDataFnc != NULL)) { /** @req DCM468 **/\r
+ if (DspCheckSessionLevel(didPtr->DspDidInfoRef->DspDidAccess.DspDidWrite->DspDidWriteSessionRef)) { /** @req DCM469 **/\r
+ if (DspCheckSecurityLevel(didPtr->DspDidInfoRef->DspDidAccess.DspDidWrite->DspDidWriteSecurityLevelRef)) { /** @req DCM470 **/\r
+ Std_ReturnType result;\r
+ Dcm_NegativeResponseCodeType errorCode;\r
+ result = didPtr->DspDidConditionCheckWriteFnc(&errorCode); /** @req DCM471 **/\r
+ if ((result == E_OK) && (errorCode == DCM_E_POSITIVERESPONSE)) {\r
+ uint16 didLen;\r
+ result = E_NOT_OK;\r
+ if (didPtr->DspDidInfoRef->DspDidFixedLength) { /** @req DCM472 **/\r
+ didLen = didPtr->DspDidSize;\r
+ result = E_OK;\r
+ }\r
+ else {\r
+ if (didPtr->DspDidReadDataLengthFnc != NULL) {\r
+ result = didPtr->DspDidReadDataLengthFnc(&didLen);\r
+ }\r
+ }\r
+\r
+ if (result == E_OK) {\r
+ if (didLen == writeDidLen) { /** @req DCM473 **/\r
+ result = didPtr->DspDidWriteDataFnc(&pduRxData->SduDataPtr[3], didLen, &errorCode); /** @req DCM395 **/\r
+ if ((result != E_OK) || (errorCode != DCM_E_POSITIVERESPONSE)) {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else { // Not possible to obtain did length\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else { // CheckRead failed\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else { // Not allowed in current security level\r
+ responseCode = DCM_E_SECUTITYACCESSDENIED;\r
+ }\r
+ }\r
+ else { // Not allowed in current session\r
+ responseCode = DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION;\r
+ }\r
+ }\r
+ else { // Read access not configured\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+\r
+ return responseCode;\r
+}\r
+\r
+void DspUdsWriteDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ /** @req DCM255 **/\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+ uint16 didNr;\r
+ const Dcm_DspDidType *didPtr = NULL;\r
+\r
+ uint16 didDataLength;\r
+\r
+ didDataLength = pduRxData->SduLength - 3;\r
+ didNr = (pduRxData->SduDataPtr[1] << 8) + pduRxData->SduDataPtr[2];\r
+ if (DspLookupDid(didNr, &didPtr)) { /** @req DCM467 **/\r
+ responseCode = DspWriteDidData(didPtr, pduRxData, didDataLength);\r
+ }\r
+ else { // DID not found\r
+ responseCode = DCM_E_REQUESTOUTOFRANGE;\r
+ }\r
+\r
+ if (responseCode == DCM_E_POSITIVERESPONSE) {\r
+ pduTxData->SduLength = 3;\r
+ pduTxData->SduDataPtr[1] = (didNr >> 8) & 0xFF;\r
+ pduTxData->SduDataPtr[2] = (didNr >> 0) & 0xFF;\r
+ }\r
+\r
+ DsdDspProcessingDone(responseCode);\r
+}\r
+\r
+\r
+void DspUdsSecurityAccess(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ /** @req DCM252 **/\r
+ Dcm_NegativeResponseCodeType responseCode = DCM_E_POSITIVERESPONSE;\r
+\r
+ // Check sub function range (0x01 to 0x42)\r
+ if ((pduRxData->SduDataPtr[1] >= 0x01) && (pduRxData->SduDataPtr[1] <= 0x42)) {\r
+ boolean isRequestSeed = pduRxData->SduDataPtr[1] & 0x01;\r
+ Dcm_SecLevelType requestedSecurityLevel = (pduRxData->SduDataPtr[1]-1)/2;\r
+ Std_ReturnType getSeedResult;\r
+ Dcm_NegativeResponseCodeType getSeedErrorCode;\r
+\r
+ if (isRequestSeed) {\r
+ // requestSeed message\r
+ // Check if type exist in security table\r
+ const Dcm_DspSecurityRowType *securityRow = &DCM_Config.Dsp->DspSecurity->DspSecurityRow[0];\r
+ while ((securityRow->DspSecurityLevel != requestedSecurityLevel) && !securityRow->Arc_EOL) {\r
+ securityRow++;\r
+ }\r
+ if (!securityRow->Arc_EOL) {\r
+ // Check length\r
+ if (pduRxData->SduLength == (2 + securityRow->DspSecurityADRSize)) { /** @req DCM321.1 **/\r
+ Dcm_SecLevelType activeSecLevel;\r
+ Dcm_GetSecurityLevel(&activeSecLevel);\r
+ if (requestedSecurityLevel == activeSecLevel) { /** @req DCM323 **/\r
+ pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1];\r
+ // If same level set the seed to zeroes\r
+ memset(&pduTxData->SduDataPtr[2], 0, securityRow->DspSecuritySeedSize);\r
+ pduTxData->SduLength = 2 + securityRow->DspSecuritySeedSize;\r
+ }\r
+ else {\r
+ // New security level ask for seed\r
+ getSeedResult = securityRow->GetSeed(&pduRxData->SduDataPtr[2], &pduTxData->SduDataPtr[2], &getSeedErrorCode);\r
+ if ((getSeedResult == E_OK) && (getSeedErrorCode == E_OK)) {\r
+ // Everything ok add sub function to tx message and send it.\r
+ pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1];\r
+ pduTxData->SduLength = 2 + securityRow->DspSecuritySeedSize;\r
+\r
+ dspUdsSecurityAccesData.reqSecLevel = requestedSecurityLevel;\r
+ dspUdsSecurityAccesData.reqSecLevelRef = securityRow;\r
+ dspUdsSecurityAccesData.reqInProgress = TRUE;\r
+ }\r
+ else {\r
+ // GetSeed returned not ok\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ }\r
+ else {\r
+ // Length not ok\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ // Requested security level not configured\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ // sendKey message\r
+ if (dspUdsSecurityAccesData.reqInProgress) {\r
+ if (pduRxData->SduLength == (2 + dspUdsSecurityAccesData.reqSecLevelRef->DspSecurityKeySize)) { /** @req DCM321 **/\r
+ if (requestedSecurityLevel == dspUdsSecurityAccesData.reqSecLevel) {\r
+ Std_ReturnType compareKeyResult;\r
+ compareKeyResult = dspUdsSecurityAccesData.reqSecLevelRef->CompareKey(&pduRxData->SduDataPtr[2]);\r
+ if (compareKeyResult == E_OK) {\r
+ // Request accepted\r
+ // Kill timer\r
+ DslSetSecurityLevel(dspUdsSecurityAccesData.reqSecLevelRef->DspSecurityLevel);\r
+ dspUdsSecurityAccesData.reqInProgress = FALSE;\r
+ pduTxData->SduDataPtr[1] = pduRxData->SduDataPtr[1];\r
+ pduTxData->SduLength = 2;\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_CONDITIONSNOTCORRECT;\r
+ }\r
+ }\r
+ else {\r
+ // Length not ok\r
+ responseCode = DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT;\r
+ }\r
+ }\r
+ else {\r
+ // sendKey request without a preceding requestSeed\r
+ responseCode = DCM_E_REQUESTSEQUENCEERROR;\r
+ }\r
+ }\r
+ }\r
+ else {\r
+ responseCode = DCM_E_SUBFUNCTIONNOTSUPPORTED;\r
+ }\r
+\r
+ DsdDspProcessingDone(responseCode);\r
+}\r
+\r
+\r
+void DspUdsTesterPresent(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ if (pduRxData->SduLength == 2) {\r
+ switch (pduRxData->SduDataPtr[1])\r
+ {\r
+ case ZERO_SUB_FUNCTION:\r
+ DslResetSessionTimeoutTimer();\r
+ // Create positive response\r
+ /** @req DCM039.1 **/\r
+ pduTxData->SduDataPtr[1] = ZERO_SUB_FUNCTION;\r
+ pduTxData->SduLength = 2;\r
+ DsdDspProcessingDone(DCM_E_POSITIVERESPONSE); /** @req DCM269.1 **/\r
+ break;\r
+\r
+ default:\r
+ DsdDspProcessingDone(DCM_E_SUBFUNCTIONNOTSUPPORTED); /** @req DCM273.1 **/\r
+ break;\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ DsdDspProcessingDone(DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT); /** @req DCM272.1 **/\r
+ }\r
+}\r
+\r
+\r
+void DspUdsControlDtcSetting(const PduInfoType *pduRxData, PduInfoType *pduTxData)\r
+{\r
+ Dem_ReturnControlDTCStorageType resultCode;\r
+\r
+ if (pduRxData->SduLength == 2) {\r
+ switch (pduRxData->SduDataPtr[1])\r
+ {\r
+ case 0x01: // ON /** @req DCM249.1 **/\r
+ resultCode = Dem_EnableDTCStorage(DEM_DTC_GROUP_ALL_DTCS, DEM_DTC_KIND_ALL_DTCS); /** @req DCM304 **/\r
+ if (resultCode == DEM_CONTROL_DTC_STORAGE_OK) {\r
+ pduTxData->SduDataPtr[1] = 0x01;\r
+ pduTxData->SduLength = 2;\r
+ DsdDspProcessingDone(DCM_E_POSITIVERESPONSE);\r
+ }\r
+ else {\r
+ DsdDspProcessingDone(DCM_E_REQUESTOUTOFRANGE);\r
+ }\r
+ break;\r
+\r
+ case 0x02: // OFF /** @req DCM249.2 **/\r
+ resultCode = Dem_DisableDTCStorage(DEM_DTC_GROUP_ALL_DTCS, DEM_DTC_KIND_ALL_DTCS); /** @req DCM406 **/\r
+ if (resultCode == DEM_CONTROL_DTC_STORAGE_OK) {\r
+ pduTxData->SduDataPtr[1] = 0x02;\r
+ pduTxData->SduLength = 2;\r
+ DsdDspProcessingDone(DCM_E_POSITIVERESPONSE);\r
+ }\r
+ else {\r
+ DsdDspProcessingDone(DCM_E_REQUESTOUTOFRANGE);\r
+ }\r
+ break;\r
+\r
+ default:\r
+ DsdDspProcessingDone(DCM_E_SUBFUNCTIONNOTSUPPORTED);\r
+ break;\r
+ }\r
+ }\r
+ else {\r
+ // Wrong length\r
+ DsdDspProcessingDone(DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT);\r
+ }\r
+}\r
+\r
+\r
+void DspDcmConfirmation(PduIdType confirmPduId)\r
+{\r
+ if (dspUdsEcuResetData.resetPending) {\r
+ if (confirmPduId == dspUdsEcuResetData.resetPduId) {\r
+ dspUdsEcuResetData.resetPending = FALSE;\r
+ Mcu_PerformReset();\r
+ }\r
+ }\r
+}\r
+\r
+\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+\r
+\r
+#ifndef DCM_INTERNAL_H_\r
+#define DCM_INTERNAL_H_\r
+\r
+// SID table\r
+#define SID_DIAGNOSTIC_SESSION_CONTROL 0x10\r
+#define SID_ECU_RESET 0x11\r
+#define SID_CLEAR_DIAGNOSTIC_INFORMATION 0x14\r
+#define SID_READ_DTC_INFORMATION 0x19\r
+#define SID_READ_DATA_BY_IDENTIFIER 0x22\r
+#define SID_READ_SCALING_DATA_BY_IDENTIFIER 0x24\r
+#define SID_SECURITY_ACCESS 0x27\r
+#define SID_READ_DATA_BY_PERIODIC_IDENTIFIER 0x2A\r
+#define SID_DYNAMICALLY_DEFINE_DATA_IDENTIFIER 0x2C\r
+#define SID_WRITE_DATA_BY_IDENTIFIER 0x2E\r
+#define SID_INPUT_OUTPUT_CONTROL_BY_IDENTIFIER 0x2F\r
+#define SID_ROUTINE_CONTROL 0x31\r
+#define SID_TESTER_PRESENT 0x3E\r
+#define SID_NEGATIVE_RESPONSE 0x7F\r
+#define SID_CONTROL_DTC_SETTING 0x85\r
+\r
+// Misc definitions\r
+#define SUPPRESS_POS_RESP_BIT 0x80\r
+#define SID_RESPONSE_BIT 0x40\r
+#define VALUE_IS_NOT_USED 0x00\r
+\r
+typedef enum {\r
+ DSD_TX_RESPONSE_READY,\r
+ DSD_TX_RESPONSE_SUPPRESSED\r
+} DsdProcessingDoneResultType;\r
+\r
+/*\r
+ * DSP
+ */\r
+boolean DspCheckSessionLevel(const Dcm_DspSessionRowType **sessionLevelRefTable);\r
+boolean DspCheckSecurityLevel(const Dcm_DspSecurityRowType **securityLevelRefTable);\r
+\r
+void DspInit(void);\r
+void DspMain(void);\r
+void DspUdsDiagnosticSessionControl(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsEcuReset(const PduInfoType *pduRxData, PduIdType txPduId, PduInfoType *pduTxData);\r
+void DspUdsClearDiagnosticInformation(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsSecurityAccess(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsTesterPresent(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsReadDtcInformation(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsReadDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsReadScalingDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsWriteDataByIdentifier(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspUdsControlDtcSetting(const PduInfoType *pduRxData, PduInfoType *pduTxData);\r
+void DspDcmConfirmation(PduIdType confirmPduId);\r
+\r
+\r
+/*\r
+ * DSD
+ */\r
+void DsdInit(void);\r
+void DsdMain(void);\r
+void DsdHandleRequest(void);\r
+void DsdDspProcessingDone(Dcm_NegativeResponseCodeType responseCode);\r
+void DsdDataConfirmation(PduIdType confirmPduId, NotifResultType result);\r
+void DsdDslDataIndication(const PduInfoType *pduRxData, const Dcm_DsdServiceTableType *protocolSIDTable, Dcm_ProtocolAddrTypeType addrType, PduIdType txPduId, PduInfoType *pduTxData, PduIdType rxContextPduId);\r
+\r
+\r
+/*\r
+ * DSL
+ */\r
+void DslInit(void);\r
+void DslMain(void);\r
+void DslHandleResponseTransmission(void);\r
+void DslDsdProcessingDone(PduIdType txPduId, DsdProcessingDoneResultType result);\r
+void DslGetCurrentServiceTable(const Dcm_DsdServiceTableType **currentServiceTable);\r
+\r
+BufReq_ReturnType DslProvideRxBufferToPdur(PduIdType dcmRxPduId, PduLengthType tpSduLength, const PduInfoType **pduInfoPtr);\r
+void DslRxIndicationFromPduR(PduIdType dcmRxPduId, NotifResultType result);\r
+Std_ReturnType DslGetActiveProtocol(Dcm_ProtocolType *protocolId);\r
+void DslSetSecurityLevel(Dcm_SecLevelType secLevel);\r
+Std_ReturnType DslGetSecurityLevel(Dcm_SecLevelType *secLevel);\r
+void DslSetSesCtrlType(Dcm_SesCtrlType sesCtrlType);\r
+Std_ReturnType DslGetSesCtrlType(Dcm_SesCtrlType *sesCtrlType);\r
+BufReq_ReturnType DslProvideTxBuffer(PduIdType dcmTxPduId, const PduInfoType **pduInfoPtr, PduLengthType length);\r
+void DslTxConfirmation(PduIdType dcmTxPduId, NotifResultType result);\r
+void DslResetSessionTimeoutTimer(void);\r
+\r
+\r
+#endif /* DCM_INTERNAL_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+#ifndef DCM_LCFG_H_
+#define DCM_LCFG_H_
+
+#include "ComStack_Types.h"
+#include "Dcm_Types.h"
+
+// TODO: Where to place these definitions?
+typedef uint8 Dcm_ProtocolTransTypeType;
+#define DCM_PROTOCOL_TRANS_TYPE_1 1
+#define DCM_PROTOCOL_TRANS_TYPE_2 2
+
+typedef uint8 Dcm_ProtocolAddrTypeType;
+#define DCM_PROTOCOL_FUNCTIONAL_ADDR_TYPE 1
+#define DCM_PROTOCOL_PHYSICAL_ADDR_TYPE 2
+
+/*
+ * Callback function prototypes
+ */
+
+// SessionControl
+typedef Std_ReturnType (*Dcm_CallbackGetSesChgPermissionFncType)(Dcm_SesCtrlType sesCtrlTypeActive, Dcm_SesCtrlType sesCtrlTypeNew);
+typedef Std_ReturnType (*Dcm_CallbackChangeIndicationFncType)(Dcm_SesCtrlType sesCtrlTypeOld, Dcm_SesCtrlType sesCtrlTypeNew);
+typedef Std_ReturnType (*Dcm_CallbackConfirmationRespPendFncType)(Dcm_ConfirmationStatusType status);
+
+// SecurityAccess_<LEVEL>
+typedef Std_ReturnType (*Dcm_CallbackGetSeedFncType)(uint8 *securityAccessDataRecord, uint8 *seed, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackCompareKeyFncType)(uint8 *key);
+
+// PidServices_<PID>
+typedef Std_ReturnType (*Dcm_CallbackGetPIDValueFncType)(uint8 *dataValueBuffer);
+
+// DidServices_<DID>
+typedef Std_ReturnType (*Dcm_CallbackReadDataFncType)(uint8 *data);
+typedef Std_ReturnType (*Dcm_CallbackWriteDataFncType)(uint8 *data, uint8 dataLength, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackReadDataLengthFncType)(uint16 *didLength);
+typedef Std_ReturnType (*Dcm_CallbackConditionCheckReadFncType)(Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackConditionCheckWriteFncType)(Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackReturnControlToECUFncType)(uint8 *controlOptionRecord, uint8 *controlEnableMaskRecord, uint8 *controlStatusRecord, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackResetToDefaultFncType)(uint8 *controlOptionRecord, uint8 *controlEnableMaskRecord, uint8 *controlStatusRecord, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackFreezeCurrentStateFncType)(uint8 *controlOptionRecord, uint8 *controlEnableMaskRecord, uint8 *controlStatusRecord, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackShortTermAdjustmentFncType)(uint8 *controlOptionRecord, uint8 *controlEnableMaskRecord, uint8 *controlStatusRecord, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackGetScalingInformationFncType)(uint8 *scalingInfo, Dcm_NegativeResponseCodeType *errorCode);
+
+// InfoTypeServices_<INFOTYPENUMBER>
+typedef Std_ReturnType (*Dcm_CallbackGetInfoTypeValueFncType)(uint8 *dataValueBuffer);
+
+// DTRServices
+typedef Std_ReturnType (*Dcm_CallbackGgetDTRValueFncType)(uint16 *testval, uint16 *minlimit, uint16 *maxlimit, uint8 *status);
+
+// RoutineServices_<ROUTINENAME>
+typedef Std_ReturnType (*Dcm_CallbackStartFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackStopFncType)(uint8 *inBuffer, uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);
+typedef Std_ReturnType (*Dcm_CallbackRequestResultFncType)(uint8 *outBuffer, Dcm_NegativeResponseCodeType *errorCode);
+
+// RequestControlServices_<TID>
+typedef Std_ReturnType (*Dcm_CallbackRequestControlType)(uint8 *outBuffer, uint8 *inBuffer);
+
+// CallBackDCMRequestServices
+typedef Std_ReturnType (*Dcm_CallbackStartProtocolFncType)(Dcm_ProtocolType protocolID);
+typedef Std_ReturnType (*Dcm_CallbackStopProtocolFncType)(Dcm_ProtocolType protocolID);
+
+// ServiceRequestIndication
+typedef Std_ReturnType (*Dcm_CallbackIndicationFncType)(uint8 *requestData, uint16 dataSize);
+
+// ResetService
+typedef Std_ReturnType (*Dcm_CallbackEcuResetType)(uint8 resetType, Dcm_NegativeResponseCodeType *errorCode);
+
+
+/*
+ * DCM configurations
+ */
+
+/*******
+ * DSP *
+ *******/
+
+// 10.2.44
+typedef struct {
+ Dcm_SesCtrlType DspSessionLevel; // (1)
+ uint16 DspSessionP2ServerMax; // (1)
+ uint16 DspSessionP2StarServerMax; // (1)
+ boolean Arc_EOL;
+} Dcm_DspSessionRowType;
+
+// 10.2.42
+typedef struct {
+ Dcm_SecLevelType DspSecurityLevel; // (1)
+ uint16 DspSecurityDelayTimeOnBoot; // (1)
+ uint8 DspSecurityNumAttDelay; // (1)
+ uint16 DspSecurityDelayTime; // (1)
+ uint8 DspSecurityNumAttLock; // (1)
+ uint8 DspSecurityADRSize; // (0..1)
+ uint8 DspSecuritySeedSize; // (1)
+ uint8 DspSecurityKeySize; // (1)
+ Dcm_CallbackGetSeedFncType GetSeed;
+ Dcm_CallbackCompareKeyFncType CompareKey;
+ boolean Arc_EOL;
+} Dcm_DspSecurityRowType;
+
+// 10.2.23
+typedef struct {
+ uint8 DspDidControlRecordSize; // (1)
+ uint8 DspDidControlOptionRecordSize; // (1)
+ uint8 DspDidControlStatusRecordSize; // (1)
+} Dcm_DspDidControlRecordSizesType;
+
+// 10.2.26
+typedef struct {
+ const Dcm_DspSessionRowType **DspDidControlSessionRef; // (1..*)
+ const Dcm_DspSecurityRowType **DspDidControlSecurityLevelRef; // (1..*)
+ const Dcm_DspDidControlRecordSizesType *DspDidFreezeCurrentState; // (0..1)
+ const Dcm_DspDidControlRecordSizesType *DspDidResetToDefault; // (0..1)
+ const Dcm_DspDidControlRecordSizesType *DspDidReturnControlToEcu; // (0..1)
+ const Dcm_DspDidControlRecordSizesType *DspDidShortTermAdjustment; // (0..1)
+} Dcm_DspDidControlType;
+
+// 10.2.27
+typedef struct {
+ const Dcm_DspSessionRowType **DspDidReadSessionRef; // (1..*)
+ const Dcm_DspSecurityRowType **DspDidReadSecurityLevelRef; // (1..*)
+} Dcm_DspDidReadType;
+
+// 10.2.28
+typedef struct {
+ const Dcm_DspSessionRowType **DspDidWriteSessionRef; // (1..*)
+ const Dcm_DspSecurityRowType **DspDidWriteSecurityLevelRef; // (1..*)
+} Dcm_DspDidWriteType;
+
+// 10.2.25
+typedef struct {
+ // Containers
+ const Dcm_DspDidReadType *DspDidRead; // (0..1)
+ const Dcm_DspDidWriteType *DspDidWrite; // (0..1)
+ const Dcm_DspDidControlType *DspDidControl; // (0..1)
+} Dcm_DspDidAccessType;
+
+// 10.2.24
+typedef struct {
+ boolean DspDidDynamicllyDefined; // (1)
+ boolean DspDidFixedLength; // (1)
+ uint8 DspDidScalingInfoSize; // (0..1)
+ // Containers
+ Dcm_DspDidAccessType DspDidAccess; // (1)
+} Dcm_DspDidInfoType;
+
+// 10.2.22
+typedef struct _Dcm_DspDidType {
+ boolean DspDidUsePort; // (1)
+ uint16 DspDidIdentifier; // (1)
+ const Dcm_DspDidInfoType *DspDidInfoRef; // (1)
+ const struct _Dcm_DspDidType **DspDidRef; // (0..*)
+ uint16 DspDidSize; // (1)
+ Dcm_CallbackReadDataLengthFncType DspDidReadDataLengthFnc; // (0..1)
+ Dcm_CallbackConditionCheckReadFncType DspDidConditionCheckReadFnc; // (0..1)
+ Dcm_CallbackReadDataFncType DspDidReadDataFnc; // (0..1)
+ Dcm_CallbackConditionCheckWriteFncType DspDidConditionCheckWriteFnc; // (0..1)
+ Dcm_CallbackWriteDataFncType DspDidWriteDataFnc; // (0..1)
+ Dcm_CallbackGetScalingInformationFncType DspDidGetScalingInfoFnc; // (0..1)
+ Dcm_CallbackFreezeCurrentStateFncType DspDidFreezeCurrentStateFnc; // (0..1)
+ Dcm_CallbackResetToDefaultFncType DspDidResetToDeaultFnc; // (0..1)
+ Dcm_CallbackReturnControlToECUFncType DspDidReturnControlToEcuFnc; // (0..1)
+ Dcm_CallbackShortTermAdjustmentFncType DspDidShortTermAdjustmentFnc; // (0..1)
+ // Containers
+ const Dcm_DspDidControlRecordSizesType *DspDidControlRecordSize; // (0..*)
+ boolean Arc_EOL;
+} Dcm_DspDidType;
+
+// 10.2.30
+typedef struct {
+ const Dcm_DspSessionRowType **DspEcuResetSessionRef; // (1..*)
+ const Dcm_DspSecurityRowType **DspEcuResetSecurityLevelRef; // (1..*)
+
+} Dcm_DspEcuResetType;
+
+// 10.2.31
+typedef struct {
+ boolean DspPidUsePort; // (1)
+ uint8 DspPidIdentifier; // (1)
+ uint8 DspPidSize; // (1)
+ Dcm_CallbackGetPIDValueFncType DspGetPidValFnc; // (1)
+} Dcm_DspPidType;
+
+// 10.2.33
+typedef struct {
+ boolean DspDTCInfoSubFuncSupp; // (1)
+ uint8 DspDTCInfoSubFuncLevel; // (1)
+ const Dcm_DspSecurityRowType **DspDTCInfoSecLevelRef; // (1..*)
+} Dcm_DspReadDTCRowType;
+
+// 10.2.32
+typedef struct {
+ // Containers
+ Dcm_DspReadDTCRowType *DspReadDTCRow; // (0..*)
+} Dcm_DspReadDTCType;
+
+// 10.2.34
+typedef struct {
+ uint8 DspRequestControl; // (1)
+ uint8 DspRequestControlOutBufferSize; // (1)
+ uint8 DspRequestControlTestId; // (1)
+} Dcm_DspRequestControlType;
+
+// 10.2.37
+typedef struct {
+ const Dcm_DspSessionRowType *DspRoutineSessionRef; // (1..*)
+ const Dcm_DspSecurityRowType *DspRoutineSecurityLevelRef; // (1..*)
+} Dcm_DspRoutineAuthorizationType;
+
+// 10.2.38
+typedef struct {
+ uint8 DspReqResRtnCtrlOptRecSize; // (1)
+} Dcm_DspRoutineRequestResType;
+
+// 10.2.39
+typedef struct {
+ uint8 DspStopRoutineCtrlOptRecSize; // (1)
+ uint8 DspStopRoutineStsOptRecSize; // (1)
+} Dcm_DspRoutineStopType;
+
+// 10.2.40
+typedef struct {
+ uint8 DspStartRoutineCtrlOptRecSize; // (1)
+ uint8 DspStartRoutineStsOptRecSize; // (1)
+} Dcm_DspStartRoutineType;
+
+// 10.2.36
+typedef struct {
+ // Containers
+ const Dcm_DspRoutineAuthorizationType *DspRoutineAuthorization; // (1)
+ const Dcm_DspRoutineRequestResType *DspRoutineRequestRes; // (0..1)
+ const Dcm_DspRoutineStopType *DspRoutineStop; // (0..1)
+ const Dcm_DspStartRoutineType *DspStartRoutine; // (1)
+} Dcm_DspRoutineInfoType;
+
+// 10.2.35
+typedef struct {
+ boolean DspRoutineUsePort; // (1)
+ uint16 DspRoutineIdentifier; // (1)
+ const Dcm_DspRoutineInfoType *DspRoutineInfoRef; // (1)
+ Dcm_CallbackStartFncType DspStartRoutineFnc; // (0..1)
+ Dcm_CallbackStopFncType DspStopRoutineFnc; // (0..1)
+ Dcm_CallbackRequestResultFncType DspRequestResultRoutineFnc; // (0..1)
+} Dcm_DspRoutineType;
+
+// 10.2.41
+typedef struct {
+ // Containers
+ const Dcm_DspSecurityRowType *DspSecurityRow; // (0..31)
+} Dcm_DspSecurityType;
+
+// 10.2.43
+typedef struct {
+ // Containers
+ const Dcm_DspSessionRowType *DspSessionRow; // (0..31)
+} Dcm_DspSessionType;
+
+// 10.2.47
+typedef struct {
+ uint8 DspTestResultTestId; // (1)
+ uint8 DspTestResultUaSid; // (1)
+} Dcm_DspTestResultTidType;
+
+// 10.2.46
+typedef struct {
+ uint8 DspTestResultObdmid; // (1)
+ const Dcm_DspTestResultTidType **DspTestResultObdmidTidRef; // (1..*)
+} Dcm_DspTestResultObdmidTidType;
+
+// 10.2.45
+typedef struct {
+ // Containers
+ const Dcm_DspTestResultObdmidTidType *DspTestResultObdmidTid; // (0..*)
+ const Dcm_DspTestResultTidType *DspTestResultTid; // (0..*)
+} Dcm_DspTestResultByObdmidType;
+
+// 10.2.48
+typedef struct {
+ boolean DspVehInfoUsePort; // (1)
+ uint8 DspVehInfoType; // (1)
+ uint8 DspVehInfoSize; // (1)
+ Dcm_CallbackGetInfoTypeValueFncType DspGetVehInfoTypeFnc; // (1)
+} Dcm_DspVehInfoType;
+
+// 10.2.21
+typedef struct {
+ uint8 DspMaxDidToRead; // (0..1)
+ // Containers
+ const Dcm_DspDidType *DspDid; // (0..*)
+ const Dcm_DspDidInfoType *DspDidInfo; // (0..*)
+ const Dcm_DspEcuResetType *DspEcuReset; // (0..*)
+ const Dcm_DspPidType *DspPid; // (0..*)
+ const Dcm_DspReadDTCType *DspReadDTC; // (1)
+ const Dcm_DspRequestControlType *DspRequestControl; // (0..*)
+ const Dcm_DspRoutineType *DspRoutine; // (0..*)
+ const Dcm_DspRoutineInfoType *DspRoutineInfo; // (0..*)
+ const Dcm_DspSecurityType *DspSecurity; // (0..*)
+ const Dcm_DspSessionType *DspSession; // (1)
+ const Dcm_DspTestResultByObdmidType *DspTestResultByObdmid; // (0..*)
+ const Dcm_DspVehInfoType *DspVehInfo;
+} Dcm_DspType;
+
+/*******
+ * DSD *
+ *******/
+// 10.2.4 DcmDsdService
+typedef struct {
+ uint8 DsdSidTabServiceId; // (1)
+ boolean DsdSidTabSubfuncAvail; // (1)
+ const Dcm_DspSecurityRowType **DsdSidTabSecurityLevelRef; // (1..*)
+ const Dcm_DspSessionRowType **DsdSidTabSessionLevelRef; // (1..*)
+ // Containers
+ boolean Arc_EOL;
+} Dcm_DsdServiceType;
+
+// 10.2.3 DcmDsdServiceTable
+typedef struct {
+ uint8 DsdSidTabId; // (1)
+ // Containers
+ const Dcm_DsdServiceType *DsdService; // (1..*)
+ boolean Arc_EOL;
+} Dcm_DsdServiceTableType;
+
+// 10.2.2 DcmDsd
+typedef struct {
+ // Containers
+ const Dcm_DsdServiceTableType *DsdServiceTable; // (1..256)
+} Dcm_DsdType;
+
+/*******
+ * DSL *
+ *******/
+
+typedef enum
+{
+ BUFFER_AVAILABLE,
+ BUFFER_BUSY,
+}Dcm_DslBufferStatusType;
+
+
+typedef enum
+{
+ NOT_IN_USE, // The buffer is not used (it is available).
+ IN_USE,
+ PROVIDED_TO_PDUR, // The buffer is currently in use by PDUR.
+ DSD_PENDING_RESPONSE_SIGNALED, // Signals have been received saying the buffer contain valid data.
+ DCM_TRANSMIT_SIGNALED, // The DCM has been asked to transfer the response, system is now waiting for TP layer to reqest Tx buffer.
+ PROVIDED_TO_DSD, // The buffer is currently in use by DSD.
+ UNDEFINED_USAGE
+}Dcm_DslBufferUserType;
+
+typedef struct {
+ Dcm_DslBufferStatusType status; // Flag for buffer in use.
+
+} Dcm_DslBufferRuntimeType;
+
+// 10.2.6
+typedef struct {
+ uint8 DslBufferID; // (1) // Kept for reference, will be removed (polite calls will be made).
+ uint16 DslBufferSize; // (1)
+ PduInfoType pduInfo;
+ Dcm_DslBufferRuntimeType *externalBufferRuntimeData;
+} Dcm_DslBufferType;
+
+// 10.2.7
+typedef struct {
+ Dcm_CallbackStartProtocolFncType StartProtocol;
+ Dcm_CallbackStopProtocolFncType StopProtocol;
+ boolean Arc_EOL;
+} Dcm_DslCallbackDCMRequestServiceType;
+
+// 10.2.8
+typedef struct {
+ boolean DslDiagRespForceRespPendEn; // (1)
+ uint8 DslDiagRespMaxNumRespPend; // (1)
+} Dcm_DslDiagRespType;
+
+// 10.2.18
+typedef struct {
+ uint16 TimStrP2ServerMax; // (1)
+ uint16 TimStrP2ServerMin; // (1)
+ uint16 TimStrP2StarServerMax; // (1)
+ uint16 TimStrP2StarServerMin; // (1)
+ uint16 TimStrS3Server; // (1)
+ const boolean Arc_EOL;
+} Dcm_DslProtocolTimingRowType;
+
+// 10.2.17
+typedef struct {
+ const Dcm_DslProtocolTimingRowType *DslProtocolTimingRow; // (0..*)
+} Dcm_DslProtocolTimingType;
+
+// 10.2.15
+typedef struct {
+// TODO: Add this? (only needed for type2 periodic transmission configuration)
+} Dcm_DslPeriodicTransmissionType;
+
+// 10.2.16
+typedef struct {
+// TODO: Add this? (only needed for type2 periodic transmission configuration)
+} Dcm_DslResponseOnEventType;
+
+/* Makes it possible to cross-reference structures. */
+typedef struct Dcm_DslMainConnectionType_t Dcm_DslMainConnectionType;
+typedef struct Dcm_DslProtocolRxType_t Dcm_DslProtocolRxType;
+
+// 10.2.13
+struct Dcm_DslProtocolRxType_t {
+ const Dcm_DslMainConnectionType *DslMainConnectionParent; // (1) /* Cross reference. */
+ const Dcm_ProtocolAddrTypeType DslProtocolAddrType; // (1)
+ const uint32 DcmDslProtocolRxPduId; // (1)
+ const uint32 DcmDslProtocolRxTesterSourceAddr_v4; // (1)
+ const uint8 DcmDslProtocolRxChannelId_v4; // (1)
+ const boolean Arc_EOL;
+};
+
+/* Makes it possible to cross-reference structures. */
+//typedef struct Dcm_DslMainConnectionType_t Dcm_DslMainConnectionType;
+typedef struct Dcm_DslProtocolTxType_t Dcm_DslProtocolTxType;
+
+// 10.2.14
+struct Dcm_DslProtocolTxType_t {
+ const Dcm_DslMainConnectionType *DslMainConnectionParent; // (1) /* Cross reference. */
+ const uint32 DcmDslProtocolTxPduId; // (1) /* Will be removed (polite), kept for reference. */
+ const boolean Arc_EOL;
+};
+
+// -- UH
+
+/*
+PduR_DcmDslTxPduId
+
+// 10.2.14
+typedef struct {
+ const uint32 PduR_DcmDslTxPduId; // Polite PDUID ("list index") to be used when writing to PduR.
+ // TODO: Add ref to PDU.
+ const boolean Arc_EOL;
+} Dcm_DslProtocolTxType;
+
+*/
+
+/* Make it possible to cross reference. */
+typedef struct Dcm_DslConnectionType_t Dcm_DslConnectionType;
+
+// 10.2.12
+struct Dcm_DslMainConnectionType_t { // Cross referenced from Dcm_DslProtocolRxType_t.
+ const Dcm_DslConnectionType *DslConnectionParent; // Cross reference.
+ const Dcm_DslPeriodicTransmissionType *DslPeriodicTransmissionConRef; // (0..1)
+ const Dcm_DslResponseOnEventType *DslROEConnectionRef; // (0..*)
+ // Containers
+ const Dcm_DslProtocolRxType *DslProtocolRx; // (1..*) Remove?
+ const Dcm_DslProtocolTxType *DslProtocolTx; // (1)
+};
+
+/* Make it possible to cross reference. */
+typedef struct Dcm_DslProtocolRowType_t Dcm_DslProtocolRowType;
+
+// 10.2.11
+struct Dcm_DslConnectionType_t {
+ // Containers
+ const Dcm_DslProtocolRowType *DslProtocolRow; // Cross reference.
+ const Dcm_DslMainConnectionType *DslMainConnection; // (1)
+ const Dcm_DslPeriodicTransmissionType *DslPeriodicTransmission; // (0..1)
+ const Dcm_DslResponseOnEventType *DslResponseOnEvent; // (0..1)
+ boolean Arc_EOL;
+};
+
+typedef enum {
+ DCM_IDLE = 0, /* Not in use. */
+ DCM_WAITING_DIAGNOSTIC_RESPONSE, /* A diagnostic request has been forwarded to the DSD, and DSL is waiting for response. */
+ DCM_DIAGNOSTIC_RESPONSE_PENDING, /* A diagnostic response has been deployed to the external buffer and is waiting to be transmitted. */
+ DCM_TRANSMITTING_EXTERNAL_BUFFER_DATA_TO_PDUR, /* We are in the process of transmitting a diagnostic response most likely that reside in the external buffer, from DSD to PDUR. */
+ DCM_TRANSMITTING_LOCAL_BUFFER_DATA_TO_PDUR /* */
+} Dcm_DslProtocolStateType;
+
+typedef enum {
+ DCM_DSL_PDUR_DCM_IDLE = 0,
+
+ DCM_DSL_PDUR_TRANSMIT_INDICATED = 1,
+ DCM_DSL_PDUR_TRANSMIT_TX_BUFFER_PROVIDED = 2,
+
+ DCM_DSL_RECEPTION_INDICATED = 3,
+ DCM_DSL_RX_BUFFER_PROVIDED = 4
+} Dcm_DslPdurCommuncationState;
+
+
+// This buffer is used for implement 7.2.4.3 (Concurrent "tester present").
+
+#define DCM_DSL_LOCAL_BUFFER_LENGTH 8
+
+typedef struct {
+ Dcm_DslBufferUserType status;
+ uint8 buffer[DCM_DSL_LOCAL_BUFFER_LENGTH];
+ PduLengthType messageLenght;
+ PduInfoType PduInfo;
+} Dcm_DslLocalBufferType;
+
+
+typedef struct {
+ PduIdType diagReqestRxPduId; // Tester request PduId.
+ uint32 stateTimeoutCount; // Counter for timeout.
+ Dcm_DslBufferUserType externalRxBufferStatus;
+ PduInfoType diagnosticRequestFromTester;
+ PduInfoType diagnosticResponseFromDsd;
+ Dcm_DslBufferUserType externalTxBufferStatus;
+ boolean protocolStarted; // Has the protocol been started?
+ Dcm_DslLocalBufferType localRxBuffer;
+ Dcm_DslLocalBufferType localTxBuffer;
+ boolean diagnosticActiveComM; //
+ uint16 S3ServerTimeoutCount;
+ uint8 responsePendingCount;
+ Dcm_SecLevelType securityLevel;
+ Dcm_SesCtrlType sessionControl;
+} Dcm_DslRunTimeProtocolParametersType;
+
+// 10.2.10
+struct Dcm_DslProtocolRowType_t { // Cross referenced from Dcm_DslConnectionType_t.
+ Dcm_ProtocolType DslProtocolID; // (1)
+ boolean DslProtocolIsParallelExecutab; // (1)
+ uint16 DslProtocolPreemptTimeout; // (1)
+ uint8 DslProtocolPriority; // (1)
+ Dcm_ProtocolTransTypeType DslProtocolTransType; // (1)
+ const Dcm_DslBufferType *DslProtocolRxBufferID; // (1)
+ const Dcm_DslBufferType *DslProtocolTxBufferID; // (1)
+ const Dcm_DsdServiceTableType *DslProtocolSIDTable; // (1)
+ const Dcm_DslProtocolTimingRowType *DslProtocolTimeLimit; // (0..1)
+ // Containers
+ const Dcm_DslConnectionType *DslConnection; // (1..*)
+ // Reference to runtime parameters to this protocol.
+ Dcm_DslRunTimeProtocolParametersType *DslRunTimeProtocolParameters; // Maybe this needs to change to index.
+ boolean Arc_EOL;
+};
+
+// 10.2.9
+typedef struct {
+// Containers
+ const Dcm_DslProtocolRxType *DslProtocolRxGlobalList; // (1..*) A polite list for all RX protocol configurations.
+ const Dcm_DslProtocolTxType *DslProtocolTxGlobalList; // (1..*) A polite list for all TX protocol configurations.
+const Dcm_DslProtocolRowType *DslProtocolRowList; // (1..*)
+} Dcm_DslProtocolType;
+
+// 10.2.19
+typedef struct {
+Dcm_CallbackIndicationFncType Indication;
+boolean Arc_EOL;
+} Dcm_DslServiceRequestIndicationType;
+
+// 10.2.20
+typedef struct {
+Dcm_CallbackGetSesChgPermissionFncType GetSesChgPermission;
+Dcm_CallbackChangeIndicationFncType ChangeIndication;
+Dcm_CallbackConfirmationRespPendFncType ConfirmationRespPend;
+boolean Arc_EOL;
+} Dcm_DslSessionControlType;
+
+// 10.2.5
+typedef struct {
+// Containers
+const Dcm_DslBufferType *DslBuffer; // (1..256)
+const Dcm_DslCallbackDCMRequestServiceType *DslCallbackDCMRequestService; // (1..*)
+const Dcm_DslDiagRespType *DslDiagResp; // (1)
+const Dcm_DslProtocolType *DslProtocol; // (1)
+const Dcm_DslProtocolTimingType *DslProtocolTiming; // (1)
+const Dcm_DslServiceRequestIndicationType *DslServiceRequestIndication; // (0..*)
+const Dcm_DslSessionControlType *DslSessionControl; // (1..*)
+} Dcm_DslType;
+
+// 10.2.1 Dcm
+typedef struct {
+// Containers
+const Dcm_DspType *Dsp; // (1)
+const Dcm_DsdType *Dsd; // (1)
+const Dcm_DslType *Dsl; // (1)
+} Dcm_ConfigType;
+
+/*
+ * Make the DCM_Config visible for others.
+ */
+extern const Dcm_ConfigType DCM_Config;
+
+#endif /*DCM_LCFG_H_*/
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+#ifndef DCM_TYPES_H_\r
+#define DCM_TYPES_H_
+#include "Std_Types.h"\r
+
+/*
+ * Dcm_SecLevelType
+ */
+typedef uint8 Dcm_SecLevelType;
+#define DCM_SEC_LEV_LOCKED 0x00
+#define DCM_SEC_LEV_L1 0x01
+#define DCM_SEC_LEV_ALL 0xFF
+
+/*
+ * Dcm_SesCtrlType
+ */
+typedef uint8 Dcm_SesCtrlType;
+#define DCM_DEFAULT_SESSION 0x01
+#define DCM_PROGRAMMING_SESSION 0x02
+#define DCM_EXTENDED_DIAGNOSTIC_SESSION 0x03
+#define DCM_SAFTEY_SYSTEM_DIAGNOSTIC_SESSION 0x04
+#define DCM_ALL_SESSION_LEVEL 0xFF
+
+typedef uint8 Dcm_ConfirmationStatusType;
+#define DCM_RES_POS_OK 0x00
+#define DCM_RES_POS_NOT_OK 0x01
+#define DCM_RES_NEG_OK 0x02
+#define DECM_RES_NEG_NOT_OK 0x03
+
+/*
+ * Dcm_ProtocolType
+ */
+typedef uint8 Dcm_ProtocolType;
+#define DCM_OBD_ON_CAN 0x00
+#define DCM_UDS_ON_CAN 0x01
+#define DCM_UDS_ON_FLEAXRAY 0x02
+#define DCM_ROE_ON_CAN 0x03
+#define DCM_ROE_ON_FLEXRAY 0x04
+#define DCM_PERIODICTRANS_ON_CAN 0x05
+#define DCM_PERIODICTRANS_ON_FLEXRAY 0X06
+
+/*
+ * Dcm_NegativeResponseCodeType
+ */
+typedef uint8 Dcm_NegativeResponseCodeType;
+#define DCM_E_GENERALREJECT 0x10
+#define DCM_E_BUSYREPEATREQUEST 0x21
+#define DCM_E_CONDITIONSNOTCORRECT 0x22
+#define DCM_E_REQUESTSEQUENCEERROR 0x24
+#define DCM_E_REQUESTOUTOFRANGE 0x31
+#define DCM_E_SECUTITYACCESSDENIED 0x33
+#define DCM_E_GENERALPROGRAMMINGFAILURE 0x72
+#define DCM_E_SUBFUNCTIONNOTSUPPORTEDINACTIVESESSION 0x7E
+#define DCM_E_RPMTOOHIGH 0x81
+#define DCM_E_RPMTOLOW 0x82
+#define DCM_E_ENGINEISRUNNING 0x83
+#define DCM_E_ENGINEISNOTRUNNING 0x84
+#define DCM_E_ENGINERUNTIMETOOLOW 0x85
+#define DCM_E_TEMPERATURETOOHIGH 0x86
+#define DCM_E_TEMPERATURETOOLOW 0x87
+#define DCM_E_VEHICLESPEEDTOOHIGH 0x88
+#define DCM_E_VEHICLESPEEDTOOLOW 0x89
+#define DCM_E_THROTTLE_PEDALTOOHIGH 0x8A
+#define DCM_E_THROTTLE_PEDALTOOLOW 0x8B
+#define DCM_E_TRANSMISSIONRANGENOTINNEUTRAL 0x8C
+#define DCM_E_TRANSMISSIONRANGENOTINGEAR 0x8D
+#define DCM_E_BRAKESWITCH_NOTCLOSED 0x8F
+#define DCM_E_SHIFTERLEVERNOTINPARK 0x90
+#define DCM_E_TORQUECONVERTERCLUTCHLOCKED 0x91
+#define DCM_E_VOLTAGETOOHIGH 0x92
+#define DCM_E_VOLTAGETOOLOW 0x93
+
+#define DCM_E_POSITIVERESPONSE 0x00
+#define DCM_E_SERVICENOTSUPPORTED 0x11
+#define DCM_E_SUBFUNCTIONNOTSUPPORTED 0x12
+#define DCM_E_INCORRECTMESSAGELENGTHORINVALIDFORMAT 0x13
+#define DCM_E_RESPONSEPENDING 0x78
+#define DCM_E_SERVICENOTSUPPORTEDINACTIVESESSION 0x7F
+
+#endif /*DCM_TYPES_H_*/\r
-/*\r
- * PduR_Test.h\r
- *\r
- * Created on: 2008-nov-05\r
- * Author: Mattias\r
- */\r
-\r
-#ifndef PDUR_TEST_H_\r
-#define PDUR_TEST_H_\r
+#ifndef RTE_DCM_H_\r
+#define RTE_DCM_H_
+
\r
\r
-#endif /* PDUR_TEST_H_ */\r
+#endif /*RTE_DCM_H_*/\r
typedef uint16 ChecksumType;
+// DtcFilterType
+typedef struct {
+ Dem_EventStatusExtendedType dtcStatusMask;
+ Dem_DTCKindType dtcKind;
+ Dem_DTCOriginType dtcOrigin;
+ Dem_FilterWithSeverityType filterWithSeverity;
+ Dem_DTCSeverityType dtcSeverityMask;
+ Dem_FilterForFDCType filterForFaultDetectionCounter;
+ uint16 faultIndex;
+} DtcFilterType;
+
+// DisableDtcStorageType
+typedef struct {
+ boolean storageDisabled;
+ Dem_DTCGroupType dtcGroup;
+ Dem_DTCKindType dtcKind;
+} DisableDtcStorageType;
+
// For keeping track of the events status
typedef struct {
Dem_EventIdType eventId;
+ const Dem_EventParameterType *eventParamRef;
uint16 occurrence;
Dem_EventStatusType eventStatus;
boolean eventStatusChanged;
- Dem_OperationCycleIdType operationCycleId;
Dem_EventStatusExtendedType eventStatusExtended;
} EventStatusRecType;
#endif /* DEM_VERSION_INFO_API */
/*
- * Allocation of operation cycle state list
+ * Allocation of DTC filter parameters
*/
+static DtcFilterType dtcFilter;
+/*
+ * Allocation of Disable/Enable DTC storage parameters
+ */
+static DisableDtcStorageType disableDtcStorage;
+
+/*
+ * Allocation of operation cycle state list
+ */
static Dem_OperationCycleStateType operationCycleStateList[DEM_OPERATION_CYCLE_ID_ENDMARK];
+
/*
* Allocation of local event status buffer
*/
static ExtDataRecType preInitExtDataBuffer[DEM_MAX_NUMBER_EXT_DATA_PRE_INIT];
/*
- * Allocation of primary event memory ramlog (after init)
- */
-static EventRecType priMemEventBuffer[DEM_MAX_NUMBER_EVENT_PRI_MEM];
-static FreezeFrameRecType priMemFreezeFrameBuffer[DEM_MAX_NUMBER_FF_DATA_PRI_MEM];
-static ExtDataRecType priMemExtDataBuffer[DEM_MAX_NUMBER_EXT_DATA_PRI_MEM];
-
-
-/*
- * Procedure: setZero
- * Description: Fill the *ptr to *(ptr+nrOfBytes-1) area with zeroes
+ * Allocation of primary event memory ramlog (after init) in uninitialized memory
*/
-void setZero(void *ptr, uint16 nrOfBytes)
-{
- uint8 *clrPtr = (uint8*)ptr;
+static EventRecType priMemEventBuffer[DEM_MAX_NUMBER_EVENT_PRI_MEM] __attribute__ ((section (".dem_eventmemory_pri")));
+static FreezeFrameRecType priMemFreezeFrameBuffer[DEM_MAX_NUMBER_FF_DATA_PRI_MEM] __attribute__ ((section (".dem_eventmemory_pri")));
+static ExtDataRecType priMemExtDataBuffer[DEM_MAX_NUMBER_EXT_DATA_PRI_MEM] __attribute__ ((section (".dem_eventmemory_pri")));
- if (nrOfBytes > 0)
- {
- *clrPtr = 0x00;
- memcpy(clrPtr+1, clrPtr, nrOfBytes-1);
- }
-}
/*
* Procedure: zeroPriMemBuffers
*/
void zeroPriMemBuffers(void)
{
- setZero(priMemEventBuffer, sizeof(priMemEventBuffer));
- setZero(priMemFreezeFrameBuffer, sizeof(priMemFreezeFrameBuffer));
- setZero(priMemExtDataBuffer, sizeof(priMemExtDataBuffer));
+ memset(priMemEventBuffer, 0, sizeof(priMemEventBuffer));
+ memset(priMemFreezeFrameBuffer, 0, sizeof(priMemFreezeFrameBuffer));
+ memset(priMemExtDataBuffer, 0, sizeof(priMemExtDataBuffer));
}
+
/*
* Procedure: calcChecksum
* Description: Calculate checksum over *data to *(data+nrOfBytes-1) area
return sum;
}
+
+/*
+ * Procedure: checkDtcKind
+ * Description: Return TRUE if "dtcKind" match the events DTCKind or "dtcKind"
+ * is "DEM_DTC_KIND_ALL_DTCS" otherwise FALSE.
+ */
+boolean checkDtcKind(Dem_DTCKindType dtcKind, const Dem_EventParameterType *eventParam)
+{
+ boolean result = FALSE;
+
+ if (dtcKind == DEM_DTC_KIND_ALL_DTCS) {
+ result = TRUE;
+ }
+ else {
+ if (eventParam->DTCClassRef != NULL) {
+ if (eventParam->DTCClassRef->DTCKind == dtcKind) {
+ result = TRUE;
+ }
+ }
+ }
+ return result;
+}
+
+
+/*
+ * Procedure: checkDtcGroup
+ * Description: Return TRUE if "dtc" match the events DTC or "dtc" is
+ * "DEM_DTC_GROUP_ALL_DTCS" otherwise FALSE.
+ */
+boolean checkDtcGroup(uint32 dtc, const Dem_EventParameterType *eventParam)
+{
+ boolean result = FALSE;
+
+ if (dtc == DEM_DTC_GROUP_ALL_DTCS) {
+ result = TRUE;
+ }
+ else {
+ if (eventParam->DTCClassRef != NULL) {
+ if (eventParam->DTCClassRef->DTC == dtc) {
+ result = TRUE;
+ }
+ }
+ }
+ return result;
+}
+
+
+/*
+ * Procedure: checkDtcOrigin
+ * Description: Return TRUE if "dtcOrigin" match any of the events DTCOrigin otherwise FALSE.
+ */
+boolean checkDtcOrigin(Dem_DTCOriginType dtcOrigin, const Dem_EventParameterType *eventParam)
+{
+ boolean result = FALSE;
+ uint16 i;
+
+ for (i = 0; (eventParam->EventClass->EventDestination[i] != dtcOrigin) && (i < DEM_MAX_NR_OF_EVENT_DESTINATION); i++);
+
+ if (i < DEM_MAX_NR_OF_EVENT_DESTINATION) {
+ result = TRUE;
+ }
+
+ return result;
+}
+
+
+/*
+ * Procedure: checkDtcSeverityMask
+ * Description: Return TRUE if "dtcSeverityMask" match any of the events DTC severity otherwise FALSE.
+ */
+boolean checkDtcSeverityMask(Dem_DTCSeverityType dtcSeverityMask, const Dem_EventParameterType *eventParam)
+{
+ boolean result = TRUE;
+
+ // TODO: This function is optional, may be implemented here.
+
+ return result;
+}
+
+
+/*
+ * Procedure: checkDtcFaultDetectionCounterMask
+ * Description: TBD.
+ */
+boolean checkDtcFaultDetectionCounter(const Dem_EventParameterType *eventParam)
+{
+ boolean result = TRUE;
+
+ // TODO: Not implemented yet.
+
+ return result;
+}
+
+
+/*
+ * Procedure: lookupEventStatusRec
+ * Description: Returns the pointer to event id parameters of "eventId" in "*eventStatusBuffer",
+ * if not found NULL is returned.
+ */
+void lookupEventStatusRec(Dem_EventIdType eventId, EventStatusRecType **const eventStatusRec)
+{
+ EventStatusRecType *eventStatusRecPtr = eventStatusBuffer;
+
+ while ((eventStatusRecPtr->eventId != eventId) && (eventStatusRecPtr < &eventStatusBuffer[DEM_MAX_NUMBER_EVENT])) {
+ eventStatusRecPtr++;
+ }
+
+ if (eventStatusRecPtr < &eventStatusBuffer[DEM_MAX_NUMBER_EVENT]) {
+ *eventStatusRec = eventStatusRecPtr;
+ } else {
+ *eventStatusRec = NULL;
+ }
+}
+
+
+/*
+ * Procedure: lookupEventIdParameter
+ * Description: Returns the pointer to event id parameters of "eventId" in "*eventIdParam",
+ * if not found NULL is returned.
+ */
+void lookupEventIdParameter(Dem_EventIdType eventId, const Dem_EventParameterType **const eventIdParam)
+{
+ const Dem_EventParameterType *EventIdParamPtr = configSet->EventParameter;
+
+ // Lookup the correct event id parameters
+ while ((EventIdParamPtr->EventID != eventId) && !EventIdParamPtr->Arc_EOL) {
+ EventIdParamPtr++;
+ }
+
+ if (!EventIdParamPtr->Arc_EOL) {
+ *eventIdParam = EventIdParamPtr;
+ } else {
+ *eventIdParam = NULL;
+ }
+}
+
/*
* Procedure: updateEventStatusRec
* Description: Update the status of "eventId", if not exist and "createIfNotExist" is
*/
void updateEventStatusRec(const Dem_EventParameterType *eventParam, Dem_EventStatusType eventStatus, boolean createIfNotExist, EventStatusRecType *eventStatusRec)
{
- uint16 i;
+ EventStatusRecType *eventStatusRecPtr;
imask_t state = McuE_EnterCriticalSection();
// Lookup event ID
- for (i = 0; (eventStatusBuffer[i].eventId != eventParam->EventID) && (i < DEM_MAX_NUMBER_EVENT); i++);
+ lookupEventStatusRec(eventParam->EventID, &eventStatusRecPtr);
- if ((i == DEM_MAX_NUMBER_EVENT) && (createIfNotExist)) {
+ if ((eventStatusRecPtr == NULL) && (createIfNotExist)) {
// Search for free position
- for (i = 0; (eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) && (i < DEM_MAX_NUMBER_EVENT); i++);
+ lookupEventStatusRec(DEM_EVENT_ID_NULL, &eventStatusRecPtr);
- if (i < DEM_MAX_NUMBER_EVENT) {
+ if (eventStatusRecPtr != NULL) {
// Create new event record
- eventStatusBuffer[i].eventId = eventParam->EventID;
- eventStatusBuffer[i].occurrence = 0;
- eventStatusBuffer[i].eventStatus = DEM_EVENT_STATUS_PASSED;
- eventStatusBuffer[i].eventStatusChanged = FALSE;
- eventStatusBuffer[i].operationCycleId = eventParam->EventClass->OperationCycleRef;
- eventStatusBuffer[i].eventStatusExtended = DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE;
+ eventStatusRecPtr->eventId = eventParam->EventID;
+ eventStatusRecPtr->eventParamRef = eventParam;
+ eventStatusRecPtr->occurrence = 0;
+ eventStatusRecPtr->eventStatus = DEM_EVENT_STATUS_PASSED;
+ eventStatusRecPtr->eventStatusChanged = FALSE;
+ eventStatusRecPtr->eventStatusExtended = DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE;
}
else {
// Error: Event status buffer full
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_UPDATE_EVENT_STATUS_ID, DEM_E_EVENT_STATUS_BUFF_FULL);
+#endif
}
}
- if (i < DEM_MAX_NUMBER_EVENT) {
+ if (eventStatusRecPtr != NULL) {
// Update event record
- eventStatusBuffer[i].eventStatusExtended &= ~(DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE);
+ eventStatusRecPtr->eventStatusExtended &= ~(DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE);
if (eventStatus == DEM_EVENT_STATUS_FAILED) {
- eventStatusBuffer[i].eventStatusExtended |= (DEM_TEST_FAILED | DEM_TEST_FAILED_THIS_OPERATION_CYCLE | DEM_TEST_FAILED_SINCE_LAST_CLEAR);
- if (eventStatusBuffer[i].eventStatus != eventStatus) {
- eventStatusBuffer[i].occurrence++;
+ eventStatusRecPtr->eventStatusExtended |= (DEM_TEST_FAILED | DEM_TEST_FAILED_THIS_OPERATION_CYCLE | DEM_TEST_FAILED_SINCE_LAST_CLEAR | DEM_PENDING_DTC);
+ if (eventStatusRecPtr->eventStatus != eventStatus) {
+ eventStatusRecPtr->occurrence++;
}
}
if (eventStatus == DEM_EVENT_STATUS_PASSED) {
- eventStatusBuffer[i].eventStatusExtended &= ~DEM_TEST_FAILED;
+ eventStatusRecPtr->eventStatusExtended &= ~DEM_TEST_FAILED;
}
- if (eventStatusBuffer[i].eventStatus != eventStatus) {
- eventStatusBuffer[i].eventStatus = eventStatus;
- eventStatusBuffer[i].eventStatusChanged = TRUE;
+ if (eventStatusRecPtr->eventStatus != eventStatus) {
+ eventStatusRecPtr->eventStatus = eventStatus;
+ eventStatusRecPtr->eventStatusChanged = TRUE;
}
else {
- eventStatusBuffer[i].eventStatusChanged = FALSE;
+ eventStatusRecPtr->eventStatusChanged = FALSE;
}
// Copy the record
- memcpy(eventStatusRec, &eventStatusBuffer[i], sizeof(EventStatusRecType));
+ memcpy(eventStatusRec, eventStatusRecPtr, sizeof(EventStatusRecType));
}
else {
// Copy an empty record to return data
eventStatusRec->eventId = DEM_EVENT_ID_NULL;
eventStatusRec->eventStatus = DEM_EVENT_STATUS_PASSED;
eventStatusRec->occurrence = 0;
- eventStatusBuffer[i].eventStatusChanged = FALSE;
- eventStatusBuffer[i].eventStatusExtended = DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE | DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR;
+ eventStatusRec->eventStatusChanged = FALSE;
+ eventStatusRec->eventStatusExtended = DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE | DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR;
}
-
McuE_ExitCriticalSection(state);
}
*/
void mergeEventStatusRec(EventRecType *eventRec)
{
- uint16 i;
+ EventStatusRecType *eventStatusRecPtr;
imask_t state = McuE_EnterCriticalSection();
// Lookup event ID
- for (i = 0; (eventStatusBuffer[i].eventId != eventRec->eventId) && (i < DEM_MAX_NUMBER_EVENT); i++);
+ lookupEventStatusRec(eventRec->eventId, &eventStatusRecPtr);
- if (i < DEM_MAX_NUMBER_EVENT) {
+ if (eventStatusRecPtr != NULL) {
// Update occurrence counter, rest of pre init state is kept.
- eventStatusBuffer[i].occurrence += eventRec->occurrence;
+ eventStatusRecPtr->occurrence += eventRec->occurrence;
}
else {
// Search for free position
- for (i = 0; (eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) && (i < DEM_MAX_NUMBER_EVENT); i++);
+ lookupEventStatusRec(DEM_EVENT_ID_NULL, &eventStatusRecPtr);
- if (i < DEM_MAX_NUMBER_EVENT) {
+ if (eventStatusRecPtr != NULL) {
// Create new event, from stored event
- eventStatusBuffer[i].eventId = eventRec->eventId;
- eventStatusBuffer[i].occurrence = eventRec->occurrence;
- eventStatusBuffer[i].eventStatus = DEM_EVENT_STATUS_PASSED;
- eventStatusBuffer[i].eventStatusChanged = FALSE;
+ eventStatusRecPtr->eventId = eventRec->eventId;
+ lookupEventIdParameter(eventRec->eventId, &eventStatusRecPtr->eventParamRef);
+ eventStatusRecPtr->occurrence = eventRec->occurrence;
+ eventStatusRecPtr->eventStatus = DEM_EVENT_STATUS_PASSED;
+ eventStatusRecPtr->eventStatusChanged = FALSE;
+ eventStatusRecPtr->eventStatusExtended = DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE | DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR;
}
else {
// Error: Event status buffer full
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_MERGE_EVENT_STATUS_ID, DEM_E_EVENT_STATUS_BUFF_FULL);
+#endif
}
}
McuE_ExitCriticalSection(state);
}
+
+/*
+ * Procedure: deleteEventStatusRec
+ * Description: Delete the status record of "eventParam->eventId" from "eventStatusBuffer".
+ */
+void deleteEventStatusRec(const Dem_EventParameterType *eventParam)
+{
+ EventStatusRecType *eventStatusRecPtr;
+ imask_t state = McuE_EnterCriticalSection();
+
+ // Lookup event ID
+ lookupEventStatusRec(eventParam->EventID, &eventStatusRecPtr);
+
+ if (eventStatusRecPtr != NULL) {
+ // Delete event record
+ memset(eventStatusRecPtr, 0, sizeof(EventStatusRecType));
+ }
+
+ McuE_ExitCriticalSection(state);
+}
+
+
/*
* Procedure: getEventStatusRec
* Description: Returns the status record of "eventId" in "eventStatusRec"
*/
void getEventStatusRec(Dem_EventIdType eventId, EventStatusRecType *eventStatusRec)
{
- uint16 i;
+ EventStatusRecType *eventStatusRecPtr;
+
// Lookup event ID
- for (i = 0; (eventStatusBuffer[i].eventId != eventId) && (i < DEM_MAX_NUMBER_EVENT); i++);
+ lookupEventStatusRec(eventId, &eventStatusRecPtr);
- if (i < DEM_MAX_NUMBER_EVENT) {
+ if (eventStatusRecPtr != NULL) {
// Copy the record
- memcpy(eventStatusRec, &eventStatusBuffer[i], sizeof(EventStatusRecType));
+ memcpy(eventStatusRec, eventStatusRecPtr, sizeof(EventStatusRecType));
}
else {
eventStatusRec->eventId = DEM_EVENT_ID_NULL;
/*
- * Procedure: lookupEventIdParameter
- * Description: Returns the pointer to event id parameters of "eventId" in "*eventIdParam",
- * if not found NULL is returned.
+ * Procedure: lookupDtcEvent
+ * Description: Returns TRUE if the DTC was found and "eventStatusRec" points
+ * to the event record found.
*/
-void lookupEventIdParameter(Dem_EventIdType eventId, const Dem_EventParameterType **const eventIdParam)
+boolean lookupDtcEvent(uint32 dtc, EventStatusRecType **eventStatusRec)
{
+ boolean dtcFound = FALSE;
uint16 i;
- *eventIdParam = NULL;
- // Lookup the correct event id parameters
- for (i = 0; !configSet->EventParameter[i].Arc_EOL; i++) {
- if (configSet->EventParameter[i].EventID == eventId) {
- *eventIdParam = &configSet->EventParameter[i];
- return;
+ *eventStatusRec = NULL;
+
+ for (i = 0; (i < DEM_MAX_NUMBER_EVENT) && !dtcFound; i++) {
+ if (eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) {
+ if (eventStatusBuffer[i].eventParamRef->DTCClassRef != NULL) {
+
+ // Check DTC
+ if (eventStatusBuffer[i].eventParamRef->DTCClassRef->DTC == dtc) {
+ *eventStatusRec = &eventStatusBuffer[i];
+ dtcFound = TRUE;
+ }
+ }
+ }
+ }
+
+ return dtcFound;
+}
+
+
+/*
+ * Procedure: matchEventWithDtcFilter
+ * Description: Returns TRUE if the event pointed by "event" fulfill
+ * the "dtcFilter" global filter settings.
+ */
+boolean matchEventWithDtcFilter(const EventStatusRecType *eventRec)
+{
+ boolean dtcMatch = FALSE;
+
+ // Check status
+ if ((dtcFilter.dtcStatusMask == DEM_DTC_STATUS_MASK_ALL) || (eventRec->eventStatusExtended & dtcFilter.dtcStatusMask)) {
+ if (eventRec->eventParamRef != NULL) {
+
+ // Check dtcKind
+ if (checkDtcKind(dtcFilter.dtcKind, eventRec->eventParamRef)) {
+
+ // Check dtcOrigin
+ if (checkDtcOrigin(dtcFilter.dtcOrigin, eventRec->eventParamRef)) {
+
+ // Check severity
+ if ((dtcFilter.filterWithSeverity == DEM_FILTER_WITH_SEVERITY_NO)
+ || ((dtcFilter.filterWithSeverity == DEM_FILTER_WITH_SEVERITY_YES) && checkDtcSeverityMask(dtcFilter.dtcSeverityMask, eventRec->eventParamRef))) {
+
+ // Check fault detection counter
+ if ((dtcFilter.filterForFaultDetectionCounter == DEM_FILTER_FOR_FDC_NO)
+ || ((dtcFilter.filterWithSeverity == DEM_FILTER_FOR_FDC_YES) && checkDtcFaultDetectionCounter(eventRec->eventParamRef))) {
+ dtcMatch = TRUE;
+ }
+ }
+ }
+ }
}
}
- // Id not found return with NULL pointer
+
+ return dtcMatch;
}
void getFreezeFrameData(const Dem_EventParameterType *eventParam, FreezeFrameRecType *freezeFrame)
{
// TODO: Fill out
+ freezeFrame->eventId = DEM_EVENT_ID_NULL; // Not supported yet
}
// TODO: Fill out
}
+
/*
* Procedure: getExtendedData
* Description: Collects the extended data according to "eventParam" and return it in "extData",
uint16 recordSize;
// Clear ext data record
- setZero(extData, sizeof(ExtDataRecType));
+ memset(extData, 0, sizeof(ExtDataRecType));
// Check if any pointer to extended data class
if (eventParam->ExtendedDataClassRef != NULL) {
callbackReturnCode = eventParam->ExtendedDataClassRef->ExtendedDataRecordClassRef[i]->CallbackGetExtDataRecord(&extData->data[storeIndex]);
if (callbackReturnCode != E_OK) {
// Callback data currently not available, clear space.
- setZero(&extData->data[storeIndex], recordSize);
+ memset(&extData->data[storeIndex], 0xFF, recordSize);
}
storeIndex += recordSize;
}
else {
// Error: Size of extended data record is bigger than reserved space.
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_GET_EXTENDED_DATA_ID, DEM_E_EXT_DATA_TO_BIG);
+#endif
break; // Break the loop
}
}
/*
* Procedure: storeExtendedDataPreInit
- * Description: Store the extended data pointed by "extendedData" to the "preInitExtDataBuffer"
+ * Description: Store the extended data pointed by "extendedData" to the "preInitExtDataBuffer",
+ * if non existent a new entry is created.
*/
void storeExtendedDataPreInit(const Dem_EventParameterType *eventParam, ExtDataRecType *extendedData)
{
uint16 i;
imask_t state = McuE_EnterCriticalSection();
- // Lookup first free position
- for (i = 0; (preInitExtDataBuffer[i].eventId !=0) && (i<DEM_MAX_NUMBER_EXT_DATA_PRE_INIT); i++);
+ // Check if already stored
+ for (i = 0; (preInitExtDataBuffer[i].eventId != eventParam->EventID) && (i<DEM_MAX_NUMBER_EXT_DATA_PRE_INIT); i++);
if (i < DEM_MAX_NUMBER_EXT_DATA_PRE_INIT) {
+ // Yes, overwrite existing
memcpy(&preInitExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));
}
else {
- // Error: Pre init extended data buffer full
- Det_ReportError(MODULE_ID_DEM, 0, DEM_STORE_EXT_DATA_PRE_INIT_ID, DEM_E_PRE_INIT_EXT_DATA_BUFF_FULL);
+ // No, lookup first free position
+ for (i = 0; (preInitExtDataBuffer[i].eventId !=0) && (i<DEM_MAX_NUMBER_EXT_DATA_PRE_INIT); i++);
+
+ if (i < DEM_MAX_NUMBER_EXT_DATA_PRE_INIT) {
+ memcpy(&preInitExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));
+ }
+ else {
+ // Error: Pre init extended data buffer full
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
+ Det_ReportError(MODULE_ID_DEM, 0, DEM_STORE_EXT_DATA_PRE_INIT_ID, DEM_E_PRE_INIT_EXT_DATA_BUFF_FULL);
+#endif
+ }
}
McuE_ExitCriticalSection(state);
}
else {
// Error: Pri mem event buffer full
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_STORE_EVENT_PRI_MEM_ID, DEM_E_PRI_MEM_EVENT_BUFF_FULL);
+#endif
}
}
}
+/*
+ * Procedure: deleteEventPriMem
+ * Description: Delete the event data of "eventParam->eventId" from "priMemEventBuffer".
+ */
+void deleteEventPriMem(const Dem_EventParameterType *eventParam)
+{
+ uint16 i;
+ imask_t state = McuE_EnterCriticalSection();
+
+
+ // Lookup event ID
+ for (i = 0; (priMemEventBuffer[i].eventId != eventParam->EventID) && (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI); i++);
+
+ if (i < DEM_MAX_NUMBER_EVENT_ENTRY_PRI) {
+ // Delete event found
+ memset(&priMemEventBuffer[i], 0, sizeof(EventRecType));
+ }
+
+ McuE_ExitCriticalSection(state);
+}
+
+
/*
* Procedure: storeEventEvtMem
* Description: Store the event data of "eventStatus->eventId" in event memory according to
case DEM_DTC_ORIGIN_PERMANENT_MEMORY:
case DEM_DTC_ORIGIN_MIRROR_MEMORY:
// Not yet supported
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_GLOBAL_ID, DEM_E_NOT_IMPLEMENTED_YET);
+#endif
break;
default:
break;
/*
* Procedure: storeExtendedDataPriMem
- * Description: Creates new an extended data record in "priMemExtDataBuffer".
+ * Description: Store the extended data pointed by "extendedData" to the "priMemExtDataBuffer",
+ * if non existent a new entry is created.
*/
void storeExtendedDataPriMem(const Dem_EventParameterType *eventParam, ExtDataRecType *extendedData)
{
uint16 i;
imask_t state = McuE_EnterCriticalSection();
- // Lookup first free position
- for (i = 0; (priMemExtDataBuffer[i].eventId != DEM_EVENT_ID_NULL) && (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);
+ // Check if already stored
+ for (i = 0; (priMemExtDataBuffer[i].eventId != eventParam->EventID) && (i<DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);
+
if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {
+ // Yes, overwrite existing
memcpy(&priMemExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));
}
else {
- // Error: Pri mem extended data buffer full
- Det_ReportError(MODULE_ID_DEM, 0, DEM_STORE_EXT_DATA_PRI_MEM_ID, DEM_E_PRI_MEM_EXT_DATA_BUFF_FULL);
+ // No, lookup first free position
+ for (i = 0; (priMemExtDataBuffer[i].eventId != DEM_EVENT_ID_NULL) && (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);
+ if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {
+ memcpy(&priMemExtDataBuffer[i], extendedData, sizeof(ExtDataRecType));
+ }
+ else {
+ // Error: Pri mem extended data buffer full
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
+ Det_ReportError(MODULE_ID_DEM, 0, DEM_STORE_EXT_DATA_PRI_MEM_ID, DEM_E_PRI_MEM_EXT_DATA_BUFF_FULL);
+#endif
+ }
+ }
+
+ McuE_ExitCriticalSection(state);
+}
+
+
+/*
+ * Procedure: deleteExtendedDataPriMem
+ * Description: Delete the extended data of "eventParam->eventId" from "priMemExtDataBuffer".
+ */
+void deleteExtendedDataPriMem(const Dem_EventParameterType *eventParam)
+{
+ uint16 i;
+ imask_t state = McuE_EnterCriticalSection();
+
+ // Check if already stored
+ for (i = 0; (priMemExtDataBuffer[i].eventId != eventParam->EventID) && (i<DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);
+
+ if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {
+ // Yes, clear record
+ memset(&priMemExtDataBuffer[i], 0, sizeof(ExtDataRecType));
}
McuE_ExitCriticalSection(state);
case DEM_DTC_ORIGIN_PERMANENT_MEMORY:
case DEM_DTC_ORIGIN_MIRROR_MEMORY:
// Not yet supported
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_GLOBAL_ID, DEM_E_NOT_IMPLEMENTED_YET);
+#endif
break;
+
default:
break;
}
}
+/*
+ * Procedure: lookupExtendedDataRecNumParam
+ * Description: Returns TRUE if the requested extended data number was found among the configured records for the event.
+ * "extDataRecClassPtr" returns a pointer to the record class, "posInExtData" returns the position in stored extended data.
+ */
+boolean lookupExtendedDataRecNumParam(uint8 extendedDataNumber, const Dem_EventParameterType *eventParam, Dem_ExtendedDataRecordClassType const **extDataRecClassPtr, uint8 *posInExtData)
+{
+ boolean recNumFound = FALSE;
+
+ if (eventParam->ExtendedDataClassRef != NULL) {
+ Dem_ExtendedDataRecordClassType const* const* extDataRecClassRefList = eventParam->ExtendedDataClassRef->ExtendedDataRecordClassRef;
+ uint16 byteCnt = 0;
+ uint16 i;
+
+ // Request extended data and copy it to the buffer
+ for (i = 0; (i < DEM_MAX_NR_OF_RECORDS_IN_EXTENDED_DATA) && (extDataRecClassRefList[i] != NULL) && !recNumFound; i++) {
+ if (extDataRecClassRefList[i]->RecordNumber == extendedDataNumber) {
+ *extDataRecClassPtr = extDataRecClassRefList[i];
+ *posInExtData = byteCnt;
+ recNumFound = TRUE;
+ }
+ byteCnt += extDataRecClassRefList[i]->DataSize;
+ }
+ }
+
+ return recNumFound;
+}
+
+
+/*
+ * Procedure: lookupExtendedDataPriMem
+ * Description: Returns TRUE if the requested event id is found, "extData" points to the found data.
+ */
+boolean lookupExtendedDataPriMem(Dem_EventIdType eventId, ExtDataRecType **extData)
+{
+ boolean eventIdFound = FALSE;
+ uint16 i;
+
+ // Lookup corresponding extended data
+ for (i = 0; (priMemExtDataBuffer[i].eventId != eventId) && (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM); i++);
+
+ if (i < DEM_MAX_NUMBER_EXT_DATA_PRI_MEM) {
+ // Yes, return pointer
+ *extData = &priMemExtDataBuffer[i];
+ eventIdFound = TRUE;
+ }
+
+ return eventIdFound;
+}
+
+
void storeFreezeFrameDataPriMem(const Dem_EventParameterType *eventParam, FreezeFrameRecType *freezeFrame)
{
// TODO: Fill out
}
+void deleteFreezeFrameDataPriMem(const Dem_EventParameterType *eventParam)
+{
+ // TODO: Fill out
+}
+
+
/*
* Procedure: storeFreezeFrameDataEvtMem
* Description: Store the freeze frame data in event memory according to
case DEM_DTC_ORIGIN_PERMANENT_MEMORY:
case DEM_DTC_ORIGIN_MIRROR_MEMORY:
// Not yet supported
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_GLOBAL_ID, DEM_E_NOT_IMPLEMENTED_YET);
+#endif
break;
default:
break;
if (eventStatusLocal.eventStatus == DEM_EVENT_STATUS_FAILED) {
// Collect freeze frame data
getFreezeFrameData(eventParam, &freezeFrameLocal);
- storeFreezeFrameDataPreInit(eventParam, &freezeFrameLocal);
+ if (freezeFrameLocal.eventId != DEM_EVENT_ID_NULL) {
+ storeFreezeFrameDataPreInit(eventParam, &freezeFrameLocal);
+ }
- // Check if first time -> store extended data
- if (eventStatusLocal.occurrence == 1) {
- // Collect extended data
- getExtendedData(eventParam, &extendedDataLocal);
- if (extendedDataLocal.eventId != DEM_EVENT_ID_NULL)
- {
- storeExtendedDataPreInit(eventParam, &extendedDataLocal);
- }
+ // Collect extended data
+ getExtendedData(eventParam, &extendedDataLocal);
+ if (extendedDataLocal.eventId != DEM_EVENT_ID_NULL) {
+ storeExtendedDataPreInit(eventParam, &extendedDataLocal);
}
}
}
if (eventParam != NULL) {
if (eventParam->EventClass->OperationCycleRef < DEM_OPERATION_CYCLE_ID_ENDMARK) {
if (operationCycleStateList[eventParam->EventClass->OperationCycleRef] == DEM_CYCLE_STATE_START) {
- updateEventStatusRec(eventParam, eventStatus, TRUE, &eventStatusLocal);
-
- if (eventStatusLocal.eventStatusChanged) {
-
- if (eventStatusLocal.eventStatus == DEM_EVENT_STATUS_FAILED) {
- storeEventEvtMem(eventParam, &eventStatusLocal);
- // Collect freeze frame data
- getFreezeFrameData(eventParam, &freezeFrameLocal);
- storeFreezeFrameDataEvtMem(eventParam, &freezeFrameLocal);
+ if (!(disableDtcStorage.storageDisabled && checkDtcGroup(disableDtcStorage.dtcGroup, eventParam) && checkDtcKind(disableDtcStorage.dtcKind, eventParam))) {
+ updateEventStatusRec(eventParam, eventStatus, TRUE, &eventStatusLocal);
+ if (eventStatusLocal.eventStatusChanged) {
+ if (eventStatusLocal.eventStatus == DEM_EVENT_STATUS_FAILED) {
+ storeEventEvtMem(eventParam, &eventStatusLocal);
+ // Collect freeze frame data
+ getFreezeFrameData(eventParam, &freezeFrameLocal);
+ if (freezeFrameLocal.eventId != DEM_EVENT_ID_NULL) {
+ storeFreezeFrameDataEvtMem(eventParam, &freezeFrameLocal);
+ }
- // Check if first time -> store extended data
- if (eventStatusLocal.occurrence == 1) {
// Collect extended data
getExtendedData(eventParam, &extendedDataLocal);
if (extendedDataLocal.eventId != DEM_EVENT_ID_NULL)
}
}
+
/*
* Procedure: getEventFailed
* Description: Returns the TRUE or FALSE of "eventId" in "eventFailed" depending on current status.
}
}
+
/*
* Procedure: getEventTested
* Description: Returns the TRUE or FALSE of "eventId" in "eventTested" depending on
}
}
+
/*
* Procedure: getFaultDetectionCounter
* Description: Returns pre debounce counter of "eventId" in "counter" and return value E_OK if
- * the counter was available else E_NOT_OK.
+ * the counter was available else E_NOT_OK.
*/
Std_ReturnType getFaultDetectionCounter(Dem_EventIdType eventId, sint8 *counter)
{
{
case DEM_NO_PRE_DEBOUNCE:
if (eventParam->EventClass->PreDebounceAlgorithmClass->PreDebounceAlgorithm.PreDebounceMonitorInternal != NULL) {
- returnCode = eventParam->EventClass->PreDebounceAlgorithmClass->PreDebounceAlgorithm.PreDebounceMonitorInternal->CallbackGetFDCnt(counter);
+ returnCode = eventParam->EventClass->PreDebounceAlgorithmClass->PreDebounceAlgorithm.PreDebounceMonitorInternal->CallbackGetFDCntFnc(counter);
}
break;
return returnCode;
}
+
/*
* Procedure: setOperationCycleState
* Description: Change the operation state of "operationCycleId" to "cycleState" and updates stored
operationCycleStateList[operationCycleId] = cycleState;
// Lookup event ID
for (i = 0; i < DEM_MAX_NUMBER_EVENT; i++) {
- if ((eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) && (eventStatusBuffer[i].operationCycleId == operationCycleId)) {
+ if ((eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) && (eventStatusBuffer[i].eventParamRef->EventClass->OperationCycleRef == operationCycleId)) {
eventStatusBuffer[i].eventStatusExtended &= ~DEM_TEST_FAILED_THIS_OPERATION_CYCLE;
eventStatusBuffer[i].eventStatusExtended |= DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE;
}
case DEM_CYCLE_STATE_END:
operationCycleStateList[operationCycleId] = cycleState;
+ // Lookup event ID
+ for (i = 0; i < DEM_MAX_NUMBER_EVENT; i++) {
+ if ((eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) && (eventStatusBuffer[i].eventParamRef->EventClass->OperationCycleRef == operationCycleId)) {
+ if (!(eventStatusBuffer[i].eventStatusExtended & DEM_TEST_FAILED_THIS_OPERATION_CYCLE) && !(eventStatusBuffer[i].eventStatusExtended & DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE)) {
+ eventStatusBuffer[i].eventStatusExtended &= ~DEM_PENDING_DTC; // Clear pendingDTC bit
+ }
+ }
+ }
break;
default:
#if (DEM_DEV_ERROR_DETECT == STD_ON)
return returnCode;
}
+
//==============================================================================//
// //
// E X T E R N A L F U N C T I O N S //
int i, j;
if (DEM_Config.ConfigSet == NULL) {
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_PREINIT_ID, DEM_E_CONFIG_PTR_INVALID);
+#endif
return;
} else {
configSet = DEM_Config.ConfigSet;
eventStatusBuffer[i].eventStatusChanged = FALSE;
}
+ // Initialize the pre init buffers
for (i = 0; i < DEM_MAX_NUMBER_FF_DATA_PRE_INIT; i++) {
preInitFreezeFrameBuffer[i].checksum = 0;
preInitFreezeFrameBuffer[i].eventId = DEM_EVENT_ID_NULL;
preInitExtDataBuffer[i].data[j] = 0;
}
+ disableDtcStorage.storageDisabled = FALSE;
+
setOperationCycleState(DEM_ACTIVE, DEM_CYCLE_STATE_START);
demState = DEM_PREINITIALIZED;
{
uint16 i;
ChecksumType cSum;
- EventStatusRecType eventStatusLocal;
const Dem_EventParameterType *eventParam;
/*
for (i = 0; i < DEM_MAX_NUMBER_EVENT_PRI_MEM; i++) {
cSum = calcChecksum(&priMemEventBuffer[i], sizeof(EventRecType)-sizeof(ChecksumType));
if ((cSum != priMemEventBuffer[i].checksum) || priMemEventBuffer[i].eventId == DEM_EVENT_ID_NULL) {
- // Not valid, clear the record
- setZero(&priMemEventBuffer[i], sizeof(EventRecType));
+ // Unlegal record, clear the record
+ memset(&priMemEventBuffer[i], 0, sizeof(EventRecType));
}
else {
// Valid, update current status
cSum = calcChecksum(&priMemExtDataBuffer[i], sizeof(ExtDataRecType)-sizeof(ChecksumType));
if ((cSum != priMemExtDataBuffer[i].checksum) || priMemExtDataBuffer[i].eventId == DEM_EVENT_ID_NULL) {
// Unlegal record, clear the record
- setZero(&priMemExtDataBuffer[i], sizeof(ExtDataRecType));
+ memset(&priMemExtDataBuffer[i], 0, sizeof(ExtDataRecType));
}
}
for (i = 0; i < DEM_MAX_NUMBER_FF_DATA_PRI_MEM; i++) {
cSum = calcChecksum(&priMemFreezeFrameBuffer[i], sizeof(FreezeFrameRecType)-sizeof(ChecksumType));
if ((cSum != priMemFreezeFrameBuffer[i].checksum) || (priMemFreezeFrameBuffer[i].eventId == DEM_EVENT_ID_NULL)) {
- // Wrong checksum, clear the record
- setZero(&priMemFreezeFrameBuffer[i], sizeof(FreezeFrameRecType));
+ // Unlegal record, clear the record
+ memset(&priMemFreezeFrameBuffer[i], 0, sizeof(FreezeFrameRecType));
}
}
// Transfer extended data to event memory if necessary
for (i = 0; i < DEM_MAX_NUMBER_EXT_DATA_PRE_INIT; i++) {
if (preInitExtDataBuffer[i].eventId != DEM_EVENT_ID_NULL) {
- getEventStatusRec(preInitExtDataBuffer[i].eventId, &eventStatusLocal);
- // Check if new or old error event
- if (eventStatusLocal.occurrence == 1) {
- // It has not been stored before so store it.
- lookupEventIdParameter(preInitExtDataBuffer[i].eventId, &eventParam);
- storeExtendedDataEvtMem(eventParam, &preInitExtDataBuffer[i]);
- }
+ lookupEventIdParameter(preInitExtDataBuffer[i].eventId, &eventParam);
+ storeExtendedDataEvtMem(eventParam, &preInitExtDataBuffer[i]);
}
}
}
}
+ // Init the dtc filter
+ dtcFilter.dtcStatusMask = DEM_DTC_STATUS_MASK_ALL; // All allowed
+ dtcFilter.dtcKind = DEM_DTC_KIND_ALL_DTCS; // All kinds of DTCs
+ dtcFilter.dtcOrigin = DEM_DTC_ORIGIN_PRIMARY_MEMORY; // Primary memory
+ dtcFilter.filterWithSeverity = DEM_FILTER_WITH_SEVERITY_NO; // No Severity filtering
+ dtcFilter.dtcSeverityMask = DEM_SEVERITY_NO_SEVERITY; // Not used when filterWithSeverity is FALSE
+ dtcFilter.filterForFaultDetectionCounter = DEM_FILTER_FOR_FDC_NO; // No fault detection counter filtering
+
+ dtcFilter.faultIndex = DEM_MAX_NUMBER_EVENT;
+
+ disableDtcStorage.storageDisabled = FALSE;
+
demState = DEM_INITIALIZED;
}
{
#if (DEM_DEV_ERROR_DETECT == STD_ON)
Det_ReportError(MODULE_ID_DEM, 0, DEM_SETEVENTSTATUS_ID, DEM_E_UNINIT);
- returnCode = E_NOT_OK;
#endif
+ returnCode = E_NOT_OK;
}
return returnCode;
}
+/*
+ * Procedure: Dem_GetEventStatus
+ * Reentrant: Yes
+ */
Std_ReturnType Dem_GetEventStatus(Dem_EventIdType eventId, Dem_EventStatusExtendedType *eventStatusExtended)
{
Std_ReturnType returnCode = E_OK;
}
+/*
+ * Procedure: Dem_GetEventFailed
+ * Reentrant: Yes
+ */
Std_ReturnType Dem_GetEventFailed(Dem_EventIdType eventId, boolean *eventFailed)
{
Std_ReturnType returnCode = E_OK;
}
+/*
+ * Procedure: Dem_GetEventTested
+ * Reentrant: Yes
+ */
Std_ReturnType Dem_GetEventTested(Dem_EventIdType eventId, boolean *eventTested)
{
Std_ReturnType returnCode = E_OK;
}
+/*
+ * Procedure: Dem_GetFaultDetectionCounter
+ * Reentrant: No
+ */
Std_ReturnType Dem_GetFaultDetectionCounter(Dem_EventIdType eventId, sint8 *counter)
{
Std_ReturnType returnCode = E_OK;
}
+/*
+ * Procedure: Dem_SetOperationCycleState
+ * Reentrant: No
+ */
Std_ReturnType Dem_SetOperationCycleState(Dem_OperationCycleIdType operationCycleId, Dem_OperationCycleStateType cycleState)
{
Std_ReturnType returnCode = E_OK;
}
+/*
+ * Procedure: Dem_GetDTCOfEvent
+ * Reentrant: Yes
+ */
+Std_ReturnType Dem_GetDTCOfEvent(Dem_EventIdType eventId, Dem_DTCKindType dtcKind, uint32* dtcOfEvent)
+{
+ Std_ReturnType returnCode = E_NO_DTC_AVAILABLE;
+ const Dem_EventParameterType *eventParam;
+
+ lookupEventIdParameter(eventId, &eventParam);
+
+ if (eventParam != NULL) {
+ if (checkDtcKind(dtcKind, eventParam)) {
+ if (eventParam->DTCClassRef != NULL) {
+ *dtcOfEvent = eventParam->DTCClassRef->DTC;
+ returnCode = E_OK;
+ }
+ }
+ }
+ else {
+ // Event Id not found
+ returnCode = E_NOT_OK;
+ }
+
+ return returnCode;
+}
+
+
/********************************************
* Interface BSW-Components <-> DEM (8.3.4) *
********************************************/
/*********************************
* Interface DCM <-> DEM (8.3.5) *
*********************************/
+/*
+ * Procedure: Dem_GetDTCStatusAvailabilityMask
+ * Reentrant: No
+ */
+Std_ReturnType Dem_GetDTCStatusAvailabilityMask(uint8 *dtcStatusMask)
+{
+ *dtcStatusMask = DEM_DTC_STATUS_AVAILABILITY_MASK; // User configuration mask
+ *dtcStatusMask &= DEM_TEST_FAILED // Mask with supported bits
+ | DEM_TEST_FAILED_THIS_OPERATION_CYCLE
+ | DEM_PENDING_DTC
+// | DEM_CONFIRMED_DTC TODO: Add support for this bit
+ | DEM_TEST_NOT_COMPLETED_SINCE_LAST_CLEAR
+ | DEM_TEST_FAILED_SINCE_LAST_CLEAR
+ | DEM_TEST_NOT_COMPLETED_THIS_OPERATION_CYCLE
+// | DEM_WARNING_INDICATOR_REQUESTED TODO: Add support for this bit
+ ;
+
+ return E_OK;
+}
+
+
+/*
+ * Procedure: Dem_SetDTCFilter
+ * Reentrant: No
+ */
+Dem_ReturnSetDTCFilterType Dem_SetDTCFilter(uint8 dtcStatusMask,
+ Dem_DTCKindType dtcKind,
+ Dem_DTCOriginType dtcOrigin,
+ Dem_FilterWithSeverityType filterWithSeverity,
+ Dem_DTCSeverityType dtcSeverityMask,
+ Dem_FilterForFDCType filterForFaultDetectionCounter) {
+
+ Dem_ReturnSetDTCFilterType returnCode = DEM_WRONG_FILTER;
+
+ // Check dtcKind parameter
+ if ((dtcKind == DEM_DTC_KIND_ALL_DTCS) || (dtcKind == DEM_DTC_KIND_EMISSION_REL_DTCS)) {
+
+ // Check dtcOrigin parameter
+ if ((dtcOrigin == DEM_DTC_ORIGIN_SECONDARY_MEMORY) || (dtcOrigin == DEM_DTC_ORIGIN_PRIMARY_MEMORY)
+ || (dtcOrigin == DEM_DTC_ORIGIN_PERMANENT_MEMORY) || (dtcOrigin == DEM_DTC_ORIGIN_MIRROR_MEMORY)) {
+
+ // Check filterWithSeverity and dtcSeverityMask parameter
+ if ((filterWithSeverity == DEM_FILTER_WITH_SEVERITY_NO)
+ || ((filterWithSeverity == DEM_FILTER_WITH_SEVERITY_YES) && !(dtcSeverityMask & ~(DEM_SEVERITY_MAINTENANCE_ONLY | DEM_SEVERITY_CHECK_AT_NEXT_FALT | DEM_SEVERITY_CHECK_IMMEDIATELY)))){
+
+ // Check filterForFaultDetectionCounter parameter
+ if ((filterForFaultDetectionCounter == DEM_FILTER_FOR_FDC_YES) || (filterForFaultDetectionCounter == DEM_FILTER_FOR_FDC_NO)) {
+ // Yes all parameters correct, set the new filters.
+ dtcFilter.dtcStatusMask = dtcStatusMask;
+ dtcFilter.dtcKind = dtcKind;
+ dtcFilter.dtcOrigin = dtcOrigin;
+ dtcFilter.filterWithSeverity = filterWithSeverity;
+ dtcFilter.dtcSeverityMask = dtcSeverityMask;
+ dtcFilter.filterForFaultDetectionCounter = filterForFaultDetectionCounter;
+ dtcFilter.faultIndex = DEM_MAX_NUMBER_EVENT;
+ returnCode = DEM_FILTER_ACCEPTED;
+ }
+ }
+ }
+ }
+
+ return returnCode;
+}
+
+
+/*
+ * Procedure: Dem_GetStatusOfDTC
+ * Reentrant: No
+ */
+Dem_ReturnGetStatusOfDTCType Dem_GetStatusOfDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, Dem_EventStatusExtendedType* status) {
+ Dem_ReturnGetStatusOfDTCType returnCode = DEM_STATUS_FAILED;
+ EventStatusRecType *eventRec;
+
+ if (lookupDtcEvent(dtc, &eventRec)) {
+ if (checkDtcKind(dtcKind, eventRec->eventParamRef)) {
+ if (checkDtcOrigin(dtcOrigin,eventRec->eventParamRef)) {
+ *status = eventRec->eventStatusExtended;
+ returnCode = DEM_STATUS_OK;
+ }
+ else {
+ returnCode = DEM_STATUS_WRONG_DTCORIGIN;
+ }
+ }
+ else {
+ returnCode = DEM_STATUS_WRONG_DTCKIND;
+ }
+ }
+ else {
+ returnCode = DEM_STATUS_WRONG_DTC;
+ }
+
+ return returnCode;
+}
+
+
+/*
+ * Procedure: Dem_GetNumberOfFilteredDtc
+ * Reentrant: No
+ */
+Dem_ReturnGetNumberOfFilteredDTCType Dem_GetNumberOfFilteredDtc(uint16 *numberOfFilteredDTC) {
+ uint16 i;
+ uint16 numberOfFaults = 0;
+
+ //Dem_DisableEventStatusUpdate();
+
+ for (i = 0; i < DEM_MAX_NUMBER_EVENT; i++) {
+ if (eventStatusBuffer[i].eventId != DEM_EVENT_ID_NULL) {
+ if (matchEventWithDtcFilter(&eventStatusBuffer[i])) {
+ if (eventStatusBuffer[i].eventParamRef->DTCClassRef != NULL) {
+ numberOfFaults++;
+ }
+ }
+ }
+ }
+
+ //Dem_EnableEventStatusUpdate();
+
+ *numberOfFilteredDTC = numberOfFaults;
+
+ return DEM_NUMBER_OK;
+}
+
+
+/*
+ * Procedure: Dem_GetNextFilteredDTC
+ * Reentrant: No
+ */
+Dem_ReturnGetNextFilteredDTCType Dem_GetNextFilteredDTC(uint32 *dtc, Dem_EventStatusExtendedType *dtcStatus)
+{
+ Dem_ReturnGetNextFilteredDTCType returnCode = DEM_FILTERED_OK;
+ boolean dtcFound = FALSE;
+
+ // TODO: This job should be done in an more advanced way according to Dem288
+ while (!dtcFound && (dtcFilter.faultIndex != 0)) {
+ dtcFilter.faultIndex--;
+ if (eventStatusBuffer[dtcFilter.faultIndex].eventId != DEM_EVENT_ID_NULL) {
+ if (matchEventWithDtcFilter(&eventStatusBuffer[dtcFilter.faultIndex])) {
+ if (eventStatusBuffer[dtcFilter.faultIndex].eventParamRef->DTCClassRef != NULL) {
+ *dtc = eventStatusBuffer[dtcFilter.faultIndex].eventParamRef->DTCClassRef->DTC;
+ *dtcStatus = eventStatusBuffer[dtcFilter.faultIndex].eventStatusExtended;
+ dtcFound = TRUE;
+ }
+ }
+ }
+ }
+
+ if (!dtcFound) {
+ dtcFilter.faultIndex = DEM_MAX_NUMBER_EVENT;
+ returnCode = DEM_FILTERED_NO_MATCHING_DTC;
+ }
+
+ return returnCode;
+}
+
+
+/*
+ * Procedure: Dem_GetTranslationType
+ * Reentrant: No
+ */
+Dem_ReturnTypeOfDtcSupportedType Dem_GetTranslationType(void)
+{
+ return DEM_TYPE_OF_DTC_SUPPORTED;
+}
+
+
+/*
+ * Procedure: Dem_ClearDTC
+ * Reentrant: No
+ */
+Dem_ReturnClearDTCType Dem_ClearDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin)
+{
+ Dem_ReturnClearDTCType returnCode = DEM_CLEAR_OK;
+ Dem_EventIdType eventId;
+ const Dem_EventParameterType *eventParam;
+ uint16 i, j;
+
+ // Loop through the event buffer
+ for (i = 0; i < DEM_MAX_NUMBER_EVENT; i++) {
+ eventId = eventStatusBuffer[i].eventId;
+ if (eventId != DEM_EVENT_ID_NULL) {
+ eventParam = eventStatusBuffer[i].eventParamRef;
+ if (eventParam != NULL) {
+ if (DEM_CLEAR_ALL_EVENTS | (eventParam->DTCClassRef != NULL)) {
+ if (checkDtcKind(dtcKind, eventParam)) {
+ if (checkDtcGroup(dtc, eventParam)) {
+ for (j = 0; (j < DEM_MAX_NR_OF_EVENT_DESTINATION) && (eventParam->EventClass->EventDestination[j] != dtcOrigin); j++);
+ if (j < DEM_MAX_NR_OF_EVENT_DESTINATION) {
+ // Yes! All conditions met.
+ switch (dtcOrigin)
+ {
+ case DEM_DTC_ORIGIN_PRIMARY_MEMORY:
+ deleteEventPriMem(eventParam);
+ deleteFreezeFrameDataPriMem(eventParam);
+ deleteExtendedDataPriMem(eventParam);
+ deleteEventStatusRec(eventParam); // TODO: Shall this be done or just resetting the status?
+ break;
+
+ case DEM_DTC_ORIGIN_SECONDARY_MEMORY:
+ case DEM_DTC_ORIGIN_PERMANENT_MEMORY:
+ case DEM_DTC_ORIGIN_MIRROR_MEMORY:
+ // Not yet supported
+ returnCode = DEM_CLEAR_WRONG_DTCORIGIN;
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
+ Det_ReportError(MODULE_ID_DEM, 0, DEM_CLEARDTC_ID, DEM_E_NOT_IMPLEMENTED_YET);
+#endif
+ break;
+ default:
+ returnCode = DEM_CLEAR_WRONG_DTCORIGIN;
+ break;
+ }
+ }
+ }
+ }
+ }
+ }
+ else {
+ // Fatal error, no event parameters found for the stored event!
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
+ Det_ReportError(MODULE_ID_DEM, 0, DEM_CLEARDTC_ID, DEM_E_UNEXPECTED_EXECUTION);
+#endif
+ }
+ }
+ }
+
+ return returnCode;
+}
+
+
+/*
+ * Procedure: Dem_DisableDTCStorage
+ * Reentrant: No
+ */
+Dem_ReturnControlDTCStorageType Dem_DisableDTCStorage(Dem_DTCGroupType dtcGroup, Dem_DTCKindType dtcKind)
+{
+ Dem_ReturnControlDTCStorageType returnCode = DEM_CONTROL_DTC_STORAGE_N_OK;
+
+ // Check dtcGroup parameter
+ if (dtcGroup == DEM_DTC_GROUP_ALL_DTCS) {
+ // Check dtcKind parameter
+ if ((dtcKind == DEM_DTC_KIND_ALL_DTCS) || (dtcKind == DEM_DTC_KIND_EMISSION_REL_DTCS)) {
+ disableDtcStorage.dtcGroup = dtcGroup;
+ disableDtcStorage.dtcKind = dtcKind;
+ disableDtcStorage.storageDisabled = TRUE;
+
+ returnCode = DEM_CONTROL_DTC_STORAGE_OK;
+ }
+ }
+ else {
+ returnCode = DEM_CONTROL_DTC_WRONG_DTCGROUP;
+ }
+
+ return returnCode;
+}
+
+
+/*
+ * Procedure: Dem_EnableDTCStorage
+ * Reentrant: No
+ */
+Dem_ReturnControlDTCStorageType Dem_EnableDTCStorage(Dem_DTCGroupType dtcGroup, Dem_DTCKindType dtcKind)
+{
+ // TODO: Behavior is not defined if group or kind do not match active settings, therefore the filter is just switched off.
+ disableDtcStorage.storageDisabled = FALSE;
+
+ return DEM_CONTROL_DTC_STORAGE_OK;
+}
+
+/*
+ * Procedure: Dem_GetExtendedDataRecordByDTC
+ * Reentrant: No
+ */
+Dem_ReturnGetExtendedDataRecordByDTCType Dem_GetExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint8 *destBuffer, uint8 *bufSize)
+{
+ Dem_ReturnGetExtendedDataRecordByDTCType returnCode = DEM_RECORD_WRONG_DTC;
+ EventStatusRecType *eventRec;
+ Dem_ExtendedDataRecordClassType const *extendedDataRecordClass = NULL;
+ ExtDataRecType *extData;
+ uint8 posInExtData = 0;
+
+ if (lookupDtcEvent(dtc, &eventRec)) {
+ if (checkDtcKind(dtcKind, eventRec->eventParamRef)) {
+ if (checkDtcOrigin(dtcOrigin, eventRec->eventParamRef)) {
+ if (lookupExtendedDataRecNumParam(extendedDataNumber, eventRec->eventParamRef, &extendedDataRecordClass, &posInExtData)) {
+ if (*bufSize >= extendedDataRecordClass->DataSize) {
+ switch (dtcOrigin)
+ {
+ case DEM_DTC_ORIGIN_PRIMARY_MEMORY:
+ if (lookupExtendedDataPriMem(eventRec->eventId, &extData)) {
+ // Yes all conditions met, copy the extended data record to destination buffer.
+ memcpy(destBuffer, &extData->data[posInExtData], extendedDataRecordClass->DataSize);
+ *bufSize = extendedDataRecordClass->DataSize;
+ returnCode = DEM_RECORD_OK;
+ }
+ else {
+ // The record number is legal but no record was found for the DTC
+ *bufSize = 0;
+ returnCode = DEM_RECORD_OK;
+ }
+ break;
+
+ case DEM_DTC_ORIGIN_SECONDARY_MEMORY:
+ case DEM_DTC_ORIGIN_PERMANENT_MEMORY:
+ case DEM_DTC_ORIGIN_MIRROR_MEMORY:
+ // Not yet supported
+ returnCode = DEM_RECORD_WRONG_DTCORIGIN;
+#if (DEM_DEV_ERROR_DETECT == STD_ON)
+ Det_ReportError(MODULE_ID_DEM, 0, DEM_GETEXTENDEDDATARECORDBYDTC_ID, DEM_E_NOT_IMPLEMENTED_YET);
+#endif
+ break;
+ default:
+ returnCode = DEM_RECORD_WRONG_DTCORIGIN;
+ break;
+ }
+ }
+ else {
+ returnCode = DEM_RECORD_BUFFERSIZE;
+ }
+ }
+ else {
+ returnCode = DEM_RECORD_NUMBER;
+ }
+ }
+ else {
+ returnCode = DEM_RECORD_WRONG_DTCORIGIN;
+ }
+ }
+ else {
+ returnCode = DEM_RECORD_DTCKIND;
+ }
+ }
+
+ return returnCode;
+}
+
+
+/*
+ * Procedure: Dem_GetSizeOfExtendedDataRecordByDTC
+ * Reentrant: No
+ */
+Dem_ReturnGetSizeOfExtendedDataRecordByDTCType Dem_GetSizeOfExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint16 *sizeOfExtendedDataRecord)
+{
+ Dem_ReturnGetExtendedDataRecordByDTCType returnCode = DEM_GET_SIZEOFEDRBYDTC_W_DTC;
+ EventStatusRecType *eventRec;
+ Dem_ExtendedDataRecordClassType const *extendedDataRecordClass = NULL;
+ uint8 posInExtData;
+
+ if (lookupDtcEvent(dtc, &eventRec)) {
+ if (checkDtcKind(dtcKind, eventRec->eventParamRef)) {
+ if (checkDtcOrigin(dtcOrigin, eventRec->eventParamRef)) {
+ if (lookupExtendedDataRecNumParam(extendedDataNumber, eventRec->eventParamRef, &extendedDataRecordClass, &posInExtData)) {
+ *sizeOfExtendedDataRecord = extendedDataRecordClass->DataSize;
+ returnCode = DEM_GET_SIZEOFEDRBYDTC_OK;
+ }
+ else {
+ returnCode = DEM_GET_SIZEOFEDRBYDTC_W_RNUM;
+ }
+ }
+ else {
+ returnCode = DEM_GET_SIZEOFEDRBYDTC_W_DTCOR;
+ }
+ }
+ else {
+ returnCode = DEM_GET_SIZEOFEDRBYDTC_W_DTCKI;
+ }
+ }
+
+ return returnCode;
+}
/***********************************
* OBD-specific Interfaces (8.3.6) *
#define DEM_LCFG_H_
#include "Dem_Types.h"
+#if defined(USE_DCM)
+#include "Dcm_Types.h"
+#endif
/*
typedef Std_ReturnType (*Dem_CallbackDTCStatusChangedFncType)(uint8 DTCStatusOld, uint8 DTCStatusNew);
// DIDServices
-#if 1 // Until DCM is available
-typedef uint8 Dcm_NegativeResponseCodeType;
-#endif
+#if defined(USE_DCM)
typedef Std_ReturnType (*Dem_CallbackConditionCheckReadFncType)(Dcm_NegativeResponseCodeType *Nrc);
typedef Std_ReturnType (*Dem_CallbackReadDataFncType)(uint8 *Data);
typedef Std_ReturnType (*Dem_CallbackReadDataLength)(uint16 *DidLength);
+#else
+typedef Std_ReturnType (*Dem_CallbackConditionCheckReadFncType)(uint8 *Nrc);
+typedef Std_ReturnType (*Dem_CallbackReadDataFncType)(uint8 *Data);
+typedef Std_ReturnType (*Dem_CallbackReadDataLength)(uint16 *DidLength);
+#endif
// GetExtendedDataRecord
typedef Std_ReturnType (*Dem_CallbackGetExtDataRecordFncType)(uint8 *ExtendedDataRecord);
// 10.2.8 DemPidOrDid
typedef struct {
- boolean PidOrDidUsePort; // (1)
+// boolean PidOrDidUsePort; // (1) Not used in current implementation
uint8 PidOrDidSize; // (1)
- uint16 DidIdentifier; // (0..1)
+ const uint16 *DidIdentifier; // (0..1)
Dem_CallbackConditionCheckReadFncType DidConditionCheckReadFnc; // (0..1)
Dem_CallbackReadDataLength DidReadDataLengthFnc; // (0..1)
Dem_CallbackReadDataFncType DidReadFnc; // (0..1)
- uint8 PidIndentifier; // (0..1)
+ const uint8 *PidIndentifier; // (0..1)
Dem_CallbackGetPIDValueFncType PidReadFnc; // (0..1)
+ boolean Arc_EOL;
} Dem_PidOrDidType;
// 10.2.18 DemFreezeFrameClass
typedef struct {
Dem_FreezeFrameKindType FFKind; // (1)
-// uint8 FFRecordNumber; // (1) Optional
-// const Dem_PidOrDidType *FFIdClassRef; // (1..255) Optional?
+ uint8 FFRecordNumber; // (1)
+ const Dem_PidOrDidType *FFIdClassRef; // (1..255)
} Dem_FreezeFrameClassType;
// 10.2.4 DemIndicator
// 10.2.17 DemDTCClass
typedef struct {
uint32 DTC; // (1)
- uint8 DTCFunctionUnit; // (1)
+ uint8 DTCFunctionalUnit; // (1)
Dem_DTCKindType DTCKind; // (1)
const Dem_CallbackDTCStatusChangedType *CallbackDTCStatusChanged; // (0..*)
const Dem_CallbackInitMForFType *CallbackInitMForF; // (0..*)
// Dem_DTCSeverityType DTCSeverity // (0..1) Optional
+ boolean Arc_EOL;
} Dem_DTCClassType;
// 10.2.5 DemCallbackEventStatusChanged
} Dem_IndicatorAttributeType;
typedef struct {
- Dem_CallbackGetFaultDetectionCounterFncType CallbackGetFDCnt; // (1)
+ Dem_CallbackGetFaultDetectionCounterFncType CallbackGetFDCntFnc; // (1)
} Dem_PreDebounceMonitorInternalType;
typedef struct {
union {
const Dem_PreDebounceMonitorInternalType *PreDebounceMonitorInternal; // (0..1)
const Dem_PreDebounceCounterBasedType *PreDebounceCouterBased; // (0..1)
- const Dem_PreDebounceFrequencyBasedType *PreDebounceFrequencyBased; // (0..1)
- const Dem_PreDebounceTimeBasedType *PreDebounceTimeBased; // (0..1)
+ const Dem_PreDebounceFrequencyBasedType *PreDebounceFrequencyBased; // (0..1)
+ const Dem_PreDebounceTimeBasedType *PreDebounceTimeBased; // (0..1)
} PreDebounceAlgorithm;
} Dem_PreDebounceAlgorithmClassType;
// uint8 HealingCycleCounter; // (0..1) Optional
// const Dem_EnableConditionType *EnableConditionRef; // (0..*) Optional
// const Dem_OperationCycleTgtType *HealingCycleRef; // (0..1) Optional
- const Dem_PreDebounceAlgorithmClassType *PreDebounceAlgorithmClass; // (0..255) (Only one supported)
- const Dem_IndicatorAttributeType *IndicatorAttribute; // (0..255)
+ const Dem_PreDebounceAlgorithmClassType *PreDebounceAlgorithmClass; // (0..255) (Only 0..1 supported)
+ const Dem_IndicatorAttributeType *IndicatorAttribute; // (0..255)
// Dem_OEMSPecific
-
} Dem_EventClassType;
// 10.2.12 DemEventParameter
Dem_EventKindType EventKind; // (1)
const Dem_EventClassType *EventClass; // (1)
const Dem_ExtendedDataClassType *ExtendedDataClassRef; // (0..1)
- const Dem_FreezeFrameClassType *FreezeFrameClassRef; // (0..255)
+ const Dem_FreezeFrameClassType *FreezeFrameClassRef; // (0..255) (Only 0..1 supported)
const Dem_CallbackInitMforEType *CallbackInitMforE; // (0..1)
const Dem_CallbackEventStatusChangedType *CallbackEventStatusChanged;// (0..*)
- const Dem_DTCClassType *DTCClass; // (0..1)
+ const Dem_DTCClassType *DTCClassRef; // (0..1)
boolean Arc_EOL;
} Dem_EventParameterType;
#ifndef DEM_TYPES_H_\r
#define DEM_TYPES_H_
-#include "Std_Types.h"\r
+#include "Std_Types.h"
+
+/*
+ * DTC storage types
+ */
+typedef uint8 Dem_ReturnTypeOfDtcSupportedType;
+#define DEM_ISO15031_6 0x00
+#define DEM_ISO14229_1 0x01
+#define DEM_SAEJ1939_73 0x02\r
+#define DEM_ISO_11992_4 0x03
/*
* Dem_EventIdType
*/
typedef uint16 Dem_EventIdType;
+/*
+ * Dem_DTCGroupType
+ */
+typedef uint32 Dem_DTCGroupType;
+#define DEM_DTC_GROUP_ALL_DTCS 0xffffff
+
+/*
+ * Dem status type
+ */
+#define DEM_DTC_STATUS_MASK_ALL 0x00
+
+
/*
* DemDTCKindType
*/
typedef uint8 Dem_DTCKindType;
#define DEM_DTC_KIND_ALL_DTCS 0x01
-#define DEM_DTC_KIND_EMISSON_REL_DTCS 0x02
+#define DEM_DTC_KIND_EMISSION_REL_DTCS 0x02
/*
* DemDTCOriginType
*/
typedef uint8 Dem_DTCOriginType;
-#define DEM_DTC_ORIGIN_MIRROR_MEMORY 0x04
-#define DEM_DTC_ORIGIN_PERMANENT_MEMORY 0x03
-#define DEM_DTC_ORIGIN_PRIMARY_MEMORY 0x02
#define DEM_DTC_ORIGIN_SECONDARY_MEMORY 0x01
+#define DEM_DTC_ORIGIN_PRIMARY_MEMORY 0x02
+#define DEM_DTC_ORIGIN_PERMANENT_MEMORY 0x03
+#define DEM_DTC_ORIGIN_MIRROR_MEMORY 0x04
/*
* DemEventStatusExtendedType
#define DEM_CYCLE_STATE_END 2
/*
- * DemFreezeFrameKindType
+ * Dem_FreezeFrameKindType
*/
typedef uint8 Dem_FreezeFrameKindType; // TODO: Check type and values
#define DEM_FREEZE_FRAME_NON_OBD 0x01
#define DEM_FREEZE_FRAME_OBD 0x02
/*
- * DemEventKindType
+ * Dem_EventKindType
*/
typedef uint8 Dem_EventKindType; // TODO: Check type and values
#define DEM_EVENT_KIND_BSW 0x01
DEM_PRE_DEBOUNCE_TIME_BASED
};
+/*
+ * Dem_FilterWithSeverityType
+ */
+typedef uint8 Dem_FilterWithSeverityType;
+#define DEM_FILTER_WITH_SEVERITY_YES 0x00
+#define DEM_FILTER_WITH_SEVERITY_NO 0x01
+
+/*
+ * Dem_FilterForFDCType
+ */
+typedef uint8 Dem_FilterForFDCType;
+#define DEM_FILTER_FOR_FDC_YES 0x00
+#define DEM_FILTER_FOR_FDC_NO 0x01
+
+/*
+ * Dem_DTCSeverityType
+ */
+typedef uint8 Dem_DTCSeverityType;
+#define DEM_SEVERITY_NO_SEVERITY 0x00 // No severity information available
+#define DEM_SEVERITY_MAINTENANCE_ONLY 0x20
+#define DEM_SEVERITY_CHECK_AT_NEXT_FALT 0x40
+#define DEM_SEVERITY_CHECK_IMMEDIATELY 0x80
+
+/*
+ * Dem_ReturnSetDTCFilterType
+ */
+typedef uint8 Dem_ReturnSetDTCFilterType;
+#define DEM_FILTER_ACCEPTED 0x00
+#define DEM_WRONG_FILTER 0x01
+
+/*
+ * Dem_ReturnGetStatusOfDTCType
+ */
+typedef uint8 Dem_ReturnGetStatusOfDTCType;
+#define DEM_STATUS_OK 0x00
+#define DEM_STATUS_WRONG_DTC 0x01
+#define DEM_STATUS_WRONG_DTCORIGIN 0x02
+#define DEM_STATUS_FAILED 0x04
+#define DEM_STATUS_WRONG_DTCKIND 0x03
+
+/*
+ * Dem_ReturnGetNextFilteredDTCType
+ */
+typedef uint8 Dem_ReturnGetNextFilteredDTCType;
+#define DEM_FILTERED_OK 0x00
+#define DEM_FILTERED_NO_MATCHING_DTC 0x01
+#define DEM_FILTERED_WRONG_DTCKIND 0x02
+#define DEM_FILTERED_PENDING 0x03
+
+/*
+ * Dem_ReturnGetNumberOfFilteredDTCType
+ */
+typedef uint8 Dem_ReturnGetNumberOfFilteredDTCType;
+#define DEM_NUMBER_OK 0x00
+#define DEM_NUMBER_FAILED 0x01
+#define DEM_NUMBER_PENDING 0x02
+
+/*
+ * Dem_ReturnClearDTCType
+ */
+typedef uint8 Dem_ReturnClearDTCType;
+#define DEM_CLEAR_OK 0x00
+#define DEM_CLEAR_WRONG_DTC 0x01
+#define DEM_CLEAR_WRONG_DTCORIGIN 0x02
+#define DEM_CLEAR_WRONG_DTCKIND 0x03
+#define DEM_CLEAR_FAILED 0x04
+#define DEM_DTC_PENDING 0x05
+
+/*
+ * Dem_ReturnControlDTCStorageType
+ */
+typedef uint8 Dem_ReturnControlDTCStorageType;
+#define DEM_CONTROL_DTC_STORAGE_OK 0x00
+#define DEM_CONTROL_DTC_STORAGE_N_OK 0x01
+#define DEM_CONTROL_DTC_WRONG_DTCGROUP 0x02
+
+/*
+ * Dem_ReturnControlEventUpdateType
+ */
+typedef uint8 Dem_ReturnControlEventUpdateType;
+#define DEM_CONTROL_EVENT_UPDATE_OK 0x00
+#define DEM_CONTROL_EVENT_N_OK 0x01
+#define DEM_CONTROL_EVENT_WRONG_DTCGROUP 0x02
+
+/*
+ * Dem_ReturnGetDTCOfFreezeframeRecordType
+ */
+typedef uint8 Dem_ReturnGetDTCOfFreezeframeRecordType;
+#define DEM_GET_DTCOFFF_OK 0x00
+#define DEM_GET_DTCOFFF_WRONG_RECORD 0x01
+#define DEM_GET_DTCOFFF_NO_DTC_FOR_RECORD 0x02
+#define DEM_GET_DTCOFFF_WRONG_DTCKIND 0x03
+
+/*
+ * Dem_GetFreezeFameDataIdentifierByDTCType
+ */
+typedef uint8 Dem_GetFreezeFameDataIdentifierByDTCType;
+#define DEM_GET_ID_OK 0x00
+#define DEM_GET_ID_WRONG_DTC 0x01
+#define DEM_GET_ID_WRONG_DTCORIGIN 0x02
+#define DEM_GET_ID_WRONG_DTCKIND 0x03
+#define DEM_GET_ID_WRONG_FF_TYPE 0x04
+
+/*
+ * Dem_ReturnGetExtendedDataRecordByDTCType
+ */
+typedef uint8 Dem_ReturnGetExtendedDataRecordByDTCType;
+#define DEM_RECORD_OK 0x00
+#define DEM_RECORD_WRONG_DTC 0x01
+#define DEM_RECORD_WRONG_DTCORIGIN 0x02
+#define DEM_RECORD_DTCKIND 0x03
+#define DEM_RECORD_NUMBER 0x04
+#define DEM_RECORD_BUFFERSIZE 0x05
+#define DEM_RECORD_PENDING 0x06
+
+/*
+ * Dem_ReturnGetDTCByOccurenceTimeType
+ */
+typedef uint8 Dem_ReturnGetDTCByOccurenceTimeType;
+#define DEM_OCCURR_OK 0x00
+#define DEM_OCCURR_WRONG_DTCKIND 0x01
+#define DEM_OCCURR_FAILED 0x02
+
+/*
+ * Dem_ReturnGetFreezeFrameDataByDTCType
+ */
+typedef uint8 Dem_ReturnGetFreezeFrameDataByDTCType;
+#define DEM_GET_FFDATABYDTC_OK 0x00
+#define DEM_GET_FFDATABYDTC_WRONG_DTC 0x01
+#define DEM_GET_FFDATABYDTC_WRONG_DTCORIGIN 0x02
+#define DEM_GET_FFDATABYDTC_WRONG_DTCKIND 0x03
+#define DEM_GET_FFDATABYDTC_RECORDNUMBER 0x04
+#define DEM_GET_FFDATABYDTC_WRONG_DATAID 0x05
+#define DEM_GET_FFDATABYDTC_BUFFERSIZE 0x06
+#define DEM_GET_ID_PENDING 0x07
+
+/*
+ * Dem_ReturnGetSizeOfExtendedDataRecordByDTCType
+ */
+typedef uint8 Dem_ReturnGetSizeOfExtendedDataRecordByDTCType;
+#define DEM_GET_SIZEOFEDRBYDTC_OK 0x00
+#define DEM_GET_SIZEOFEDRBYDTC_W_DTC 0x01
+#define DEM_GET_SIZEOFEDRBYDTC_W_DTCOR 0x02
+#define DEM_GET_SIZEOFEDRBYDTC_W_DTCKI 0x03
+#define DEM_GET_SIZEOFEDRBYDTC_W_RNUM 0x04
+#define DEM_GET_SIZEOFEDRBYDTC_PENDING 0x05
+
+/*
+ * Dem_ReturnGetSizeOfFreezeFrameType
+ */
+typedef uint8 Dem_ReturnGetSizeOfFreezeFrameType;
+#define DEM_GET_SIZEOFFF_OK 0x00
+#define DEM_GET_SIZEOFFF_WRONG_DTC 0x01
+#define DEM_GET_SIZEOFFF_WRONG_DTCOR 0x02
+#define DEM_GET_SIZEOFFF_WRONG_DTCKIND 0x03
+#define DEM_GET_SIZEOFFF_WRONG_RNUM 0x04
+#define DEM_GET_SIZEOFFF_PENDING 0x05
+
+/*
+ * Dem_ReturnGetSeverityOfDTCType
+ */
+typedef uint8 Dem_ReturnGetSeverityOfDTCType;
+#define DEM_GET_SEVERITYOFDTC_OK 0x00
+#define DEM_GET_SEVERITYOFDTC_WRONG_DTC 0x01
+#define DEM_GET_SEVERITYOFDTC_WRONG_ORIGIN 0x02
+#define DEM_GET_SEVERITYOFDTC_NOSEVERITY 0x03
+
+
#endif /*DEM_TYPES_H_*/\r
* Activate scheduled tasks. OS tick is 1ms.\r
* The Blink is run every 25 ms with an offset of 25ms.\r
*/\r
- SetRelAlarm(ALARM_ID_bTask10, 10, 10); // ADC data acquisition\r
- SetRelAlarm(ALARM_ID_bTask25, 25, 25); // ADC data acquisition\r
- SetRelAlarm(ALARM_ID_bTask100, 100, 100); // ADC data acquisition\r
+ SetRelAlarm(ALARM_ID_alarm10, 10, 10); // ADC data acquisition\r
+ SetRelAlarm(ALARM_ID_alarm25, 25, 25); // ADC data acquisition\r
+ SetRelAlarm(ALARM_ID_alarm100, 100, 100); // ADC data acquisition\r
\r
WdgM_ActivateAliveSupervision(WDBG_ALIVE_LOOP_BLINK_COMPONENT);\r
\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="b715bb9d-eec4-4ac5-acdb-a63c2c5c7b2f">\r
+ <SHORT-NAME>blinker_node_ppc</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="194b9abc-510c-4b5e-8486-65c5b26772af">\r
+ <SHORT-NAME>blinker_node_ppc</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <REVISION-LABEL>Rev 2</REVISION-LABEL>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">Undefined MCU</SD>\r
+ <SD GID="AUTHOR">ArcCore AB</SD>\r
+ <SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_ppc/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="4fe46a12-0672-428f-99e3-c4ca6570a776">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="80853be9-55dc-435f-95ed-9a1c90750299">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="7f1dfe11-aeff-4131-89a9-2fbe9a87f01f">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="77224460-9071-4c32-9ba5-5ee19d0a5be2">\r
+ <SHORT-NAME>alarm25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_ppc/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="28398b0a-02ef-4aa0-9f06-90c0683ad934">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_ppc/Os/bTask25</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b4e4c707-af7c-4d9f-a156-1507283b4ebe">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="44a8dc3f-2e97-4bb7-8139-57852146269a">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f9e78da1-ee81-40a0-940b-3e04d9e9034c">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="157c6a3d-f8ad-4493-9d76-a8f9411066aa">\r
+ <SHORT-NAME>bTask10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="ace8439e-ddb7-4bd7-b9e5-643a759f3e55">\r
+ <SHORT-NAME>Startup</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="40214336-c4be-4506-8ccc-75ff014f39fe">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="08cf618f-ebe2-483c-8ba5-fde04f3c6160">\r
+ <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_ppc/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="8a235c19-4b95-4bf1-a309-f15916dd2d8d">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_ppc/Os/bTask10</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0f791241-110b-4cac-9e54-b41ad56c7f05">\r
+ <SHORT-NAME>alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_ppc/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="3eb17f20-d68e-4d62-87e3-6775933e93a2">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_ppc/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
\r
-MOD_USE+=KERNEL MCU ECUM NEWLIB COMMON DET WDG WDGM PORT DIO T32_TERM SIMPLE_PRINTF RAMLOG\r
+MOD_USE+=KERNEL MCU WDG WDGM PORT DIO\r
+\r
+SELECT_CONSOLE = RAMLOG\r
+SELECT_OS_CONSOLE = RAMLOG\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 10:51:58 CEST 2010
+*/
+
\r
+#include <stdlib.h>
+#include <stdint.h>
+#include "Platform_Types.h"
+#include "Os.h" // includes Os_Cfg.h
#include "os_config_macros.h"\r
#include "kernel.h"\r
-#include "Os_Cfg.h"\r
-#include "mcu.h"\r
#include "kernel_offset.h"\r
-//#include "Hooks.h"\r
+#include "alist_i.h"
+#include "Mcu.h"
\r
extern void dec_exception( void );
+// Set the os tick frequency
OsTickType OsTickFreq = 1000;\r
\r
-GEN_APPLICATION_HEAD {\r
- GEN_APPLICATON(BLINKER_APP_ID,"BlinkerApp",true,NULL,NULL,NULL , 0,0,0,0,0,0 )\r
+
+// ############################### DEBUG OUTPUT #############################
+uint32 os_dbg_mask = D_RESOURCE |D_SCHTBL |D_EVENT |D_TASK |D_ALARM;
+
+
+
+// ################################# COUNTERS ###############################
+GEN_COUNTER_HEAD {
+ GEN_COUNTER( COUNTER_ID_OsTick,
+ "OsTick",
+ COUNTER_TYPE_HARD,
+ COUNTER_UNIT_NANO,
+ 0xffff,
+ 1,
+ 1,
+ 0),
};\r
\r
-GEN_RESOURCE_HEAD {\r
- GEN_RESOURCE(RES_SCHEDULER,RESOURCE_TYPE_STANDARD,0,0,0), // Standard resource..\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;
+
+// ################################## ALARMS ################################
+
+GEN_ALARM_HEAD {
+ GEN_ALARM( ALARM_ID_alarm10,
+ "alarm10",
+ COUNTER_ID_OsTick,
+ NULL,
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_bTask10,
+ NULL,
+ NULL ),
+ GEN_ALARM( ALARM_ID_alarm100,
+ "alarm100",
+ COUNTER_ID_OsTick,
+ NULL,
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_bTask100,
+ NULL,
+ NULL ),
+ GEN_ALARM( ALARM_ID_alarm25,
+ "alarm25",
+ COUNTER_ID_OsTick,
+ NULL,
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_bTask25,
+ NULL,
+ NULL ),
};\r
\r
-//--- TASKS ----\r
-DECLARE_STACK(OsIdle,PRIO_STACK_SIZE);\r
-DECLARE_STACK(bTask25,PRIO_STACK_SIZE);\r
-DECLARE_STACK(bTask100,PRIO_STACK_SIZE);\r
-DECLARE_STACK(bTask10,PRIO_STACK_SIZE);\r
-DECLARE_STACK(Startup,PRIO_STACK_SIZE);\r
+// ################################ RESOURCES ###############################
+GEN_RESOURCE_HEAD {
+ GEN_RESOURCE(
+ RES_SCHEDULER,
+ RESOURCE_TYPE_STANDARD,
+ 0
+ ),
+};
\r
+// ############################## STACKS (TASKS) ############################
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);
+DECLARE_STACK(Startup,2048);
+DECLARE_STACK(bTask10,2048);
+DECLARE_STACK(bTask100,2048);
+DECLARE_STACK(bTask25,2048);
+
+// ################################## TASKS #################################
GEN_TASK_HEAD {\r
GEN_ETASK( OsIdle,\r
- TASK_ID_OsIdle,\r
- true/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
+ 0,
+ FULL,
+ TRUE,
+ NULL,
+ 0
+ ),
+ GEN_BTASK(
+ Startup,
+ 2,
+ FULL,
+ TRUE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ bTask10,
+ 1,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ bTask100,
+ 1,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ bTask25,
+ 1,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+};
\r
- GEN_BTASK( bTask25,\r
- TASK_ID_bTask25,\r
- false/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
+// ################################## HOOKS #################################
+GEN_HOOKS(
+ StartupHook,
+ NULL,
+ ShutdownHook,
+ ErrorHook,
+ PreTaskHook,
+ PostTaskHook
+);
\r
- GEN_BTASK( bTask100,\r
- TASK_ID_bTask100,\r
- false/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
+// ################################## ISRS ##################################
\r
- GEN_BTASK( bTask10,\r
- TASK_ID_bTask10,\r
- false/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
\r
- GEN_BTASK( Startup,\r
- TASK_ID_Startup,\r
- true/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
+// ############################ SCHEDULE TABLES #############################
+
+// Table heads
+GEN_SCHTBL_HEAD {
};\r
\r
GEN_PCB_LIST()\r
\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));
\r
-// --- INTERRUPTS ---\r
-uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
-
GEN_IRQ_VECTOR_TABLE_HEAD {};
GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
GEN_IRQ_PRIORITY_TABLE_HEAD {};
\r
-// --- COUNTERS ---\r
-GEN_COUNTER_HEAD {\r
- GEN_COUNTER( COUNTER_ID_OsTick,
- "COUNTER_ID_OsTick",
- COUNTER_TYPE_HARD,\r
- COUNTER_UNIT_NANO,\r
- 0xffff,1,1,0 ),\r
-};
-
-CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;
-\r
-// --- ALARMS ---\r
-GEN_ALARM_HEAD {\r
- {\r
- .expire_val = 10,\r
- .active = FALSE,\r
- .counter = &counter_list[COUNTER_ID_OsTick],
- .counter_id = COUNTER_ID_OsTick,
- .action =\r
- {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_bTask10,\r
- .event_id = 0,\r
- }\r
- },\r
- {\r
- .expire_val = 25,\r
- .active = FALSE,\r
- .counter = &counter_list[COUNTER_ID_OsTick],
- .counter_id = COUNTER_ID_OsTick,
- .action =\r
- {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_bTask25,\r
- .event_id = 0,\r
- }\r
- },\r
- {\r
- .expire_val = 100,\r
- .active = FALSE,\r
- .counter = &counter_list[COUNTER_ID_OsTick],
- .counter_id = COUNTER_ID_OsTick,
- .action =\r
- {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_bTask100,\r
- .event_id = 0,\r
- }\r
- },\r
-};\r
-\r
-// --- HOOKS ---\r
-GEN_HOOKS( StartupHook, ProtectionHook, ShutdownHook, ErrorHook, PreTaskHook, PostTaskHook )\r
-\r
-// --- MISC ---\r
-uint32 os_dbg_mask = 0;\r
-/*
- D_MASTER_PRINT |\
- D_ISR_MASTER_PRINT |\
- D_STDOUT |\
- D_ISR_STDOUT |\
- D_ALARM | D_TASK;
-*/
-\r
#include "os_config_funcs.h"\r
-\r
-\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 10:51:58 CEST 2010
+*/
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
-
-
-
-
-/*\r
- * Os_Cfg.h\r
- *\r
- * Created on: 2008-dec-22\r
- * Author: mahi\r
- */\r
#ifndef OS_CFG_H_\r
#define OS_CFG_H_\r
\r
-#include <limits.h>\r
\r
-// APPS\r
-#define BLINKER_APP_ID 122\r
-#define APPLICATION_CNT 1\r
+// Alarm Id's
+#define ALARM_ID_alarm10 0
+#define ALARM_ID_alarm100 1
+#define ALARM_ID_alarm25 2
\r
-// TASKS\r
-#define TASK_ID_OsIdle 0\r
-#define TASK_ID_bTask25 1\r
-#define TASK_ID_bTask100 2\r
-#define TASK_ID_bTask10 3\r
-#define TASK_ID_Startup 4\r
+// Counter Id's
+#define COUNTER_ID_OsTick 0
\r
+// Counter macros
+#define OSMAXALLOWEDVALUE_OsTick 65535
+
+
+// Event masks
+
+// Isr Id's
+
+// Resource Id's
+
+// Linked resource id's
+
+// Resource masks
+
+// Task Id's
+#define TASK_ID_OsIdle 0
+#define TASK_ID_Startup 1
+#define TASK_ID_bTask10 2
+#define TASK_ID_bTask100 3
+#define TASK_ID_bTask25 4
+
+// Task entry points
void OsIdle( void );\r
void Startup( void );\r
void bTask10( void );\r
+void bTask100( void );
void bTask25( void );\r
-void bTask100( void );\r
-
-// COUNTERS
-#define COUNTER_ID_OsTick 0
\r
-// ALARMS\r
-#define ALARM_USE\r
-#define ALARM_ID_bTask10 0\r
-#define ALARM_ID_bTask25 1\r
-#define ALARM_ID_bTask100 2\r
+// Schedule table id's
\r
-// RESOURCES\r
-#define RES_ID_BLINK 1 // Den mysko RES_SCHEDULER är ju nr 0\r
+// Stack size
+#define OS_INTERRUPT_STACK_SIZE 2048
+#define OS_OSIDLE_STACK_SIZE 512
\r
-// MISC\r
-#define USE_IDLE_TASK\r
-#define PRIO_STACK_SIZE 4096\r
-#define OS_INTERRUPT_STACK_SIZE 4096\r
-#define EVENT_BLINK (1<<0)\r
+#define OS_ALARM_CNT 3
+#define OS_TASK_CNT 5
+#define OS_SCHTBL_CNT 0
+#define OS_COUNTER_CNT 1
+#define OS_EVENTS_CNT 0
+#define OS_ISRS_CNT 0
+#define OS_RESOURCE_CNT 0
+#define OS_LINKED_RESOURCE_CNT 0
\r
-#endif /* OS_CFG_H_ */\r
+#define CFG_OS_DEBUG STD_ON
+
+#define OS_SC1 STD_ON
+#define OS_STACK_MONITORING STD_ON
+#define OS_STATUS_EXTENDED STD_ON
+#define OS_USE_GET_SERVICE_ID STD_ON
+#define OS_USE_PARAMETER_ACCESS STD_ON
+#define OS_RES_SCHEDULER STD_ON
+
+#endif /*OS_CFG_H_*/
/*\r
* Activate scheduled tasks. OS tick is 1ms.\r
*/\r
- SetRelAlarm(ALARM_ID_bTask25, 25, 25); // Task for pwm channel 1\r
- SetRelAlarm(ALARM_ID_bTask100, 100, 100); // Task for pwm channel 2\r
+ SetRelAlarm(ALARM_ID_Alarm25, 25, 25); // Task for pwm channel 1\r
+ SetRelAlarm(ALARM_ID_Alarm100, 100, 100); // Task for pwm channel 2\r
\r
\r
// End of startup_task().\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-\r
-#include "os_config_macros.h"\r
-#include "kernel.h"\r
-#include "Os_Cfg.h"\r
-#include "Mcu.h"\r
-#include "kernel_offset.h"\r
-//#include "Hooks.h"\r
-\r
-extern void dec_exception( void );
-
-OsTickType OsTickFreq = 1000;\r
-\r
-GEN_APPLICATION_HEAD {\r
- GEN_APPLICATON(BLINKER_APP_ID,"PwmApp",true,NULL,NULL,NULL , 0,0,0,0,0,0 )\r
-};\r
-\r
-GEN_RESOURCE_HEAD {\r
- GEN_RESOURCE(RES_SCHEDULER,RESOURCE_TYPE_STANDARD,0,0,0), // Standard resource..\r
-};\r
-\r
-//--- TASKS ----\r
-DECLARE_STACK(OsIdle,PRIO_STACK_SIZE);\r
-DECLARE_STACK(bTask25,PRIO_STACK_SIZE);\r
-DECLARE_STACK(bTask100,PRIO_STACK_SIZE);\r
-DECLARE_STACK(Startup,PRIO_STACK_SIZE);\r
-\r
-GEN_TASK_HEAD {\r
- GEN_ETASK( OsIdle,\r
- TASK_ID_OsIdle,\r
- true/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
-\r
- GEN_BTASK( bTask25,\r
- TASK_ID_bTask25,\r
- false/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
-\r
- GEN_BTASK( bTask100,\r
- TASK_ID_bTask100,\r
- false/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
-\r
- GEN_BTASK( Startup,\r
- TASK_ID_Startup,\r
- true/*auto*/,\r
- NULL/*tm*/,\r
- BLINKER_APP_ID/*app*/,\r
- NULL/*rsrc*/),\r
-};\r
-\r
-GEN_PCB_LIST()\r
-\r
-\r
-// --- INTERRUPTS ---\r
-uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
-\r
-GEN_IRQ_VECTOR_TABLE_HEAD {};
-GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
-GEN_IRQ_PRIORITY_TABLE_HEAD {};
-\r
-// --- COUNTERS ---\r
-GEN_COUNTER_HEAD {\r
- GEN_COUNTER( COUNTER_ID_OsTick,\r
- "COUNTER_ID_OsTick",\r
- COUNTER_TYPE_HARD,\r
- COUNTER_UNIT_NANO,\r
- 0xffff,1,1,0 ),\r
-};
-
-CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
-\r
-// --- ALARMS ---\r
-GEN_ALARM_HEAD {\r
- {\r
- .expire_val = 25,\r
- .active = FALSE,\r
- .counter = &counter_list[COUNTER_ID_OsTick],\r
- .counter_id = COUNTER_ID_OsTick,\r
- .action =\r
- {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_bTask25,\r
- .event_id = 0,\r
- }\r
- },\r
- {\r
- .expire_val = 100,\r
- .active = FALSE,\r
- .counter = &counter_list[COUNTER_ID_OsTick],\r
- .counter_id = COUNTER_ID_OsTick,\r
- .action =\r
- {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_bTask100,\r
- .event_id = 0,\r
- }\r
- },\r
-};\r
-\r
-// --- HOOKS ---\r
-GEN_HOOKS( StartupHook, ProtectionHook, ShutdownHook, ErrorHook, PreTaskHook, PostTaskHook )\r
-\r
-// --- MISC ---\r
-uint32 os_dbg_mask = 0;\r
-/*
- D_MASTER_PRINT |\
- D_ISR_MASTER_PRINT |\
- D_STDOUT |\
- D_ISR_STDOUT |
- D_ALARM | D_TASK;
-*/
-\r
-#include "os_config_funcs.h"\r
-\r
-\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*\r
- * Os_Cfg.h\r
- *\r
- * Created on: 2008-dec-22\r
- * Author: mahi\r
- */\r
-#ifndef OS_CFG_H_\r
-#define OS_CFG_H_\r
-\r
-#include <limits.h>\r
-\r
-// APPS\r
-#define BLINKER_APP_ID 122\r
-#define APPLICATION_CNT 1\r
-\r
-// TASKS\r
-#define TASK_ID_OsIdle 0\r
-#define TASK_ID_bTask25 1\r
-#define TASK_ID_bTask100 2\r
-#define TASK_ID_Startup 3\r
-\r
-void OsIdle( void );\r
-void Startup( void );\r
-void bTask25( void );\r
-void bTask100( void );\r
-
-// COUNTERS
-#define COUNTER_ID_OsTick 0
-\r
-// ALARMS\r
-#define ALARM_USE\r
-#define ALARM_ID_bTask25 0\r
-#define ALARM_ID_bTask100 1\r
-\r
-// RESOURCES\r
-#define RES_ID_BLINK 1 // Den mysko RES_SCHEDULER är ju nr 0\r
-\r
-// MISC\r
-#define USE_IDLE_TASK\r
-#define PRIO_STACK_SIZE 4096\r
-#define OS_INTERRUPT_STACK_SIZE 4096\r
-#define EVENT_BLINK (1<<0)\r
-\r
-#endif /* OS_CFG_H_ */\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-#ifndef PORT_CFG_H_\r
-#define PORT_CFG_H_\r
-\r
-#include "Std_Types.h"\r
-\r
-#define PORT_VERSION_INFO_API STD_ON\r
-#define PORT_DEV_ERROR_DETECT STD_ON\r
-#define PORT_PIN_DIRECTION_CHANGES_ALLOWED STD_ON\r
-\r
-typedef enum\r
-{\r
- PA0,\r
- PA1,\r
- PA2,\r
- PA3,\r
- PA4,\r
- PA5,\r
- PA6,\r
- PA7,\r
- PA8,\r
- PA9,\r
- PA10,\r
- PA11,\r
- PA12,\r
- PA13,\r
- PA14,\r
- PA15,\r
- PB0,\r
- PB1,\r
- PB2,\r
- PB3,\r
- PB4,\r
- PB5,\r
- PB6,\r
- PB7,\r
- PB8,\r
- PB9,\r
- PB10,\r
- PB11,\r
- PB12,\r
- PB13,\r
- PB14,\r
- PB15,\r
- PC0,\r
- PC1,\r
- PC2,\r
- PC3,\r
- PC4,\r
- PC5,\r
- PC6,\r
- PC7,\r
- PC8,\r
- PC9,\r
- PC10,\r
- PC11,\r
- PC12,\r
- PC13,\r
- PC14,\r
- PC15,\r
- PD0,\r
- PD1,\r
- PD2,\r
- PD3,\r
- PD4,\r
- PD5,\r
- PD6,\r
- PD7,\r
- PD8,\r
- PD9,\r
- PD10,\r
- PD11,\r
- PD12,\r
- PD13,\r
- PD14,\r
- PD15,\r
- PE0,\r
- PE1,\r
- PE2,\r
- PE3,\r
- PE4,\r
- PE5,\r
- PE6,\r
- PE7,\r
- PE8,\r
- PE9,\r
- PE10,\r
- PE11,\r
- PE12,\r
- PE13,\r
- PE14,\r
- PE15,\r
- PF0,\r
- PF1,\r
- PF2,\r
- PF3,\r
- PF4,\r
- PF5,\r
- PF6,\r
- PF7,\r
- PF8,\r
- PF9,\r
- PF10,\r
- PF11,\r
- PF12,\r
- PF13,\r
- PF14,\r
- PF15,\r
- PG0,\r
- PG1,\r
- PG2,\r
- PG3,\r
- PG4,\r
- PG5,\r
- PG6,\r
- PG7,\r
- PG8,\r
- PG9,\r
- PG10,\r
- PG11,\r
- PG12,\r
- PG13,\r
- PG14,\r
- PG15,\r
- PH0,\r
- PH1,\r
- PH2,\r
- PH3,\r
- PH4,\r
- PH5,\r
- PH6,\r
- PH7,\r
- PH8,\r
- PH9,\r
- PH10,\r
- PH11,\r
- PH12,\r
- PH13,\r
- PH14,\r
- PH15,\r
- PJ0,\r
- PJ1,\r
- PJ2,\r
- PJ3,\r
- PJ4,\r
- PJ5,\r
- PJ6,\r
- PJ7,\r
- PJ8,\r
- PJ9,\r
- PJ10,\r
- PJ11,\r
- PJ12,\r
- PJ13,\r
- PJ14,\r
- PJ15,\r
- PK0,\r
- PK1\r
-} Port_PinType;\r
-\r
-#define BIT0 (1<<15)\r
-#define BIT1 (1<<14)\r
-#define BIT2 (1<<13)\r
-#define BIT3 (1<<12)\r
-#define BIT4 (1<<11)\r
-#define BIT5 (1<<10)\r
-#define BIT6 (1<<9)\r
-#define BIT7 (1<<8)\r
-#define BIT8 (1<<7)\r
-#define BIT9 (1<<6)\r
-#define BIT10 (1<<5)\r
-#define BIT11 (1<<4)\r
-#define BIT12 (1<<3)\r
-#define BIT13 (1<<2)\r
-#define BIT14 (1<<1)\r
-#define BIT15 (1<<0)\r
-\r
-#define WPE_BIT BIT14\r
-#define WPS_BIT BIT15\r
-#define SRC0 BIT12\r
-#define SRC1 BIT13\r
-\r
-#define PULL_UP (WPE_BIT|WPS_BIT)\r
-#define PULL_DOWN (WPE_BIT)\r
-#define PULL_NONE 0\r
-#define SLEW_RATE_MIN 0\r
-#define SLEW_RATE_MED BIT13\r
-#define SLEW_RATE_MAX (BIT12|BIT13)\r
-#define HYS_ENABLE BIT11\r
-#define ODE_ENABLE BIT10\r
-#define IBE_ENABLE BIT7\r
-#define OBE_ENABLE BIT6\r
-#define PA_IO 0\r
-#define PA_FUNC1 (BIT5)\r
-#define PA_FUNC2 (BIT4)\r
-#define PA_FUNC3 (BIT4|BIT5)\r
-\r
-#define NORMAL_INPUT (BIT15)\r
-\r
-// Should be this out of reset\r
-#define PCR_RESET (0)\r
-#define PCR_BOOTCFG (IBE_ENABLE|PULL_DOWN)\r
-\r
-typedef struct\r
-{\r
- uint16_t padCnt;\r
- const uint16_t *padConfig;\r
- uint16_t outCnt;\r
- const uint8_t *outConfig;\r
-// uint16_t inCnt;\r
-// const uint8_t *inConfig;\r
-} Port_ConfigType;\r
-\r
-extern const Port_ConfigType PortConfigData;\r
-\r
-#endif /*PORT_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC5567
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:15:58 CEST 2010
+*/
+
+
+
+#include <stdlib.h>
+#include <stdint.h>
+#include "Platform_Types.h"
+#include "Os.h" // includes Os_Cfg.h
+#include "os_config_macros.h"
+#include "kernel.h"
+#include "kernel_offset.h"
+#include "alist_i.h"
+#include "Mcu.h"
+
+extern void dec_exception( void );
+
+// Set the os tick frequency
+OsTickType OsTickFreq = 1000;
+
+
+// ############################### DEBUG OUTPUT #############################
+uint32 os_dbg_mask = 0;
+
+
+
+// ################################# COUNTERS ###############################
+GEN_COUNTER_HEAD {
+ GEN_COUNTER( COUNTER_ID_OsTick,
+ "OsTick",
+ COUNTER_TYPE_HARD,
+ COUNTER_UNIT_NANO,
+ 0xffff,
+ 1,
+ 1,
+ 0),
+};
+
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;
+
+// ################################## ALARMS ################################
+
+GEN_ALARM_HEAD {
+ GEN_ALARM( ALARM_ID_Alarm100,
+ "Alarm100",
+ COUNTER_ID_OsTick,
+ NULL,
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_bTask100,
+ NULL,
+ NULL ),
+ GEN_ALARM( ALARM_ID_Alarm25,
+ "Alarm25",
+ COUNTER_ID_OsTick,
+ NULL,
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_bTask25,
+ NULL,
+ NULL ),
+};
+
+// ################################ RESOURCES ###############################
+GEN_RESOURCE_HEAD {
+ GEN_RESOURCE(
+ RES_SCHEDULER,
+ RESOURCE_TYPE_STANDARD,
+ 0
+ ),
+};
+
+// ############################## STACKS (TASKS) ############################
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);
+DECLARE_STACK(Startup,2048);
+DECLARE_STACK(bTask100,2048);
+DECLARE_STACK(bTask25,2048);
+
+// ################################## TASKS #################################
+GEN_TASK_HEAD {
+ GEN_ETASK( OsIdle,
+ 0,
+ FULL,
+ TRUE,
+ NULL,
+ 0
+ ),
+ GEN_BTASK(
+ Startup,
+ 3,
+ FULL,
+ TRUE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ bTask100,
+ 2,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ bTask25,
+ 1,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+};
+
+// ################################## HOOKS #################################
+GEN_HOOKS(
+ StartupHook,
+ NULL,
+ ShutdownHook,
+ ErrorHook,
+ PreTaskHook,
+ PostTaskHook
+);
+
+// ################################## ISRS ##################################
+
+
+// ############################ SCHEDULE TABLES #############################
+
+// Table heads
+GEN_SCHTBL_HEAD {
+};
+
+GEN_PCB_LIST()
+
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));
+
+GEN_IRQ_VECTOR_TABLE_HEAD {};
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
+GEN_IRQ_PRIORITY_TABLE_HEAD {};
+
+#include "os_config_funcs.h"
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC5567
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:15:58 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+
+#ifndef OS_CFG_H_
+#define OS_CFG_H_
+
+
+// Alarm Id's
+#define ALARM_ID_Alarm100 0
+#define ALARM_ID_Alarm25 1
+
+// Counter Id's
+#define COUNTER_ID_OsTick 0
+
+// Counter macros
+#define OSMAXALLOWEDVALUE_OsTick 65535
+
+
+// Event masks
+
+// Isr Id's
+
+// Resource Id's
+
+// Linked resource id's
+
+// Resource masks
+
+// Task Id's
+#define TASK_ID_OsIdle 0
+#define TASK_ID_Startup 1
+#define TASK_ID_bTask100 2
+#define TASK_ID_bTask25 3
+
+// Task entry points
+void OsIdle( void );
+void Startup( void );
+void bTask100( void );
+void bTask25( void );
+
+// Schedule table id's
+
+// Stack size
+#define OS_INTERRUPT_STACK_SIZE 2048
+#define OS_OSIDLE_STACK_SIZE 512
+
+#define OS_ALARM_CNT 2
+#define OS_TASK_CNT 4
+#define OS_SCHTBL_CNT 0
+#define OS_COUNTER_CNT 1
+#define OS_EVENTS_CNT 0
+#define OS_ISRS_CNT 0
+#define OS_RESOURCE_CNT 0
+#define OS_LINKED_RESOURCE_CNT 0
+
+#define CFG_OS_DEBUG STD_OFF
+
+#define OS_SC1 STD_ON
+#define OS_STACK_MONITORING STD_ON
+#define OS_STATUS_EXTENDED STD_ON
+#define OS_USE_GET_SERVICE_ID STD_ON
+#define OS_USE_PARAMETER_ACCESS STD_ON
+#define OS_RES_SCHEDULER STD_ON
+
+#endif /*OS_CFG_H_*/
--- /dev/null
+/*
+* Configuration of module Pwm (Pwm_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC5567
+*
+* Module vendor: ArcCore
+* Module version: 1.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 09 15:05:32 CEST 2010
+*/
+
+/*\r
+ * Pwm_Cfg.c\r
+ *\r
+ * Created on: \r
+ * Author: \r
+ */\r
+\r
+#include "Pwm.h"\r
+#include "Pwm_Cfg.h"\r
+\r
+\r
+/*\r
+ * Notification routines are defined elsewhere but need to be linked from here,\r
+ * so we define the routines as external here.\r
+ */\r
+extern void MyPwmNotificationRoutine(void); // PWM_CHANNEL_1\r
+\r
+const Pwm_ConfigType PwmConfig = {\r
+ .Channels = {\r
+ \r
+ PWM_CHANNEL_CONFIG(// Channel name and emios channel id\r
+ PWM_CHANNEL_1,\r
+ // Period in ticks\r
+ 4000,\r
+ // Duty cycle (0 ~> 0%, 0x8000 ~> 100%)\r
+ 24576,\r
+ // Local prescaler\r
+ PWM_CHANNEL_PRESCALER_1,\r
+ // Polarity\r
+ PWM_HIGH),\r
+ PWM_CHANNEL_CONFIG(// Channel name and emios channel id\r
+ PWM_CHANNEL_2,\r
+ // Period in ticks\r
+ 12000,\r
+ // Duty cycle (0 ~> 0%, 0x8000 ~> 100%)\r
+ 0,\r
+ // Local prescaler\r
+ PWM_CHANNEL_PRESCALER_1,\r
+ // Polarity\r
+ PWM_LOW),\r
+ },\r
+#if PWM_NOTIFICATION_SUPPORTED==ON\r
+ .NotificationHandlers = {\r
+ // Notification routine for PWM_CHANNEL_1\r
+ MyPwmNotificationRoutine,\r
+ \r
+ // Notification routine for PWM_CHANNEL_2\r
+ NULL,\r
+ \r
+ }\r
+#endif\r
+};\r
+
--- /dev/null
+/*
+* Configuration of module Pwm (Pwm_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC5567
+*
+* Module vendor: ArcCore
+* Module version: 1.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 09 15:05:32 CEST 2010
+*/
+
+
+#if (PWM_SW_MAJOR_VERSION != 1)
+#error "Pwm: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PWM_CFG_H_\r
+#define PWM_CFG_H_\r
+\r
+/****************************************************************************\r
+ * Global configuration options and defines\r
+ */\r
+\r
+#define ON 1\r
+#define OFF 0\r
+\r
+// PWM003\r
+#define PWM_DEV_EROR_DETECT ON\r
+#define PWM_NOTIFICATION_SUPPORTED ON\r
+\r
+// PWM132. Currently only ON is supported.\r
+#define PWM_DUTYCYCLE_UPDATED_ENDPERIOD ON\r
+#define PWM_PERIOD_UPDATED_ENDPERIOD ON\r
+\r
+// Define what functions to enable.\r
+#define PWM_GET_OUTPUT_STATE ON\r
+#define PWM_SET_PERIOD_AND_DUTY ON\r
+#define PWM_DEINIT OFF\r
+#define PWM_DUTYCYCLE ON\r
+#define PWM_SET_OUTPUT_TO_IDLE OFF\r
+#define PWM_VERSION_INFO_API OFF\r
+\r
+\r
+\r
+\r
+/****************************************************************************\r
+ * Not defined in AUTOSAR.\r
+ */\r
+#define PWM_ISR_PRIORITY 1\r
+#define PWM_PRESCALER 1\r
+\r
+/*\r
+ * Setting to ON freezes the current output state of a PWM channel when in\r
+ * debug mode.\r
+ */\r
+#define PWM_FREEZE_ENABLE ON\r
+\r
+/****************************************************************************\r
+ * Enumeration of channels\r
+ * Maps a symbolic name to a hardware channel\r
+ */\r
+typedef enum {\r
+ PWM_CHANNEL_1 = 13,\r
+ PWM_CHANNEL_2 = 12,\r
+ PWM_NUMBER_OF_CHANNELS = 2\r
+} Pwm_NamedChannelsType;\r
+\r
+\r
+\r
+/*\r
+ * PWM106: This is implementation specific but not all values may be valid\r
+ * within the type. This shall be chosen in order to have the most efficient\r
+ * implementation on a specific microcontroller platform.\r
+ *\r
+ * PWM106 => Pwm_ChannelType == eemios channel id.\r
+ */\r
+typedef uint8 Pwm_ChannelType;\r
+\r
+/*\r
+ * PWM070: All time units used within the API services of the PWM module shall\r
+ * be of the unit ticks.\r
+ */\r
+typedef uint16 Pwm_PeriodType;\r
+\r
+typedef enum {\r
+ PWM_CHANNEL_PRESCALER_1=0,\r
+ PWM_CHANNEL_PRESCALER_2,\r
+ PWM_CHANNEL_PRESCALER_3,\r
+ PWM_CHANNEL_PRESCALER_4,\r
+} Pwm_ChannelPrescalerType;\r
+\r
+/*\r
+ * Since the AUTOSAR PWM specification uses a different unit for the duty,\r
+ * the following macro can be used to convert between that format and the\r
+ * mpc5516 format.\r
+ */\r
+#define DUTY_AND_PERIOD(_duty,_period) .duty = (_duty*_period)>>15, .period = _period\r
+\r
+#if defined(CFG_MPC5516)\r
+ /* Mode is buffered PWM output (OPWM) */\r
+ /* Mode is buffered Output PW and frequency modulation mode */\r
+#define PWM_EMIOS_OPWM 0x5A\r
+#elif defined(CFG_MPC5567)\r
+ /* Mode is buffered OPWM with frequency modulation (allows change of\r
+ * period) */\r
+#define PWM_EMIOS_OPWM 0x19\r
+#endif\r
+\r
+\r
+typedef struct {\r
+ /* Number of duty ticks */\r
+ uint32_t duty:32;\r
+ /* Length of period, in ticks */\r
+ uint32_t period:32;\r
+ /* Counter */\r
+ uint32_t counter:32;\r
+ /* Enable freezing the channel when in debug mode */\r
+ uint32_t freezeEnable:1;\r
+ /* Disable output */\r
+ uint32_t outputDisable:1;\r
+ /* Select which bus disables the bus\r
+ * TODO: Figure out how this works, i.e. what bus does it refer to? */\r
+ uint32_t outputDisableSelect:2;\r
+ /* Prescale the emios clock some more? */\r
+ Pwm_ChannelPrescalerType prescaler:2;\r
+ /* Prescale the emios clock some more? */\r
+ uint32_t usePrescaler:1;\r
+ /* Whether to use DMA. Currently unsupported */\r
+ uint32_t useDma:1;\r
+ uint32_t reserved_2:1;\r
+ /* Input filter. Ignored in output mode. */\r
+ uint32_t inputFilter:4;\r
+ /* Input filter clock source. Ignored in output mode */\r
+ uint32_t filterClockSelect:1;\r
+ /* Enable interrupts/flags on this channel? Required for DMA as well. */\r
+ uint32_t flagEnable:1;\r
+ uint32_t reserved_3:3;\r
+ /* Trigger a match on channel A */\r
+ uint32_t forceMatchA:1;\r
+ /* Triggers a match on channel B */\r
+ uint32_t forceMatchB:1;\r
+ uint32_t reserved_4:1;\r
+ /* We can use different buses for the counter. Use the internal counter */\r
+ uint32_t busSelect:2;\r
+ /* What edges to flag on? */\r
+ uint32_t edgeSelect:1;\r
+ /* Polarity of the channel */\r
+ uint32_t edgePolarity:1;\r
+ /* EMIOS mode. 0x58 for buffered output PWM */\r
+ uint32_t mode:7;\r
+} Pwm_ChannelRegisterType;\r
+\r
+typedef struct {\r
+ Pwm_ChannelRegisterType r;\r
+ Pwm_ChannelType channel;\r
+} Pwm_ChannelConfigurationType;\r
+\r
+\r
+typedef struct {\r
+ Pwm_ChannelConfigurationType Channels[PWM_NUMBER_OF_CHANNELS];\r
+#if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
+ Pwm_NotificationHandlerType NotificationHandlers[PWM_NUMBER_OF_CHANNELS];\r
+#endif\r
+} Pwm_ConfigType;\r
+\r
+// Channel configuration macro.\r
+#define PWM_CHANNEL_CONFIG(_hwchannel, _period, _duty, _prescaler, _polarity) \\r
+ {\\r
+ .channel = _hwchannel,\\r
+ .r = {\\r
+ DUTY_AND_PERIOD(_duty, _period),\\r
+ .freezeEnable = 1,\\r
+ .outputDisable = 0,\\r
+ .usePrescaler = 1,\\r
+ .prescaler = _prescaler,\\r
+ .useDma = 0,\\r
+ .flagEnable = 0, /* See PWM052 */ \\r
+ .busSelect = 3, /* Use the internal counter bus */\\r
+ .edgePolarity = _polarity,\\r
+ .mode = PWM_EMIOS_OPWM\\r
+ }\\r
+ }\r
+\r
+#endif /* PWM_CFG_H_ */\r
+
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC5567
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:16:23 CEST 2010
+*/
+
+
+
+#include <stdlib.h>
+#include <stdint.h>
+#include "Platform_Types.h"
+#include "Os.h" // includes Os_Cfg.h
+#include "os_config_macros.h"
+#include "kernel.h"
+#include "kernel_offset.h"
+#include "alist_i.h"
+#include "Mcu.h"
+
+extern void dec_exception( void );
+
+// Set the os tick frequency
+OsTickType OsTickFreq = 1000;
+
+
+// ############################### DEBUG OUTPUT #############################
+uint32 os_dbg_mask = 0;
+
+
+
+// ################################# COUNTERS ###############################
+GEN_COUNTER_HEAD {
+ GEN_COUNTER( COUNTER_ID_OsTick,
+ "OsTick",
+ COUNTER_TYPE_HARD,
+ COUNTER_UNIT_NANO,
+ 0xffff,
+ 1,
+ 1,
+ 0),
+};
+
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;
+
+// ################################## ALARMS ################################
+
+GEN_ALARM_HEAD {
+ GEN_ALARM( ALARM_ID_Alarm100,
+ "Alarm100",
+ COUNTER_ID_OsTick,
+ NULL,
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_bTask100,
+ NULL,
+ NULL ),
+ GEN_ALARM( ALARM_ID_Alarm25,
+ "Alarm25",
+ COUNTER_ID_OsTick,
+ NULL,
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_bTask25,
+ NULL,
+ NULL ),
+};
+
+// ################################ RESOURCES ###############################
+GEN_RESOURCE_HEAD {
+ GEN_RESOURCE(
+ RES_SCHEDULER,
+ RESOURCE_TYPE_STANDARD,
+ 0
+ ),
+};
+
+// ############################## STACKS (TASKS) ############################
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);
+DECLARE_STACK(Startup,2048);
+DECLARE_STACK(bTask100,2048);
+DECLARE_STACK(bTask25,2048);
+
+// ################################## TASKS #################################
+GEN_TASK_HEAD {
+ GEN_ETASK( OsIdle,
+ 0,
+ FULL,
+ TRUE,
+ NULL,
+ 0
+ ),
+ GEN_BTASK(
+ Startup,
+ 3,
+ FULL,
+ TRUE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ bTask100,
+ 2,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ bTask25,
+ 1,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+};
+
+// ################################## HOOKS #################################
+GEN_HOOKS(
+ StartupHook,
+ NULL,
+ ShutdownHook,
+ ErrorHook,
+ PreTaskHook,
+ PostTaskHook
+);
+
+// ################################## ISRS ##################################
+
+
+// ############################ SCHEDULE TABLES #############################
+
+// Table heads
+GEN_SCHTBL_HEAD {
+};
+
+GEN_PCB_LIST()
+
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));
+
+GEN_IRQ_VECTOR_TABLE_HEAD {};
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
+GEN_IRQ_PRIORITY_TABLE_HEAD {};
+
+#include "os_config_funcs.h"
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC5567
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:16:23 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+
+#ifndef OS_CFG_H_
+#define OS_CFG_H_
+
+
+// Alarm Id's
+#define ALARM_ID_Alarm100 0
+#define ALARM_ID_Alarm25 1
+
+// Counter Id's
+#define COUNTER_ID_OsTick 0
+
+// Counter macros
+#define OSMAXALLOWEDVALUE_OsTick 65535
+
+
+// Event masks
+
+// Isr Id's
+
+// Resource Id's
+
+// Linked resource id's
+
+// Resource masks
+
+// Task Id's
+#define TASK_ID_OsIdle 0
+#define TASK_ID_Startup 1
+#define TASK_ID_bTask100 2
+#define TASK_ID_bTask25 3
+
+// Task entry points
+void OsIdle( void );
+void Startup( void );
+void bTask100( void );
+void bTask25( void );
+
+// Schedule table id's
+
+// Stack size
+#define OS_INTERRUPT_STACK_SIZE 2048
+#define OS_OSIDLE_STACK_SIZE 512
+
+#define OS_ALARM_CNT 2
+#define OS_TASK_CNT 4
+#define OS_SCHTBL_CNT 0
+#define OS_COUNTER_CNT 1
+#define OS_EVENTS_CNT 0
+#define OS_ISRS_CNT 0
+#define OS_RESOURCE_CNT 0
+#define OS_LINKED_RESOURCE_CNT 0
+
+#define CFG_OS_DEBUG STD_OFF
+
+#define OS_SC1 STD_ON
+#define OS_STACK_MONITORING STD_ON
+#define OS_STATUS_EXTENDED STD_ON
+#define OS_USE_GET_SERVICE_ID STD_ON
+#define OS_USE_PARAMETER_ACCESS STD_ON
+#define OS_RES_SCHEDULER STD_ON
+
+#endif /*OS_CFG_H_*/
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
+/*
+* Configuration of module Port (Port_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC5567
+*
+* Module vendor: ArcCore
+* Module version: 1.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 09 13:44:55 CEST 2010
+*/
-
-
-
-
-
-
-
-/*\r
- * Port_Cfg.c\r
- *\r
- * Created on: 2009-jul-08\r
- * Author: rosa\r
- */\r
+ \r
+// File generated on Fri Apr 09 13:44:55 CEST 2010\r
+// File generated by com.arccore.bswbuilder.modules.port.mpc5567\r
\r
+#include "Port.h"\r
#include "Port_Cfg.h"\r
-\r
+#include "stdlib.h"\r
\r
const uint16_t PortPadConfigData[] = {\r
- PCR_RESET, // SIU_PCR0\r
- PCR_RESET, // SIU_PCR1\r
- PCR_RESET, // SIU_PCR2\r
- PCR_RESET, // SIU_PCR3\r
- PCR_RESET, // SIU_PCR4\r
- PCR_RESET, // SIU_PCR5\r
- PCR_RESET, // SIU_PCR6\r
- PCR_RESET, // SIU_PCR7\r
- PCR_RESET, // SIU_PCR8\r
- PCR_RESET, // SIU_PCR9\r
- PCR_RESET, // SIU_PCR10\r
- PCR_RESET, // SIU_PCR11\r
- PCR_RESET, // SIU_PCR12\r
- PCR_RESET, // SIU_PCR13\r
- PCR_RESET, // SIU_PCR14\r
- PCR_RESET, // SIU_PCR15\r
- PCR_RESET, // SIU_PCR16\r
- PCR_RESET, // SIU_PCR17\r
- PCR_RESET, // SIU_PCR18\r
- PCR_RESET, // SIU_PCR19\r
- PCR_RESET, // SIU_PCR20\r
- PCR_RESET, // SIU_PCR21\r
- PCR_RESET, // SIU_PCR22\r
- PCR_RESET, // SIU_PCR23\r
- PCR_RESET, // SIU_PCR24\r
- PCR_RESET, // SIU_PCR25\r
- PCR_RESET, // SIU_PCR26\r
- PCR_RESET, // SIU_PCR27\r
- PCR_RESET, // SIU_PCR28\r
- PCR_RESET, // SIU_PCR29\r
- PCR_RESET, // SIU_PCR30\r
- PCR_RESET, // SIU_PCR31\r
- PCR_RESET, // SIU_PCR32\r
- PCR_RESET, // SIU_PCR33\r
- PCR_RESET, // SIU_PCR34\r
- PCR_RESET, // SIU_PCR35\r
- PCR_RESET, // SIU_PCR36\r
- PCR_RESET, // SIU_PCR37\r
- PCR_RESET, // SIU_PCR38\r
- PCR_RESET, // SIU_PCR39\r
- PCR_RESET, // SIU_PCR40\r
- PCR_RESET, // SIU_PCR41\r
- PCR_RESET, // SIU_PCR42\r
- PCR_RESET, // SIU_PCR43\r
- PCR_RESET, // SIU_PCR44\r
- PCR_RESET, // SIU_PCR45\r
- PCR_RESET, // SIU_PCR46\r
- PCR_RESET, // SIU_PCR47\r
- PCR_RESET, // SIU_PCR48\r
- PCR_RESET, // SIU_PCR49\r
- PCR_RESET, // SIU_PCR50\r
- PCR_RESET, // SIU_PCR51\r
- PCR_RESET, // SIU_PCR52\r
- PCR_RESET, // SIU_PCR53\r
- PCR_RESET, // SIU_PCR54\r
- PCR_RESET, // SIU_PCR55\r
- PCR_RESET, // SIU_PCR56\r
- PCR_RESET, // SIU_PCR57\r
- PCR_RESET, // SIU_PCR58\r
- PCR_RESET, // SIU_PCR59\r
- PCR_RESET, // SIU_PCR60\r
- PCR_RESET, // SIU_PCR61\r
- PCR_RESET, // SIU_PCR62\r
- PCR_RESET, // SIU_PCR63\r
- PCR_RESET, // SIU_PCR64\r
- PCR_RESET, // SIU_PCR65\r
- PCR_RESET, // SIU_PCR66\r
- PCR_RESET, // SIU_PCR67\r
- PCR_RESET, // SIU_PCR68\r
- PCR_RESET, // SIU_PCR69\r
- PCR_RESET, // SIU_PCR70\r
- PCR_RESET, // SIU_PCR71\r
- PCR_RESET, // SIU_PCR72\r
- PCR_RESET, // SIU_PCR73\r
- PCR_RESET, // SIU_PCR74\r
- PCR_RESET, // SIU_PCR75\r
- PCR_RESET, // SIU_PCR76\r
- PCR_RESET, // SIU_PCR77\r
- PCR_RESET, // SIU_PCR78\r
- PCR_RESET, // SIU_PCR79\r
- PCR_RESET, // SIU_PCR80\r
- PCR_RESET, // SIU_PCR81\r
- PCR_RESET, // SIU_PCR82\r
- PCR_RESET, // SIU_PCR83\r
- PCR_RESET, // SIU_PCR84\r
- PCR_RESET, // SIU_PCR85\r
- PCR_RESET, // SIU_PCR86\r
- PCR_RESET, // SIU_PCR87\r
- PCR_RESET, // SIU_PCR88\r
- PCR_RESET, // SIU_PCR89\r
- PCR_RESET, // SIU_PCR90\r
- PCR_RESET, // SIU_PCR91\r
- PCR_RESET, // SIU_PCR92\r
- PCR_RESET, // SIU_PCR93\r
- PCR_RESET, // SIU_PCR94\r
- PCR_RESET, // SIU_PCR95\r
- PCR_RESET, // SIU_PCR96\r
- PCR_RESET, // SIU_PCR97\r
- PCR_RESET, // SIU_PCR98\r
- PCR_RESET, // SIU_PCR99\r
- PCR_RESET, // SIU_PCR100\r
- PCR_RESET, // SIU_PCR101\r
- PCR_RESET, // SIU_PCR102\r
- PCR_RESET, // SIU_PCR103\r
- PCR_RESET, // SIU_PCR104\r
- PCR_RESET, // SIU_PCR105\r
- PCR_RESET, // SIU_PCR106\r
- PCR_RESET, // SIU_PCR107\r
- PCR_RESET, // SIU_PCR108\r
- PCR_RESET, // SIU_PCR109\r
- PCR_RESET, // SIU_PCR110\r
- PCR_RESET, // SIU_PCR111\r
- PCR_RESET, // SIU_PCR112\r
- PCR_RESET, // SIU_PCR113\r
- PCR_RESET, // SIU_PCR114\r
- PCR_RESET, // SIU_PCR115\r
- PCR_RESET, // SIU_PCR116\r
- PCR_RESET, // SIU_PCR117\r
- PCR_RESET, // SIU_PCR118\r
- PCR_RESET, // SIU_PCR119\r
- PCR_RESET, // SIU_PCR120\r
- PCR_RESET, // SIU_PCR121\r
- PCR_RESET, // SIU_PCR122\r
- PCR_RESET, // SIU_PCR123\r
- PCR_RESET, // SIU_PCR124\r
- PCR_IO_OUTPUT, // SIU_PCR125 detta borde vara dioden som sitter på K2\r
- PCR_RESET, // SIU_PCR126\r
- PCR_RESET, // SIU_PCR127\r
- PCR_RESET, // SIU_PCR128\r
- PCR_RESET, // SIU_PCR129\r
- PCR_RESET, // SIU_PCR130\r
- PCR_RESET, // SIU_PCR131\r
- PCR_RESET, // SIU_PCR132\r
- PCR_RESET, // SIU_PCR133\r
- PCR_RESET, // SIU_PCR134\r
- PCR_RESET, // SIU_PCR135\r
- PCR_RESET, // SIU_PCR136\r
- PCR_RESET, // SIU_PCR137\r
- PCR_RESET, // SIU_PCR138\r
- PCR_RESET, // SIU_PCR139\r
- PCR_RESET, // SIU_PCR140\r
- PCR_RESET, // SIU_PCR141\r
- PCR_RESET, // SIU_PCR142\r
- PCR_RESET, // SIU_PCR143\r
- PCR_RESET, // SIU_PCR144\r
- PCR_RESET, // SIU_PCR145\r
- PCR_RESET, // SIU_PCR146\r
- PCR_RESET, // SIU_PCR147\r
- PCR_RESET, // SIU_PCR148\r
- PCR_RESET, // SIU_PCR149\r
- PCR_RESET, // SIU_PCR150\r
- PCR_RESET, // SIU_PCR151\r
- PCR_RESET, // SIU_PCR152\r
- PCR_RESET, // SIU_PCR153\r
- PCR_RESET, // SIU_PCR154\r
- PCR_RESET, // SIU_PCR155\r
- PCR_RESET, // SIU_PCR156\r
- PCR_RESET, // SIU_PCR157\r
- PCR_RESET, // SIU_PCR158\r
- PCR_RESET, // SIU_PCR159\r
- PCR_RESET, // SIU_PCR160\r
- PCR_RESET, // SIU_PCR161\r
- PCR_RESET, // SIU_PCR162\r
- PCR_RESET, // SIU_PCR163\r
- PCR_RESET, // SIU_PCR164\r
- PCR_RESET, // SIU_PCR165\r
- PCR_RESET, // SIU_PCR166\r
- PCR_RESET, // SIU_PCR167\r
- PCR_RESET, // SIU_PCR168\r
- PCR_RESET, // SIU_PCR169\r
- PCR_RESET, // SIU_PCR170\r
- PCR_RESET, // SIU_PCR171\r
- PCR_RESET, // SIU_PCR172\r
- PCR_RESET, // SIU_PCR173\r
- PCR_RESET, // SIU_PCR174\r
- PCR_RESET, // SIU_PCR175\r
- PCR_RESET, // SIU_PCR176\r
- PCR_RESET, // SIU_PCR177\r
- PCR_RESET, // SIU_PCR178\r
- PCR_RESET, // SIU_PCR179\r
- PCR_RESET, // SIU_PCR180\r
- PCR_RESET, // SIU_PCR181\r
- PCR_RESET, // SIU_PCR182\r
- PCR_RESET, // SIU_PCR183\r
- PCR_RESET, // SIU_PCR184\r
- PCR_RESET, // SIU_PCR185\r
- PCR_RESET, // SIU_PCR186\r
- PCR_RESET, // SIU_PCR187\r
- PCR_RESET, // SIU_PCR188\r
- PA_PRIMARY_FUNC|OBE_ENABLE, // SIU_PCR189; This one should be EMIOS channel 10\r
- PCR_RESET, // SIU_PCR190\r
- PA_PRIMARY_FUNC|OBE_ENABLE, // SIU_PCR191; EMIOS channel 12\r
- PCR_RESET, // SIU_PCR192\r
- PCR_RESET, // SIU_PCR193\r
- PCR_RESET, // SIU_PCR194\r
- PCR_RESET, // SIU_PCR195\r
- PCR_RESET, // SIU_PCR196\r
- PCR_RESET, // SIU_PCR197\r
- PCR_RESET, // SIU_PCR198\r
- PCR_RESET, // SIU_PCR199\r
- PCR_RESET, // SIU_PCR200\r
- PCR_RESET, // SIU_PCR201\r
- PCR_RESET, // SIU_PCR202\r
- PCR_RESET, // SIU_PCR203\r
- PCR_RESET, // SIU_PCR204\r
- PCR_RESET, // SIU_PCR205\r
- PCR_RESET, // SIU_PCR206\r
- PCR_RESET, // SIU_PCR207\r
- PCR_RESET, // SIU_PCR208\r
- PCR_RESET, // SIU_PCR209\r
- PCR_RESET, // SIU_PCR210\r
- PCR_RESET, // SIU_PCR211\r
- PCR_RESET, // SIU_PCR212\r
- PCR_RESET, // SIU_PCR213\r
- PCR_RESET, // SIU_PCR214\r
- PCR_RESET, // SIU_PCR215\r
- PCR_RESET, // SIU_PCR216\r
- PCR_RESET, // SIU_PCR217\r
- PCR_RESET, // SIU_PCR218\r
- PCR_RESET, // SIU_PCR219\r
- PCR_RESET, // SIU_PCR220\r
- PCR_RESET, // SIU_PCR221\r
- PCR_RESET, // SIU_PCR222\r
- PCR_RESET, // SIU_PCR223\r
- PCR_RESET, // SIU_PCR224\r
- PCR_RESET, // SIU_PCR225\r
- PCR_RESET, // SIU_PCR226\r
- PCR_RESET, // SIU_PCR227\r
- PCR_RESET, // SIU_PCR228\r
- PCR_RESET, // SIU_PCR229\r
- PCR_RESET, // SIU_PCR230\r
- };\r
+ PCR_RESET, /* PCR 0 */\r
+ PCR_RESET, /* PCR 1 */\r
+ PCR_RESET, /* PCR 2 */\r
+ PCR_RESET, /* PCR 3 */\r
+ PCR_RESET, /* PCR 4 */\r
+ PCR_RESET, /* PCR 5 */\r
+ PCR_RESET, /* PCR 6 */\r
+ PCR_RESET, /* PCR 7 */\r
+ PCR_RESET, /* PCR 8 */\r
+ PCR_RESET, /* PCR 9 */\r
+ PCR_RESET, /* PCR 10 */\r
+ PCR_RESET, /* PCR 11 */\r
+ PCR_RESET, /* PCR 12 */\r
+ PCR_RESET, /* PCR 13 */\r
+ PCR_RESET, /* PCR 14 */\r
+ PCR_RESET, /* PCR 15 */\r
+ PCR_RESET, /* PCR 16 */\r
+ PCR_RESET, /* PCR 17 */\r
+ PCR_RESET, /* PCR 18 */\r
+ PCR_RESET, /* PCR 19 */\r
+ PCR_RESET, /* PCR 20 */\r
+ PCR_RESET, /* PCR 21 */\r
+ PCR_RESET, /* PCR 22 */\r
+ PCR_RESET, /* PCR 23 */\r
+ PCR_RESET, /* PCR 24 */\r
+ PCR_RESET, /* PCR 25 */\r
+ PCR_RESET, /* PCR 26 */\r
+ PCR_RESET, /* PCR 27 */\r
+ PCR_RESET, /* PCR 28 */\r
+ PCR_RESET, /* PCR 29 */\r
+ PCR_RESET, /* PCR 30 */\r
+ PCR_RESET, /* PCR 31 */\r
+ PCR_RESET, /* PCR 32 */\r
+ PCR_RESET, /* PCR 33 */\r
+ PCR_RESET, /* PCR 34 */\r
+ PCR_RESET, /* PCR 35 */\r
+ PCR_RESET, /* PCR 36 */\r
+ PCR_RESET, /* PCR 37 */\r
+ PCR_RESET, /* PCR 38 */\r
+ PCR_RESET, /* PCR 39 */\r
+ PCR_RESET, /* PCR 40 */\r
+ PCR_RESET, /* PCR 41 */\r
+ PCR_RESET, /* PCR 42 */\r
+ PCR_RESET, /* PCR 43 */\r
+ PCR_RESET, /* PCR 44 */\r
+ PCR_RESET, /* PCR 45 */\r
+ PCR_RESET, /* PCR 46 */\r
+ PCR_RESET, /* PCR 47 */\r
+ PCR_RESET, /* PCR 48 */\r
+ PCR_RESET, /* PCR 49 */\r
+ PCR_RESET, /* PCR 50 */\r
+ PCR_RESET, /* PCR 51 */\r
+ PCR_RESET, /* PCR 52 */\r
+ PCR_RESET, /* PCR 53 */\r
+ PCR_RESET, /* PCR 54 */\r
+ PCR_RESET, /* PCR 55 */\r
+ PCR_RESET, /* PCR 56 */\r
+ PCR_RESET, /* PCR 57 */\r
+ PCR_RESET, /* PCR 58 */\r
+ PCR_RESET, /* PCR 59 */\r
+ PCR_RESET, /* PCR 60 */\r
+ PCR_RESET, /* PCR 61 */\r
+ PCR_RESET, /* PCR 62 */\r
+ PCR_RESET, /* PCR 63 */\r
+ PCR_RESET, /* PCR 64 */\r
+ PCR_RESET, /* PCR 65 */\r
+ PCR_RESET, /* PCR 66 */\r
+ PCR_RESET, /* PCR 67 */\r
+ PCR_RESET, /* PCR 68 */\r
+ PCR_RESET, /* PCR 69 */\r
+ PCR_RESET, /* PCR 70 */\r
+ PCR_RESET, /* PCR 71 */\r
+ PCR_RESET, /* PCR 72 */\r
+ PCR_RESET, /* PCR 73 */\r
+ PCR_RESET, /* PCR 74 */\r
+ PCR_RESET, /* PCR 75 */\r
+ PCR_RESET, /* PCR 76 */\r
+ PCR_RESET, /* PCR 77 */\r
+ PCR_RESET, /* PCR 78 */\r
+ PCR_RESET, /* PCR 79 */\r
+ PCR_RESET, /* PCR 80 */\r
+ PCR_RESET, /* PCR 81 */\r
+ PCR_RESET, /* PCR 82 */\r
+ PCR_RESET, /* PCR 83 */\r
+ PCR_RESET, /* PCR 84 */\r
+ PCR_RESET, /* PCR 85 */\r
+ PCR_RESET, /* PCR 86 */\r
+ PCR_RESET, /* PCR 87 */\r
+ PCR_RESET, /* PCR 88 */\r
+ PCR_RESET, /* PCR 89 */\r
+ PCR_RESET, /* PCR 90 */\r
+ PCR_RESET, /* PCR 91 */\r
+ PCR_RESET, /* PCR 92 */\r
+ PCR_RESET, /* PCR 93 */\r
+ PCR_RESET, /* PCR 94 */\r
+ PCR_RESET, /* PCR 95 */\r
+ PCR_RESET, /* PCR 96 */\r
+ PCR_RESET, /* PCR 97 */\r
+ PCR_RESET, /* PCR 98 */\r
+ PCR_RESET, /* PCR 99 */\r
+ PCR_RESET, /* PCR 100 */\r
+ PCR_RESET, /* PCR 101 */\r
+ PCR_RESET, /* PCR 102 */\r
+ PCR_RESET, /* PCR 103 */\r
+ PCR_RESET, /* PCR 104 */\r
+ PCR_RESET, /* PCR 105 */\r
+ PCR_RESET, /* PCR 106 */\r
+ PCR_RESET, /* PCR 107 */\r
+ PCR_RESET, /* PCR 108 */\r
+ PCR_RESET, /* PCR 109 */\r
+ PCR_RESET, /* PCR 110 */\r
+ PCR_RESET, /* PCR 111 */\r
+ PCR_RESET, /* PCR 112 */\r
+ PCR_RESET, /* PCR 113 */\r
+ PCR_RESET, /* PCR 114 */\r
+ PCR_RESET, /* PCR 115 */\r
+ PCR_RESET, /* PCR 116 */\r
+ PCR_RESET, /* PCR 117 */\r
+ PCR_RESET, /* PCR 118 */\r
+ PCR_RESET, /* PCR 119 */\r
+ PCR_RESET, /* PCR 120 */\r
+ PCR_RESET, /* PCR 121 */\r
+ PCR_RESET, /* PCR 122 */\r
+ PCR_RESET, /* PCR 123 */\r
+ PCR_RESET, /* PCR 124 */\r
+ PCR_RESET, /* PCR 125 */\r
+ PCR_RESET, /* PCR 126 */\r
+ PCR_RESET, /* PCR 127 */\r
+ PCR_RESET, /* PCR 128 */\r
+ PCR_RESET, /* PCR 129 */\r
+ PCR_RESET, /* PCR 130 */\r
+ PCR_RESET, /* PCR 131 */\r
+ PCR_RESET, /* PCR 132 */\r
+ PCR_RESET, /* PCR 133 */\r
+ PCR_RESET, /* PCR 134 */\r
+ PCR_RESET, /* PCR 135 */\r
+ PCR_RESET, /* PCR 136 */\r
+ PCR_RESET, /* PCR 137 */\r
+ PCR_RESET, /* PCR 138 */\r
+ PCR_RESET, /* PCR 139 */\r
+ PCR_RESET, /* PCR 140 */\r
+ PCR_RESET, /* PCR 141 */\r
+ PCR_RESET, /* PCR 142 */\r
+ PCR_RESET, /* PCR 143 */\r
+ PCR_RESET, /* PCR 144 */\r
+ PCR_RESET, /* PCR 145 */\r
+ PCR_RESET, /* PCR 146 */\r
+ PCR_RESET, /* PCR 147 */\r
+ PCR_RESET, /* PCR 148 */\r
+ PCR_RESET, /* PCR 149 */\r
+ PCR_RESET, /* PCR 150 */\r
+ PCR_RESET, /* PCR 151 */\r
+ PCR_RESET, /* PCR 152 */\r
+ PCR_RESET, /* PCR 153 */\r
+ PCR_RESET, /* PCR 154 */\r
+ PCR_RESET, /* PCR 155 */\r
+ PCR_RESET, /* PCR 156 */\r
+ PCR_RESET, /* PCR 157 */\r
+ PCR_RESET, /* PCR 158 */\r
+ PCR_RESET, /* PCR 159 */\r
+ PCR_RESET, /* PCR 160 */\r
+ PCR_RESET, /* PCR 161 */\r
+ PCR_RESET, /* PCR 162 */\r
+ PCR_RESET, /* PCR 163 */\r
+ PCR_RESET, /* PCR 164 */\r
+ PCR_RESET, /* PCR 165 */\r
+ PCR_RESET, /* PCR 166 */\r
+ PCR_RESET, /* PCR 167 */\r
+ PCR_RESET, /* PCR 168 */\r
+ PCR_RESET, /* PCR 169 */\r
+ PCR_RESET, /* PCR 170 */\r
+ PCR_RESET, /* PCR 171 */\r
+ PCR_RESET, /* PCR 172 */\r
+ PCR_RESET, /* PCR 173 */\r
+ PCR_RESET, /* PCR 174 */\r
+ PCR_RESET, /* PCR 175 */\r
+ PCR_RESET, /* PCR 176 */\r
+ PCR_RESET, /* PCR 177 */\r
+ PCR_RESET, /* PCR 178 */\r
+ PCR_RESET, /* PCR 179 */\r
+ PCR_RESET, /* PCR 180 */\r
+ PCR_RESET, /* PCR 181 */\r
+ PCR_RESET, /* PCR 182 */\r
+ PCR_RESET, /* PCR 183 */\r
+ PCR_RESET, /* PCR 184 */\r
+ PCR_RESET, /* PCR 185 */\r
+ PCR_RESET, /* PCR 186 */\r
+ PCR_RESET, /* PCR 187 */\r
+ PCR_RESET, /* PCR 188 */\r
+ ( FUNC1 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 189 : PORT_PIN_MODE_PWM */\r
+ PCR_RESET, /* PCR 190 */\r
+ ( FUNC1 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 191 : PORT_PIN_MODE_PWM */\r
+ PCR_RESET, /* PCR 192 */\r
+ PCR_RESET, /* PCR 193 */\r
+ PCR_RESET, /* PCR 194 */\r
+ PCR_RESET, /* PCR 195 */\r
+ PCR_RESET, /* PCR 196 */\r
+ PCR_RESET, /* PCR 197 */\r
+ PCR_RESET, /* PCR 198 */\r
+ PCR_RESET, /* PCR 199 */\r
+ PCR_RESET, /* PCR 200 */\r
+ PCR_RESET, /* PCR 201 */\r
+ PCR_RESET, /* PCR 202 */\r
+ PCR_RESET, /* PCR 203 */\r
+ PCR_RESET, /* PCR 204 */\r
+ PCR_RESET, /* PCR 205 */\r
+ PCR_RESET, /* PCR 206 */\r
+ PCR_RESET, /* PCR 207 */\r
+ PCR_RESET, /* PCR 208 */\r
+ PCR_RESET, /* PCR 209 */\r
+ PCR_RESET, /* PCR 210 */\r
+ PCR_RESET, /* PCR 211 */\r
+ PCR_RESET, /* PCR 212 */\r
+ PCR_RESET, /* PCR 213 */\r
+ PCR_RESET, /* PCR 214 */\r
+ PCR_RESET, /* PCR 215 */\r
+ PCR_RESET, /* PCR 216 */\r
+ PCR_RESET, /* PCR 217 */\r
+ PCR_RESET, /* PCR 218 */\r
+ PCR_RESET, /* PCR 219 */\r
+ PCR_RESET, /* PCR 220 */\r
+ PCR_RESET, /* PCR 221 */\r
+ PCR_RESET, /* PCR 222 */\r
+ PCR_RESET, /* PCR 223 */\r
+ PCR_RESET, /* PCR 224 */\r
+ PCR_RESET, /* PCR 225 */\r
+ PCR_RESET, /* PCR 226 */\r
+ PCR_RESET, /* PCR 227 */\r
+ PCR_RESET, /* PCR 228 */\r
+ PCR_RESET, /* PCR 229 */\r
+ PCR_RESET, /* PCR 230 */\r
+ PCR_RESET, /* PCR 231 */\r
+ PCR_RESET, /* PCR 232 */\r
+ PCR_RESET, /* PCR 233 */\r
+ PCR_RESET, /* PCR 234 */\r
+ PCR_RESET, /* PCR 235 */\r
+ PCR_RESET, /* PCR 236 */\r
+ PCR_RESET, /* PCR 237 */\r
+ PCR_RESET, /* PCR 238 */\r
+ PCR_RESET, /* PCR 239 */\r
+ PCR_RESET, /* PCR 240 */\r
+ PCR_RESET, /* PCR 241 */\r
+ PCR_RESET, /* PCR 242 */\r
+ PCR_RESET, /* PCR 243 */\r
+ PCR_RESET, /* PCR 244 */\r
+ PCR_RESET, /* PCR 245 */\r
+ PCR_RESET, /* PCR 246 */\r
+ PCR_RESET, /* PCR 247 */\r
+ PCR_RESET, /* PCR 248 */\r
+ PCR_RESET, /* PCR 249 */\r
+ PCR_RESET, /* PCR 250 */\r
+ PCR_RESET, /* PCR 251 */\r
+ PCR_RESET, /* PCR 252 */\r
+ PCR_RESET, /* PCR 253 */\r
+ PCR_RESET, /* PCR 254 */\r
+ PCR_RESET, /* PCR 255 */\r
+ PCR_RESET, /* PCR 256 */\r
+ PCR_RESET, /* PCR 257 */\r
+ PCR_RESET, /* PCR 258 */\r
+ PCR_RESET, /* PCR 259 */\r
+ PCR_RESET, /* PCR 260 */\r
+ PCR_RESET, /* PCR 261 */\r
+ PCR_RESET, /* PCR 262 */\r
+ PCR_RESET, /* PCR 263 */\r
+ PCR_RESET, /* PCR 264 */\r
+ PCR_RESET, /* PCR 265 */\r
+ PCR_RESET, /* PCR 266 */\r
+ PCR_RESET, /* PCR 267 */\r
+ PCR_RESET, /* PCR 268 */\r
+ PCR_RESET, /* PCR 269 */\r
+ PCR_RESET, /* PCR 270 */\r
+ PCR_RESET, /* PCR 271 */\r
+ PCR_RESET, /* PCR 272 */\r
+ PCR_RESET, /* PCR 273 */\r
+ PCR_RESET, /* PCR 274 */\r
+ PCR_RESET, /* PCR 275 */\r
+ PCR_RESET, /* PCR 276 */\r
+ PCR_RESET, /* PCR 277 */\r
+ PCR_RESET, /* PCR 278 */\r
+ PCR_RESET, /* PCR 279 */\r
+ PCR_RESET, /* PCR 280 */\r
+ PCR_RESET, /* PCR 281 */\r
+ PCR_RESET, /* PCR 282 */\r
+ PCR_RESET, /* PCR 283 */\r
+ PCR_RESET, /* PCR 284 */\r
+ PCR_RESET, /* PCR 285 */\r
+ PCR_RESET, /* PCR 286 */\r
+ PCR_RESET, /* PCR 287 */\r
+ PCR_RESET, /* PCR 288 */\r
+ PCR_RESET, /* PCR 289 */\r
+ PCR_RESET, /* PCR 290 */\r
+ PCR_RESET, /* PCR 291 */\r
+ PCR_RESET, /* PCR 292 */\r
+ PCR_RESET, /* PCR 293 */\r
+ PCR_RESET, /* PCR 294 */\r
+ PCR_RESET, /* PCR 295 */\r
+ PCR_RESET, /* PCR 296 */\r
+ PCR_RESET, /* PCR 297 */\r
+ PCR_RESET, /* PCR 298 */\r
+};\r
\r
const uint8_t PortOutConfigData[] = {\r
- GPDO_RESET, // SIU_GPDO0\r
- GPDO_RESET, // SIU_GPDO1\r
- GPDO_RESET, // SIU_GPDO2\r
- GPDO_RESET, // SIU_GPDO3\r
- GPDO_RESET, // SIU_GPDO4\r
- GPDO_RESET, // SIU_GPDO5\r
- GPDO_RESET, // SIU_GPDO6\r
- GPDO_RESET, // SIU_GPDO7\r
- GPDO_RESET, // SIU_GPDO8\r
- GPDO_RESET, // SIU_GPDO9\r
- GPDO_RESET, // SIU_GPDO10\r
- GPDO_RESET, // SIU_GPDO11\r
- GPDO_RESET, // SIU_GPDO12\r
- GPDO_RESET, // SIU_GPDO13\r
- GPDO_RESET, // SIU_GPDO14\r
- GPDO_RESET, // SIU_GPDO15\r
- GPDO_RESET, // SIU_GPDO16\r
- GPDO_RESET, // SIU_GPDO17\r
- GPDO_RESET, // SIU_GPDO18\r
- GPDO_RESET, // SIU_GPDO19\r
- GPDO_RESET, // SIU_GPDO20\r
- GPDO_RESET, // SIU_GPDO21\r
- GPDO_RESET, // SIU_GPDO22\r
- GPDO_RESET, // SIU_GPDO23\r
- GPDO_RESET, // SIU_GPDO24\r
- GPDO_RESET, // SIU_GPDO25\r
- GPDO_RESET, // SIU_GPDO26\r
- GPDO_RESET, // SIU_GPDO27\r
- GPDO_RESET, // SIU_GPDO28\r
- GPDO_RESET, // SIU_GPDO29\r
- GPDO_RESET, // SIU_GPDO30\r
- GPDO_RESET, // SIU_GPDO31\r
- GPDO_RESET, // SIU_GPDO32\r
- GPDO_RESET, // SIU_GPDO33\r
- GPDO_RESET, // SIU_GPDO34\r
- GPDO_RESET, // SIU_GPDO35\r
- GPDO_RESET, // SIU_GPDO36\r
- GPDO_RESET, // SIU_GPDO37\r
- GPDO_RESET, // SIU_GPDO38\r
- GPDO_RESET, // SIU_GPDO39\r
- GPDO_RESET, // SIU_GPDO40\r
- GPDO_RESET, // SIU_GPDO41\r
- GPDO_RESET, // SIU_GPDO42\r
- GPDO_RESET, // SIU_GPDO43\r
- GPDO_RESET, // SIU_GPDO44\r
- GPDO_RESET, // SIU_GPDO45\r
- GPDO_RESET, // SIU_GPDO46\r
- GPDO_RESET, // SIU_GPDO47\r
- GPDO_RESET, // SIU_GPDO48\r
- GPDO_RESET, // SIU_GPDO49\r
- GPDO_RESET, // SIU_GPDO50\r
- GPDO_RESET, // SIU_GPDO51\r
- GPDO_RESET, // SIU_GPDO52\r
- GPDO_RESET, // SIU_GPDO53\r
- GPDO_RESET, // SIU_GPDO54\r
- GPDO_RESET, // SIU_GPDO55\r
- GPDO_RESET, // SIU_GPDO56\r
- GPDO_RESET, // SIU_GPDO57\r
- GPDO_RESET, // SIU_GPDO58\r
- GPDO_RESET, // SIU_GPDO59\r
- GPDO_RESET, // SIU_GPDO60\r
- GPDO_RESET, // SIU_GPDO61\r
- GPDO_RESET, // SIU_GPDO62\r
- GPDO_RESET, // SIU_GPDO63\r
- GPDO_RESET, // SIU_GPDO64\r
- GPDO_RESET, // SIU_GPDO65\r
- GPDO_RESET, // SIU_GPDO66\r
- GPDO_RESET, // SIU_GPDO67\r
- GPDO_RESET, // SIU_GPDO68\r
- GPDO_RESET, // SIU_GPDO69\r
- GPDO_RESET, // SIU_GPDO70\r
- GPDO_RESET, // SIU_GPDO71\r
- GPDO_RESET, // SIU_GPDO72\r
- GPDO_RESET, // SIU_GPDO73\r
- GPDO_RESET, // SIU_GPDO74\r
- GPDO_RESET, // SIU_GPDO75\r
- GPDO_RESET, // SIU_GPDO76\r
- GPDO_RESET, // SIU_GPDO77\r
- GPDO_RESET, // SIU_GPDO78\r
- GPDO_RESET, // SIU_GPDO79\r
- GPDO_RESET, // SIU_GPDO80\r
- GPDO_RESET, // SIU_GPDO81\r
- GPDO_RESET, // SIU_GPDO82\r
- GPDO_RESET, // SIU_GPDO83\r
- GPDO_RESET, // SIU_GPDO84\r
- GPDO_RESET, // SIU_GPDO85\r
- GPDO_RESET, // SIU_GPDO86\r
- GPDO_RESET, // SIU_GPDO87\r
- GPDO_RESET, // SIU_GPDO88\r
- GPDO_RESET, // SIU_GPDO89\r
- GPDO_RESET, // SIU_GPDO90\r
- GPDO_RESET, // SIU_GPDO91\r
- GPDO_RESET, // SIU_GPDO92\r
- GPDO_RESET, // SIU_GPDO93\r
- GPDO_RESET, // SIU_GPDO94\r
- GPDO_RESET, // SIU_GPDO95\r
- GPDO_RESET, // SIU_GPDO96\r
- GPDO_RESET, // SIU_GPDO97\r
- GPDO_RESET, // SIU_GPDO98\r
- GPDO_RESET, // SIU_GPDO99\r
- GPDO_RESET, // SIU_GPDO100\r
- GPDO_RESET, // SIU_GPDO101\r
- GPDO_RESET, // SIU_GPDO102\r
- GPDO_RESET, // SIU_GPDO103\r
- GPDO_RESET, // SIU_GPDO104\r
- GPDO_RESET, // SIU_GPDO105\r
- GPDO_RESET, // SIU_GPDO106\r
- GPDO_RESET, // SIU_GPDO107\r
- GPDO_RESET, // SIU_GPDO108\r
- GPDO_RESET, // SIU_GPDO109\r
- GPDO_RESET, // SIU_GPDO110\r
- GPDO_RESET, // SIU_GPDO111\r
- GPDO_RESET, // SIU_GPDO112\r
- GPDO_RESET, // SIU_GPDO113\r
- GPDO_RESET, // SIU_GPDO114\r
- GPDO_RESET, // SIU_GPDO115\r
- GPDO_RESET, // SIU_GPDO116\r
- GPDO_RESET, // SIU_GPDO117\r
- GPDO_RESET, // SIU_GPDO118\r
- GPDO_RESET, // SIU_GPDO119\r
- GPDO_RESET, // SIU_GPDO120\r
- GPDO_RESET, // SIU_GPDO121\r
- GPDO_RESET, // SIU_GPDO122\r
- GPDO_RESET, // SIU_GPDO123\r
- GPDO_RESET, // SIU_GPDO124\r
- GPDO_RESET, // SIU_GPDO125\r
- GPDO_RESET, // SIU_GPDO126\r
- GPDO_RESET, // SIU_GPDO127\r
- GPDO_RESET, // SIU_GPDO128\r
- GPDO_RESET, // SIU_GPDO129\r
- GPDO_RESET, // SIU_GPDO130\r
- GPDO_RESET, // SIU_GPDO131\r
- GPDO_RESET, // SIU_GPDO132\r
- GPDO_RESET, // SIU_GPDO133\r
- GPDO_RESET, // SIU_GPDO134\r
- GPDO_RESET, // SIU_GPDO135\r
- GPDO_RESET, // SIU_GPDO136\r
- GPDO_RESET, // SIU_GPDO137\r
- GPDO_RESET, // SIU_GPDO138\r
- GPDO_RESET, // SIU_GPDO139\r
- GPDO_RESET, // SIU_GPDO140\r
- GPDO_RESET, // SIU_GPDO141\r
- GPDO_RESET, // SIU_GPDO142\r
- GPDO_RESET, // SIU_GPDO143\r
- GPDO_RESET, // SIU_GPDO144\r
- GPDO_RESET, // SIU_GPDO145\r
- GPDO_RESET, // SIU_GPDO146\r
- GPDO_RESET, // SIU_GPDO147\r
- GPDO_RESET, // SIU_GPDO148\r
- GPDO_RESET, // SIU_GPDO149\r
- GPDO_RESET, // SIU_GPDO150\r
- GPDO_RESET, // SIU_GPDO151\r
- GPDO_RESET, // SIU_GPDO152\r
- GPDO_RESET, // SIU_GPDO153\r
- GPDO_RESET, // SIU_GPDO154\r
- GPDO_RESET, // SIU_GPDO155\r
- GPDO_RESET, // SIU_GPDO156\r
- GPDO_RESET, // SIU_GPDO157\r
- GPDO_RESET, // SIU_GPDO158\r
- GPDO_RESET, // SIU_GPDO159\r
- GPDO_RESET, // SIU_GPDO160\r
- GPDO_RESET, // SIU_GPDO161\r
- GPDO_RESET, // SIU_GPDO162\r
- GPDO_RESET, // SIU_GPDO163\r
- GPDO_RESET, // SIU_GPDO164\r
- GPDO_RESET, // SIU_GPDO165\r
- GPDO_RESET, // SIU_GPDO166\r
- GPDO_RESET, // SIU_GPDO167\r
- GPDO_RESET, // SIU_GPDO168\r
- GPDO_RESET, // SIU_GPDO169\r
- GPDO_RESET, // SIU_GPDO170\r
- GPDO_RESET, // SIU_GPDO171\r
- GPDO_RESET, // SIU_GPDO172\r
- GPDO_RESET, // SIU_GPDO173\r
- GPDO_RESET, // SIU_GPDO174\r
- GPDO_RESET, // SIU_GPDO175\r
- GPDO_RESET, // SIU_GPDO176\r
- GPDO_RESET, // SIU_GPDO177\r
- GPDO_RESET, // SIU_GPDO178\r
- GPDO_RESET, // SIU_GPDO179\r
- GPDO_RESET, // SIU_GPDO180\r
- GPDO_RESET, // SIU_GPDO181\r
- GPDO_RESET, // SIU_GPDO182\r
- GPDO_RESET, // SIU_GPDO183\r
- GPDO_RESET, // SIU_GPDO184\r
- GPDO_RESET, // SIU_GPDO185\r
- GPDO_RESET, // SIU_GPDO186\r
- GPDO_RESET, // SIU_GPDO187\r
- GPDO_RESET, // SIU_GPDO188\r
- GPDO_RESET, // SIU_GPDO189\r
- GPDO_RESET, // SIU_GPDO190\r
- GPDO_RESET, // SIU_GPDO191\r
- GPDO_RESET, // SIU_GPDO192\r
- GPDO_RESET, // SIU_GPDO193\r
- GPDO_RESET, // SIU_GPDO194\r
- GPDO_RESET, // SIU_GPDO195\r
- GPDO_RESET, // SIU_GPDO196\r
- GPDO_RESET, // SIU_GPDO197\r
- GPDO_RESET, // SIU_GPDO198\r
- GPDO_RESET, // SIU_GPDO199\r
- GPDO_RESET, // SIU_GPDO200\r
- GPDO_RESET, // SIU_GPDO201\r
- GPDO_RESET, // SIU_GPDO202\r
- GPDO_RESET, // SIU_GPDO203\r
- GPDO_RESET, // SIU_GPDO204\r
- GPDO_RESET, // SIU_GPDO205\r
- GPDO_RESET, // SIU_GPDO206\r
- GPDO_RESET, // SIU_GPDO207\r
- GPDO_RESET, // SIU_GPDO208\r
- GPDO_RESET, // SIU_GPDO209\r
- GPDO_RESET, // SIU_GPDO210\r
- GPDO_RESET, // SIU_GPDO211\r
- GPDO_RESET, // SIU_GPDO212\r
- GPDO_RESET, // SIU_GPDO213\r
+ GPDO_RESET, /* GPDO 0 */\r
+ GPDO_RESET, /* GPDO 1 */\r
+ GPDO_RESET, /* GPDO 2 */\r
+ GPDO_RESET, /* GPDO 3 */\r
+ GPDO_RESET, /* GPDO 4 */\r
+ GPDO_RESET, /* GPDO 5 */\r
+ GPDO_RESET, /* GPDO 6 */\r
+ GPDO_RESET, /* GPDO 7 */\r
+ GPDO_RESET, /* GPDO 8 */\r
+ GPDO_RESET, /* GPDO 9 */\r
+ GPDO_RESET, /* GPDO 10 */\r
+ GPDO_RESET, /* GPDO 11 */\r
+ GPDO_RESET, /* GPDO 12 */\r
+ GPDO_RESET, /* GPDO 13 */\r
+ GPDO_RESET, /* GPDO 14 */\r
+ GPDO_RESET, /* GPDO 15 */\r
+ GPDO_RESET, /* GPDO 16 */\r
+ GPDO_RESET, /* GPDO 17 */\r
+ GPDO_RESET, /* GPDO 18 */\r
+ GPDO_RESET, /* GPDO 19 */\r
+ GPDO_RESET, /* GPDO 20 */\r
+ GPDO_RESET, /* GPDO 21 */\r
+ GPDO_RESET, /* GPDO 22 */\r
+ GPDO_RESET, /* GPDO 23 */\r
+ GPDO_RESET, /* GPDO 24 */\r
+ GPDO_RESET, /* GPDO 25 */\r
+ GPDO_RESET, /* GPDO 26 */\r
+ GPDO_RESET, /* GPDO 27 */\r
+ GPDO_RESET, /* GPDO 28 */\r
+ GPDO_RESET, /* GPDO 29 */\r
+ GPDO_RESET, /* GPDO 30 */\r
+ GPDO_RESET, /* GPDO 31 */\r
+ GPDO_RESET, /* GPDO 32 */\r
+ GPDO_RESET, /* GPDO 33 */\r
+ GPDO_RESET, /* GPDO 34 */\r
+ GPDO_RESET, /* GPDO 35 */\r
+ GPDO_RESET, /* GPDO 36 */\r
+ GPDO_RESET, /* GPDO 37 */\r
+ GPDO_RESET, /* GPDO 38 */\r
+ GPDO_RESET, /* GPDO 39 */\r
+ GPDO_RESET, /* GPDO 40 */\r
+ GPDO_RESET, /* GPDO 41 */\r
+ GPDO_RESET, /* GPDO 42 */\r
+ GPDO_RESET, /* GPDO 43 */\r
+ GPDO_RESET, /* GPDO 44 */\r
+ GPDO_RESET, /* GPDO 45 */\r
+ GPDO_RESET, /* GPDO 46 */\r
+ GPDO_RESET, /* GPDO 47 */\r
+ GPDO_RESET, /* GPDO 48 */\r
+ GPDO_RESET, /* GPDO 49 */\r
+ GPDO_RESET, /* GPDO 50 */\r
+ GPDO_RESET, /* GPDO 51 */\r
+ GPDO_RESET, /* GPDO 52 */\r
+ GPDO_RESET, /* GPDO 53 */\r
+ GPDO_RESET, /* GPDO 54 */\r
+ GPDO_RESET, /* GPDO 55 */\r
+ GPDO_RESET, /* GPDO 56 */\r
+ GPDO_RESET, /* GPDO 57 */\r
+ GPDO_RESET, /* GPDO 58 */\r
+ GPDO_RESET, /* GPDO 59 */\r
+ GPDO_RESET, /* GPDO 60 */\r
+ GPDO_RESET, /* GPDO 61 */\r
+ GPDO_RESET, /* GPDO 62 */\r
+ GPDO_RESET, /* GPDO 63 */\r
+ GPDO_RESET, /* GPDO 64 */\r
+ GPDO_RESET, /* GPDO 65 */\r
+ GPDO_RESET, /* GPDO 66 */\r
+ GPDO_RESET, /* GPDO 67 */\r
+ GPDO_RESET, /* GPDO 68 */\r
+ GPDO_RESET, /* GPDO 69 */\r
+ GPDO_RESET, /* GPDO 70 */\r
+ GPDO_RESET, /* GPDO 71 */\r
+ GPDO_RESET, /* GPDO 72 */\r
+ GPDO_RESET, /* GPDO 73 */\r
+ GPDO_RESET, /* GPDO 74 */\r
+ GPDO_RESET, /* GPDO 75 */\r
+ GPDO_RESET, /* GPDO 76 */\r
+ GPDO_RESET, /* GPDO 77 */\r
+ GPDO_RESET, /* GPDO 78 */\r
+ GPDO_RESET, /* GPDO 79 */\r
+ GPDO_RESET, /* GPDO 80 */\r
+ GPDO_RESET, /* GPDO 81 */\r
+ GPDO_RESET, /* GPDO 82 */\r
+ GPDO_RESET, /* GPDO 83 */\r
+ GPDO_RESET, /* GPDO 84 */\r
+ GPDO_RESET, /* GPDO 85 */\r
+ GPDO_RESET, /* GPDO 86 */\r
+ GPDO_RESET, /* GPDO 87 */\r
+ GPDO_RESET, /* GPDO 88 */\r
+ GPDO_RESET, /* GPDO 89 */\r
+ GPDO_RESET, /* GPDO 90 */\r
+ GPDO_RESET, /* GPDO 91 */\r
+ GPDO_RESET, /* GPDO 92 */\r
+ GPDO_RESET, /* GPDO 93 */\r
+ GPDO_RESET, /* GPDO 94 */\r
+ GPDO_RESET, /* GPDO 95 */\r
+ GPDO_RESET, /* GPDO 96 */\r
+ GPDO_RESET, /* GPDO 97 */\r
+ GPDO_RESET, /* GPDO 98 */\r
+ GPDO_RESET, /* GPDO 99 */\r
+ GPDO_RESET, /* GPDO 100 */\r
+ GPDO_RESET, /* GPDO 101 */\r
+ GPDO_RESET, /* GPDO 102 */\r
+ GPDO_RESET, /* GPDO 103 */\r
+ GPDO_RESET, /* GPDO 104 */\r
+ GPDO_RESET, /* GPDO 105 */\r
+ GPDO_RESET, /* GPDO 106 */\r
+ GPDO_RESET, /* GPDO 107 */\r
+ GPDO_RESET, /* GPDO 108 */\r
+ GPDO_RESET, /* GPDO 109 */\r
+ GPDO_RESET, /* GPDO 110 */\r
+ GPDO_RESET, /* GPDO 111 */\r
+ GPDO_RESET, /* GPDO 112 */\r
+ GPDO_RESET, /* GPDO 113 */\r
+ GPDO_RESET, /* GPDO 114 */\r
+ GPDO_RESET, /* GPDO 115 */\r
+ GPDO_RESET, /* GPDO 116 */\r
+ GPDO_RESET, /* GPDO 117 */\r
+ GPDO_RESET, /* GPDO 118 */\r
+ GPDO_RESET, /* GPDO 119 */\r
+ GPDO_RESET, /* GPDO 120 */\r
+ GPDO_RESET, /* GPDO 121 */\r
+ GPDO_RESET, /* GPDO 122 */\r
+ GPDO_RESET, /* GPDO 123 */\r
+ GPDO_RESET, /* GPDO 124 */\r
+ GPDO_RESET, /* GPDO 125 */\r
+ GPDO_RESET, /* GPDO 126 */\r
+ GPDO_RESET, /* GPDO 127 */\r
+ GPDO_RESET, /* GPDO 128 */\r
+ GPDO_RESET, /* GPDO 129 */\r
+ GPDO_RESET, /* GPDO 130 */\r
+ GPDO_RESET, /* GPDO 131 */\r
+ GPDO_RESET, /* GPDO 132 */\r
+ GPDO_RESET, /* GPDO 133 */\r
+ GPDO_RESET, /* GPDO 134 */\r
+ GPDO_RESET, /* GPDO 135 */\r
+ GPDO_RESET, /* GPDO 136 */\r
+ GPDO_RESET, /* GPDO 137 */\r
+ GPDO_RESET, /* GPDO 138 */\r
+ GPDO_RESET, /* GPDO 139 */\r
+ GPDO_RESET, /* GPDO 140 */\r
+ GPDO_RESET, /* GPDO 141 */\r
+ GPDO_RESET, /* GPDO 142 */\r
+ GPDO_RESET, /* GPDO 143 */\r
+ GPDO_RESET, /* GPDO 144 */\r
+ GPDO_RESET, /* GPDO 145 */\r
+ GPDO_RESET, /* GPDO 146 */\r
+ GPDO_RESET, /* GPDO 147 */\r
+ GPDO_RESET, /* GPDO 148 */\r
+ GPDO_RESET, /* GPDO 149 */\r
+ GPDO_RESET, /* GPDO 150 */\r
+ GPDO_RESET, /* GPDO 151 */\r
+ GPDO_RESET, /* GPDO 152 */\r
+ GPDO_RESET, /* GPDO 153 */\r
+ GPDO_RESET, /* GPDO 154 */\r
+ GPDO_RESET, /* GPDO 155 */\r
+ GPDO_RESET, /* GPDO 156 */\r
+ GPDO_RESET, /* GPDO 157 */\r
+ GPDO_RESET, /* GPDO 158 */\r
+ GPDO_RESET, /* GPDO 159 */\r
+ GPDO_RESET, /* GPDO 160 */\r
+ GPDO_RESET, /* GPDO 161 */\r
+ GPDO_RESET, /* GPDO 162 */\r
+ GPDO_RESET, /* GPDO 163 */\r
+ GPDO_RESET, /* GPDO 164 */\r
+ GPDO_RESET, /* GPDO 165 */\r
+ GPDO_RESET, /* GPDO 166 */\r
+ GPDO_RESET, /* GPDO 167 */\r
+ GPDO_RESET, /* GPDO 168 */\r
+ GPDO_RESET, /* GPDO 169 */\r
+ GPDO_RESET, /* GPDO 170 */\r
+ GPDO_RESET, /* GPDO 171 */\r
+ GPDO_RESET, /* GPDO 172 */\r
+ GPDO_RESET, /* GPDO 173 */\r
+ GPDO_RESET, /* GPDO 174 */\r
+ GPDO_RESET, /* GPDO 175 */\r
+ GPDO_RESET, /* GPDO 176 */\r
+ GPDO_RESET, /* GPDO 177 */\r
+ GPDO_RESET, /* GPDO 178 */\r
+ GPDO_RESET, /* GPDO 179 */\r
+ GPDO_RESET, /* GPDO 180 */\r
+ GPDO_RESET, /* GPDO 181 */\r
+ GPDO_RESET, /* GPDO 182 */\r
+ GPDO_RESET, /* GPDO 183 */\r
+ GPDO_RESET, /* GPDO 184 */\r
+ GPDO_RESET, /* GPDO 185 */\r
+ GPDO_RESET, /* GPDO 186 */\r
+ GPDO_RESET, /* GPDO 187 */\r
+ GPDO_RESET, /* GPDO 188 */\r
+ GPDO_RESET, /* GPDO 189 */\r
+ GPDO_RESET, /* GPDO 190 */\r
+ GPDO_RESET, /* GPDO 191 */\r
+ GPDO_RESET, /* GPDO 192 */\r
+ GPDO_RESET, /* GPDO 193 */\r
+ GPDO_RESET, /* GPDO 194 */\r
+ GPDO_RESET, /* GPDO 195 */\r
+ GPDO_RESET, /* GPDO 196 */\r
+ GPDO_RESET, /* GPDO 197 */\r
+ GPDO_RESET, /* GPDO 198 */\r
+ GPDO_RESET, /* GPDO 199 */\r
+ GPDO_RESET, /* GPDO 200 */\r
+ GPDO_RESET, /* GPDO 201 */\r
+ GPDO_RESET, /* GPDO 202 */\r
+ GPDO_RESET, /* GPDO 203 */\r
+ GPDO_RESET, /* GPDO 204 */\r
+ GPDO_RESET, /* GPDO 205 */\r
+ GPDO_RESET, /* GPDO 206 */\r
+ GPDO_RESET, /* GPDO 207 */\r
+ GPDO_RESET, /* GPDO 208 */\r
+ GPDO_RESET, /* GPDO 209 */\r
+ GPDO_RESET, /* GPDO 210 */\r
+ GPDO_RESET, /* GPDO 211 */\r
+ GPDO_RESET, /* GPDO 212 */\r
+ GPDO_RESET, /* GPDO 213 */\r
};\r
\r
const Port_ConfigType PortConfigData =\r
.padConfig = PortPadConfigData,\r
.outCnt = sizeof(PortOutConfigData),\r
.outConfig = PortOutConfigData,\r
-};\r
+};
\ No newline at end of file
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
+/*
+* Configuration of module Port (Port_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC5567
+*
+* Module vendor: ArcCore
+* Module version: 1.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 09 13:44:55 CEST 2010
+*/
+#if (PORT_SW_MAJOR_VERSION != 1)
+#error "Port: Configuration file version differs from BSW version."
+#endif
+\r
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
#include "Std_Types.h"\r
\r
-#define PORT_VERSION_INFO_API STD_ON\r
-#define PORT_DEV_ERROR_DETECT STD_ON\r
-#define PORT_PIN_DIRECTION_CHANGES_ALLOWED STD_ON\r
+#define PORT_VERSION_INFO_API STD_OFF\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+#define PORT_PIN_DIRECTION_CHANGES_ALLOWED STD_OFF\r
\r
-typedef uint16 Port_PinType;\r
+#define BIT0 (1<<15)\r
+#define BIT1 (1<<14)\r
+#define BIT2 (1<<13)\r
+#define BIT3 (1<<12)\r
+#define BIT4 (1<<11)\r
+#define BIT5 (1<<10)\r
+#define BIT6 (1<<9)\r
+#define BIT7 (1<<8)\r
+#define BIT8 (1<<7)\r
+#define BIT9 (1<<6)\r
+#define BIT10 (1<<5)\r
+#define BIT11 (1<<4)\r
+#define BIT12 (1<<3)\r
+#define BIT13 (1<<2)\r
+#define BIT14 (1<<1)\r
+#define BIT15 (1<<0)\r
\r
-#define BIT0 (1<<15)\r
-#define BIT1 (1<<14)\r
-#define BIT2 (1<<13)\r
-#define BIT3 (1<<12)\r
-#define BIT4 (1<<11)\r
-#define BIT5 (1<<10)\r
-#define BIT6 (1<<9)\r
-#define BIT7 (1<<8)\r
-#define BIT8 (1<<7)\r
-#define BIT9 (1<<6)\r
-#define BIT10 (1<<5)\r
-#define BIT11 (1<<4)\r
-#define BIT12 (1<<3)\r
-#define BIT13 (1<<2)\r
-#define BIT14 (1<<1)\r
-#define BIT15 (1<<0)\r
+#define WPE_BIT BIT14\r
+#define WPS_BIT BIT15\r
+#define SRC0 BIT12\r
+#define SRC1 BIT13\r
\r
-#define WPS_BIT BIT15\r
-#define WPE_BIT BIT14\r
-#define SRC1_BIT BIT13\r
-#define SRC0_BIT BIT12\r
-#define HYS_BIT BIT11\r
-#define ODE_BIT BIT10\r
-#define DSC1_BIT BIT9\r
-#define DSC0_BIT BIT8\r
-#define IBE_BIT BIT7\r
-#define OBE_BIT BIT6\r
-#define PA2_BIT BIT5\r
-#define PA1_BIT BIT4\r
-#define PA0_BIT BIT3\r
+#define PULL_UP (WPE_BIT|WPS_BIT)\r
+#define PULL_DOWN (WPE_BIT)\r
+#define PULL_NONE 0\r
+#define SLEW_RATE_MIN 0\r
+#define SLEW_RATE_MED BIT13\r
+#define SLEW_RATE_MAX (BIT12|BIT13)\r
+#define HYS_ENABLE BIT11\r
+#define ODE_ENABLE BIT10\r
+#define IBE_ENABLE BIT7\r
+#define OBE_ENABLE BIT6\r
+#define IO (0)\r
+#define FUNC0 (0)\r
+#define FUNC1 (BIT5)\r
+#define FUNC2 (BIT4)\r
+#define FUNC3 (BIT4|BIT5)\r
+#define FUNC4 (BIT3)\r
\r
-#define PULL_UP (WPE_BIT|WPS_BIT)\r
-#define PULL_DOWN (WPE_BIT)\r
-#define PULL_NONE (0)\r
-#define SLEW_RATE_MIN (0)\r
-#define SLEW_RATE_MED (SRC1_BIT)\r
-#define SLEW_RATE_MAX (SRC1_BIT|SRC0_BIT)\r
-#define HYS_ENABLE (HYS_BIT)\r
-#define ODE_ENABLE (ODE_BIT)\r
-#define IBE_ENABLE (IBE_BIT)\r
-#define OBE_ENABLE (OBE_BIT)\r
+#define PCR_RESET (0)\r
+#define GPDO_RESET (0)\r
\r
-#define PA_IO (0)\r
-#define PA_PRIMARY_FUNC (PA2_BIT)\r
-#define PA_ALTERNATE_FUNC1 (PA1_BIT)\r
-#define PA_PRIMARY_FUNC1 (PA1_BIT|PA2_BIT)\r
-#define PA_ALTERNATE_FUNC2 (PA0_BIT)\r
+#define GPDO_HIGH (1)\r
\r
-#define PCR_IO_INPUT (IBE_ENABLE|PULL_DOWN)\r
-#define PCR_IO_OUTPUT (OBE_ENABLE)\r
\r
-// Should be this out of reset\r
-#define PCR_RESET (0)\r
-#define PCR_BOOTCFG (PCR_IO_INPUT)\r
-#define GPDO_RESET (0)\r
+typedef uint16 Port_PinType;\r
\r
typedef struct\r
{\r
- uint16_t padCnt;\r
- const uint16_t *padConfig;\r
- uint16_t outCnt;\r
- const uint8_t *outConfig;\r
+ uint16_t padCnt;\r
+ const uint16_t *padConfig;\r
+ uint16_t outCnt;\r
+ const uint8_t *outConfig;\r
+// uint16_t inCnt;\r
+// const uint8_t *inConfig;\r
} Port_ConfigType;\r
\r
extern const Port_ConfigType PortConfigData;\r
\r
-#endif /*PORT_CFG_H_*/\r
+#endif /* PORT_CFG_H_ */\r
--- /dev/null
+/*
+* Configuration of module Pwm (Pwm_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC5567
+*
+* Module vendor: ArcCore
+* Module version: 1.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 09 15:05:32 CEST 2010
+*/
+
+/*\r
+ * Pwm_Cfg.c\r
+ *\r
+ * Created on: \r
+ * Author: \r
+ */\r
+\r
+#include "Pwm.h"\r
+#include "Pwm_Cfg.h"\r
+\r
+\r
+/*\r
+ * Notification routines are defined elsewhere but need to be linked from here,\r
+ * so we define the routines as external here.\r
+ */\r
+extern void MyPwmNotificationRoutine(void); // PWM_CHANNEL_1\r
+\r
+const Pwm_ConfigType PwmConfig = {\r
+ .Channels = {\r
+ \r
+ PWM_CHANNEL_CONFIG(// Channel name and emios channel id\r
+ PWM_CHANNEL_1,\r
+ // Period in ticks\r
+ 4000,\r
+ // Duty cycle (0 ~> 0%, 0x8000 ~> 100%)\r
+ 24576,\r
+ // Local prescaler\r
+ PWM_CHANNEL_PRESCALER_1,\r
+ // Polarity\r
+ PWM_HIGH),\r
+ PWM_CHANNEL_CONFIG(// Channel name and emios channel id\r
+ PWM_CHANNEL_2,\r
+ // Period in ticks\r
+ 12000,\r
+ // Duty cycle (0 ~> 0%, 0x8000 ~> 100%)\r
+ 0,\r
+ // Local prescaler\r
+ PWM_CHANNEL_PRESCALER_1,\r
+ // Polarity\r
+ PWM_LOW),\r
+ },\r
+#if PWM_NOTIFICATION_SUPPORTED==ON\r
+ .NotificationHandlers = {\r
+ // Notification routine for PWM_CHANNEL_1\r
+ MyPwmNotificationRoutine,\r
+ \r
+ // Notification routine for PWM_CHANNEL_2\r
+ NULL,\r
+ \r
+ }\r
+#endif\r
+};\r
+
--- /dev/null
+/*
+* Configuration of module Pwm (Pwm_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC5567
+*
+* Module vendor: ArcCore
+* Module version: 1.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 09 15:05:32 CEST 2010
+*/
+
+
+#if (PWM_SW_MAJOR_VERSION != 1)
+#error "Pwm: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PWM_CFG_H_\r
+#define PWM_CFG_H_\r
+\r
+/****************************************************************************\r
+ * Global configuration options and defines\r
+ */\r
+\r
+#define ON 1\r
+#define OFF 0\r
+\r
+// PWM003\r
+#define PWM_DEV_EROR_DETECT ON\r
+#define PWM_NOTIFICATION_SUPPORTED ON\r
+\r
+// PWM132. Currently only ON is supported.\r
+#define PWM_DUTYCYCLE_UPDATED_ENDPERIOD ON\r
+#define PWM_PERIOD_UPDATED_ENDPERIOD ON\r
+\r
+// Define what functions to enable.\r
+#define PWM_GET_OUTPUT_STATE ON\r
+#define PWM_SET_PERIOD_AND_DUTY ON\r
+#define PWM_DEINIT OFF\r
+#define PWM_DUTYCYCLE ON\r
+#define PWM_SET_OUTPUT_TO_IDLE OFF\r
+#define PWM_VERSION_INFO_API OFF\r
+\r
+\r
+\r
+\r
+/****************************************************************************\r
+ * Not defined in AUTOSAR.\r
+ */\r
+#define PWM_ISR_PRIORITY 1\r
+#define PWM_PRESCALER 1\r
+\r
+/*\r
+ * Setting to ON freezes the current output state of a PWM channel when in\r
+ * debug mode.\r
+ */\r
+#define PWM_FREEZE_ENABLE ON\r
+\r
+/****************************************************************************\r
+ * Enumeration of channels\r
+ * Maps a symbolic name to a hardware channel\r
+ */\r
+typedef enum {\r
+ PWM_CHANNEL_1 = 10,\r
+ PWM_CHANNEL_2 = 12,\r
+ PWM_NUMBER_OF_CHANNELS = 2\r
+} Pwm_NamedChannelsType;\r
+\r
+\r
+\r
+/*\r
+ * PWM106: This is implementation specific but not all values may be valid\r
+ * within the type. This shall be chosen in order to have the most efficient\r
+ * implementation on a specific microcontroller platform.\r
+ *\r
+ * PWM106 => Pwm_ChannelType == eemios channel id.\r
+ */\r
+typedef uint8 Pwm_ChannelType;\r
+\r
+/*\r
+ * PWM070: All time units used within the API services of the PWM module shall\r
+ * be of the unit ticks.\r
+ */\r
+typedef uint16 Pwm_PeriodType;\r
+\r
+typedef enum {\r
+ PWM_CHANNEL_PRESCALER_1=0,\r
+ PWM_CHANNEL_PRESCALER_2,\r
+ PWM_CHANNEL_PRESCALER_3,\r
+ PWM_CHANNEL_PRESCALER_4,\r
+} Pwm_ChannelPrescalerType;\r
+\r
+/*\r
+ * Since the AUTOSAR PWM specification uses a different unit for the duty,\r
+ * the following macro can be used to convert between that format and the\r
+ * mpc5516 format.\r
+ */\r
+#define DUTY_AND_PERIOD(_duty,_period) .duty = (_duty*_period)>>15, .period = _period\r
+\r
+#if defined(CFG_MPC5516)\r
+ /* Mode is buffered PWM output (OPWM) */\r
+ /* Mode is buffered Output PW and frequency modulation mode */\r
+#define PWM_EMIOS_OPWM 0x5A\r
+#elif defined(CFG_MPC5567)\r
+ /* Mode is buffered OPWM with frequency modulation (allows change of\r
+ * period) */\r
+#define PWM_EMIOS_OPWM 0x19\r
+#endif\r
+\r
+\r
+typedef struct {\r
+ /* Number of duty ticks */\r
+ uint32_t duty:32;\r
+ /* Length of period, in ticks */\r
+ uint32_t period:32;\r
+ /* Counter */\r
+ uint32_t counter:32;\r
+ /* Enable freezing the channel when in debug mode */\r
+ uint32_t freezeEnable:1;\r
+ /* Disable output */\r
+ uint32_t outputDisable:1;\r
+ /* Select which bus disables the bus\r
+ * TODO: Figure out how this works, i.e. what bus does it refer to? */\r
+ uint32_t outputDisableSelect:2;\r
+ /* Prescale the emios clock some more? */\r
+ Pwm_ChannelPrescalerType prescaler:2;\r
+ /* Prescale the emios clock some more? */\r
+ uint32_t usePrescaler:1;\r
+ /* Whether to use DMA. Currently unsupported */\r
+ uint32_t useDma:1;\r
+ uint32_t reserved_2:1;\r
+ /* Input filter. Ignored in output mode. */\r
+ uint32_t inputFilter:4;\r
+ /* Input filter clock source. Ignored in output mode */\r
+ uint32_t filterClockSelect:1;\r
+ /* Enable interrupts/flags on this channel? Required for DMA as well. */\r
+ uint32_t flagEnable:1;\r
+ uint32_t reserved_3:3;\r
+ /* Trigger a match on channel A */\r
+ uint32_t forceMatchA:1;\r
+ /* Triggers a match on channel B */\r
+ uint32_t forceMatchB:1;\r
+ uint32_t reserved_4:1;\r
+ /* We can use different buses for the counter. Use the internal counter */\r
+ uint32_t busSelect:2;\r
+ /* What edges to flag on? */\r
+ uint32_t edgeSelect:1;\r
+ /* Polarity of the channel */\r
+ uint32_t edgePolarity:1;\r
+ /* EMIOS mode. 0x58 for buffered output PWM */\r
+ uint32_t mode:7;\r
+} Pwm_ChannelRegisterType;\r
+\r
+typedef struct {\r
+ Pwm_ChannelRegisterType r;\r
+ Pwm_ChannelType channel;\r
+} Pwm_ChannelConfigurationType;\r
+\r
+\r
+typedef struct {\r
+ Pwm_ChannelConfigurationType Channels[PWM_NUMBER_OF_CHANNELS];\r
+#if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
+ Pwm_NotificationHandlerType NotificationHandlers[PWM_NUMBER_OF_CHANNELS];\r
+#endif\r
+} Pwm_ConfigType;\r
+\r
+// Channel configuration macro.\r
+#define PWM_CHANNEL_CONFIG(_hwchannel, _period, _duty, _prescaler, _polarity) \\r
+ {\\r
+ .channel = _hwchannel,\\r
+ .r = {\\r
+ DUTY_AND_PERIOD(_duty, _period),\\r
+ .freezeEnable = 1,\\r
+ .outputDisable = 0,\\r
+ .usePrescaler = 1,\\r
+ .prescaler = _prescaler,\\r
+ .useDma = 0,\\r
+ .flagEnable = 0, /* See PWM052 */ \\r
+ .busSelect = 3, /* Use the internal counter bus */\\r
+ .edgePolarity = _polarity,\\r
+ .mode = PWM_EMIOS_OPWM\\r
+ }\\r
+ }\r
+\r
+#endif /* PWM_CFG_H_ */\r
+
\ No newline at end of file
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="55d13f76-fbd7-4f4f-894f-6e893bb4af68">\r
+ <SHORT-NAME>pwm_node_mpc5567</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="8d83c9f1-6828-42f7-a400-d7d9e4115adb">\r
+ <SHORT-NAME>pwm_node_mpc5567</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <REVISION-LABEL>Rev 2</REVISION-LABEL>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC5567</SD>\r
+ <SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
+ <SD GID="AUTHOR">ArcCore AB</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node_mpc5567/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node_mpc5567/Pwm</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node_mpc5567/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="0de1ce69-9ca8-40f8-aad1-871083fd3f37">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">1.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="f2132a48-579f-4d6f-aa41-dae2b6b675d5">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="245c6995-5846-4a4d-9780-13f8fe485a03">\r
+ <SHORT-NAME>PWM</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="f08f552a-7f53-4498-b1fc-798ed3af17ca">\r
+ <SHORT-NAME>EMIOS[10]</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>189</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_PWM</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="9ce74e87-adca-4263-9ae3-7d45c38b572b">\r
+ <SHORT-NAME>EMIOS[12]</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>191</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_PWM</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d698c633-0bb4-4ef1-9feb-fbd5057f778c">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="7d1ea30f-111b-47fb-a9c3-2b4058816e26">\r
+ <SHORT-NAME>Pwm</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">1.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Pwm</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="8d34033e-c564-4a54-998e-731a1ba99854">\r
+ <SHORT-NAME>PwmChannelConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmChannelConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="0dacde7d-c365-47f0-a4d5-3ca7198b1192">\r
+ <SHORT-NAME>PWM_CHANNEL_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmChannelClass</DEFINITION-REF>\r
+ <VALUE>PWM_VARIABLE_PERIOD</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmChannelId</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmDutycycleDefault</DEFINITION-REF>\r
+ <VALUE>24576</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmIdleState</DEFINITION-REF>\r
+ <VALUE>PWM_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmArcticCoreChannelPrescaler</DEFINITION-REF>\r
+ <VALUE>PWM_CHANNEL_PRESCALER_1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmNotification</DEFINITION-REF>\r
+ <VALUE>MyPwmNotificationRoutine</VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmPeriodDefault</DEFINITION-REF>\r
+ <VALUE>5.0E-5</VALUE>\r
+ </FLOAT-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmPolarity</DEFINITION-REF>\r
+ <VALUE>PWM_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="2c8c28d8-3bbf-4f01-84c3-385e055a1ce8">\r
+ <SHORT-NAME>PWM_CHANNEL_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmChannelClass</DEFINITION-REF>\r
+ <VALUE>PWM_VARIABLE_PERIOD</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmChannelId</DEFINITION-REF>\r
+ <VALUE>12</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmDutycycleDefault</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmIdleState</DEFINITION-REF>\r
+ <VALUE>PWM_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmArcticCoreChannelPrescaler</DEFINITION-REF>\r
+ <VALUE>PWM_CHANNEL_PRESCALER_1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmNotification</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmPeriodDefault</DEFINITION-REF>\r
+ <VALUE>1.5E-4</VALUE>\r
+ </FLOAT-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmPolarity</DEFINITION-REF>\r
+ <VALUE>PWM_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="030b39a3-3bc3-49c1-a560-a536d8702afa">\r
+ <SHORT-NAME>PwmConfigurationOfOptApiServices</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmDeInitApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmGetOutputState</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmSetDutyCycle</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmSetOutputToIdle</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmSetPeriodAndDuty</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="3873cead-0332-4ccd-8662-3bf08d2b086e">\r
+ <SHORT-NAME>PwmGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmDevErorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmDutycycleUpdatedEndperiod</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmIndex</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmNotificationSupported</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmPeriodUpdatedEndperiod</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="69109d4c-3493-478e-be8d-aff53b32a590">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="68ccafa9-c2b1-43e1-93c9-3fd1c8f4fff9">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="5862f0c9-1e5a-4f23-b2c4-8e051b6d948b">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a7cff35b-d536-41ef-a65a-40242e4f63f8">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4cad9ed3-b331-4bb9-bbd8-11181c7e9e0b">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="39e56da8-cecd-4bee-81b7-273a13d65515">\r
+ <SHORT-NAME>Startup</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="d520590f-1abd-49c6-943b-ab880a36ff0f">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="363499a7-ab29-4eaf-9c73-718a6404395d">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="71c16123-17bc-4752-9536-120eaf67e681">\r
+ <SHORT-NAME>Alarm25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/pwm_node_mpc5567/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="fd442fa2-11a4-41ca-a016-a41ce867ca9f">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/pwm_node_mpc5567/Os/bTask25</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="775e10d2-a210-4b79-bbfc-5cb3a3a1adf7">\r
+ <SHORT-NAME>Alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/pwm_node_mpc5567/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="63e7ab95-16cd-4565-9cc9-f2f9dd2e1df3">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/pwm_node_mpc5567/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
Com_MainFunctionTx();\r
Com_MainFunctionRx();\r
\r
- pwm_node2_receive();\r
+ pwm_node2_receive();
+
+ TerminateTask();\r
}\r
\r
/*\r
Com_IpduGroupStart(RxGroup, 0);\r
\r
// End of startup_task().\r
-// TerminateTask();\r
+ TerminateTask();\r
}\r
\r
\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module CanIf (CanIf_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
+
#include "CanIf.h"\r
+#if defined(USE_CANTP)
+#include "CanTp.h"
+#include "CanTp_Cbk.h"
+#endif
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
#include <stdlib.h>\r
\r
+
// Imported structs from Can_Lcfg.c\r
extern const Can_ControllerConfigType CanControllerConfigData[];\r
extern const Can_ConfigSetType CanConfigSetData;\r
+
+
// Contains the mapping from CanIf-specific Channels to Can Controllers
const CanControllerIdType CanIf_Arc_ChannelToControllerMap[CANIF_CHANNEL_CNT] = {
- CAN_CTRL_A, // CANIF_CHANNEL_0
- CAN_CTRL_C, // CANIF_CHANNEL_1
+ FLEXCAN_A, // CHANNEL_0
};\r
\r
// Container that gets slamed into CanIf_InitController()\r
// Inits ALL controllers\r
// Multiplicity 1..*\r
-const CanIf_ControllerConfigType CanIfControllerConfig[] =\r
-{\r
- { // CANIF_CHANNEL_0_CONFIG_0
- .WakeupSupport = CANIF_WAKEUP_SUPPORT_NO_WAKEUP,
- .CanIfControllerIdRef = CANIF_CHANNEL_0,
- .CanIfDriverNameRef = "FLEXCAN", // Not used
- .CanIfInitControllerRef = &CanControllerConfigData[0],
- },\r
- { // CANIF_CHANNEL_1_CONFIG_0\r
- .WakeupSupport = CANIF_WAKEUP_SUPPORT_NO_WAKEUP,\r
- .CanIfControllerIdRef = CANIF_CHANNEL_1,\r
- .CanIfDriverNameRef = "FLEXCAN", // Not used\r
- .CanIfInitControllerRef = &CanControllerConfigData[1],\r
- }\r
+const CanIf_ControllerConfigType CanIfControllerConfig[] = {
+ // This is the ConfigurationIndex in CanIf_InitController()
+
+
+ {
+ .WakeupSupport = CANIF_WAKEUP_SUPPORT_NO_WAKEUP,
+ .CanIfControllerIdRef = CANIF_CHANNEL_0,
+ .CanIfDriverNameRef = "FLEXCAN", // Not used
+ .CanIfInitControllerRef = &CanControllerConfigData[0],
+ },
+
};\r
\r
// Function callbacks for higher layers\r
.CanIfErrorNotificaton = NULL,\r
};\r
\r
-//-------------------------------------------------------------------\r
-const CanIf_HthConfigType CanIfHthConfigData[] =\r
-{\r
- {\r
- .CanIfHthType = CAN_ARC_HANDLE_TYPE_BASIC,\r
- .CanIfCanControllerIdRef = CANIF_CHANNEL_0,\r
- .CanIfHthIdSymRef = CAN_HTH_A_1, // Ref to the HTH\r
- .CanIf_Arc_EOL = 0,\r
- },\r
- {\r
- .CanIfHthType = CAN_ARC_HANDLE_TYPE_BASIC,\r
- .CanIfCanControllerIdRef = CANIF_CHANNEL_1,\r
- .CanIfHthIdSymRef = CAN_HTH_C_1, // Ref to the HTH\r
- .CanIf_Arc_EOL = 1,\r
- },\r
-};\r
-\r
-//-------------------------------------------------------------------\r
-const CanIf_HrhConfigType CanIfHrhConfigData[] =\r
+
+// Data for init configuration CanIfInitConfiguration
+
+
+
+const CanIf_HthConfigType CanIfHthConfigData_Hoh_1[] =
{\r
+};
+
+const CanIf_HrhConfigType CanIfHrhConfigData_Hoh_1[] =
+{
+
{\r
- .CanIfHrhType = CAN_ARC_HANDLE_TYPE_BASIC,\r
- .CanIfSoftwareFilterHrh = TRUE, // Disable software filtering\r
- .CanIfCanControllerHrhIdRef = CANIF_CHANNEL_0,\r
- .CanIfHrhIdSymRef = CAN_HRH_A_1, // Ref to the HRH\r
- .CanIf_Arc_EOL = 0,\r
- },\r
- {\r
- .CanIfHrhType = CAN_ARC_HANDLE_TYPE_BASIC,\r
- .CanIfSoftwareFilterHrh = TRUE, // Disable software filtering\r
- .CanIfCanControllerHrhIdRef = CANIF_CHANNEL_1,\r
- .CanIfHrhIdSymRef = CAN_HRH_C_1, // Ref to the HRH\r
+ .CanIfHrhType = CAN_ARC_HANDLE_TYPE_BASIC,
+ .CanIfSoftwareFilterHrh = TRUE,
+ .CanIfCanControllerHrhIdRef = FLEXCAN_A,
+ .CanIfHrhIdSymRef = RxMailboxes,
.CanIf_Arc_EOL = 1,\r
},\r
};\r
-//-------------------------------------------------------------------\r
\r
-/*\r
- * TX PDUs\r
- */\r
-const CanIf_TxPduConfigType CanIfTxPduConfigData[] =\r
-{\r
+
+const CanIf_InitHohConfigType CanIfHohConfigData[] = {
+
+ {
+ .CanConfigSet = &CanConfigSetData,
+ .CanIfHrhConfig = CanIfHrhConfigData_Hoh_1,
+ .CanIfHthConfig = CanIfHthConfigData_Hoh_1,
+ .CanIf_Arc_EOL = 1,
+ },
};\r
-//-------------------------------------------------------------------\r
+
+const CanIf_TxPduConfigType CanIfTxPduConfigData[] = {
+};
\r
-/*\r
- * RX PDUs\r
- */\r
-const CanIf_RxPduConfigType CanIfRxPduConfigData[] =\r
-{\r
+const CanIf_RxPduConfigType CanIfRxPduConfigData[] = {
{\r
- .CanIfCanRxPduId = LedCommandRx,\r
- .CanIfCanRxPduCanId = 0x123, // CAN ID\r
- .CanIfCanRxPduDlc = 2, //DLC\r
-#if ( CANIF_CANPDUID_READDATA_API == STD_ON )\r
- .CanIfReadRxPduData = FALSE, // no buffering\r
-#endif\r
-#if ( CANIF_READRXPDU_NOTIF_STATUS_API == STD_ON )\r
- .CanIfReadRxPduNotifyStatus = FALSE, // No indication\r
+ .CanIfCanRxPduId = PDUR_DEST_PDU_ID_LedCommandRx,
+ .CanIfCanRxPduCanId = 291,
+ .CanIfCanRxPduDlc = 8,
+#if ( CANIF_CANPDUID_READDATA_API == STD_ON )
+ .CanIfReadRxPduData = false,
+#endif
+#if ( CANIF_READTXPDU_NOTIFY_STATUS_API == STD_ON )
+ .CanIfReadRxPduNotifyStatus = false,
#endif\r
- .CanIfRxPduIdCanIdType = CANIF_CAN_ID_TYPE_29,\r
- .CanIfRxUserType = CANIF_USER_TYPE_CAN_PDUR,\r
- .CanIfUserRxIndication = PduR_CanIfRxIndication, // No indication\r
- .CanIfCanRxPduHrhRef = &CanIfHrhConfigData[0], // Received on channel 0\r
- .PduIdRef = NULL, // Could be used by upper layers\r
- .CanIfSoftwareFilterType = CANIF_SOFTFILTER_TYPE_MASK, // Not enabled in HRH\r
+ .CanIfRxPduIdCanIdType = CANIF_CAN_ID_TYPE_29,
+ .CanIfRxUserType = CANIF_USER_TYPE_CAN_PDUR,
+ .CanIfCanRxPduHrhRef = &CanIfHrhConfigData_Hoh_1[0],
+ .CanIfRxPduIdCanIdType = CANIF_CAN_ID_TYPE_29,
+ .CanIfUserRxIndication = NULL,
+ .CanIfSoftwareFilterType = CANIF_SOFTFILTER_TYPE_MASK,
.CanIfCanRxPduCanIdMask = 0xFFF,\r
- },\r
-};\r
-\r
-//-------------------------------------------------------------------\r
-const CanIf_InitHohConfigType CanIfHohConfigData[] =\r
-{\r
- {\r
- .CanConfigSet = &CanConfigSetData,\r
- .CanIfHrhConfig = CanIfHrhConfigData,\r
- .CanIfHthConfig = CanIfHthConfigData,\r
- .CanIf_Arc_EOL = 1,\r
- },\r
+ .PduIdRef = NULL,
+ },
};\r
\r
// This container contains the init parameters of the CAN\r
.CanIfTxPduConfigPtr = CanIfTxPduConfigData,\r
};\r
\r
-// This container includes all necessary configuration sub-containers\r
+ // This container includes all necessary configuration sub-containers
// according the CAN Interface configuration structure.\r
CanIf_ConfigType CanIf_Config =\r
{\r
.DispatchConfig = &CanIfDispatchConfig,\r
.InitConfig = &CanIfInitConfig,\r
.TransceiverConfig = NULL, // Not used
- .Arc_ChannelToControllerMap = CanIf_Arc_ChannelToControllerMap,\r
+ .Arc_ChannelToControllerMap = CanIf_Arc_ChannelToControllerMap,
};\r
\r
--- /dev/null
+/*
+* Configuration of module CanIf (CanIf_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
+
+
+#if (CANIF_SW_MAJOR_VERSION != 1 && CANIF_SW_MINOR_VERSION != 1)
+#error "CanIf: Configuration file version differs from BSW version."
+#endif
+
+
+#ifndef CANIF_CFG_H_
+#define CANIF_CFG_H_
+
+#include "Can.h"
+
+#define CANIF_PDU_ID_LedCommandRx 0
+
+
+// Identifiers for the elements in CanIfControllerConfig[]
+// This is the ConfigurationIndex in CanIf_InitController()
+typedef enum {
+ CANIF_CHANNEL_0_CONFIG_0,
+ CANIF_CHANNEL_CONFIGURATION_CNT
+} CanIf_Arc_ConfigurationIndexType;
+
+typedef enum {
+ CANIF_CHANNEL_0,
+ CANIF_CHANNEL_CNT
+} CanIf_Arc_ChannelIdType;
+
+typedef enum {
+ CANIF_SOFTFILTER_TYPE_BINARY = 0, // Not supported
+ CANIF_SOFTFILTER_TYPE_INDEX, // Not supported
+ CANIF_SOFTFILTER_TYPE_LINEAR, // Not supported
+ CANIF_SOFTFILTER_TYPE_TABLE, // Not supported
+ CANIF_SOFTFILTER_TYPE_MASK, // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering
+} CanIf_SoftwareFilterTypeType;
+
+typedef enum {
+ CANIF_USER_TYPE_CAN_NM,
+ CANIF_USER_TYPE_CAN_TP,
+ CANIF_USER_TYPE_CAN_PDUR,
+ CANIF_USER_TYPE_CAN_SPECIAL,
+} CanIf_UserTypeType;
+
+
+typedef void (*CanIf_FuncTypeCanSpecial)(PduIdType, const uint8 *, uint8, Can_IdType);
+
+typedef enum {
+ CANIF_PDU_TYPE_STATIC = 0,
+ CANIF_PDU_TYPE_DYNAMIC // Not supported
+} CanIf_PduTypeType;
+
+typedef enum {
+ CANIF_CAN_ID_TYPE_29 = 0,
+ CANIF_CAN_ID_TYPE_11
+} CanIf_CanIdTypeType;
+
+/*
+ * Public container
+ */
+#define CANIF_VERSION_INFO_API STD_ON
+#define CANIF_DEV_ERROR_DETECT STD_ON
+#define CANIF_DLC_CHECK STD_ON
+#define CANIF_MULITPLE_DRIVER_SUPPORT STD_OFF // Not supported
+#define CANIF_READRXPDU_DATA_API STD_OFF // Not supported
+#define CANIF_READRXPDU_NOTIFY_STATUS_API STD_OFF // Not supported
+#define CANIF_READTXPDU_NOTIFY_STATUS_API STD_OFF // Not supported
+#define CANIF_SETDYNAMICTXID_API STD_OFF // Not supported
+#define CANIF_WAKEUP_EVENT_API STD_OFF // Not supported
+#define CANIF_TRANSCEIVER_API STD_OFF // Not supported
+#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported
+
+//-------------------------------------------------------------------
+
+typedef struct {
+ void (*CancelTxConfirmation)( void *); // (const Can_PduType *);
+ void (*RxIndication)(void *); //(const Can_PduType *);
+ void (*ControllerBusOff)(uint8);
+ void (*ControllerWakeup)(uint8);
+ void (*Arc_Error)(uint8,uint32);
+} CanIf_CallbackType;
+
+
+
+//-------------------------------------------------------------------
+/*
+ * CanIfHrhRangeConfig container
+ */
+
+typedef struct {
+ // Lower CAN Identifier of a receive CAN L-PDU for identifier range
+ // definition, in which all CAN Ids shall pass the software filtering. Range: 11
+ // Bit for Standard CAN Identifier 29 Bit for Extended CAN Identifer
+ uint32 CanIfRxPduLowerCanId;
+
+ // Upper CAN Identifier of a receive CAN L-PDU for identifier range
+ // definition, in which all CAN Ids shall pass the software filtering. Range: 11
+ // Bit for Standard CAN Identifier 29 Bit for Extended CAN Identifer
+ uint32 CanIfRxPduUpperCanId;
+} CanIf_HrhRangeConfigType;
+
+
+
+//-------------------------------------------------------------------
+/*
+ * CanIfInitHrhConfig container
+ */
+typedef struct {
+ // Defines the HRH type i.e, whether its a BasicCan or FullCan. If BasicCan is
+ // configured, software filtering is enabled.
+ Can_Arc_HohType CanIfHrhType;
+
+ // Selects the hardware receive objects by using the HRH range/list from
+ // CAN Driver configuration to define, for which HRH a software filtering has
+ // to be performed at during receive processing. True: Software filtering is
+ // enabled False: Software filtering is disabled
+ boolean CanIfSoftwareFilterHrh;
+
+ // Reference to controller Id to which the HRH belongs to. A controller can
+ // contain one or more HRHs.
+ CanIf_Arc_ChannelIdType CanIfCanControllerHrhIdRef;
+
+ // The parameter refers to a particular HRH object in the CAN Driver Module
+ // configuration. The HRH id is unique in a given CAN Driver. The HRH Ids
+ // are defined in the CAN Driver Module and hence it is derived from CAN
+ // Driver Configuration.
+ Can_Arc_HRHType CanIfHrhIdSymRef ;
+
+ // Defines the parameters required for configuraing multiple
+ // CANID ranges for a given same HRH.
+ const CanIf_HrhRangeConfigType *CanIfHrhRangeConfig;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean CanIf_Arc_EOL;
+} CanIf_HrhConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfInitHthConfig container
+ */
+
+typedef struct {
+ // Defines the HTH type i.e, whether its a BasicCan or FullCan.
+ Can_Arc_HohType CanIfHthType;
+
+ // Reference to controller Id to which the HTH belongs to. A controller
+ // can contain one or more HTHs
+ CanIf_Arc_ChannelIdType CanIfCanControllerIdRef;
+
+ // The parameter refers to a particular HTH object in the CAN Driver Module
+ // configuration. The HTH id is unique in a given CAN Driver. The HTH Ids
+ // are defined in the CAN Driver Module and hence it is derived from CAN
+ // Driver Configuration.
+ Can_Arc_HTHType CanIfHthIdSymRef ;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean CanIf_Arc_EOL;
+} CanIf_HthConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfInitHohConfig container
+ */
+typedef struct {
+ // Selects the CAN interface specific configuration setup. This type of external
+ // data structure shall contain the post build initialization data for the
+ // CAN interface for all underlying CAN Drivers.
+ const Can_ConfigSetType *CanConfigSet;
+
+ // This container contains contiguration parameters for each hardware receive object.
+ const CanIf_HrhConfigType *CanIfHrhConfig;
+
+ // This container contains parameters releated to each HTH
+ const CanIf_HthConfigType *CanIfHthConfig;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean CanIf_Arc_EOL;
+} CanIf_InitHohConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfTxPduConfig container
+ */
+
+// This container contains the configuration (parameters) of each transmit
+// CAN L-PDU. The SHORT-NAME of "CanIfTxPduConfig" container
+// represents the symolic name of Transmit L-PDU.
+typedef struct {
+ // ECU wide unique, symbolic handle for transmit CAN L-PDU. The
+ // CanIfCanTxPduId is configurable at pre-compile and post-built time.
+ // Range: 0..max. number of CantTxPduIds PduIdType CanTxPduId;
+ PduIdType CanIfTxPduId;
+
+ // CAN Identifier of transmit CAN L-PDUs used by the CAN Driver for CAN L-
+ // PDU transmission. Range: 11 Bit For Standard CAN Identifier ... 29 Bit For
+ // Extended CAN identifier
+ uint32 CanIfCanTxPduIdCanId;
+
+ // Data length code (in bytes) of transmit CAN L-PDUs used by the CAN
+ // Driver for CAN L-PDU transmission. The data area size of a CAN L-Pdu
+ // can have a range from 0 to 8 bytes.
+ uint8 CanIfCanTxPduIdDlc;
+
+ // Defines the type of each transmit CAN L-PDU.
+ // DYNAMIC CAN ID is defined at runtime.
+ // STATIC CAN ID is defined at compile-time.
+ CanIf_PduTypeType CanIfCanTxPduType;
+
+#if ( CANIF_READTXPDU_NOTIFY_STATUS_API == STD_ON )
+ // Enables and disables transmit confirmation for each transmit CAN L-PDU
+ // for reading its notification status. True: Enabled False: Disabled
+ boolean CanIfReadTxPduNotifyStatus;
+#endif
+
+ // CAN Identifier of transmit CAN L-PDUs used by the CAN Driver for CAN L-
+ // PDU transmission.
+ // EXTENDED_CAN The CANID is of type Extended (29 bits)
+ // STANDARD_CAN The CANID is of type Standard (11 bits)
+ CanIf_CanIdTypeType CanIfTxPduIdCanIdType;
+
+ // Name of target confirmation services to target upper layers (PduR, CanNm
+ // and CanTp. If parameter is not configured then no call-out function is
+ // provided by the upper layer for this Tx L-PDU.
+ void (*CanIfUserTxConfirmation)(PduIdType); /* CANIF 109 */
+
+ // Handle, that defines the hardware object or the pool of hardware objects
+ // configured for transmission. The parameter refers HTH Id, to which the L-
+ // PDU belongs to.
+ const CanIf_HthConfigType *CanIfCanTxPduHthRef;
+
+ // Reference to the "global" Pdu structure to allow harmonization of handle
+ // IDs in the COM-Stack. ..
+ void *PduIdRef;
+} CanIf_TxPduConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfRxPduConfig container
+ */
+
+
+// This container contains the configuration (parameters) of each receive
+// CAN L-PDU. The SHORT-NAME of "CanIfRxPduConfig" container itself
+// represents the symolic name of Receive L-PDU.
+
+typedef struct {
+ // ECU wide unique, symbolic handle for receive CAN L-PDU. The
+ // CanRxPduId is configurable at pre-compile and post-built time. It shall fulfill
+ // ANSI/AUTOSAR definitions for constant defines. Range: 0..max. number
+ // of defined CanRxPduIds
+ PduIdType CanIfCanRxPduId;
+
+ // CAN Identifier of Receive CAN L-PDUs used by the CAN Interface. Exa:
+ // Software Filtering. Range: 11 Bit For Standard CAN Identifier ... 29 Bit For
+ // Extended CAN identifier
+ uint32 CanIfCanRxPduCanId;
+
+ // Data Length code of received CAN L-PDUs used by the CAN Interface.
+ // Exa: DLC check. The data area size of a CAN L-PDU can have a range
+ // from 0 to 8 bytes. uint8 CanIfCanRxPduDlc;
+ uint8 CanIfCanRxPduDlc;
+
+#if ( CANIF_CANPDUID_READDATA_API == STD_ON )
+ // Enables and disables the Rx buffering for reading of received L-PDU data.
+ // True: Enabled False: Disabled
+ boolean CanIfReadRxPduData;
+#endif
+
+#if ( CANIF_READRXPDU_NOTIF_STATUS_API == STD_ON )
+ // CanIfReadRxPduNotifyStatus {CANIF_READRXPDU_NOTIFY_STATUS}
+ // Enables and disables receive indication for each receive CAN L-PDU for
+ // reading its' notification status. True: Enabled False: Disabled
+ boolean CanIfReadRxPduNotifyStatus;
+#endif
+
+ // CAN Identifier of receive CAN L-PDUs used by the CAN Driver for CAN L-
+ // PDU transmission.
+ // EXTENDED_CAN The CANID is of type Extended (29 bits)
+ // STANDARD_CAN The CANID is of type Standard (11 bits)
+ CanIf_CanIdTypeType CanIfRxPduIdCanIdType;
+
+ // This parameter defines the type of the receive indication call-outs called to
+ // the corresponding upper layer the used TargetRxPduId belongs to.
+ CanIf_UserTypeType CanIfRxUserType;
+
+ // Name of target indication services to target upper layers (PduRouter,
+ // CanNm, CanTp and ComplexDeviceDrivers). If parameter is 0 no call-out
+ // function is configured.
+ void *CanIfUserRxIndication;
+
+ // The HRH to which Rx L-PDU belongs to, is referred through this
+ // parameter.
+ const CanIf_HrhConfigType *CanIfCanRxPduHrhRef;
+
+ // Reference to the "global" Pdu structure to allow harmonization of handle
+ // IDs in the COM-Stack.
+ void *PduIdRef;
+
+ // Defines the type of software filtering that should be used
+ // for this receive object.
+ CanIf_SoftwareFilterTypeType CanIfSoftwareFilterType;
+
+ // Acceptance filters, 1 - care, 0 - don't care.
+ // Is enabled by the CanIfSoftwareFilterMask in CanIf_HrhConfigType
+ // ArcCore exension
+ uint32 CanIfCanRxPduCanIdMask;
+
+} CanIf_RxPduConfigType;
+
+//-------------------------------------------------------------------
+
+/*
+ * CanIfControllerConfig container
+ */
+
+typedef enum {
+ CANIF_WAKEUP_SUPPORT_CONTROLLER,
+ CANIF_WAKEUP_SUPPORT_NO_WAKEUP,
+ CANIF_WAKEUP_SUPPORT_TRANSCEIVER,
+} CanIf_WakeupSupportType;
+
+
+// This is the type supplied to CanIf_InitController()
+typedef struct {
+ CanIf_WakeupSupportType WakeupSupport; // Not used
+
+ // CanIf-specific id of the controller
+ CanIf_Arc_ChannelIdType CanIfControllerIdRef;
+
+ const char CanIfDriverNameRef[8]; // Not used
+
+ const Can_ControllerConfigType *CanIfInitControllerRef;
+} CanIf_ControllerConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfTransceiverDrvConfig container
+ */
+
+typedef struct {
+ boolean TrcvWakeupNotification;
+ uint8 TrcvIdRef;
+} CanIf_TransceiverDrvConfigType;
+
+
+typedef struct {
+ uint32 todo;
+} CanIf_TransceiverConfigType;
+
+// Callout functions with respect to the upper layers. This callout functions
+// defined in this container are common to all configured underlying CAN
+// Drivers / CAN Transceiver Drivers.
+typedef struct {
+ // Name of target BusOff notification services to target upper layers
+ // (PduRouter, CanNm, CanTp and ComplexDeviceDrivers).
+ // Multiplicity: 1
+ void (*CanIfBusOffNotification)(uint8 Controller);
+
+ // Name of target wakeup notification services to target upper layers
+ // e.g Ecu_StateManager. If parameter is 0
+ // no call-out function is configured.
+ // Multiplicity: 0..1
+ void (*CanIfWakeUpNotification)();
+
+ // Name of target wakeup validation notification services to target upper
+ // layers (ECU State Manager). If parameter is 0 no call-out function is
+ // configured.
+ // Multiplicity: 0..1
+ void (*CanIfWakeupValidNotification)();
+
+ // ArcCore ext.
+ void (*CanIfErrorNotificaton)(uint8,Can_Arc_ErrorType);
+
+} CanIf_DispatchConfigType;
+
+// This container contains the references to the configuration setup of each
+// underlying CAN driver.
+
+typedef struct {
+ // Selects the CAN Interface specific configuration setup. This type of the
+ // external data structure shall contain the post build initialization data for the
+ // CAN Interface for all underlying CAN Dirvers. constant to CanIf_ConfigType
+ uint32 CanIfConfigSet;
+
+ uint32 CanIfNumberOfCanRxPduIds;
+ uint32 CanIfNumberOfCanTXPduIds;
+ uint32 CanIfNumberOfDynamicCanTXPduIds;
+
+ //
+ // Containers
+ //
+
+ // This container contains the reference to the configuration
+ // setup of each underlying CAN driver.
+ // Multiplicity: 0..*
+ const CanIf_InitHohConfigType *CanIfHohConfigPtr;
+
+ // This container contains the configuration (parameters) of each
+ // receive CAN L-PDU. The SHORT-NAME of
+ // "CanIfRxPduConfig" container itself represents the symolic
+ // name of Receive L-PDU.
+ // Multiplicity: 0..*
+ const CanIf_RxPduConfigType *CanIfRxPduConfigPtr;
+
+ // This container contains the configuration (parameters) of each
+ // transmit CAN L-PDU. The SHORT-NAME of
+ // "CanIfTxPduConfig" container represents the symolic name of
+ // Transmit L-PDU.
+ // Multiplicity: 0..*
+ const CanIf_TxPduConfigType *CanIfTxPduConfigPtr;
+
+} CanIf_InitConfigType;
+
+
+typedef struct {
+ // This container contains the configuration (parameters) of all
+ // addressed CAN controllers by each underlying CAN driver.
+ // Multiplicity: 1..*
+ const CanIf_ControllerConfigType *ControllerConfig;
+
+ // Callout functions with respect to the upper layers. This callout
+ // functions defined in this container are common to all
+ // configured underlying CAN Drivers / CAN Transceiver Drivers
+ const CanIf_DispatchConfigType *DispatchConfig;
+
+ // This container contains the init parameters of the CAN
+ // Interface.
+ // Multiplicity: 1..*
+ const CanIf_InitConfigType *InitConfig;
+
+ // This container contains the configuration (parameters) of all
+ // addressed CAN transceivers by each underlying CAN
+ // Transceiver Driver.
+ // Multiplicity: 1..*
+ const CanIf_TransceiverConfigType *TransceiverConfig;
+
+ // ArcCore: Contains the mapping from CanIf-specific Channels to Can Controllers
+ const CanControllerIdType *Arc_ChannelToControllerMap;
+} CanIf_ConfigType;
+
+
+extern CanIf_ConfigType CanIf_Config;
+
+#endif
+
--- /dev/null
+/*
+* Configuration of module Can (Can_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
+
+
+#if (CAN_SW_MAJOR_VERSION != 1)
+#error "Can: Configuration file version differs from BSW version."
+#endif
+
+
+
+
+#ifndef CAN_CFG_H_
+#define CAN_CFG_H_
+
+// Number of controller configs
+#define CAN_ARC_CTRL_CONFIG_CNT 1
+
+#define CAN_DEV_ERROR_DETECT STD_OFF
+#define CAN_VERSION_INFO_API STD_OFF
+#define CAN_MULTIPLEXED_TRANSMISSION STD_OFF
+#define CAN_WAKEUP_SUPPORT STD_OFF // Not supported
+#define CAN_HW_TRANSMIT_CANCELLATION STD_OFF // Not supported
+
+
+typedef enum {
+ FLEXCAN_A = 0,
+ CAN_CTRL_A = 0,
+ FLEXCAN_B = 1,
+ CAN_CTRL_B = 1,
+ FLEXCAN_C = 2,
+ CAN_CTRL_C = 2,
+ FLEXCAN_D = 3,
+ CAN_CTRL_D = 3,
+ FLEXCAN_E = 4,
+ CAN_CTRL_E = 4,
+ FLEXCAN_F = 5,
+ CAN_CTRL_F = 5,
+ CAN_CONTROLLER_CNT = 6
+}CanControllerIdType;
+
+
+typedef enum {
+ CAN_ID_TYPE_EXTENDED,
+ CAN_ID_TYPE_MIXED,
+ CAN_ID_TYPE_STANDARD,
+} Can_IdTypeType;
+
+
+typedef enum {
+ CAN_OBJECT_TYPE_RECEIVE,
+ CAN_OBJECT_TYPE_TRANSMIT,
+} Can_ObjectTypeType;
+
+
+typedef enum {
+ CAN_ARC_HANDLE_TYPE_BASIC,
+ CAN_ARC_HANDLE_TYPE_FULL
+} Can_Arc_HohType;
+
+
+typedef enum {
+ NUM_OF_HTHS
+} Can_Arc_HTHType;
+
+
+typedef enum {
+ RxMailboxes,
+ NUM_OF_HRHS
+} Can_Arc_HRHType;
+
+
+typedef struct {
+ void (*CancelTxConfirmation)( const Can_PduType *);
+ void (*RxIndication)( uint8 ,Can_IdType ,uint8 , const uint8 * );
+ void (*ControllerBusOff)(uint8);
+ void (*TxConfirmation)(PduIdType);
+ void (*ControllerWakeup)(uint8);
+ void (*Arc_Error)(uint8,Can_Arc_ErrorType);
+} Can_CallbackType;
+
+
+typedef struct {
+ // Specifies the InstanceId of this module instance. If only one instance is
+ // present it shall have the Id 0
+ int CanIndex;
+} Can_GeneralType;
+
+
+typedef uint32 Can_FilterMaskType;
+
+
+typedef struct Can_HardwareObjectStruct {
+ // Specifies the type (Full-CAN or Basic-CAN) of a hardware object.
+ Can_Arc_HohType CanHandleType;
+
+ // Specifies whether the IdValue is of type - standard identifier - extended
+ // identifier - mixed mode ImplementationType: Can_IdType
+ Can_IdTypeType CanIdType;
+
+ // Specifies (together with the filter mask) the identifiers range that passes
+ // the hardware filter.
+ uint32 CanIdValue;
+
+ // Holds the handle ID of HRH or HTH. The value of this parameter is unique
+ // in a given CAN Driver, and it should start with 0 and continue without any
+ // gaps. The HRH and HTH Ids are defined under two different name-spaces.
+ // Example: HRH0-0, HRH1-1, HTH0-2, HTH1-3
+ uint32 CanObjectId;
+
+ // Specifies if the HardwareObject is used as Transmit or as Receive object
+ Can_ObjectTypeType CanObjectType;
+
+ // Reference to the filter mask that is used for hardware filtering togerther
+ // with the CAN_ID_VALUE
+ Can_FilterMaskType *CanFilterMaskRef;
+
+ // A "1" in this mask tells the driver that that HW Message Box should be
+ // occupied by this Hoh. A "1" in bit 31(ppc) occupies Mb 0 in HW.
+ uint32 Can_Arc_MbMask;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean Can_Arc_EOL;
+} Can_HardwareObjectType;
+
+
+typedef enum {
+ CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ CAN_ARC_PROCESS_TYPE_POLLING,
+} Can_Arc_ProcessType;
+
+
+typedef struct {
+
+ // Enables / disables API Can_MainFunction_BusOff() for handling busoff
+ // events in polling mode.
+ // INTERRUPT or POLLING
+ Can_Arc_ProcessType CanBusOffProcessing;
+
+ // Defines if a CAN controller is used in the configuration.
+ boolean CanControllerActivation;
+
+ // Specifies the buadrate of the controller in kbps.
+ uint32 CanControllerBaudRate;
+
+ // This parameter provides the controller ID which is unique in a given CAN
+ // Driver. The value for this parameter starts with 0 and continue without any
+ // gaps.
+ CanControllerIdType CanControllerId;
+
+ // Specifies propagation delay in time quantas.
+ uint32 CanControllerPropSeg;
+
+ // Specifies phase segment 1 in time quantas.
+ uint32 CanControllerSeg1;
+
+ // Specifies phase segment 2 in time quantas.
+ uint32 CanControllerSeg2;
+
+ // Specifies the time quanta for the controller. The calculation of the resulting
+ // prescaler value depending on module clocking and time quanta shall be
+ // done offline Hardware specific.
+ uint32 CanControllerTimeQuanta;
+
+ // Enables / disables API Can_MainFunction_Read() for handling PDU
+ // reception events in polling mode.
+ Can_Arc_ProcessType CanRxProcessing;
+
+ // Enables / disables API Can_MainFunction_Write() for handling PDU
+ // transmission events in polling mode.
+ Can_Arc_ProcessType CanTxProcessing;
+
+ // Enables / disables API Can_MainFunction_Wakeup() for handling wakeup
+ // events in polling mode.
+ Can_Arc_ProcessType CanWakeupProcessing;
+
+ // Reference to the CPU clock configuration, which is set in the MCU driver
+ // configuration
+ uint32 CanCpuClockRef;
+
+ // This parameter contains a reference to the Wakeup Source for this
+ // controller as defined in the ECU State Manager. Implementation Type:
+ // reference to EcuM_WakeupSourceType
+ uint32 CanWakeupSourceRef;
+
+ // List of Hoh id's that belong to this controller
+ const Can_HardwareObjectType *Can_Arc_Hoh;
+
+ boolean Can_Arc_Loopback;
+
+ // Set this to use the fifo
+ boolean Can_Arc_Fifo;
+} Can_ControllerConfigType;
+
+
+typedef struct {
+ const Can_ControllerConfigType *CanController;
+
+ // Callbacks( Extension )
+ const Can_CallbackType *CanCallbacks;
+} Can_ConfigSetType;
+
+
+typedef struct {
+ // This is the multiple configuration set container for CAN Driver
+ // Multiplicity 1..*
+ const Can_ConfigSetType *CanConfigSet;
+ // This container contains the parameters related each CAN
+ // Driver Unit.
+ // Multiplicity 1..*
+ const Can_GeneralType *CanGeneral;
+} Can_ConfigType;
+
+
+extern const Can_ConfigType CanConfigData;
+extern const Can_ControllerConfigType CanControllerConfigData[];
+extern const Can_ConfigSetType Can_ConfigSet;
+
+#endif /*CAN_CFG_H_*/
--- /dev/null
+/*
+* Configuration of module Can (Can_Lcfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
+
+
+
+#include <stdlib.h>
+#include "Can.h"
+#include "CanIf_Cbk.h"
+
+
+Can_FilterMaskType Can_FilterMaskConfigData_Can_A_Mask_1 = 0x0;
+
+
+const Can_HardwareObjectType CanHardwareObjectConfig_Can_A[] = {
+ {
+ .CanObjectId = RxMailboxes,
+ .CanHandleType = CAN_ARC_HANDLE_TYPE_BASIC,
+ .CanIdType = CAN_ID_TYPE_EXTENDED,
+ .CanObjectType = CAN_OBJECT_TYPE_RECEIVE,
+ .CanFilterMaskRef = &Can_FilterMaskConfigData_Can_A_Mask_1,
+
+ .Can_Arc_MbMask = 0xff000000,
+ .Can_Arc_EOL = 1,
+ },
+};
+
+
+const Can_ControllerConfigType CanControllerConfigData[] =
+{
+ {
+ .CanControllerActivation = TRUE,
+ .CanControllerBaudRate = 125,
+ .CanControllerId = FLEXCAN_A,
+ .CanControllerPropSeg = 4,
+ .CanControllerSeg1 = 4,
+ .CanControllerSeg2 = 4,
+ .CanBusOffProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanRxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanTxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanWakeupProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanCpuClockRef = PERIPHERAL_CLOCK_FLEXCAN_A,
+ .Can_Arc_Hoh = &CanHardwareObjectConfig_Can_A[0],
+ .Can_Arc_Loopback = FALSE,
+ .Can_Arc_Fifo = 0,
+ },
+};
+
+const Can_CallbackType CanCallbackConfigData = {
+ NULL, //CanIf_CancelTxConfirmation,
+ CanIf_RxIndication,
+ CanIf_ControllerBusOff,
+ CanIf_TxConfirmation,
+ NULL, //CanIf_ControllerWakeup,
+ CanIf_Arc_Error,
+};
+
+const Can_ConfigSetType CanConfigSetData =
+{
+ .CanController = CanControllerConfigData,
+ .CanCallbacks = &CanCallbackConfigData,
+};
+
+const Can_ConfigType CanConfigData = {
+ .CanConfigSet = &CanConfigSetData,
+};
+
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module EcuC (ComGlobals.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
-*/
+#if (ECUC_SW_MAJOR_VERSION != 1)
+#error "EcuC: Configuration file version differs from BSW version."
+#endif
\r
#ifndef COMGLOBALS_H_\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+* Configuration of module Com (Com_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
*/
+
+#if (COM_SW_MAJOR_VERSION != 1)
+#error "Com: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef COM_CFG_H_\r
#define COM_CFG_H_\r
\r
#define COM_DEV_ERROR_DETECT\r
\r
-#define COM_MAX_NR_IPDU 5\r
-#define COM_MAX_NR_SIGNAL 6\r
-#define COM_MAX_NR_GROUPSIGNAL 10\r
-\r
-#define COM_MAX_NR_SIGNALS_PER_IPDU 4\r
-#define COM_MAX_NR_SIGNALGROUPS_PER_IPDU 4\r
-#define COM_MAX_NR_SIGNALS_PER_SIGNAL_GROUP 5\r
+#define COM_N_IPDUS 1
+#define COM_N_SIGNALS 1
+#define COM_N_GROUP_SIGNALS 0
\r
#define COM_E_INVALID_FILTER_CONFIGURATION 101\r
#define COM_E_INITIALIZATION_FAILED 102\r
#define COM_INVALID_PDU_ID 104\r
#define COM_ERROR_SIGNAL_IS_SIGNALGROUP 105\r
\r
+
+#define COM_MAX_NR_IPDU 999999999
+
#define COM_E_TOO_MANY_IPDU 106\r
#define COM_E_TOO_MANY_SIGNAL 107\r
#define COM_E_TOO_MANY_GROUPSIGNAL 108\r
/*\r
* ComGeneral pre-compile time configuration parameters.\r
*/\r
-#define ComConfigurationTimeBase NULL\r
-#define ComConfigurationUseDet \r
+#define ComConfigurationTimeBase 0.0
#define ComVersionInfoApi\r
\r
#endif /*COM_CFG_H_*/\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+/*
+* Configuration of module Com (Com_PbCfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
*/
\r
-#include "Com_PbCfg.h"\r
+#include "Com.h"
#include "stdlib.h"\r
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
\r
\r
+
+
+
+/*
+ * Signal init values.
+ */
+const uint16 Com_SignalInitValue_SetLedLevelRx = 0;
+
+
/*\r
* Group signal definitions\r
*/\r
-ComGroupSignal_type ComGroupSignal[] = {\r
+const ComGroupSignal_type ComGroupSignal[] = {
{\r
.Com_Arc_EOL = 1\r
}\r
};\r
\r
\r
+/* SignalGroup GroupSignals lists. */
+
/*\r
* Signal definitions\r
*/\r
-ComSignal_type ComSignal[] = {\r
+const ComSignal_type ComSignal[] = {
{\r
.ComHandleId = SetLedLevelRx,\r
.ComFirstTimeoutFactor = 0,\r
.ComTimeoutFactor = 0,\r
.ComTimeoutNotification = NULL,\r
.ComTransferProperty = TRIGGERED,\r
-\r
-\r
- .ComSignalInitValue = 0,\r
- .ComBitPosition = 0,\r
+
+
+ .ComSignalInitValue = &Com_SignalInitValue_SetLedLevelRx,
+ .ComBitPosition = 7,
.ComBitSize = 16,\r
.ComSignalEndianess = BIG_ENDIAN,\r
.ComSignalType = UINT16,
- .Com_Arc_IsSignalGroup = 0,\r
-\r
+ .ComGroupSignal = NULL,
+
},\r
{\r
.Com_Arc_EOL = 1\r
/*\r
* I-PDU group definitions\r
*/\r
-ComIPduGroup_type ComIPduGroup[] = {\r
+const ComIPduGroup_type ComIPduGroup[] = {
{\r
.ComIPduGroupHandleId = RxGroup\r
},\r
-\r
+
{\r
.Com_Arc_EOL = 1\r
}\r
};\r
\r
+/* IPdu signal lists. */
+const ComSignal_type *ComIPduSignalRefs_LedCommandRx[] = {
+ &ComSignal[ SetLedLevelRx ],
+ NULL,
+};
\r
/*\r
* I-PDU definitions\r
*/\r
-ComIPdu_type ComIPdu[] = {\r
-\r
- {\r
- .ComIPduRxHandleId = LedCommandRx,\r
+const ComIPdu_type ComIPdu[] = {
+
+ { // LedCommandRx
+ .ArcIPduOutgoingId = PDUR_SOURCE_PDU_ID_LedCommandRx,
.ComIPduCallout = NULL,\r
- .ComIPduSignalProcessing = IMMEDIATE,\r
- .ComIPduSize = 2,\r
+ .ComIPduSignalProcessing = DEFERRED,
+ .ComIPduSize = 8,
.ComIPduDirection = RECEIVE,\r
.ComIPduGroupRef = RxGroup,\r
-\r
- .ComIPduSignalRef = {\r
-\r
- &ComSignal[ SetLedLevelRx ],\r
-\r
- NULL,\r
- },\r
- },\r
-\r
+
+ .ComIPduSignalRef = ComIPduSignalRefs_LedCommandRx,
+ },
{\r
.Com_Arc_EOL = 1\r
}\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module Com (Com_PbCfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
-*/
+#if (COM_SW_MAJOR_VERSION != 1)
+#error "Com: Configuration file version differs from BSW version."
+#endif
#ifndef COM_PBCFG_H_\r
#define COM_PBCFG_H_\r
\r
extern const Com_ConfigType ComConfiguration;\r
\r
+// COM Polite Defines.
+#define COM_PDU_ID_LedCommandRx 0
+
+
+
// PDU group definitions\r
enum {\r
RxGroup = 0,\r
};\r
\r
-\r
// Signal definitions\r
enum {\r
SetLedLevelRx = 0,\r
};\r
\r
\r
+
+
#endif /* COM_PBCFG_H_ */
--- /dev/null
+\r
+MOD_USE += CAN CANIF COM PDUR PORT PWM \r
+\r
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Callout_template.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 14:42:38 CEST 2010
+*/
+
+
+#include "EcuM.h"
+#include "Det.h"
+#if defined(USE_DEM)
+#include "Dem.h"
+#endif
+#if defined(USE_MCU)
+#include "Mcu.h"
+#endif
+#if defined(USE_GPT)
+#include "Gpt.h"
+#endif
+#if defined(USE_CAN)
+#include "Can.h"
+#endif
+#if defined(USE_CANIF)
+#include "CanIf.h"
+#endif
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
+#if defined(USE_COM)
+#include "Com.h"
+#endif
+#if defined(USE_CANTP)
+#include "CanTp.h"
+#endif
+#if defined(USE_DCM)
+#include "Dcm.h"
+#endif
+#if defined(USE_PWM)
+#include "Pwm.h"
+#endif
+#if defined(USE_IOHWAB)
+#include "IoHwAb.h"
+#endif
+
+void EcuM_AL_DriverInitZero()
+{
+ Det_Init();
+ Det_Start();
+}
+
+EcuM_ConfigType* EcuM_DeterminePbConfiguration()
+{
+ return &EcuMConfig;
+}
+
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)
+{
+#if defined(USE_MCU)
+ Mcu_Init(ConfigPtr->McuConfig);
+
+ // Set up default clock (Mcu_InitClock requires initRun==1)
+ Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );
+
+ // Wait for PLL to sync.
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)
+ ;
+#endif
+
+#if defined(USE_DEM)
+ // Preinitialize DEM
+ Dem_PreInit();
+#endif
+
+#if defined(USE_PORT)
+ // Setup Port
+ Port_Init(ConfigPtr->PortConfig);
+#endif
+
+
+#if defined(USE_GPT)
+ // Setup the GPT
+ Gpt_Init(ConfigPtr->GptConfig);
+#endif
+
+ // Setup watchdog
+ // TODO
+
+#if defined(USE_DMA)
+ // Setup DMA
+ Dma_Init(ConfigPtr->DmaConfig);
+#endif
+
+#if defined(USE_ADC)
+ // Setup ADC
+ Adc_Init(ConfigPtr->AdcConfig);
+#endif
+
+ // Setup ICU
+ // TODO
+
+ // Setup PWM
+#if defined(USE_PWM)
+ // Setup PWM
+ Pwm_Init(ConfigPtr->PwmConfig);
+#endif
+}
+
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)
+{
+#if defined(USE_SPI)
+ // Setup SPI
+ Spi_Init(ConfigPtr->SpiConfig);
+#endif
+
+#if defined(USE_EEP)
+ // Setup EEP
+ Eep_Init(ConfigPtr->EEpConfig);
+#endif
+
+#if defined(USE_FLS)
+ // Setup Flash
+ FlashInit(ConfigPtr->FlashConfig);
+#endif
+
+ // Setup NVRAM Manaager
+ // TODO
+
+ // Setup CAN tranceiver
+ // TODO
+
+#if defined(USE_CAN)
+ // Setup Can driver
+ Can_Init(ConfigPtr->CanConfig);
+#endif
+
+#if defined(USE_CANIF)
+ // Setup CanIf
+ CanIf_Init(ConfigPtr->CanIfConfig);
+#endif
+
+#if defined(USE_CANTP)
+ // Setup CAN TP
+ CanTp_Init();
+#endif
+ // Setup LIN
+ // TODO
+
+#if defined(USE_PDUR)
+ // Setup PDU Router
+ PduR_Init(ConfigPtr->PduRConfig);
+#endif
+
+#if defined(USE_COM)
+ // Setup COM layer
+ Com_Init(ConfigPtr->ComConfig);
+#endif
+
+#if defined(USE_DCM)
+ // Setup DCM
+ Dcm_Init();
+#endif
+
+#if defined(USE_IOHWAB)
+ // Setup IO hardware abstraction layer
+ IoHwAb_Init();
+#endif
+
+}
+
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType ConfigPtr)
+{
+#if defined(USE_DEM)
+ // Setup DEM
+ Dem_Init();
+#endif
+
+#if defined(USE_CANIF)
+ // Startup the CAN interafce; due to the missing COM manager
+ CanIf_InitController(CANIF_CHANNEL_0, CANIF_CHANNEL_0_CONFIG_0);
+ CanIf_SetControllerMode(CANIF_CHANNEL_0, CANIF_CS_STARTED);
+#endif
+}
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 14:42:38 CEST 2010
+*/
+
+
+
+#include "EcuM.h"
+
+EcuM_ConfigType EcuMConfig =
+{
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,
+ .EcuMDefaultShutdownMode = 0, // Don't care
+ .EcuMDefaultAppMode = 0, // Don't care
+
+#if defined(USE_MCU)
+ .McuConfig = McuConfigData,
+#endif
+#if defined(USE_PORT)
+ .PortConfig = &PortConfigData,
+#endif
+#if defined(USE_CAN)
+ .CanConfig = &CanConfigData,
+#endif
+#if defined(USE_CANIF)
+ .CanIfConfig = &CanIf_Config,
+#endif
+#if defined(USE_COM)
+ .ComConfig = &ComConfiguration,
+#endif
+#if defined(USE_PDUR)
+ .PduRConfig = &PduR_Config,
+#endif
+#if defined(USE_DMA)
+ .DmaConfig = DmaConfig,
+#endif
+#if defined(USE_ADC)
+ .AdcConfig = AdcConfig,
+#endif
+#if defined(USE_PWM)
+ .PwmConfig = &PwmConfig,
+#endif
+#if defined(USE_GPT)
+ .GptConfig = GptConfigData,
+#endif
+};
+
+void EcuM_OnGoOffTwo( void ) {
+
+}
+
+void EcuM_AL_SwitchOff( void ) {
+
+}
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
+
+
+#if (ECUM_SW_MAJOR_VERSION != 1)
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+
+
+#ifndef ECUM_CFG_H_
+#define ECUM_CFG_H_
+
+#define ECUM_VERSION_INFO_API STD_OFF
+#define ECUM_INCLUDE_NVRAM_MGR STD_OFF
+#define ECUM_DEV_ERROR_DETECT STD_OFF
+
+#include "EcuM_Generated_Types.h"
+
+extern EcuM_ConfigType EcuMConfig;
+
+#endif /*ECUM_CFG_H_*/
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Generated_Types.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 14:42:38 CEST 2010
+*/
+
+
+#if (ECUM_SW_MAJOR_VERSION != 1)
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+
+#ifndef _ECUM_GENERATED_TYPES_H_
+#define _ECUM_GENERATED_TYPES_H_
+
+#if defined(USE_MCU)
+#include "Mcu.h"
+#endif
+#if defined(USE_PORT)
+#include "Port.h"
+#endif
+#if defined(USE_CAN)
+#include "Can.h"
+#endif
+#if defined(USE_CANIF)
+#include "CanIf.h"
+#endif
+#if defined(USE_PWM)
+#include "Pwm.h"
+#endif
+#if defined(USE_COM)
+#include "Com.h"
+#endif
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
+#if defined(USE_DMA)
+#include "Dma.h"
+#endif
+#if defined(USE_ADC)
+#include "Adc.h"
+#endif
+#if defined(USE_GPT)
+#include "Gpt.h"
+#endif
+
+
+typedef struct
+{
+ EcuM_StateType EcuMDefaultShutdownTarget;
+ uint8 EcuMDefaultShutdownMode;
+ AppModeType EcuMDefaultAppMode;
+
+#if defined(USE_MCU)
+ const Mcu_ConfigType* McuConfig;
+#endif
+#if defined(USE_PORT)
+ const Port_ConfigType* PortConfig;
+#endif
+#if defined(USE_CAN)
+ const Can_ConfigType* CanConfig;
+#endif
+#if defined(USE_CANIF)
+ const CanIf_ConfigType* CanIfConfig;
+#endif
+#if defined(USE_COM)
+ const Com_ConfigType* ComConfig;
+#endif
+#if defined(USE_PDUR)
+ const PduR_PBConfigType* PduRConfig;
+#endif
+#if defined(USE_PWM)
+ const Pwm_ConfigType* PwmConfig;
+#endif
+#if defined(USE_DMA)
+ const Dma_ConfigType* DmaConfig;
+#endif
+#if defined(USE_ADC)
+ const Adc_ConfigType* AdcConfig;
+#endif
+#if defined(USE_GPT)
+ const Gpt_ConfigType* GptConfig;
+#endif
+} EcuM_ConfigType;
+
+#endif /*_ECUM_GENERATED_TYPES_H_*/
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 16:39:13 CEST 2010
*/
-\r
-// File generated on Tue Aug 18 13:49:03 CEST 2009\r
+
\r
#include <stdlib.h>\r
#include <stdint.h>\r
-#include "os_config_macros.h"\r
#include "Platform_Types.h"\r
#include "Os.h" // includes Os_Cfg.h\r
-#include "Kernel.h"\r
-#include "Kernel_Offset.h"\r
+#include "os_config_macros.h"
+#include "kernel.h"
+#include "kernel_offset.h"
#include "alist_i.h"\r
#include "Mcu.h"\r
-
-OsTickType OsTickFreq = 1000;
\r
-// ################################## DEBUG #################################\r
-// All output on as standard\r
-uint32 os_dbg_mask =\r
- D_MASTER_PRINT ;\r
-// D_ISR_MASTER_PRINT |\r
-// D_STDOUT |\r
-// D_ISR_STDOUT | D_TASK | D_ALARM;\r
+extern void dec_exception( void );
\r
-// ############################### APPLICATION ##############################\r
-// A single, non-configurable application for now\r
-OsRomApplicationType rom_app_list[] = {\r
- {\r
- .application_id = APPLICATION_ID_application_1,\r
- .name = "application_1",\r
- .trusted = true,\r
- .StartupHook = NULL,\r
- .ShutdownHook = NULL,\r
- .ErrorHook = NULL,\r
- .isr_mask = 0,\r
- .scheduletable_mask = 0,\r
- .alarm_mask = 0,\r
- .counter_mask = 0,\r
- .resource_mask = 0,\r
- .message_mask = 0,\r
- }\r
+// Set the os tick frequency
+OsTickType OsTickFreq = 1000;
+
+
+// ############################### DEBUG OUTPUT #############################
+uint32 os_dbg_mask = 0;
+
+
+
+// ################################# COUNTERS ###############################
+GEN_COUNTER_HEAD {
+ GEN_COUNTER( COUNTER_ID_OsTick,
+ "OsTick",
+ COUNTER_TYPE_HARD,
+ COUNTER_UNIT_NANO,
+ 0xffff,
+ 1,
+ 1,
+ 0),
};\r
\r
-\r
-// ################################# COUNTERS ###############################\r
-OsCounterType counter_list[] = {\r
- {\r
- .name = "OsTick",\r
- .type = COUNTER_TYPE_HARD,\r
- .unit = COUNTER_UNIT_NANO,\r
- .alarm_base.maxallowedvalue = 65535,\r
- .alarm_base.tickperbase = 1,\r
- .alarm_base.mincycle = 0,\r
- },\r
-};
-
CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
\r
// ################################## ALARMS ################################\r
-OsAlarmType alarm_list[] = {\r
- {\r
- .name = "ComAlarm",\r
- .counter = &counter_list[COUNTER_ID_OsTick],\r
- .counter_id = COUNTER_ID_OsTick,\r
- .autostart = {\r
- .active = TRUE,\r
- .alarmtime = 5,\r
- .cycletime = 20,\r
- .appmode_mask = APPLICATION_ID_application_1, //___ARCTICSTUDIO_GENERATOR_TODO___,\r
- },\r
- .action = {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_ComTask,\r
- },\r
- },\r
+GEN_ALARM_AUTOSTART(ALARM_ID_ComAlarm, ALARM_AUTOSTART_ABSOLUTE, 5, 20, OSDEFAULTAPPMODE );
+
+
+GEN_ALARM_HEAD {
+ GEN_ALARM( ALARM_ID_ComAlarm,
+ "ComAlarm",
+ COUNTER_ID_OsTick,
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_ComAlarm),
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_ComTask,
+ NULL,
+ NULL ),
};\r
\r
-\r
// ################################ RESOURCES ###############################\r
-OsResourceType resource_list[] = {\r
- {\r
- .nr = RES_SCHEDULER,\r
- .type = RESOURCE_TYPE_STANDARD,\r
- .ceiling_priority = 0,\r
- .application_owner_id = 0,\r
- .task_mask = 0,\r
- .owner = (-1),\r
- },\r
+GEN_RESOURCE_HEAD {
+ GEN_RESOURCE(
+ RES_SCHEDULER,
+ RESOURCE_TYPE_STANDARD,
+ 0
+ ),
};\r
\r
// ############################## STACKS (TASKS) ############################\r
-uint8_t stack_ComTask[PRIO_STACK_SIZE];\r
-uint8_t stack_OsIdle[PRIO_STACK_SIZE];\r
-uint8_t stack_StartupTask[PRIO_STACK_SIZE];\r
-\r
-// ##################### TIMING PROTECTIONS (TASKS, ISRS) ###################\r
-OsTimingProtectionType timing_protection_list[] = {\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);
+DECLARE_STACK(ComTask,2048);
+DECLARE_STACK(StartupTask,2048);
+\r
+// ################################## TASKS #################################
+GEN_TASK_HEAD {
+ GEN_ETASK( OsIdle,
+ 0,
+ FULL,
+ TRUE,
+ NULL,
+ 0
+ ),
+ GEN_BTASK(
+ ComTask,
+ 1,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ StartupTask,
+ 2,
+ FULL,
+ TRUE,
+ NULL,
+ 0,
+ 1
+ ),
+
};\r
\r
-OsRomPcbType rom_pcb_list[] = {\r
-// ################################## TASKS #################################\r
- {\r
- .pid = TASK_ID_ComTask,\r
- .name = "ComTask",\r
- .entry = ComTask,\r
- .prio = 10,\r
- .proc_type = PROC_BASIC,\r
- .stack.size = sizeof stack_ComTask,\r
- .stack.top = stack_ComTask,\r
- .autostart = false,\r
- .application_id = APPLICATION_ID_application_1,\r
- },\r
- {\r
- .pid = TASK_ID_OsIdle,\r
- .name = "OsIdle",\r
- .entry = OsIdle,\r
- .prio = 1,\r
- .proc_type = PROC_EXTENDED,\r
- .stack.size = sizeof stack_OsIdle,\r
- .stack.top = stack_OsIdle,\r
- .autostart = true,\r
- .application_id = APPLICATION_ID_application_1,\r
- },
- {\r
- .pid = TASK_ID_StartupTask,\r
- .name = "StartupTask",\r
- .entry = StartupTask,\r
- .prio = 100,\r
- .proc_type = PROC_BASIC,\r
- .stack.size = sizeof stack_StartupTask,\r
- .stack.top = stack_StartupTask,\r
- .autostart = true,\r
- .application_id = APPLICATION_ID_application_1,\r
- },\r
+// ################################## HOOKS #################################
+GEN_HOOKS(
+ StartupHook,
+ NULL,
+ ShutdownHook,
+ ErrorHook,
+ PreTaskHook,
+ PostTaskHook
+);
+
+// ################################## ISRS ##################################
+
+
+// ############################ SCHEDULE TABLES #############################
+
+// Table heads
+GEN_SCHTBL_HEAD {
};\r
\r
-uint8_t pcb_list[PCB_T_SIZE*ARRAY_SIZE(rom_pcb_list)];\r
+GEN_PCB_LIST()
\r
uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
-
+\r
GEN_IRQ_VECTOR_TABLE_HEAD {};
GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
GEN_IRQ_PRIORITY_TABLE_HEAD {};
\r
-\r
-// ################################## HOOKS ##################################\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook,\r
-};\r
-\r
#include "os_config_funcs.h"
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 16:39:13 CEST 2010
+*/
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
-*/
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
\r
#ifndef OS_CFG_H_\r
#define OS_CFG_H_\r
\r
-#define ALARM_USE\r
-
-// Application\r
-#define APPLICATION_ID_application_1 0\r
-#define APPLICATION_CNT 1\r
\r
// Alarm Id's\r
#define ALARM_ID_ComAlarm 0
// Counter Id's\r
#define COUNTER_ID_OsTick 0\r
\r
-// Event Id's\r
+// Counter macros
+#define OSMAXALLOWEDVALUE_OsTick 65535
+
\r
// Event masks\r
\r
\r
// Resource Id's\r
\r
+// Linked resource id's
+
+// Resource masks
+
// Task Id's\r
-#define TASK_ID_ComTask 0\r
-#define TASK_ID_OsIdle 1
+#define TASK_ID_OsIdle 0
+#define TASK_ID_ComTask 1
#define TASK_ID_StartupTask 2\r
\r
// Task entry points\r
+void OsIdle( void );
void ComTask( void );\r
-void OsIdle( void );\r
void StartupTask( void );\r
\r
-// Stack sizes\r
-#define PRIO_STACK_SIZE 2048\r
-#define OS_INTERRUPT_STACK_SIZE 2048\r
+// Schedule table id's
\r
-// Hooks\r
-#define USE_ERRORHOOK\r
-#define USE_POSTTASKHOOK\r
-#define USE_PRETASKHOOK\r
-#define USE_PROTECTIONHOOK\r
-#define USE_SHUTDOWNHOOK\r
-#define USE_STARTUPHOOK\r
+// Stack size
+#define OS_INTERRUPT_STACK_SIZE 2048
+#define OS_OSIDLE_STACK_SIZE 512
+
+#define OS_ALARM_CNT 1
+#define OS_TASK_CNT 3
+#define OS_SCHTBL_CNT 0
+#define OS_COUNTER_CNT 1
+#define OS_EVENTS_CNT 0
+#define OS_ISRS_CNT 0
+#define OS_RESOURCE_CNT 0
+#define OS_LINKED_RESOURCE_CNT 0
+
+#define CFG_OS_DEBUG STD_OFF
+
+#define OS_SC1 STD_ON
+#define OS_STACK_MONITORING STD_ON
+#define OS_STATUS_EXTENDED STD_ON
+#define OS_USE_GET_SERVICE_ID STD_ON
+#define OS_USE_PARAMETER_ACCESS STD_ON
+#define OS_RES_SCHEDULER STD_ON
\r
#endif /*OS_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module PduR (PduR_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
+
+
+#if (PDUR_SW_MAJOR_VERSION != 1)
+#error "PduR: Configuration file version differs from BSW version."
+#endif
+
+
+
+#ifndef PDUR_CFG_H_
+#define PDUR_CFG_H_
+
+// Module support
+#define PDUR_CANIF_SUPPORT STD_ON
+#define PDUR_CANTP_SUPPORT STD_OFF
+#define PDUR_FRIF_SUPPORT STD_OFF /* Not supported */
+#define PDUR_FRTP_SUPPORT STD_OFF /* Not supported */
+#define PDUR_LINIF_SUPPORT STD_OFF
+#define PDUR_LINTP_SUPPORT STD_OFF /* Not supported */
+#define PDUR_COM_SUPPORT STD_ON
+#define PDUR_DCM_SUPPORT STD_OFF
+#define PDUR_IPDUM_SUPPORT STD_OFF /* Not supported */
+
+
+#define PDUR_DEV_ERROR_DETECT STD_OFF
+#define PDUR_VERSION_INFO_API STD_OFF
+
+
+// Zero cost operation mode
+#define PDUR_ZERO_COST_OPERATION STD_ON
+#define PDUR_SINGLE_IF CAN_IF
+#define PDUR_SINGLE_TP CAN_TP
+
+
+// Gateway operation
+#define PDUR_GATEWAY_OPERATION STD_OFF
+#define PDUR_MEMORY_SIZE 10 /* Not used */
+#define PDUR_SB_TX_BUFFER_SUPPORT STD_OFF
+#define PDUR_FIFO_TX_BUFFER_SUPPORT STD_OFF
+
+/**
+ * The maximum numbers of Tx buffers.
+ */
+#define PDUR_MAX_TX_BUFFER_NUMBER 10 /* Not used */
+
+
+
+
+
+// Multicast
+/* Not supported
+#define PDUR_MULTICAST_TOIF_SUPPORT STD_OFF
+#define PDUR_MULTICAST_FROMIF_SUPPORT STD_OFF
+#define PDUR_MULTICAST_TOTP_SUPPORT STD_OFF
+#define PDUR_MULTICAST_FROMTP_SUPPORT STD_OFF
+*/
+
+
+// Minimum routing
+/* Minimum routing not supported.
+#define PDUR_MINIMUM_ROUTING_UP_MODULE COM
+#define PDUR_MINIMUM_ROUTING_LO_MODULE CAN_IF
+#define PDUR_MINIMUM_ROUTING_UP_RXPDUID ((PduIdType)100)
+#define PDUR_MINIMUM_ROUTING_LO_RXPDUID ((PduIdType)255)
+#define PDUR_MINIMUM_ROUTING_UP_TXPDUID ((PduIdType)255)
+#define PDUR_MINIMUM_ROUTING_LO_TXPDUID ((PduIdType)255)
+*/
+
+
+#endif
--- /dev/null
+/*
+* Configuration of module PduR (PduR_PbCfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:34 CEST 2010
+*/
+
+
+#include "PduR.h"
+#include "PduR_Cfg.h"
+#include "PduR_PbCfg.h"
+
+#if PDUR_CANIF_SUPPORT == STD_ON
+#include "CanIf.h"
+#endif
+#if PDUR_CANTP_SUPPORT == STD_ON
+#include "CanTp.h"
+#endif
+#if PDUR_LINIF_SUPPORT == STD_ON
+#include "LinIf.h"
+#endif
+#if PDUR_COM_SUPPORT == STD_ON
+#include "Com.h"
+#endif
+#if PDUR_DCM_SUPPORT == STD_ON
+#include "Dcm.h"
+#endif
+
+
+PduRTxBufferTable_type PduRTxBufferTable = {
+ .PduRMaxTxBufferNumber = 1,
+ .PduRTxBuffer = {
+ {
+ .Depth = 0,
+ },
+ }
+};
+
+
+PduRRoutingTable_type PduRRoutingTable = {
+ .PduRRoutingPath = {
+ { // End of routing table
+ .PduR_Arc_EOL = 1
+ }
+ }
+};
+
+
+
+
+PduR_PBConfigType PduR_Config = {
+ .PduRConfigurationId = 0,
+ .PduRTxBufferTable = &PduRTxBufferTable,
+ .PduRRoutingTable = &PduRRoutingTable,
+};
--- /dev/null
+/*
+* Configuration of module PduR (PduR_PbCfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:33 CEST 2010
+*/
+
+
+#if (PDUR_SW_MAJOR_VERSION != 1)
+#error "PduR: Configuration file version differs from BSW version."
+#endif
+
+
+#if defined(USE_DCM)
+#include "Dcm.h"
+#endif
+#if defined(USE_COM)
+#include "Com.h"
+#endif
+#if defined(USE_CANIF)
+#include "CanIf.h"
+#endif
+#if defined(USE_CANTP)
+#include "CanTp.h"
+#endif
+
+extern PduR_PBConfigType PduR_Config;
+
+// PduR Polite Defines.
+
+#define PDUR_SOURCE_PDU_ID_LedCommandRx CANIF_PDU_ID_LedCommandRx
+#define PDUR_DEST_PDU_ID_LedCommandRx COM_PDU_ID_LedCommandRx
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+/*
+* Configuration of module Port (Port_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:34 CEST 2010
*/
+
+// File generated on Fri Apr 30 15:56:34 CEST 2010
+// File generated by com.arccore.bswbuilder.modules.port.mpc5516
\r
-// File generated on Mon Aug 17 14:11:26 CEST 2009\r
-// File generated by org.autocore.modules.port.mpc5516\r
-\r
+#include "Port.h"
#include "Port_Cfg.h"\r
+#include "stdlib.h"
\r
const uint16_t PortPadConfigData[] = {\r
PCR_RESET, /* PCR 0 */\r
PCR_RESET, /* PCR 8 */\r
PCR_RESET, /* PCR 9 */\r
PCR_RESET, /* PCR 10 */
- PCR_RESET,
- PCR_RESET,\r
+ PCR_RESET, /* PCR 11 */
+ PCR_RESET, /* PCR 12 */
PCR_RESET, /* PCR 13 */\r
PCR_RESET, /* PCR 14 */\r
PCR_RESET, /* PCR 15 */\r
PCR_RESET, /* PCR 42 */\r
PCR_RESET, /* PCR 43 */\r
PCR_RESET, /* PCR 44 */\r
- PCR_RESET, /* PCR 45 */\r
+ ( FUNC1 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 45 : PORT_PIN_MODE_PWM */
PCR_RESET, /* PCR 46 */\r
PCR_RESET, /* PCR 47 */\r
- ( PA_FUNC1 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 48 : CNTX_A */\r
- ( PA_FUNC1 | IBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 49 : CNRX_A */\r
+ ( FUNC1 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 48 : PORT_PIN_MODE_CAN */
+ ( FUNC1 | IBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 49 : PORT_PIN_MODE_CAN */
PCR_RESET, /* PCR 50 */\r
PCR_RESET, /* PCR 51 */\r
- ( PA_FUNC2 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 52 : PD[4] */\r
+ PCR_RESET, /* PCR 52 */
PCR_RESET, /* PCR 53 */\r
PCR_RESET, /* PCR 54 */\r
PCR_RESET, /* PCR 55 */\r
GPDO_RESET, /* GPDO 8 */\r
GPDO_RESET, /* GPDO 9 */\r
GPDO_RESET, /* GPDO 10 */\r
- GPDO_RESET, /* GPDO 11 */\r
- GPDO_RESET, /* GPDO 12 */\r
+ GPDO_RESET, /* GPDO 11 */
+ GPDO_RESET, /* GPDO 12 */
GPDO_RESET, /* GPDO 13 */\r
GPDO_RESET, /* GPDO 14 */\r
GPDO_RESET, /* GPDO 15 */\r
GPDO_RESET, /* GPDO 42 */\r
GPDO_RESET, /* GPDO 43 */\r
GPDO_RESET, /* GPDO 44 */\r
- GPDO_RESET, /* GPDO 45 */\r
+ GPDO_RESET, /* GPDO 45 */
GPDO_RESET, /* GPDO 46 */\r
GPDO_RESET, /* GPDO 47 */\r
GPDO_RESET, /* GPDO 48 */\r
- GPDO_HIGH, /* GPDO 49 */\r
+ GPDO_RESET, /* GPDO 49 */
GPDO_RESET, /* GPDO 50 */\r
GPDO_RESET, /* GPDO 51 */\r
GPDO_RESET, /* GPDO 52 */\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+* Configuration of module Port (Port_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:34 CEST 2010
*/
-// File generated on Mon Aug 17 14:11:22 CEST 2009\r
-// File generated by org.autocore.modules.port.mpc5516\r
+
+#if (PORT_SW_MAJOR_VERSION != 1)
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
#include "Std_Types.h"\r
\r
-#define PORT_VERSION_INFO_API STD_ON\r
-#define PORT_DEV_ERROR_DETECT STD_ON\r
-#define PORT_PIN_DIRECTION_CHANGES_ALLOWED STD_ON\r
+#define PORT_VERSION_INFO_API STD_OFF
+#define PORT_DEV_ERROR_DETECT STD_OFF
+#define PORT_PIN_DIRECTION_CHANGES_ALLOWED STD_OFF
\r
#define BIT0 (1<<15)\r
#define BIT1 (1<<14)\r
#define ODE_ENABLE BIT10\r
#define IBE_ENABLE BIT7\r
#define OBE_ENABLE BIT6\r
-#define PA_IO (0)\r
-#define PA_FUNC0 (0)\r
-#define PA_FUNC1 (BIT5)\r
-#define PA_FUNC2 (BIT4)\r
-#define PA_FUNC3 (BIT4|BIT5)\r
-#define PA_FUNC4 (BIT3)\r
+#define IO (0)
+#define FUNC0 (0)
+#define FUNC1 (BIT5)
+#define FUNC2 (BIT4)
+#define FUNC3 (BIT4|BIT5)
+#define FUNC4 (BIT3)
\r
#define PCR_RESET (0)\r
#define GPDO_RESET (0)\r
\r
#define GPDO_HIGH (1)\r
\r
-// Could also use an enum to name the pins here\r
-typedef int Port_PinType;\r
+
+typedef uint16 Port_PinType;
\r
typedef struct\r
{\r
\r
extern const Port_ConfigType PortConfigData;\r
\r
-#endif /*PORT_CFG_H_*/\r
+#endif /* PORT_CFG_H_ */
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
+/*
+* Configuration of module Pwm (Pwm_Cfg.c)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:34 CEST 2010
+*/
/*\r
* Pwm_Cfg.c\r
*\r
- * Created on: 2009-jul-09\r
- * Author: nian\r
+ * Created on:
+ * Author:
*/\r
\r
#include "Pwm.h"\r
#include "Pwm_Cfg.h"\r
\r
-extern void MyPwmNotificationRoutine(void);\r
+
+/*
+ * Notification routines are defined elsewhere but need to be linked from here,
+ * so we define the routines as external here.
+ */
\r
const Pwm_ConfigType PwmConfig = {\r
.Channels = {\r
- PWM_CHANNEL_CONFIG(PWM_CHANNEL_1, 3000, 0x6000, PWM_CHANNEL_PRESCALER_4, PWM_HIGH),\r
+
+ PWM_CHANNEL_CONFIG(// Channel name and emios channel id
+ PWM_CHANNEL_1,
+ // Period in ticks
+ 12000,
+ // Duty cycle (0 ~> 0%, 0x8000 ~> 100%)
+ 24576,
+ // Local prescaler
+ PWM_CHANNEL_PRESCALER_1,
+ // Polarity
+ PWM_HIGH),
},\r
#if PWM_NOTIFICATION_SUPPORTED==ON\r
.NotificationHandlers = {\r
- NULL, // PWM_CHANNEL_1\r
+ // Notification routine for PWM_CHANNEL_1
+ ,
+
}\r
#endif\r
};\r
+
\ No newline at end of file
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/\r
+/*
+* Configuration of module Pwm (Pwm_Cfg.h)
+*
+* Created by:
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+*
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:56:34 CEST 2010
+*/
+
+
+#if (PWM_SW_MAJOR_VERSION != 1)
+#error "Pwm: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef PWM_CFG_H_\r
#define PWM_CFG_H_\r
\r
-/*
- * PwmGeneral
+/****************************************************************************
+ * Global configuration options and defines
*/\r
\r
-/*\r
- * PWM003: The detection of development errors is configurable (ON/OFF) at\r
- * pre-compile time. The switch PwmDevErorDetect shall activate or disable\r
- * the detection of all development errors\r
- */\r
-#define PWM_DEV_EROR_DETECT STD_ON\r
-#define PWM_GET_OUTPUT_STATE STD_ON\r
-#define PWM_STATICALLY_CONFIGURED STD_OFF\r
-#define PWM_NOTIFICATION_SUPPORTED STD_ON\r
+#define ON 1
+#define OFF 0
\r
-#define PWM_SET_PERIOD_AND_DUTY STD_ON\r
+// PWM003
+#define PWM_DEV_EROR_DETECT ON
+#define PWM_NOTIFICATION_SUPPORTED OFF
\r
-/*\r
- * PWM132: Switch for enabling the update of duty cycle parameter at the end\r
- * of the current period.\r
- *\r
- * Note: Currently only ON mode is supported.\r
- */\r
-#define PWM_DUTYCYCLE_UPDATED_ENDPERIOD STD_ON\r
+// PWM132. Currently only ON is supported.
+#define PWM_DUTYCYCLE_UPDATED_ENDPERIOD ON
+#define PWM_PERIOD_UPDATED_ENDPERIOD ON
+
+// Define what functions to enable.
+#define PWM_GET_OUTPUT_STATE ON
+#define PWM_SET_PERIOD_AND_DUTY ON
+#define PWM_DEINIT ON
+#define PWM_DUTYCYCLE ON
+#define PWM_SET_OUTPUT_TO_IDLE ON
+#define PWM_VERSION_INFO_API ON
-/*
- * PWM106: This is implementation specific but not all values may be valid
- * within the type. This shall be chosen in order to have the most efficient
- * implementation on a specific microcontroller platform.
- *
- * PWM106 => Pwm_ChannelType == eemios channel id.
- */
-typedef uint8 Pwm_ChannelType;
-/*
- * PWM070: All time units used within the API services of the PWM module shall
- * be of the unit ticks.
- */
-typedef uint16 Pwm_PeriodType;
\r
/****************************************************************************\r
* Not defined in AUTOSAR.\r
*/\r
#define PWM_ISR_PRIORITY 1\r
-#define PWM_PRESCALER 64\r
+#define PWM_PRESCALER 1
+
/*\r
* Setting to ON freezes the current output state of a PWM channel when in\r
* debug mode.\r
*/\r
-#define PWM_FREEZE_ENABLE STD_ON\r
+#define PWM_FREEZE_ENABLE ON
\r
/****************************************************************************\r
* Enumeration of channels\r
* Maps a symbolic name to a hardware channel\r
*/\r
typedef enum {\r
-#if defined(CFG_BRD_MPC5516IT)\r
- PWM_CHANNEL_1 = 12,\r
+ PWM_CHANNEL_1 = 13,
+ PWM_NUMBER_OF_CHANNELS = 1
+} Pwm_NamedChannelsType;
\r
-#elif defined(CFG_BRD_MPC5567QRTECH)\r
- PWM_CHANNEL_1 = 10, /* Emios channel 10 maps to PCR189 which\r
- * is available on pin 54 of the\r
- * ERNI 154822 connector\r
- */\r
-#else\r
-#warning "Unknown board or CFG_BRD_* undefined"\r
-#endif\r
- PWM_NUMBER_OF_CHANNELS = 1,\r
-} Pwm_NamedChannelsType;\r
+
+
+/*
+ * PWM106: This is implementation specific but not all values may be valid
+ * within the type. This shall be chosen in order to have the most efficient
+ * implementation on a specific microcontroller platform.
+ *
+ * PWM106 => Pwm_ChannelType == eemios channel id.
+ */
+typedef uint8 Pwm_ChannelType;
+
+/*
+ * PWM070: All time units used within the API services of the PWM module shall
+ * be of the unit ticks.
+ */
+typedef uint16 Pwm_PeriodType;
typedef enum {
PWM_CHANNEL_PRESCALER_1=0,
/* Mode is buffered OPWM with frequency modulation (allows change of
* period) */
#define PWM_EMIOS_OPWM 0x19
-#endif
+#endif\r
typedef struct {
}
\r
#endif /* PWM_CFG_H_ */\r
+
\ No newline at end of file
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="7a138641-e1da-4ab5-9618-7bfdbc46ffa9">\r
+ <SHORT-NAME>pwm_node2_mpc551x</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="a03f6581-a934-488e-a248-3a6cd2069b5c">\r
+ <SHORT-NAME>pwm_node2_mpc551x</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC551x</SD>\r
+ <SD GID="GENDIR">/pwm_node2_2/config</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/Can</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/CanIf</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/Com</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/EcuC</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/EcuM</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/PduR</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/pwm_node2_mpc551x/Pwm</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="fcf21990-5515-4774-8140-930e2a8de3d1">\r
+ <SHORT-NAME>Can</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Can</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="fe03c81b-9f11-4269-9bb7-0553824582d5">\r
+ <SHORT-NAME>CanConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="5ffd93b5-b708-44c5-8a1b-af119ec84470">\r
+ <SHORT-NAME>Can_A</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet/CanController</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerActivation</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerLoopback</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerBaudRate</DEFINITION-REF>\r
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+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanHWControllerId</DEFINITION-REF>\r
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+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerPropSeg</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerSeg1</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerSeg2</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="678734bc-96b1-419d-8e27-837fbf7abfb9">\r
+ <SHORT-NAME>Mask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet/CanController/CanFilterMask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanFilterMask/CanFilterMaskValue</DEFINITION-REF>\r
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+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
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+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="ad989a0d-34be-433b-bc86-e708fd5df075">\r
+ <SHORT-NAME>RxMailboxes</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanIdType</DEFINITION-REF>\r
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+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanObjectType</DEFINITION-REF>\r
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+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanMBMask</DEFINITION-REF>\r
+ <VALUE>4278190080</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanControllerRef</DEFINITION-REF>\r
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+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanFilterMaskRef</DEFINITION-REF>\r
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+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="2c1508ae-75a7-45d7-a1c6-4540afafaf8f">\r
+ <SHORT-NAME>CanGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanGeneral/CanDevErrorDetection</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanGeneral/CanMultiplexedTransmission</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanGeneral/CanVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="a02d0d3c-139e-43ba-a34f-6b2b356c0795">\r
+ <SHORT-NAME>CanIf</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/CanIf</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="5c1fc120-c759-4d63-87d2-a79160c3ad97">\r
+ <SHORT-NAME>CanIfDispatchConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfDispatchConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfBusOffNotification</DEFINITION-REF>\r
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+ </FUNCTION-NAME-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfErrorNotificaton</DEFINITION-REF>\r
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+ </FUNCTION-NAME-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfWakeupNotification</DEFINITION-REF>\r
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+ </FUNCTION-NAME-VALUE>\r
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+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfWakeupValidNotification</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4e097a93-96bb-48ee-b4ea-404d07816fd1">\r
+ <SHORT-NAME>CanIfDriverConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfDriverConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfBusoffNotification</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfReceiveIndication</DEFINITION-REF>\r
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+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfTransmitCancellation</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfTxConfirmation</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfWakeupNotification</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f7f3926a-0cf6-420a-8cd4-0587a1ac6c90">\r
+ <SHORT-NAME>CanIfInitConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfInitConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfConfigSet</DEFINITION-REF>\r
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+ </STRING-VALUE>\r
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+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="1a375926-db73-4c4d-8e08-0f5e140b121e">\r
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+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="6445c297-04d0-4e6f-beef-8aa463d2e12a">\r
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+ <CONTAINER UUID="d42afb12-537d-4d1b-b2dd-18bd23a9b582">\r
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+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="52ee03ee-a20f-40d3-944c-cc7fe50f827b">\r
+ <SHORT-NAME>Com</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
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+ <CONTAINER UUID="1da53534-8e3a-4a05-837f-ef938bd0678a">\r
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+ <FLOAT-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Com/ComGeneral/ComConfigurationUseDet</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ <SHORT-NAME>EcuC</SHORT-NAME>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
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+ <CONTAINERS>\r
+ <CONTAINER UUID="a0c34252-6285-474e-8b00-ee59c19f0d99">\r
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+ <CONTAINER UUID="12a97253-2ea0-4bcd-898c-e36e002fea9a">\r
+ <SHORT-NAME>LedCommandRx</SHORT-NAME>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
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+ <VALUE>false</VALUE>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
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+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="31f6edb0-9f6c-4de7-9442-fa8dc4f2315b">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="056d0fc9-4dbf-44cf-a8a1-6d41f71ded33">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="a55ec12a-b16e-441b-a0b5-6ad00c35acd3">\r
+ <SHORT-NAME>ComAlarm</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/pwm_node2_mpc551x/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="c1fc0ddd-4d7f-43af-8f57-c14d506f1bed">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/pwm_node2_mpc551x/Os/ComTask</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="2a49f11b-f258-4e4d-87e7-2f869242afd8">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>20</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="0c71cbf4-191b-4ff9-8d34-af29067dd8f1">\r
+ <SHORT-NAME>PduR</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/PduR</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="d02f4168-e3f2-44f1-a72f-b2c540006908">\r
+ <SHORT-NAME>PduRGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/PduR/PduRGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRCanIfSupport</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRCanTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRComSupport</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRDcmSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRFifoTxBufferSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRFrIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRFrTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRGatewayOperation</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRIPduMSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRLinIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRLinTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMemorySize</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingLoModule</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingLoRxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingLoTxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingUpModule</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingUpRxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingUpTxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastFromIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastFromTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastToIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastToTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRSbTxBufferSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRSingleIf</DEFINITION-REF>\r
+ <VALUE>CAN_IF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRSingleTp</DEFINITION-REF>\r
+ <VALUE>CAN_TP</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRZeroCostOperation</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8abbebb8-783c-4f97-ac28-3b78ea52e4ed">\r
+ <SHORT-NAME>PduRGlobalConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/PduR/PduRGlobalConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGlobalConfig/PduRConfigurationId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="f38c60fe-f11f-4b6b-a694-2bdebeb7fbff">\r
+ <SHORT-NAME>PduRRoutingTable</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/PduR/PduRGlobalConfig/PduRRoutingTable</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="0d584ce2-d7c8-4ba7-976b-8212e87529de">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="06182695-bf3e-4302-8436-8237d5267892">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="ef9d19cb-4237-4ae9-862d-7cc2367f9c99">\r
+ <SHORT-NAME>Pwm</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="aad28c1c-ef39-4003-8782-cc280dfa1a23">\r
+ <SHORT-NAME>eMIOS[13]</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>45</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_PWM</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="768a56ca-1d5a-4be9-92cc-efb99445360a">\r
+ <SHORT-NAME>CAN</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="052ab658-9e09-4e3e-9dde-948b9598d8ec">\r
+ <SHORT-NAME>CNTX_A</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>48</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_CAN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8720039d-d0a2-4599-aeff-fe3348e0e0fb">\r
+ <SHORT-NAME>CNRX_A</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_IN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>49</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_CAN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="1200f11b-2bae-4bfa-8805-a16d7a086410">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="92920c31-62f5-48b0-a964-f675750a5959">\r
+ <SHORT-NAME>Pwm</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Pwm</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="e646e277-cc98-4d17-95e5-a18eff50d19d">\r
+ <SHORT-NAME>PwmChannelConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmChannelConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="ccf3d6c9-8347-4361-bbb7-4fa3be4138aa">\r
+ <SHORT-NAME>PWM_CHANNEL_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmChannelClass</DEFINITION-REF>\r
+ <VALUE>PWM_VARIABLE_PERIOD</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmChannelId</DEFINITION-REF>\r
+ <VALUE>13</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmDutycycleDefault</DEFINITION-REF>\r
+ <VALUE>24576</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmIdleState</DEFINITION-REF>\r
+ <VALUE>PWM_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmArcticCoreChannelPrescaler</DEFINITION-REF>\r
+ <VALUE>PWM_CHANNEL_PRESCALER_1</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmNotification</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmPeriodDefault</DEFINITION-REF>\r
+ <VALUE>1.5E-4</VALUE>\r
+ </FLOAT-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Pwm/PwmChannelConfigSet/PwmChannel/PwmPolarity</DEFINITION-REF>\r
+ <VALUE>PWM_HIGH</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="3c85e105-1375-4ce1-9466-f070c973e8a1">\r
+ <SHORT-NAME>PwmConfigurationOfOptApiServices</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmDeInitApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmGetOutputState</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmSetDutyCycle</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmSetOutputToIdle</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmSetPeriodAndDuty</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmConfigurationOfOptApiServices/PwmVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="cb7509d9-39c4-45d1-95fb-f464680d9dc4">\r
+ <SHORT-NAME>PwmGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Pwm/PwmGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmDevErorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmDutycycleUpdatedEndperiod</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmIndex</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmNotificationSupported</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Pwm/PwmGeneral/PwmPeriodUpdatedEndperiod</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-#include <stdlib.h>\r
-#include <stdint.h>
-#include "Platform_Types.h"
-#include "Os.h" // includes Os_Cfg.h
-#include "os_config_macros.h"\r
-#include "kernel.h"\r
-#include "kernel_offset.h"\r
-#include "alist_i.h"\r
-#include "Mcu.h"\r
-\r
-extern void dec_exception( void );\r
-
-OsTickType OsTickFreq = 1000;
-\r
-// atleast 1\r
-#define SERVICE_CNT 1\r
-\r
-// --- RESOURCES ---\r
-\r
-GEN_RESOURCE_HEAD {\r
- GEN_RESOURCE( RES_SCHEDULER,
- RESOURCE_TYPE_STANDARD, /* standard, linked, internal */
- 0) /* ceiling priority */
-};\r
-\r
-//--- TASKS ----\r
-\r
-DECLARE_STACK(OsIdle,PRIO_STACK_SIZE);\r
-DECLARE_STACK(etask_1,PRIO_STACK_SIZE);\r
-DECLARE_STACK(etask_2,PRIO_STACK_SIZE);\r
-DECLARE_STACK(btask_3,PRIO_STACK_SIZE);\r
-\r
-GEN_TASK_HEAD {\r
- GEN_ETASK( OsIdle,\r
- 0,
- FULL, /* scheduling */
- true, /* autostart */
- NULL, /* internal resource */
- 0 /* rsrc mask */),\r
-\r
- GEN_ETASK( etask_1,\r
- 1,\r
- FULL, /* scheduling */
- true, /* autostart */
- NULL, /* internal resource */
- 0 /* rsrc mask */),
-\r
- GEN_ETASK( etask_2,\r
- 2,\r
- FULL, /* scheduling */
- true, /* autostart */
- NULL, /* internal resource */
- 0 /* rsrc mask */),
-\r
- GEN_BTASK( btask_3,\r
- 3,\r
- FULL, /* scheduling */
- false, /* autostart */
- NULL, /* internal resource */
- 0, /* rsrc mask */
- 1 /* activation limit */),
-};\r
-\r
-GEN_PCB_LIST()\r
-\r
-// --- INTERRUPTS ---\r
-\r
-uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
-
-GEN_IRQ_VECTOR_TABLE_HEAD {};
-GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
-GEN_IRQ_PRIORITY_TABLE_HEAD {};
-\r
-// --- COUNTERS ---\r
-GEN_COUNTER_HEAD {\r
- GEN_COUNTER( COUNTER_ID_OsTick,
- "COUNTER_ID_OsTick",
- COUNTER_TYPE_HARD,\r
- COUNTER_UNIT_NANO,\r
- 0xffff,1,1,0 ),\r
-};
-
-CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;
-\r
-// --- MESSAGES ---\r
-\r
-// --- ALARMS ---\r
-#define ALARM_USE\r
-
-GEN_ALARM_AUTOSTART( 0, ALARM_AUTOSTART_ABSOLUTE, 100, 10, OSDEFAULTAPPMODE );
-\r
-GEN_ALARM_HEAD {\r
- GEN_ALARM( 0,"Alarm1",COUNTER_ID_OsTick,
- GEN_ALARM_AUTOSTART_NAME(0),\r
- ALARM_ACTION_SETEVENT, TASK_ID_etask_1, EVENT_2, 0 ),\r
-};\r
-\r
-// --- SCHEDULETABLES ---\r
-\r
-// --- HOOKS ---\r
-\r
-GEN_HOOKS( StartupHook, ProtectionHook, ShutdownHook, ErrorHook, PreTaskHook, PostTaskHook )\r
-\r
-\r
-\r
-// --- MISC ---\r
-\r
-uint32 os_dbg_mask = \\r
- D_MASTER_PRINT |\\r
- D_ISR_MASTER_PRINT |\\r
- D_RAMLOG |\\r
- D_ISR_RAMLOG | D_TASK | D_ALARM;\r
-\r
-\r
-// | D_ALARM | D_TASK;\r
-\r
-\r
-#include "os_config_funcs.h"\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:25:22 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include <stdint.h>\r
+#include "Platform_Types.h"\r
+#include "Os.h" // includes Os_Cfg.h\r
+#include "os_config_macros.h"\r
+#include "kernel.h"\r
+#include "kernel_offset.h"\r
+#include "alist_i.h"\r
+#include "Mcu.h"\r
+\r
+extern void dec_exception( void );\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 1000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+\r
+\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD {\r
+ GEN_COUNTER( COUNTER_ID_OsTick,\r
+ "OsTick",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm1, ALARM_AUTOSTART_ABSOLUTE, 100, 10, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD {\r
+ GEN_ALARM( ALARM_ID_Alarm1,\r
+ "Alarm1",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm1),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_etask_1,\r
+ EVENT_MASK_EVENT_2,\r
+ NULL ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+GEN_RESOURCE_HEAD {\r
+ GEN_RESOURCE( \r
+ RES_SCHEDULER,\r
+ RESOURCE_TYPE_STANDARD,\r
+ 0\r
+ ),\r
+};\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(btask_3,512);\r
+DECLARE_STACK(etask_1,512);\r
+DECLARE_STACK(etask_2,512);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD {\r
+ GEN_ETASK( OsIdle,\r
+ 0,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0 \r
+ ),\r
+ GEN_BTASK(\r
+ btask_3,\r
+ 3,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_ETASK(\r
+ etask_1,\r
+ 1,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+ GEN_ETASK(\r
+ etask_2,\r
+ 2,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD {\r
+};\r
+\r
+GEN_PCB_LIST()\r
+\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
+\r
+GEN_IRQ_VECTOR_TABLE_HEAD {};\r
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};\r
+GEN_IRQ_PRIORITY_TABLE_HEAD {};\r
+\r
+#include "os_config_funcs.h"\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:25:22 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm1 0\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_OsTick 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_OsTick 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_EVENT_1 1\r
+#define EVENT_MASK_EVENT_2 2\r
+#define EVENT_MASK_EVENT_3 3\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_btask_3 1\r
+#define TASK_ID_etask_1 2\r
+#define TASK_ID_etask_2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void btask_3( void );\r
+void etask_1( void );\r
+void etask_2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 512\r
+#define OS_OSIDLE_STACK_SIZE 200
+\r
+#define OS_ALARM_CNT 1 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 3\r
+#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:26:09 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include <stdint.h>\r
+#include "Platform_Types.h"\r
+#include "Os.h" // includes Os_Cfg.h\r
+#include "os_config_macros.h"\r
+#include "kernel.h"\r
+#include "kernel_offset.h"\r
+#include "alist_i.h"\r
+#include "Mcu.h"\r
+\r
+extern void dec_exception( void );\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 1000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+\r
+\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD {\r
+ GEN_COUNTER( COUNTER_ID_OsTick,\r
+ "OsTick",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm1, ALARM_AUTOSTART_ABSOLUTE, 100, 10, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD {\r
+ GEN_ALARM( ALARM_ID_Alarm1,\r
+ "Alarm1",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm1),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_etask_1,\r
+ EVENT_MASK_EVENT_2,\r
+ NULL ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+GEN_RESOURCE_HEAD {\r
+ GEN_RESOURCE( \r
+ RES_SCHEDULER,\r
+ RESOURCE_TYPE_STANDARD,\r
+ 0\r
+ ),\r
+};\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(btask_3,2048);\r
+DECLARE_STACK(etask_1,2048);\r
+DECLARE_STACK(etask_2,2048);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD {\r
+ GEN_ETASK( OsIdle,\r
+ 0,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0 \r
+ ),\r
+ GEN_BTASK(\r
+ btask_3,\r
+ 3,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_ETASK(\r
+ etask_1,\r
+ 1,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+ GEN_ETASK(\r
+ etask_2,\r
+ 2,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD {\r
+};\r
+\r
+GEN_PCB_LIST()\r
+\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
+\r
+GEN_IRQ_VECTOR_TABLE_HEAD {};\r
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};\r
+GEN_IRQ_PRIORITY_TABLE_HEAD {};\r
+\r
+#include "os_config_funcs.h"\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:26:09 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm1 0\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_OsTick 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_OsTick 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_EVENT_1 1\r
+#define EVENT_MASK_EVENT_2 2\r
+#define EVENT_MASK_EVENT_3 3\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_btask_3 1\r
+#define TASK_ID_etask_1 2\r
+#define TASK_ID_etask_2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void btask_3( void );\r
+void etask_1( void );\r
+void etask_2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 2048\r
+#define OS_OSIDLE_STACK_SIZE 512
+\r
+#define OS_ALARM_CNT 1 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 3\r
+#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:26:34 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include <stdint.h>\r
+#include "Platform_Types.h"\r
+#include "Os.h" // includes Os_Cfg.h\r
+#include "os_config_macros.h"\r
+#include "kernel.h"\r
+#include "kernel_offset.h"\r
+#include "alist_i.h"\r
+#include "Mcu.h"\r
+\r
+extern void dec_exception( void );\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 1000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+\r
+\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD {\r
+ GEN_COUNTER( COUNTER_ID_OsTick,\r
+ "OsTick",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm1, ALARM_AUTOSTART_ABSOLUTE, 100, 10, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD {\r
+ GEN_ALARM( ALARM_ID_Alarm1,\r
+ "Alarm1",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm1),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_etask_1,\r
+ EVENT_MASK_EVENT_2,\r
+ NULL ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+GEN_RESOURCE_HEAD {\r
+ GEN_RESOURCE( \r
+ RES_SCHEDULER,\r
+ RESOURCE_TYPE_STANDARD,\r
+ 0\r
+ ),\r
+};\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(btask_3,2048);\r
+DECLARE_STACK(etask_1,2048);\r
+DECLARE_STACK(etask_2,2048);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD {\r
+ GEN_ETASK( OsIdle,\r
+ 0,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0 \r
+ ),\r
+ GEN_BTASK(\r
+ btask_3,\r
+ 3,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_ETASK(\r
+ etask_1,\r
+ 1,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+ GEN_ETASK(\r
+ etask_2,\r
+ 2,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD {\r
+};\r
+\r
+GEN_PCB_LIST()\r
+\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
+\r
+GEN_IRQ_VECTOR_TABLE_HEAD {};\r
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};\r
+GEN_IRQ_PRIORITY_TABLE_HEAD {};\r
+\r
+#include "os_config_funcs.h"\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:26:34 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm1 0\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_OsTick 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_OsTick 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_EVENT_1 1\r
+#define EVENT_MASK_EVENT_2 2\r
+#define EVENT_MASK_EVENT_3 3\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_btask_3 1\r
+#define TASK_ID_etask_1 2\r
+#define TASK_ID_etask_2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void btask_3( void );\r
+void etask_1( void );\r
+void etask_2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 2048\r
+#define OS_OSIDLE_STACK_SIZE 512
+\r
+#define OS_ALARM_CNT 1 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 3\r
+#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="0d59ee12-95ec-49af-8852-d0a411bc3657">\r
+ <SHORT-NAME>simple_hcs12</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="934d9f08-375e-4be3-b731-279fd50f7508">\r
+ <SHORT-NAME>simple_hc12</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <REVISION-LABEL>Rev 2</REVISION-LABEL>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">Undefined MCU</SD>\r
+ <SD GID="AUTHOR">ArcCore AB</SD>\r
+ <SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/simple_hcs12/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="29b23c16-ee7a-4b40-afaf-6c4117db16d3">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="92c5a2e3-81e3-4e1f-9137-174435a92b41">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>200</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="6578a055-00a4-4de2-8e87-3b7758f9caf7">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="67722c4e-130a-4dac-8aeb-72ed94e3e7e9">\r
+ <SHORT-NAME>Alarm1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_hcs12/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="78d0ecea-4ed3-4503-b0c8-4ad0b400d6ab">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6de53f9-2026-4621-887f-556572f825be">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_hcs12/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_hcs12/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="9c54b7bd-b0c1-4733-a6a4-b77b22b8df12">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="170cda57-b4ad-4c67-8384-97736003af20">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9254b1b9-6b3d-4e1a-b294-871e853d8ae0">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8c0b5497-cc95-4e9b-b102-99f3f7e637bb">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b5d30e9f-ae64-42ba-861e-7dd525761722">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="72dc534e-fc28-4883-b1d7-5e1162314494">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5f7216e5-bed0-4a95-bf07-26b1c54be1c0">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="896fdbc9-ed9a-4f24-9366-257760788019">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d681023d-1f60-4239-b9a2-7889a00bdaa4">\r
+ <SHORT-NAME>EVENT_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="0d59ee12-95ec-49af-8852-d0a411bc3657">\r
+ <SHORT-NAME>simple_ppc</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="934d9f08-375e-4be3-b731-279fd50f7508">\r
+ <SHORT-NAME>simple_ppc</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <REVISION-LABEL>Rev 2</REVISION-LABEL>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">Undefined MCU</SD>\r
+ <SD GID="AUTHOR">ArcCore AB</SD>\r
+ <SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/simple_ppc/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="29b23c16-ee7a-4b40-afaf-6c4117db16d3">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="92c5a2e3-81e3-4e1f-9137-174435a92b41">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="6578a055-00a4-4de2-8e87-3b7758f9caf7">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="67722c4e-130a-4dac-8aeb-72ed94e3e7e9">\r
+ <SHORT-NAME>Alarm1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_ppc/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="78d0ecea-4ed3-4503-b0c8-4ad0b400d6ab">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6de53f9-2026-4621-887f-556572f825be">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_ppc/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_ppc/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="9c54b7bd-b0c1-4733-a6a4-b77b22b8df12">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="170cda57-b4ad-4c67-8384-97736003af20">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9254b1b9-6b3d-4e1a-b294-871e853d8ae0">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8c0b5497-cc95-4e9b-b102-99f3f7e637bb">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b5d30e9f-ae64-42ba-861e-7dd525761722">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="72dc534e-fc28-4883-b1d7-5e1162314494">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5f7216e5-bed0-4a95-bf07-26b1c54be1c0">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="896fdbc9-ed9a-4f24-9366-257760788019">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d681023d-1f60-4239-b9a2-7889a00bdaa4">\r
+ <SHORT-NAME>EVENT_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
#include "Os.h"
#include <stdio.h>
#include <assert.h>
-#define USE_TRACE 1
+
+#define USE_LDEBUG_PRINTF
#include "debug.h"
+
#include "Mcu.h"
}
void PreTaskHook( void ) {
-// LDEBUG_PRINTF("## PreTaskHook, taskid=%d\n",task);
+// dbg_printf("## PreTaskHook, taskid=%d\n",task);
}
void PostTaskHook( void ) {
-// LDEBUG_PRINTF("## PostTaskHook, taskid=%d\n",task);
+// dbg_printf("## PostTaskHook, taskid=%d\n",task);
}
#if 0
+-include ../config/*.mk\r
+-include ../config/$(BOARDDIR)/*.mk\r
\r
-MOD_USE+=KERNEL MCU ECUM NEWLIB COMMON DET ADC DMA PORT COM CAN CANIF WINIDEA_TERM SIMPLE_PRINTF RAMLOG\r
+MOD_USE+=KERNEL MCU ADC DMA \r
+\r
+SELECT_CONSOLE = RAMLOG\r
+SELECT_OS_CONSOLE = RAMLOG
\ No newline at end of file
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module CanIf (CanIf_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
#include "CanIf.h"\r
+#if defined(USE_CANTP)
+#include "CanTp.h"
+#include "CanTp_Cbk.h"
+#endif
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
#include <stdlib.h>\r
\r
+
// Imported structs from Can_Lcfg.c\r
extern const Can_ControllerConfigType CanControllerConfigData[];\r
extern const Can_ConfigSetType CanConfigSetData;\r
+\r
+
// Contains the mapping from CanIf-specific Channels to Can Controllers
const CanControllerIdType CanIf_Arc_ChannelToControllerMap[CANIF_CHANNEL_CNT] = {
- CAN_CTRL_A, // CANIF_CHANNEL_0
- CAN_CTRL_C, // CANIF_CHANNEL_1
+ FLEXCAN_A, // CHANNEL_0
};
-\r
-const CanIf_ControllerConfigType CanIfControllerConfig[] =\r
-{\r
- { // CANIF_CHANNEL_0_CONFIG_0\r
- .WakeupSupport = CANIF_WAKEUP_SUPPORT_NO_WAKEUP,\r
- .CanIfControllerIdRef = CANIF_CHANNEL_0,\r
- .CanIfDriverNameRef = "FLEXCAN", // Not used\r
- .CanIfInitControllerRef = &CanControllerConfigData[0],\r
- },
- { // CANIF_CHANNEL_1_CONFIG_0
- .WakeupSupport = CANIF_WAKEUP_SUPPORT_NO_WAKEUP,
- .CanIfControllerIdRef = CANIF_CHANNEL_1,
- .CanIfDriverNameRef = "FLEXCAN", // Not used
- .CanIfInitControllerRef = &CanControllerConfigData[1],
- },\r
+
+// Container that gets slamed into CanIf_InitController()
+// Inits ALL controllers
+// Multiplicity 1..*
+const CanIf_ControllerConfigType CanIfControllerConfig[] = {
+ // This is the ConfigurationIndex in CanIf_InitController()
+
+
+ {
+ .WakeupSupport = CANIF_WAKEUP_SUPPORT_NO_WAKEUP,
+ .CanIfControllerIdRef = CANIF_CHANNEL_0,
+ .CanIfDriverNameRef = "FLEXCAN", // Not used
+ .CanIfInitControllerRef = &CanControllerConfigData[0],
+ },
+
};\r
\r
// Function callbacks for higher layers\r
.CanIfErrorNotificaton = NULL,\r
};\r
\r
-//-------------------------------------------------------------------\r
-const CanIf_HthConfigType CanIfHthConfigData[] =\r
+
+// Data for init configuration CanIfInitConfiguration
+
+
+
+const CanIf_HthConfigType CanIfHthConfigData_Hoh_1[] =
{\r
- {\r
+
+ {
.CanIfHthType = CAN_ARC_HANDLE_TYPE_BASIC,\r
.CanIfCanControllerIdRef = CANIF_CHANNEL_0,\r
- .CanIfHthIdSymRef = CAN_HTH_A_1, // Ref to the HTH\r
- .CanIf_Arc_EOL = 0,\r
+ .CanIfHthIdSymRef = HWObj_1,
+ .CanIf_Arc_EOL = 1,
},\r
};\r
\r
-//-------------------------------------------------------------------\r
-const CanIf_HrhConfigType CanIfHrhConfigData[] =\r
-{\r
- {\r
- .CanIfHrhType = CAN_ARC_HANDLE_TYPE_BASIC,\r
- .CanIfSoftwareFilterHrh = TRUE, // Disable software filtering\r
- .CanIfCanControllerHrhIdRef = CANIF_CHANNEL_0,\r
- .CanIfHrhIdSymRef = CAN_HRH_A_1, // Ref to the HRH\r
- .CanIf_Arc_EOL = 0,\r
- },\r
-};\r
-//-------------------------------------------------------------------\r
-\r
-/*\r
- * TX PDUs\r
- */\r
-const CanIf_TxPduConfigType CanIfTxPduConfigData[] =\r
+const CanIf_HrhConfigType CanIfHrhConfigData_Hoh_1[] =
{\r
+};
+
+
+const CanIf_InitHohConfigType CanIfHohConfigData[] = {
+
+ {
+ .CanConfigSet = &CanConfigSetData,
+ .CanIfHrhConfig = CanIfHrhConfigData_Hoh_1,
+ .CanIfHthConfig = CanIfHthConfigData_Hoh_1,
+ .CanIf_Arc_EOL = 1,
+ },
+};
+
+const CanIf_TxPduConfigType CanIfTxPduConfigData[] = {
{\r
- .CanIfTxPduId = LedCommandTx,\r
- .CanIfCanTxPduIdCanId = 0x123,\r
+ .CanIfTxPduId = PDUR_SOURCE_PDU_ID_LedCommandTx,
+ .CanIfCanTxPduIdCanId = 291,
.CanIfCanTxPduIdDlc = 8,\r
.CanIfCanTxPduType = CANIF_PDU_TYPE_STATIC,\r
#if ( CANIF_READTXPDU_NOTIFY_STATUS_API == STD_ON )\r
- .CanIfReadTxPduNotifyStatus = FALSE,\r
+ .CanIfReadTxPduNotifyStatus = true,
#endif\r
.CanIfTxPduIdCanIdType = CANIF_CAN_ID_TYPE_29,\r
.CanIfUserTxConfirmation = PduR_CanIfTxConfirmation,\r
- .CanIfCanTxPduHthRef = &CanIfHthConfigData[0],\r
+ .CanIfCanTxPduHthRef = &CanIfHthConfigData_Hoh_1[0],
.PduIdRef = NULL,\r
- },\r
-};\r
-//-------------------------------------------------------------------\r
-\r
-/*\r
- * RX PDUs\r
- */\r
-const CanIf_RxPduConfigType CanIfRxPduConfigData[] =\r
-{\r
+ },
};\r
\r
-//-------------------------------------------------------------------\r
-const CanIf_InitHohConfigType CanIfHohConfigData[] =\r
-{\r
- {\r
- .CanConfigSet = &CanConfigSetData,\r
- .CanIfHrhConfig = CanIfHrhConfigData,\r
- .CanIfHthConfig = CanIfHthConfigData,\r
- .CanIf_Arc_EOL = 1,\r
- },\r
+const CanIf_RxPduConfigType CanIfRxPduConfigData[] = {
};\r
\r
// This container contains the init parameters of the CAN\r
.CanIfTxPduConfigPtr = CanIfTxPduConfigData,\r
};\r
\r
-// This container includes all necessary configuration sub-containers\r
+ // This container includes all necessary configuration sub-containers
// according the CAN Interface configuration structure.\r
CanIf_ConfigType CanIf_Config =\r
{\r
.DispatchConfig = &CanIfDispatchConfig,\r
.InitConfig = &CanIfInitConfig,\r
.TransceiverConfig = NULL, // Not used
- .Arc_ChannelToControllerMap = CanIf_Arc_ChannelToControllerMap,\r
+ .Arc_ChannelToControllerMap = CanIf_Arc_ChannelToControllerMap,
};\r
\r
--- /dev/null
+/*
+* Configuration of module CanIf (CanIf_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
+
+#if (CANIF_SW_MAJOR_VERSION != 1 && CANIF_SW_MINOR_VERSION != 1)
+#error "CanIf: Configuration file version differs from BSW version."
+#endif
+
+
+#ifndef CANIF_CFG_H_
+#define CANIF_CFG_H_
+
+#include "Can.h"
+
+
+#define CANIF_PDU_ID_LedCommandTx 0
+
+// Identifiers for the elements in CanIfControllerConfig[]
+// This is the ConfigurationIndex in CanIf_InitController()
+typedef enum {
+ CANIF_CHANNEL_0_CONFIG_0,
+ CANIF_CHANNEL_CONFIGURATION_CNT
+} CanIf_Arc_ConfigurationIndexType;
+
+typedef enum {
+ CANIF_CHANNEL_0,
+ CANIF_CHANNEL_CNT
+} CanIf_Arc_ChannelIdType;
+
+typedef enum {
+ CANIF_SOFTFILTER_TYPE_BINARY = 0, // Not supported
+ CANIF_SOFTFILTER_TYPE_INDEX, // Not supported
+ CANIF_SOFTFILTER_TYPE_LINEAR, // Not supported
+ CANIF_SOFTFILTER_TYPE_TABLE, // Not supported
+ CANIF_SOFTFILTER_TYPE_MASK, // CanIfCanRxPduCanIdMask in RxPduConfig is used for filtering
+} CanIf_SoftwareFilterTypeType;
+
+typedef enum {
+ CANIF_USER_TYPE_CAN_NM,
+ CANIF_USER_TYPE_CAN_TP,
+ CANIF_USER_TYPE_CAN_PDUR,
+ CANIF_USER_TYPE_CAN_SPECIAL,
+} CanIf_UserTypeType;
+
+
+typedef void (*CanIf_FuncTypeCanSpecial)(PduIdType, const uint8 *, uint8, Can_IdType);
+
+typedef enum {
+ CANIF_PDU_TYPE_STATIC = 0,
+ CANIF_PDU_TYPE_DYNAMIC // Not supported
+} CanIf_PduTypeType;
+
+typedef enum {
+ CANIF_CAN_ID_TYPE_29 = 0,
+ CANIF_CAN_ID_TYPE_11
+} CanIf_CanIdTypeType;
+
+/*
+ * Public container
+ */
+#define CANIF_VERSION_INFO_API STD_ON
+#define CANIF_DEV_ERROR_DETECT STD_ON
+#define CANIF_DLC_CHECK STD_ON
+#define CANIF_MULITPLE_DRIVER_SUPPORT STD_OFF // Not supported
+#define CANIF_READRXPDU_DATA_API STD_OFF // Not supported
+#define CANIF_READRXPDU_NOTIFY_STATUS_API STD_OFF // Not supported
+#define CANIF_READTXPDU_NOTIFY_STATUS_API STD_OFF // Not supported
+#define CANIF_SETDYNAMICTXID_API STD_OFF // Not supported
+#define CANIF_WAKEUP_EVENT_API STD_OFF // Not supported
+#define CANIF_TRANSCEIVER_API STD_OFF // Not supported
+#define CANIF_TRANSMIT_CANCELLATION STD_OFF // Not supported
+
+//-------------------------------------------------------------------
+
+typedef struct {
+ void (*CancelTxConfirmation)( void *); // (const Can_PduType *);
+ void (*RxIndication)(void *); //(const Can_PduType *);
+ void (*ControllerBusOff)(uint8);
+ void (*ControllerWakeup)(uint8);
+ void (*Arc_Error)(uint8,uint32);
+} CanIf_CallbackType;
+
+
+
+//-------------------------------------------------------------------
+/*
+ * CanIfHrhRangeConfig container
+ */
+
+typedef struct {
+ // Lower CAN Identifier of a receive CAN L-PDU for identifier range
+ // definition, in which all CAN Ids shall pass the software filtering. Range: 11
+ // Bit for Standard CAN Identifier 29 Bit for Extended CAN Identifer
+ uint32 CanIfRxPduLowerCanId;
+
+ // Upper CAN Identifier of a receive CAN L-PDU for identifier range
+ // definition, in which all CAN Ids shall pass the software filtering. Range: 11
+ // Bit for Standard CAN Identifier 29 Bit for Extended CAN Identifer
+ uint32 CanIfRxPduUpperCanId;
+} CanIf_HrhRangeConfigType;
+
+
+
+//-------------------------------------------------------------------
+/*
+ * CanIfInitHrhConfig container
+ */
+typedef struct {
+ // Defines the HRH type i.e, whether its a BasicCan or FullCan. If BasicCan is
+ // configured, software filtering is enabled.
+ Can_Arc_HohType CanIfHrhType;
+
+ // Selects the hardware receive objects by using the HRH range/list from
+ // CAN Driver configuration to define, for which HRH a software filtering has
+ // to be performed at during receive processing. True: Software filtering is
+ // enabled False: Software filtering is disabled
+ boolean CanIfSoftwareFilterHrh;
+
+ // Reference to controller Id to which the HRH belongs to. A controller can
+ // contain one or more HRHs.
+ CanIf_Arc_ChannelIdType CanIfCanControllerHrhIdRef;
+
+ // The parameter refers to a particular HRH object in the CAN Driver Module
+ // configuration. The HRH id is unique in a given CAN Driver. The HRH Ids
+ // are defined in the CAN Driver Module and hence it is derived from CAN
+ // Driver Configuration.
+ Can_Arc_HRHType CanIfHrhIdSymRef ;
+
+ // Defines the parameters required for configuraing multiple
+ // CANID ranges for a given same HRH.
+ const CanIf_HrhRangeConfigType *CanIfHrhRangeConfig;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean CanIf_Arc_EOL;
+} CanIf_HrhConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfInitHthConfig container
+ */
+
+typedef struct {
+ // Defines the HTH type i.e, whether its a BasicCan or FullCan.
+ Can_Arc_HohType CanIfHthType;
+
+ // Reference to controller Id to which the HTH belongs to. A controller
+ // can contain one or more HTHs
+ CanIf_Arc_ChannelIdType CanIfCanControllerIdRef;
+
+ // The parameter refers to a particular HTH object in the CAN Driver Module
+ // configuration. The HTH id is unique in a given CAN Driver. The HTH Ids
+ // are defined in the CAN Driver Module and hence it is derived from CAN
+ // Driver Configuration.
+ Can_Arc_HTHType CanIfHthIdSymRef ;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean CanIf_Arc_EOL;
+} CanIf_HthConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfInitHohConfig container
+ */
+typedef struct {
+ // Selects the CAN interface specific configuration setup. This type of external
+ // data structure shall contain the post build initialization data for the
+ // CAN interface for all underlying CAN Drivers.
+ const Can_ConfigSetType *CanConfigSet;
+
+ // This container contains contiguration parameters for each hardware receive object.
+ const CanIf_HrhConfigType *CanIfHrhConfig;
+
+ // This container contains parameters releated to each HTH
+ const CanIf_HthConfigType *CanIfHthConfig;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean CanIf_Arc_EOL;
+} CanIf_InitHohConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfTxPduConfig container
+ */
+
+// This container contains the configuration (parameters) of each transmit
+// CAN L-PDU. The SHORT-NAME of "CanIfTxPduConfig" container
+// represents the symolic name of Transmit L-PDU.
+typedef struct {
+ // ECU wide unique, symbolic handle for transmit CAN L-PDU. The
+ // CanIfCanTxPduId is configurable at pre-compile and post-built time.
+ // Range: 0..max. number of CantTxPduIds PduIdType CanTxPduId;
+ PduIdType CanIfTxPduId;
+
+ // CAN Identifier of transmit CAN L-PDUs used by the CAN Driver for CAN L-
+ // PDU transmission. Range: 11 Bit For Standard CAN Identifier ... 29 Bit For
+ // Extended CAN identifier
+ uint32 CanIfCanTxPduIdCanId;
+
+ // Data length code (in bytes) of transmit CAN L-PDUs used by the CAN
+ // Driver for CAN L-PDU transmission. The data area size of a CAN L-Pdu
+ // can have a range from 0 to 8 bytes.
+ uint8 CanIfCanTxPduIdDlc;
+
+ // Defines the type of each transmit CAN L-PDU.
+ // DYNAMIC CAN ID is defined at runtime.
+ // STATIC CAN ID is defined at compile-time.
+ CanIf_PduTypeType CanIfCanTxPduType;
+
+#if ( CANIF_READTXPDU_NOTIFY_STATUS_API == STD_ON )
+ // Enables and disables transmit confirmation for each transmit CAN L-PDU
+ // for reading its notification status. True: Enabled False: Disabled
+ boolean CanIfReadTxPduNotifyStatus;
+#endif
+
+ // CAN Identifier of transmit CAN L-PDUs used by the CAN Driver for CAN L-
+ // PDU transmission.
+ // EXTENDED_CAN The CANID is of type Extended (29 bits)
+ // STANDARD_CAN The CANID is of type Standard (11 bits)
+ CanIf_CanIdTypeType CanIfTxPduIdCanIdType;
+
+ // Name of target confirmation services to target upper layers (PduR, CanNm
+ // and CanTp. If parameter is not configured then no call-out function is
+ // provided by the upper layer for this Tx L-PDU.
+ void (*CanIfUserTxConfirmation)(PduIdType); /* CANIF 109 */
+
+ // Handle, that defines the hardware object or the pool of hardware objects
+ // configured for transmission. The parameter refers HTH Id, to which the L-
+ // PDU belongs to.
+ const CanIf_HthConfigType *CanIfCanTxPduHthRef;
+
+ // Reference to the "global" Pdu structure to allow harmonization of handle
+ // IDs in the COM-Stack. ..
+ void *PduIdRef;
+} CanIf_TxPduConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfRxPduConfig container
+ */
+
+
+// This container contains the configuration (parameters) of each receive
+// CAN L-PDU. The SHORT-NAME of "CanIfRxPduConfig" container itself
+// represents the symolic name of Receive L-PDU.
+
+typedef struct {
+ // ECU wide unique, symbolic handle for receive CAN L-PDU. The
+ // CanRxPduId is configurable at pre-compile and post-built time. It shall fulfill
+ // ANSI/AUTOSAR definitions for constant defines. Range: 0..max. number
+ // of defined CanRxPduIds
+ PduIdType CanIfCanRxPduId;
+
+ // CAN Identifier of Receive CAN L-PDUs used by the CAN Interface. Exa:
+ // Software Filtering. Range: 11 Bit For Standard CAN Identifier ... 29 Bit For
+ // Extended CAN identifier
+ uint32 CanIfCanRxPduCanId;
+
+ // Data Length code of received CAN L-PDUs used by the CAN Interface.
+ // Exa: DLC check. The data area size of a CAN L-PDU can have a range
+ // from 0 to 8 bytes. uint8 CanIfCanRxPduDlc;
+ uint8 CanIfCanRxPduDlc;
+
+#if ( CANIF_CANPDUID_READDATA_API == STD_ON )
+ // Enables and disables the Rx buffering for reading of received L-PDU data.
+ // True: Enabled False: Disabled
+ boolean CanIfReadRxPduData;
+#endif
+
+#if ( CANIF_READRXPDU_NOTIF_STATUS_API == STD_ON )
+ // CanIfReadRxPduNotifyStatus {CANIF_READRXPDU_NOTIFY_STATUS}
+ // Enables and disables receive indication for each receive CAN L-PDU for
+ // reading its' notification status. True: Enabled False: Disabled
+ boolean CanIfReadRxPduNotifyStatus;
+#endif
+
+ // CAN Identifier of receive CAN L-PDUs used by the CAN Driver for CAN L-
+ // PDU transmission.
+ // EXTENDED_CAN The CANID is of type Extended (29 bits)
+ // STANDARD_CAN The CANID is of type Standard (11 bits)
+ CanIf_CanIdTypeType CanIfRxPduIdCanIdType;
+
+ // This parameter defines the type of the receive indication call-outs called to
+ // the corresponding upper layer the used TargetRxPduId belongs to.
+ CanIf_UserTypeType CanIfRxUserType;
+
+ // Name of target indication services to target upper layers (PduRouter,
+ // CanNm, CanTp and ComplexDeviceDrivers). If parameter is 0 no call-out
+ // function is configured.
+ void *CanIfUserRxIndication;
+
+ // The HRH to which Rx L-PDU belongs to, is referred through this
+ // parameter.
+ const CanIf_HrhConfigType *CanIfCanRxPduHrhRef;
+
+ // Reference to the "global" Pdu structure to allow harmonization of handle
+ // IDs in the COM-Stack.
+ void *PduIdRef;
+
+ // Defines the type of software filtering that should be used
+ // for this receive object.
+ CanIf_SoftwareFilterTypeType CanIfSoftwareFilterType;
+
+ // Acceptance filters, 1 - care, 0 - don't care.
+ // Is enabled by the CanIfSoftwareFilterMask in CanIf_HrhConfigType
+ // ArcCore exension
+ uint32 CanIfCanRxPduCanIdMask;
+
+} CanIf_RxPduConfigType;
+
+//-------------------------------------------------------------------
+
+/*
+ * CanIfControllerConfig container
+ */
+
+typedef enum {
+ CANIF_WAKEUP_SUPPORT_CONTROLLER,
+ CANIF_WAKEUP_SUPPORT_NO_WAKEUP,
+ CANIF_WAKEUP_SUPPORT_TRANSCEIVER,
+} CanIf_WakeupSupportType;
+
+
+// This is the type supplied to CanIf_InitController()
+typedef struct {
+ CanIf_WakeupSupportType WakeupSupport; // Not used
+
+ // CanIf-specific id of the controller
+ CanIf_Arc_ChannelIdType CanIfControllerIdRef;
+
+ const char CanIfDriverNameRef[8]; // Not used
+
+ const Can_ControllerConfigType *CanIfInitControllerRef;
+} CanIf_ControllerConfigType;
+
+//-------------------------------------------------------------------
+/*
+ * CanIfTransceiverDrvConfig container
+ */
+
+typedef struct {
+ boolean TrcvWakeupNotification;
+ uint8 TrcvIdRef;
+} CanIf_TransceiverDrvConfigType;
+
+
+typedef struct {
+ uint32 todo;
+} CanIf_TransceiverConfigType;
+
+// Callout functions with respect to the upper layers. This callout functions
+// defined in this container are common to all configured underlying CAN
+// Drivers / CAN Transceiver Drivers.
+typedef struct {
+ // Name of target BusOff notification services to target upper layers
+ // (PduRouter, CanNm, CanTp and ComplexDeviceDrivers).
+ // Multiplicity: 1
+ void (*CanIfBusOffNotification)(uint8 Controller);
+
+ // Name of target wakeup notification services to target upper layers
+ // e.g Ecu_StateManager. If parameter is 0
+ // no call-out function is configured.
+ // Multiplicity: 0..1
+ void (*CanIfWakeUpNotification)();
+
+ // Name of target wakeup validation notification services to target upper
+ // layers (ECU State Manager). If parameter is 0 no call-out function is
+ // configured.
+ // Multiplicity: 0..1
+ void (*CanIfWakeupValidNotification)();
+
+ // ArcCore ext.
+ void (*CanIfErrorNotificaton)(uint8,Can_Arc_ErrorType);
+
+} CanIf_DispatchConfigType;
+
+// This container contains the references to the configuration setup of each
+// underlying CAN driver.
+
+typedef struct {
+ // Selects the CAN Interface specific configuration setup. This type of the
+ // external data structure shall contain the post build initialization data for the
+ // CAN Interface for all underlying CAN Dirvers. constant to CanIf_ConfigType
+ uint32 CanIfConfigSet;
+
+ uint32 CanIfNumberOfCanRxPduIds;
+ uint32 CanIfNumberOfCanTXPduIds;
+ uint32 CanIfNumberOfDynamicCanTXPduIds;
+
+ //
+ // Containers
+ //
+
+ // This container contains the reference to the configuration
+ // setup of each underlying CAN driver.
+ // Multiplicity: 0..*
+ const CanIf_InitHohConfigType *CanIfHohConfigPtr;
+
+ // This container contains the configuration (parameters) of each
+ // receive CAN L-PDU. The SHORT-NAME of
+ // "CanIfRxPduConfig" container itself represents the symolic
+ // name of Receive L-PDU.
+ // Multiplicity: 0..*
+ const CanIf_RxPduConfigType *CanIfRxPduConfigPtr;
+
+ // This container contains the configuration (parameters) of each
+ // transmit CAN L-PDU. The SHORT-NAME of
+ // "CanIfTxPduConfig" container represents the symolic name of
+ // Transmit L-PDU.
+ // Multiplicity: 0..*
+ const CanIf_TxPduConfigType *CanIfTxPduConfigPtr;
+
+} CanIf_InitConfigType;
+
+
+typedef struct {
+ // This container contains the configuration (parameters) of all
+ // addressed CAN controllers by each underlying CAN driver.
+ // Multiplicity: 1..*
+ const CanIf_ControllerConfigType *ControllerConfig;
+
+ // Callout functions with respect to the upper layers. This callout
+ // functions defined in this container are common to all
+ // configured underlying CAN Drivers / CAN Transceiver Drivers
+ const CanIf_DispatchConfigType *DispatchConfig;
+
+ // This container contains the init parameters of the CAN
+ // Interface.
+ // Multiplicity: 1..*
+ const CanIf_InitConfigType *InitConfig;
+
+ // This container contains the configuration (parameters) of all
+ // addressed CAN transceivers by each underlying CAN
+ // Transceiver Driver.
+ // Multiplicity: 1..*
+ const CanIf_TransceiverConfigType *TransceiverConfig;
+
+ // ArcCore: Contains the mapping from CanIf-specific Channels to Can Controllers
+ const CanControllerIdType *Arc_ChannelToControllerMap;
+} CanIf_ConfigType;
+
+
+extern CanIf_ConfigType CanIf_Config;
+
+#endif
+
--- /dev/null
+/*
+* Configuration of module Can (Can_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
+
+#if (CAN_SW_MAJOR_VERSION != 1)
+#error "Can: Configuration file version differs from BSW version."
+#endif
+
+
+
+
+#ifndef CAN_CFG_H_
+#define CAN_CFG_H_
+
+// Number of controller configs
+#define CAN_ARC_CTRL_CONFIG_CNT 1
+
+#define CAN_DEV_ERROR_DETECT STD_OFF
+#define CAN_VERSION_INFO_API STD_OFF
+#define CAN_MULTIPLEXED_TRANSMISSION STD_OFF
+#define CAN_WAKEUP_SUPPORT STD_OFF // Not supported
+#define CAN_HW_TRANSMIT_CANCELLATION STD_OFF // Not supported
+
+
+typedef enum {
+ FLEXCAN_A = 0,
+ CAN_CTRL_A = 0,
+ FLEXCAN_B = 1,
+ CAN_CTRL_B = 1,
+ FLEXCAN_C = 2,
+ CAN_CTRL_C = 2,
+ FLEXCAN_D = 3,
+ CAN_CTRL_D = 3,
+ FLEXCAN_E = 4,
+ CAN_CTRL_E = 4,
+ FLEXCAN_F = 5,
+ CAN_CTRL_F = 5,
+ CAN_CONTROLLER_CNT = 6
+}CanControllerIdType;
+
+
+typedef enum {
+ CAN_ID_TYPE_EXTENDED,
+ CAN_ID_TYPE_MIXED,
+ CAN_ID_TYPE_STANDARD,
+} Can_IdTypeType;
+
+
+typedef enum {
+ CAN_OBJECT_TYPE_RECEIVE,
+ CAN_OBJECT_TYPE_TRANSMIT,
+} Can_ObjectTypeType;
+
+
+typedef enum {
+ CAN_ARC_HANDLE_TYPE_BASIC,
+ CAN_ARC_HANDLE_TYPE_FULL
+} Can_Arc_HohType;
+
+
+typedef enum {
+ HWObj_1,
+ NUM_OF_HTHS
+} Can_Arc_HTHType;
+
+
+typedef enum {
+ NUM_OF_HRHS
+} Can_Arc_HRHType;
+
+
+typedef struct {
+ void (*CancelTxConfirmation)( const Can_PduType *);
+ void (*RxIndication)( uint8 ,Can_IdType ,uint8 , const uint8 * );
+ void (*ControllerBusOff)(uint8);
+ void (*TxConfirmation)(PduIdType);
+ void (*ControllerWakeup)(uint8);
+ void (*Arc_Error)(uint8,Can_Arc_ErrorType);
+} Can_CallbackType;
+
+
+typedef struct {
+ // Specifies the InstanceId of this module instance. If only one instance is
+ // present it shall have the Id 0
+ int CanIndex;
+} Can_GeneralType;
+
+
+typedef uint32 Can_FilterMaskType;
+
+
+typedef struct Can_HardwareObjectStruct {
+ // Specifies the type (Full-CAN or Basic-CAN) of a hardware object.
+ Can_Arc_HohType CanHandleType;
+
+ // Specifies whether the IdValue is of type - standard identifier - extended
+ // identifier - mixed mode ImplementationType: Can_IdType
+ Can_IdTypeType CanIdType;
+
+ // Specifies (together with the filter mask) the identifiers range that passes
+ // the hardware filter.
+ uint32 CanIdValue;
+
+ // Holds the handle ID of HRH or HTH. The value of this parameter is unique
+ // in a given CAN Driver, and it should start with 0 and continue without any
+ // gaps. The HRH and HTH Ids are defined under two different name-spaces.
+ // Example: HRH0-0, HRH1-1, HTH0-2, HTH1-3
+ uint32 CanObjectId;
+
+ // Specifies if the HardwareObject is used as Transmit or as Receive object
+ Can_ObjectTypeType CanObjectType;
+
+ // Reference to the filter mask that is used for hardware filtering togerther
+ // with the CAN_ID_VALUE
+ Can_FilterMaskType *CanFilterMaskRef;
+
+ // A "1" in this mask tells the driver that that HW Message Box should be
+ // occupied by this Hoh. A "1" in bit 31(ppc) occupies Mb 0 in HW.
+ uint32 Can_Arc_MbMask;
+
+ // End Of List. Set to TRUE is this is the last object in the list.
+ boolean Can_Arc_EOL;
+} Can_HardwareObjectType;
+
+
+typedef enum {
+ CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ CAN_ARC_PROCESS_TYPE_POLLING,
+} Can_Arc_ProcessType;
+
+
+typedef struct {
+
+ // Enables / disables API Can_MainFunction_BusOff() for handling busoff
+ // events in polling mode.
+ // INTERRUPT or POLLING
+ Can_Arc_ProcessType CanBusOffProcessing;
+
+ // Defines if a CAN controller is used in the configuration.
+ boolean CanControllerActivation;
+
+ // Specifies the buadrate of the controller in kbps.
+ uint32 CanControllerBaudRate;
+
+ // This parameter provides the controller ID which is unique in a given CAN
+ // Driver. The value for this parameter starts with 0 and continue without any
+ // gaps.
+ CanControllerIdType CanControllerId;
+
+ // Specifies propagation delay in time quantas.
+ uint32 CanControllerPropSeg;
+
+ // Specifies phase segment 1 in time quantas.
+ uint32 CanControllerSeg1;
+
+ // Specifies phase segment 2 in time quantas.
+ uint32 CanControllerSeg2;
+
+ // Specifies the time quanta for the controller. The calculation of the resulting
+ // prescaler value depending on module clocking and time quanta shall be
+ // done offline Hardware specific.
+ uint32 CanControllerTimeQuanta;
+
+ // Enables / disables API Can_MainFunction_Read() for handling PDU
+ // reception events in polling mode.
+ Can_Arc_ProcessType CanRxProcessing;
+
+ // Enables / disables API Can_MainFunction_Write() for handling PDU
+ // transmission events in polling mode.
+ Can_Arc_ProcessType CanTxProcessing;
+
+ // Enables / disables API Can_MainFunction_Wakeup() for handling wakeup
+ // events in polling mode.
+ Can_Arc_ProcessType CanWakeupProcessing;
+
+ // Reference to the CPU clock configuration, which is set in the MCU driver
+ // configuration
+ uint32 CanCpuClockRef;
+
+ // This parameter contains a reference to the Wakeup Source for this
+ // controller as defined in the ECU State Manager. Implementation Type:
+ // reference to EcuM_WakeupSourceType
+ uint32 CanWakeupSourceRef;
+
+ // List of Hoh id's that belong to this controller
+ const Can_HardwareObjectType *Can_Arc_Hoh;
+
+ boolean Can_Arc_Loopback;
+
+ // Set this to use the fifo
+ boolean Can_Arc_Fifo;
+} Can_ControllerConfigType;
+
+
+typedef struct {
+ const Can_ControllerConfigType *CanController;
+
+ // Callbacks( Extension )
+ const Can_CallbackType *CanCallbacks;
+} Can_ConfigSetType;
+
+
+typedef struct {
+ // This is the multiple configuration set container for CAN Driver
+ // Multiplicity 1..*
+ const Can_ConfigSetType *CanConfigSet;
+ // This container contains the parameters related each CAN
+ // Driver Unit.
+ // Multiplicity 1..*
+ const Can_GeneralType *CanGeneral;
+} Can_ConfigType;
+
+
+extern const Can_ConfigType CanConfigData;
+extern const Can_ControllerConfigType CanControllerConfigData[];
+extern const Can_ConfigSetType Can_ConfigSet;
+
+#endif /*CAN_CFG_H_*/
--- /dev/null
+/*
+* Configuration of module Can (Can_Lcfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
+
+
+#include <stdlib.h>
+#include "Can.h"
+#include "CanIf_Cbk.h"
+
+
+Can_FilterMaskType Can_FilterMaskConfigData_Controller_1_Mask_1 = 0x0;
+
+
+const Can_HardwareObjectType CanHardwareObjectConfig_Controller_1[] = {
+ {
+ .CanObjectId = HWObj_1,
+ .CanHandleType = CAN_ARC_HANDLE_TYPE_BASIC,
+ .CanIdType = CAN_ID_TYPE_EXTENDED,
+ .CanObjectType = CAN_OBJECT_TYPE_TRANSMIT,
+ .CanFilterMaskRef = &Can_FilterMaskConfigData_Controller_1_Mask_1,
+
+ .Can_Arc_MbMask = 0xff0000,
+ .Can_Arc_EOL = 1,
+ },
+};
+
+
+const Can_ControllerConfigType CanControllerConfigData[] =
+{
+ {
+ .CanControllerActivation = TRUE,
+ .CanControllerBaudRate = 125,
+ .CanControllerId = FLEXCAN_A,
+ .CanControllerPropSeg = 4,
+ .CanControllerSeg1 = 4,
+ .CanControllerSeg2 = 4,
+ .CanBusOffProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanRxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanTxProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanWakeupProcessing = CAN_ARC_PROCESS_TYPE_INTERRUPT,
+ .CanCpuClockRef = PERIPHERAL_CLOCK_FLEXCAN_A,
+ .Can_Arc_Hoh = &CanHardwareObjectConfig_Controller_1[0],
+ .Can_Arc_Loopback = FALSE,
+ .Can_Arc_Fifo = 0,
+ },
+};
+
+const Can_CallbackType CanCallbackConfigData = {
+ NULL, //CanIf_CancelTxConfirmation,
+ CanIf_RxIndication,
+ CanIf_ControllerBusOff,
+ CanIf_TxConfirmation,
+ NULL, //CanIf_ControllerWakeup,
+ CanIf_Arc_Error,
+};
+
+const Can_ConfigSetType CanConfigSetData =
+{
+ .CanController = CanControllerConfigData,
+ .CanCallbacks = &CanCallbackConfigData,
+};
+
+const Can_ConfigType CanConfigData = {
+ .CanConfigSet = &CanConfigSetData,
+};
+
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module EcuC (ComGlobals.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
-*/
+#if (ECUC_SW_MAJOR_VERSION != 1)
+#error "EcuC: Configuration file version differs from BSW version."
+#endif
\r
#ifndef COMGLOBALS_H_\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+* Configuration of module Com (Com_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
*/
+
+#if (COM_SW_MAJOR_VERSION != 1)
+#error "Com: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef COM_CFG_H_\r
#define COM_CFG_H_\r
\r
#define COM_DEV_ERROR_DETECT\r
\r
-#define COM_MAX_NR_IPDU 5\r
-#define COM_MAX_NR_SIGNAL 6\r
-#define COM_MAX_NR_GROUPSIGNAL 10\r
-\r
-#define COM_MAX_NR_SIGNALS_PER_IPDU 4\r
-#define COM_MAX_NR_SIGNALGROUPS_PER_IPDU 4\r
-#define COM_MAX_NR_SIGNALS_PER_SIGNAL_GROUP 5\r
+#define COM_N_IPDUS 1
+#define COM_N_SIGNALS 1
+#define COM_N_GROUP_SIGNALS 0
\r
#define COM_E_INVALID_FILTER_CONFIGURATION 101\r
#define COM_E_INITIALIZATION_FAILED 102\r
#define COM_INVALID_PDU_ID 104\r
#define COM_ERROR_SIGNAL_IS_SIGNALGROUP 105\r
\r
+
+#define COM_MAX_NR_IPDU 999999999
+
#define COM_E_TOO_MANY_IPDU 106\r
#define COM_E_TOO_MANY_SIGNAL 107\r
#define COM_E_TOO_MANY_GROUPSIGNAL 108\r
/*\r
* ComGeneral pre-compile time configuration parameters.\r
*/\r
-#define ComConfigurationTimeBase NULL\r
-#define ComConfigurationUseDet \r
+#define ComConfigurationTimeBase 0.0
#define ComVersionInfoApi\r
\r
#endif /*COM_CFG_H_*/\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+/*
+* Configuration of module Com (Com_PbCfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
*/
\r
-#include "Com_PbCfg.h"\r
+#include "Com.h"
#include "stdlib.h"\r
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
\r
\r
+
+
+
+/*
+ * Signal init values.
+ */
+const uint16 Com_SignalInitValue_SetLedLevelTx = 0;
+
+
/*\r
* Group signal definitions\r
*/\r
-ComGroupSignal_type ComGroupSignal[] = {\r
+const ComGroupSignal_type ComGroupSignal[] = {
{\r
.Com_Arc_EOL = 1\r
}\r
};\r
\r
\r
+/* SignalGroup GroupSignals lists. */
+
/*\r
* Signal definitions\r
*/\r
-ComSignal_type ComSignal[] = {\r
+const ComSignal_type ComSignal[] = {
{\r
.ComHandleId = SetLedLevelTx,\r
.ComFirstTimeoutFactor = 0,\r
.ComTimeoutFactor = 0,\r
.ComTimeoutNotification = NULL,\r
.ComTransferProperty = TRIGGERED,\r
-\r
-\r
- .ComSignalInitValue = 0,\r
- .ComBitPosition = 0,\r
+
+
+ .ComSignalInitValue = &Com_SignalInitValue_SetLedLevelTx,
+ .ComBitPosition = 7,
.ComBitSize = 16,\r
.ComSignalEndianess = BIG_ENDIAN,\r
.ComSignalType = UINT16,
- .Com_Arc_IsSignalGroup = 0,\r
-\r
+ .ComGroupSignal = NULL,
+
},\r
{\r
.Com_Arc_EOL = 1\r
/*\r
* I-PDU group definitions\r
*/\r
-ComIPduGroup_type ComIPduGroup[] = {\r
+const ComIPduGroup_type ComIPduGroup[] = {
{\r
.ComIPduGroupHandleId = TxGroup\r
},\r
-\r
+
{\r
.Com_Arc_EOL = 1\r
}\r
};\r
\r
+/* IPdu signal lists. */
+const ComSignal_type *ComIPduSignalRefs_LedCommandTx[] = {
+ &ComSignal[ SetLedLevelTx ],
+ NULL,
+};
\r
/*\r
* I-PDU definitions\r
*/\r
-ComIPdu_type ComIPdu[] = {\r
-\r
- {\r
- .ComIPduRxHandleId = LedCommandTx,\r
+const ComIPdu_type ComIPdu[] = {
+
+ { // LedCommandTx
+ .ArcIPduOutgoingId = PDUR_DEST_PDU_ID_LedCommandTx,
.ComIPduCallout = NULL,\r
- .ComIPduSignalProcessing = IMMEDIATE,\r
- .ComIPduSize = 2,\r
+ .ComIPduSignalProcessing = DEFERRED,
+ .ComIPduSize = 8,
.ComIPduDirection = SEND,\r
.ComIPduGroupRef = TxGroup,\r
-\r
+
.ComTxIPdu = {\r
.ComTxIPduMinimumDelayFactor = 0,\r
.ComTxIPduUnusedAreasDefault = 0,\r
.ComTxModeTimePeriodFactor = 0,\r
},\r
},\r
-\r
- .ComIPduSignalRef = {\r
-\r
- &ComSignal[ SetLedLevelTx ],\r
-\r
- NULL,\r
- },\r
- },\r
+
+ .ComIPduSignalRef = ComIPduSignalRefs_LedCommandTx,
+ },
{\r
.Com_Arc_EOL = 1\r
}\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module Com (Com_PbCfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
-*/
+#if (COM_SW_MAJOR_VERSION != 1)
+#error "Com: Configuration file version differs from BSW version."
+#endif
#ifndef COM_PBCFG_H_\r
#define COM_PBCFG_H_\r
\r
extern const Com_ConfigType ComConfiguration;\r
\r
+// COM Polite Defines.
+#define COM_PDU_ID_LedCommandTx 0
+
+
+
// PDU group definitions\r
enum {\r
TxGroup = 0,\r
};\r
\r
-\r
// Signal definitions\r
enum {\r
SetLedLevelTx = 0,\r
};\r
\r
\r
+
+
#endif /* COM_PBCFG_H_ */
--- /dev/null
+\r
+MOD_USE += CAN CANIF COM PDUR PORT \r
+\r
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Callout_template.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:43:38 CEST 2010
+*/
+
+
+#include "EcuM.h"
+#include "Det.h"
+#if defined(USE_DEM)
+#include "Dem.h"
+#endif
+#if defined(USE_MCU)
+#include "Mcu.h"
+#endif
+#if defined(USE_GPT)
+#include "Gpt.h"
+#endif
+#if defined(USE_CAN)
+#include "Can.h"
+#endif
+#if defined(USE_CANIF)
+#include "CanIf.h"
+#endif
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
+#if defined(USE_COM)
+#include "Com.h"
+#endif
+#if defined(USE_CANTP)
+#include "CanTp.h"
+#endif
+#if defined(USE_DCM)
+#include "Dcm.h"
+#endif
+#if defined(USE_PWM)
+#include "Pwm.h"
+#endif
+#if defined(USE_IOHWAB)
+#include "IoHwAb.h"
+#endif
+
+void EcuM_AL_DriverInitZero()
+{
+ Det_Init();
+ Det_Start();
+}
+
+EcuM_ConfigType* EcuM_DeterminePbConfiguration()
+{
+ return &EcuMConfig;
+}
+
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)
+{
+#if defined(USE_MCU)
+ Mcu_Init(ConfigPtr->McuConfig);
+
+ // Set up default clock (Mcu_InitClock requires initRun==1)
+ Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );
+
+ // Wait for PLL to sync.
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)
+ ;
+#endif
+
+#if defined(USE_DEM)
+ // Preinitialize DEM
+ Dem_PreInit();
+#endif
+
+#if defined(USE_PORT)
+ // Setup Port
+ Port_Init(ConfigPtr->PortConfig);
+#endif
+
+
+#if defined(USE_GPT)
+ // Setup the GPT
+ Gpt_Init(ConfigPtr->GptConfig);
+#endif
+
+ // Setup watchdog
+ // TODO
+
+#if defined(USE_DMA)
+ // Setup DMA
+ Dma_Init(ConfigPtr->DmaConfig);
+#endif
+
+#if defined(USE_ADC)
+ // Setup ADC
+ Adc_Init(ConfigPtr->AdcConfig);
+#endif
+
+ // Setup ICU
+ // TODO
+
+ // Setup PWM
+#if defined(USE_PWM)
+ // Setup PWM
+ Pwm_Init(ConfigPtr->PwmConfig);
+#endif
+}
+
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)
+{
+#if defined(USE_SPI)
+ // Setup SPI
+ Spi_Init(ConfigPtr->SpiConfig);
+#endif
+
+#if defined(USE_EEP)
+ // Setup EEP
+ Eep_Init(ConfigPtr->EEpConfig);
+#endif
+
+#if defined(USE_FLS)
+ // Setup Flash
+ FlashInit(ConfigPtr->FlashConfig);
+#endif
+
+ // Setup NVRAM Manaager
+ // TODO
+
+ // Setup CAN tranceiver
+ // TODO
+
+#if defined(USE_CAN)
+ // Setup Can driver
+ Can_Init(ConfigPtr->CanConfig);
+#endif
+
+#if defined(USE_CANIF)
+ // Setup CanIf
+ CanIf_Init(ConfigPtr->CanIfConfig);
+#endif
+
+#if defined(USE_CANTP)
+ // Setup CAN TP
+ CanTp_Init();
+#endif
+ // Setup LIN
+ // TODO
+
+#if defined(USE_PDUR)
+ // Setup PDU Router
+ PduR_Init(ConfigPtr->PduRConfig);
+#endif
+
+#if defined(USE_COM)
+ // Setup COM layer
+ Com_Init(ConfigPtr->ComConfig);
+#endif
+
+#if defined(USE_DCM)
+ // Setup DCM
+ Dcm_Init();
+#endif
+
+#if defined(USE_IOHWAB)
+ // Setup IO hardware abstraction layer
+ IoHwAb_Init();
+#endif
+
+}
+
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType ConfigPtr)
+{
+#if defined(USE_DEM)
+ // Setup DEM
+ Dem_Init();
+#endif
+
+#if defined(USE_CANIF)
+ // Startup the CAN interafce; due to the missing COM manager
+ CanIf_InitController(CANIF_CHANNEL_0, CANIF_CHANNEL_0_CONFIG_0);
+ CanIf_SetControllerMode(CANIF_CHANNEL_0, CANIF_CS_STARTED);
+#endif
+}
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:43:38 CEST 2010
+*/
+
+
+
+#include "EcuM.h"
+
+EcuM_ConfigType EcuMConfig =
+{
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,
+ .EcuMDefaultShutdownMode = 0, // Don't care
+ .EcuMDefaultAppMode = 0, // Don't care
+
+#if defined(USE_MCU)
+ .McuConfig = McuConfigData,
+#endif
+#if defined(USE_PORT)
+ .PortConfig = &PortConfigData,
+#endif
+#if defined(USE_CAN)
+ .CanConfig = &CanConfigData,
+#endif
+#if defined(USE_CANIF)
+ .CanIfConfig = &CanIf_Config,
+#endif
+#if defined(USE_COM)
+ .ComConfig = &ComConfiguration,
+#endif
+#if defined(USE_PDUR)
+ .PduRConfig = &PduR_Config,
+#endif
+#if defined(USE_DMA)
+ .DmaConfig = DmaConfig,
+#endif
+#if defined(USE_ADC)
+ .AdcConfig = AdcConfig,
+#endif
+#if defined(USE_PWM)
+ .PwmConfig = &PwmConfig,
+#endif
+#if defined(USE_GPT)
+ .GptConfig = GptConfigData,
+#endif
+};
+
+void EcuM_OnGoOffTwo( void ) {
+
+}
+
+void EcuM_AL_SwitchOff( void ) {
+
+}
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
+
+#if (ECUM_SW_MAJOR_VERSION != 1)
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+
+
+#ifndef ECUM_CFG_H_
+#define ECUM_CFG_H_
+
+#define ECUM_VERSION_INFO_API STD_OFF
+#define ECUM_INCLUDE_NVRAM_MGR STD_OFF
+#define ECUM_DEV_ERROR_DETECT STD_OFF
+
+#include "EcuM_Generated_Types.h"
+
+extern EcuM_ConfigType EcuMConfig;
+
+#endif /*ECUM_CFG_H_*/
--- /dev/null
+/*
+* Configuration of module EcuM (EcuM_Generated_Types.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:43:38 CEST 2010
+*/
+
+
+#if (ECUM_SW_MAJOR_VERSION != 1)
+#error "EcuM: Configuration file version differs from BSW version."
+#endif
+
+
+#ifndef _ECUM_GENERATED_TYPES_H_
+#define _ECUM_GENERATED_TYPES_H_
+
+#if defined(USE_MCU)
+#include "Mcu.h"
+#endif
+#if defined(USE_PORT)
+#include "Port.h"
+#endif
+#if defined(USE_CAN)
+#include "Can.h"
+#endif
+#if defined(USE_CANIF)
+#include "CanIf.h"
+#endif
+#if defined(USE_PWM)
+#include "Pwm.h"
+#endif
+#if defined(USE_COM)
+#include "Com.h"
+#endif
+#if defined(USE_PDUR)
+#include "PduR.h"
+#endif
+#if defined(USE_DMA)
+#include "Dma.h"
+#endif
+#if defined(USE_ADC)
+#include "Adc.h"
+#endif
+#if defined(USE_GPT)
+#include "Gpt.h"
+#endif
+
+
+typedef struct
+{
+ EcuM_StateType EcuMDefaultShutdownTarget;
+ uint8 EcuMDefaultShutdownMode;
+ AppModeType EcuMDefaultAppMode;
+
+#if defined(USE_MCU)
+ const Mcu_ConfigType* McuConfig;
+#endif
+#if defined(USE_PORT)
+ const Port_ConfigType* PortConfig;
+#endif
+#if defined(USE_CAN)
+ const Can_ConfigType* CanConfig;
+#endif
+#if defined(USE_CANIF)
+ const CanIf_ConfigType* CanIfConfig;
+#endif
+#if defined(USE_COM)
+ const Com_ConfigType* ComConfig;
+#endif
+#if defined(USE_PDUR)
+ const PduR_PBConfigType* PduRConfig;
+#endif
+#if defined(USE_PWM)
+ const Pwm_ConfigType* PwmConfig;
+#endif
+#if defined(USE_DMA)
+ const Dma_ConfigType* DmaConfig;
+#endif
+#if defined(USE_ADC)
+ const Adc_ConfigType* AdcConfig;
+#endif
+#if defined(USE_GPT)
+ const Gpt_ConfigType* GptConfig;
+#endif
+} EcuM_ConfigType;
+
+#endif /*_ECUM_GENERATED_TYPES_H_*/
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
*/
-\r
-// File generated on Tue Aug 18 13:49:03 CEST 2009\r
+
\r
#include <stdlib.h>\r
#include <stdint.h>\r
-#include "os_config_macros.h"\r
#include "Platform_Types.h"\r
#include "Os.h" // includes Os_Cfg.h\r
-#include "Kernel.h"\r
-#include "Kernel_Offset.h"\r
+#include "os_config_macros.h"
+#include "kernel.h"
+#include "kernel_offset.h"
#include "alist_i.h"\r
#include "Mcu.h"
+extern void dec_exception( void );
+
+// Set the os tick frequency
OsTickType OsTickFreq = 1000;\r
\r
-// ################################## DEBUG #################################\r
-// All output on as standard\r
-uint32 os_dbg_mask = 0;\r
-// D_MASTER_PRINT ;\r
-// D_ISR_MASTER_PRINT |\r
-// D_STDOUT |\r
-// D_ISR_STDOUT | D_TASK | D_ALARM;\r
\r
-// ############################### APPLICATION ##############################\r
-// A single, non-configurable application for now\r
-OsRomApplicationType rom_app_list[] = {\r
- {\r
- .application_id = APPLICATION_ID_application_1,\r
- .name = "application_1",\r
- .trusted = true,\r
- .StartupHook = NULL,\r
- .ShutdownHook = NULL,\r
- .ErrorHook = NULL,\r
- .isr_mask = 0,\r
- .scheduletable_mask = 0,\r
- .alarm_mask = 0,\r
- .counter_mask = 0,\r
- .resource_mask = 0,\r
- .message_mask = 0,\r
- }\r
+// ############################### DEBUG OUTPUT #############################
+uint32 os_dbg_mask = D_RESOURCE |D_SCHTBL |D_EVENT |D_TASK |D_ALARM;
+
+
+
+// ################################# COUNTERS ###############################
+GEN_COUNTER_HEAD {
+ GEN_COUNTER( COUNTER_ID_OsTick,
+ "OsTick",
+ COUNTER_TYPE_HARD,
+ COUNTER_UNIT_NANO,
+ 0xffff,
+ 1,
+ 1,
+ 0),
};\r
\r
-\r
-// ################################# COUNTERS ###############################\r
-OsCounterType counter_list[] = {\r
- {\r
- .name = "OsTick",\r
- .type = COUNTER_TYPE_HARD,\r
- .unit = COUNTER_UNIT_NANO,\r
- .alarm_base.maxallowedvalue = 65535,\r
- .alarm_base.tickperbase = 1,\r
- .alarm_base.mincycle = 0,\r
- },\r
-};\r
-
CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;
\r
// ################################## ALARMS ################################\r
-OsAlarmType alarm_list[] = {\r
- {\r
- .name = "ComAlarm",\r
- .counter = &counter_list[COUNTER_ID_OsTick],\r
- .counter_id = COUNTER_ID_OsTick,\r
- .autostart = {\r
- .active = TRUE,\r
- .alarmtime = 5,\r
- .cycletime = 20,\r
- .appmode_mask = APPLICATION_ID_application_1, //___ARCTICSTUDIO_GENERATOR_TODO___,\r
- },\r
- .action = {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_ComTask,\r
- },\r
- },\r
- {\r
- .name = "ReadSwAlarm",\r
- .counter = &counter_list[COUNTER_ID_OsTick],\r
- .counter_id = COUNTER_ID_OsTick,\r
- .autostart = {\r
- .active = TRUE,\r
- .alarmtime = 10,\r
- .cycletime = 30,\r
- .appmode_mask = APPLICATION_ID_application_1, //___ARCTICSTUDIO_GENERATOR_TODO___,\r
- },\r
- .action = {\r
- .type = ALARM_ACTION_ACTIVATETASK,\r
- .task_id = TASK_ID_ReadSwitches,\r
- },\r
- },\r
+GEN_ALARM_AUTOSTART(ALARM_ID_ComAlarm, ALARM_AUTOSTART_ABSOLUTE, 5, 20, OSDEFAULTAPPMODE );
+
+GEN_ALARM_AUTOSTART(ALARM_ID_ReadSwAlarm, ALARM_AUTOSTART_ABSOLUTE, 10, 30, OSDEFAULTAPPMODE );
+
+
+GEN_ALARM_HEAD {
+ GEN_ALARM( ALARM_ID_ComAlarm,
+ "ComAlarm",
+ COUNTER_ID_OsTick,
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_ComAlarm),
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_ComTask,
+ NULL,
+ NULL ),
+ GEN_ALARM( ALARM_ID_ReadSwAlarm,
+ "ReadSwAlarm",
+ COUNTER_ID_OsTick,
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_ReadSwAlarm),
+ ALARM_ACTION_ACTIVATETASK,
+ TASK_ID_ReadSwitches,
+ NULL,
+ NULL ),
};\r
\r
-\r
// ################################ RESOURCES ###############################\r
-OsResourceType resource_list[] = {\r
- {\r
- .nr = RES_SCHEDULER,\r
- .type = RESOURCE_TYPE_STANDARD,\r
- .ceiling_priority = 0,\r
- .application_owner_id = 0,\r
- .task_mask = 0,\r
- .owner = (-1),\r
- },\r
+GEN_RESOURCE_HEAD {
+ GEN_RESOURCE(
+ RES_SCHEDULER,
+ RESOURCE_TYPE_STANDARD,
+ 0
+ ),
};\r
\r
// ############################## STACKS (TASKS) ############################\r
-uint8_t stack_ComTask[PRIO_STACK_SIZE];\r
-uint8_t stack_OsIdle[PRIO_STACK_SIZE];\r
-uint8_t stack_ReadSwitches[PRIO_STACK_SIZE];\r
-uint8_t stack_StartupTask[PRIO_STACK_SIZE];\r
-\r
-// ##################### TIMING PROTECTIONS (TASKS, ISRS) ###################\r
-OsTimingProtectionType timing_protection_list[] = {\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);
+DECLARE_STACK(ComTask,2048);
+DECLARE_STACK(ReadSwitches,2048);
+DECLARE_STACK(StartupTask,2048);
+\r
+// ################################## TASKS #################################
+GEN_TASK_HEAD {
+ GEN_ETASK( OsIdle,
+ 0,
+ FULL,
+ TRUE,
+ NULL,
+ 0
+ ),
+ GEN_BTASK(
+ ComTask,
+ 10,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ ReadSwitches,
+ 5,
+ FULL,
+ FALSE,
+ NULL,
+ 0,
+ 1
+ ),
+
+ GEN_BTASK(
+ StartupTask,
+ 20,
+ FULL,
+ TRUE,
+ NULL,
+ 0,
+ 1
+ ),
+
};\r
\r
-OsRomPcbType rom_pcb_list[] = {\r
-// ################################## TASKS #################################\r
- {\r
- .pid = TASK_ID_ComTask,\r
- .name = "ComTask",\r
- .entry = ComTask,\r
- .prio = 20,\r
- .proc_type = PROC_BASIC,\r
- .stack.size = sizeof stack_ComTask,\r
- .stack.top = stack_ComTask,\r
- .autostart = false,\r
- .application_id = APPLICATION_ID_application_1,\r
- },\r
- {\r
- .pid = TASK_ID_OsIdle,\r
- .name = "OsIdle",\r
- .entry = OsIdle,\r
- .prio = 1,\r
- .proc_type = PROC_EXTENDED,\r
- .stack.size = sizeof stack_OsIdle,\r
- .stack.top = stack_OsIdle,\r
- .autostart = true,\r
- .application_id = APPLICATION_ID_application_1,\r
- },\r
- {\r
- .pid = TASK_ID_ReadSwitches,\r
- .name = "ReadSwitches",\r
- .entry = ReadSwitches,\r
- .prio = 10,\r
- .proc_type = PROC_BASIC,\r
- .stack.size = sizeof stack_ReadSwitches,\r
- .stack.top = stack_ReadSwitches,\r
- .autostart = false,\r
- .application_id = APPLICATION_ID_application_1,\r
- },\r
- {\r
- .pid = TASK_ID_StartupTask,\r
- .name = "StartupTask",\r
- .entry = StartupTask,\r
- .prio = 100,\r
- .proc_type = PROC_BASIC,\r
- .stack.size = sizeof stack_StartupTask,\r
- .stack.top = stack_StartupTask,\r
- .autostart = true,\r
- .application_id = APPLICATION_ID_application_1,\r
- },\r
+// ################################## HOOKS #################################
+GEN_HOOKS(
+ StartupHook,
+ NULL,
+ ShutdownHook,
+ ErrorHook,
+ PreTaskHook,
+ PostTaskHook
+);
+
+// ################################## ISRS ##################################
+
+
+// ############################ SCHEDULE TABLES #############################
+
+// Table heads
+GEN_SCHTBL_HEAD {
};\r
\r
-uint8_t pcb_list[PCB_T_SIZE*ARRAY_SIZE(rom_pcb_list)];\r
+GEN_PCB_LIST()
\r
uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
-
+\r
GEN_IRQ_VECTOR_TABLE_HEAD {};
GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
GEN_IRQ_PRIORITY_TABLE_HEAD {};
\r
-\r
-// ################################## HOOKS ##################################\r
-struct OsHooks os_conf_global_hooks = {\r
- .StartupHook = StartupHook,\r
- .ProtectionHook = ProtectionHook,\r
- .ShutdownHook = ShutdownHook,\r
- .ErrorHook = ErrorHook,\r
- .PreTaskHook = PreTaskHook,\r
- .PostTaskHook = PostTaskHook,\r
-};\r
-\r
#include "os_config_funcs.h"
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
-*/
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
\r
#ifndef OS_CFG_H_\r
#define OS_CFG_H_\r
\r
-#define ALARM_USE\r
-
-// Application\r
-#define APPLICATION_ID_application_1 0\r
-#define APPLICATION_CNT 1\r
\r
// Alarm Id's\r
#define ALARM_ID_ComAlarm 0\r
// Counter Id's\r
#define COUNTER_ID_OsTick 0\r
\r
-// Event Id's\r
+// Counter macros
+#define OSMAXALLOWEDVALUE_OsTick 65535
+
\r
// Event masks\r
\r
\r
// Resource Id's\r
\r
+// Linked resource id's
+
+// Resource masks
+
// Task Id's\r
-#define TASK_ID_ComTask 0\r
-#define TASK_ID_OsIdle 1\r
+#define TASK_ID_OsIdle 0
+#define TASK_ID_ComTask 1
#define TASK_ID_ReadSwitches 2\r
#define TASK_ID_StartupTask 3\r
\r
// Task entry points\r
+void OsIdle( void );
void ComTask( void );\r
-void OsIdle( void );\r
void ReadSwitches( void );\r
void StartupTask( void );\r
\r
-// Stack sizes\r
-#define PRIO_STACK_SIZE 2048\r
-#define OS_INTERRUPT_STACK_SIZE 2048\r
+// Schedule table id's
\r
-// Hooks\r
-#define USE_ERRORHOOK\r
-#define USE_POSTTASKHOOK\r
-#define USE_PRETASKHOOK\r
-#define USE_PROTECTIONHOOK\r
-#define USE_SHUTDOWNHOOK\r
-#define USE_STARTUPHOOK\r
+// Stack size
+#define OS_INTERRUPT_STACK_SIZE 2048
+#define OS_OSIDLE_STACK_SIZE 512
+
+#define OS_ALARM_CNT 2
+#define OS_TASK_CNT 4
+#define OS_SCHTBL_CNT 0
+#define OS_COUNTER_CNT 1
+#define OS_EVENTS_CNT 0
+#define OS_ISRS_CNT 0
+#define OS_RESOURCE_CNT 0
+#define OS_LINKED_RESOURCE_CNT 0
+
+#define CFG_OS_DEBUG STD_ON
+
+#define OS_SC1 STD_ON
+#define OS_STACK_MONITORING STD_ON
+#define OS_STATUS_EXTENDED STD_ON
+#define OS_USE_GET_SERVICE_ID STD_ON
+#define OS_USE_PARAMETER_ACCESS STD_ON
+#define OS_RES_SCHEDULER STD_ON
\r
#endif /*OS_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module PduR (PduR_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
+
+#if (PDUR_SW_MAJOR_VERSION != 1)
+#error "PduR: Configuration file version differs from BSW version."
+#endif
+
+
+
+#ifndef PDUR_CFG_H_
+#define PDUR_CFG_H_
+
+// Module support
+#define PDUR_CANIF_SUPPORT STD_ON
+#define PDUR_CANTP_SUPPORT STD_OFF
+#define PDUR_FRIF_SUPPORT STD_OFF /* Not supported */
+#define PDUR_FRTP_SUPPORT STD_OFF /* Not supported */
+#define PDUR_LINIF_SUPPORT STD_OFF
+#define PDUR_LINTP_SUPPORT STD_OFF /* Not supported */
+#define PDUR_COM_SUPPORT STD_ON
+#define PDUR_DCM_SUPPORT STD_OFF
+#define PDUR_IPDUM_SUPPORT STD_OFF /* Not supported */
+
+
+#define PDUR_DEV_ERROR_DETECT STD_OFF
+#define PDUR_VERSION_INFO_API STD_OFF
+
+
+// Zero cost operation mode
+#define PDUR_ZERO_COST_OPERATION STD_ON
+#define PDUR_SINGLE_IF CAN_IF
+#define PDUR_SINGLE_TP CAN_TP
+
+
+// Gateway operation
+#define PDUR_GATEWAY_OPERATION STD_OFF
+#define PDUR_MEMORY_SIZE 10 /* Not used */
+#define PDUR_SB_TX_BUFFER_SUPPORT STD_OFF
+#define PDUR_FIFO_TX_BUFFER_SUPPORT STD_OFF
+
+/**
+ * The maximum numbers of Tx buffers.
+ */
+#define PDUR_MAX_TX_BUFFER_NUMBER 10 /* Not used */
+
+
+
+
+
+// Multicast
+/* Not supported
+#define PDUR_MULTICAST_TOIF_SUPPORT STD_OFF
+#define PDUR_MULTICAST_FROMIF_SUPPORT STD_OFF
+#define PDUR_MULTICAST_TOTP_SUPPORT STD_OFF
+#define PDUR_MULTICAST_FROMTP_SUPPORT STD_OFF
+*/
+
+
+// Minimum routing
+/* Minimum routing not supported.
+#define PDUR_MINIMUM_ROUTING_UP_MODULE COM
+#define PDUR_MINIMUM_ROUTING_LO_MODULE CAN_IF
+#define PDUR_MINIMUM_ROUTING_UP_RXPDUID ((PduIdType)100)
+#define PDUR_MINIMUM_ROUTING_LO_RXPDUID ((PduIdType)255)
+#define PDUR_MINIMUM_ROUTING_UP_TXPDUID ((PduIdType)255)
+#define PDUR_MINIMUM_ROUTING_LO_TXPDUID ((PduIdType)255)
+*/
+
+
+#endif
--- /dev/null
+/*
+* Configuration of module PduR (PduR_PbCfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
+
+#include "PduR.h"
+#include "PduR_Cfg.h"
+#include "PduR_PbCfg.h"
+
+#if PDUR_CANIF_SUPPORT == STD_ON
+#include "CanIf.h"
+#endif
+#if PDUR_CANTP_SUPPORT == STD_ON
+#include "CanTp.h"
+#endif
+#if PDUR_LINIF_SUPPORT == STD_ON
+#include "LinIf.h"
+#endif
+#if PDUR_COM_SUPPORT == STD_ON
+#include "Com.h"
+#endif
+#if PDUR_DCM_SUPPORT == STD_ON
+#include "Dcm.h"
+#endif
+
+
+PduRTxBufferTable_type PduRTxBufferTable = {
+ .PduRMaxTxBufferNumber = 1,
+ .PduRTxBuffer = {
+ {
+ .Depth = 0,
+ },
+ }
+};
+
+
+PduRRoutingTable_type PduRRoutingTable = {
+ .PduRRoutingPath = {
+ { // End of routing table
+ .PduR_Arc_EOL = 1
+ }
+ }
+};
+
+
+
+
+PduR_PBConfigType PduR_Config = {
+ .PduRConfigurationId = 0,
+ .PduRTxBufferTable = &PduRTxBufferTable,
+ .PduRRoutingTable = &PduRRoutingTable,
+};
--- /dev/null
+/*
+* Configuration of module PduR (PduR_PbCfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.1
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
+*/
+
+
+#if (PDUR_SW_MAJOR_VERSION != 1)
+#error "PduR: Configuration file version differs from BSW version."
+#endif
+
+
+#if defined(USE_DCM)
+#include "Dcm.h"
+#endif
+#if defined(USE_COM)
+#include "Com.h"
+#endif
+#if defined(USE_CANIF)
+#include "CanIf.h"
+#endif
+#if defined(USE_CANTP)
+#include "CanTp.h"
+#endif
+
+extern PduR_PBConfigType PduR_Config;
+
+// PduR Polite Defines.
+
+#define PDUR_SOURCE_PDU_ID_LedCommandTx COM_PDU_ID_LedCommandTx
+#define PDUR_DEST_PDU_ID_LedCommandTx CANIF_PDU_ID_LedCommandTx
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+/*
+* Configuration of module Port (Port_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
*/
+
+// File generated on Fri Apr 30 15:54:06 CEST 2010
+// File generated by com.arccore.bswbuilder.modules.port.mpc5516
\r
-// File generated on Mon Aug 17 14:11:26 CEST 2009\r
-// File generated by org.autocore.modules.port.mpc5516\r
-\r
+#include "Port.h"
#include "Port_Cfg.h"\r
+#include "stdlib.h"
\r
const uint16_t PortPadConfigData[] = {\r
PCR_RESET, /* PCR 0 */\r
PCR_RESET, /* PCR 5 */\r
PCR_RESET, /* PCR 6 */\r
PCR_RESET, /* PCR 7 */\r
- PA_FUNC1, /* PCR 8 */\r
- PA_FUNC1, /* PCR 9 */\r
- PA_FUNC1, /* PCR 10 */
- PA_FUNC1,
- PA_FUNC1,\r
+ PCR_RESET, /* PCR 8 */
+ PCR_RESET, /* PCR 9 */
+ PCR_RESET, /* PCR 10 */
+ PCR_RESET, /* PCR 11 */
+ PCR_RESET, /* PCR 12 */
PCR_RESET, /* PCR 13 */\r
PCR_RESET, /* PCR 14 */\r
PCR_RESET, /* PCR 15 */\r
PCR_RESET, /* PCR 45 */\r
PCR_RESET, /* PCR 46 */\r
PCR_RESET, /* PCR 47 */\r
- ( PA_FUNC1 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 48 : CNTX_A */\r
- ( PA_FUNC1 | IBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 49 : CNRX_A */\r
+ ( FUNC1 | OBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 48 : PORT_PIN_MODE_CAN */
+ ( FUNC1 | IBE_ENABLE | SLEW_RATE_MIN | PULL_NONE ), /* PCR 49 : PORT_PIN_MODE_CAN */
PCR_RESET, /* PCR 50 */\r
PCR_RESET, /* PCR 51 */\r
PCR_RESET, /* PCR 52 */\r
GPDO_RESET, /* GPDO 8 */\r
GPDO_RESET, /* GPDO 9 */\r
GPDO_RESET, /* GPDO 10 */\r
- GPDO_RESET, /* GPDO 11 */\r
- GPDO_RESET, /* GPDO 12 */\r
+ GPDO_RESET, /* GPDO 11 */
+ GPDO_RESET, /* GPDO 12 */
GPDO_RESET, /* GPDO 13 */\r
GPDO_RESET, /* GPDO 14 */\r
GPDO_RESET, /* GPDO 15 */\r
GPDO_RESET, /* GPDO 46 */\r
GPDO_RESET, /* GPDO 47 */\r
GPDO_RESET, /* GPDO 48 */\r
- GPDO_HIGH, /* GPDO 49 */\r
+ GPDO_RESET, /* GPDO 49 */
GPDO_RESET, /* GPDO 50 */\r
GPDO_RESET, /* GPDO 51 */\r
GPDO_RESET, /* GPDO 52 */\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
/*
-* Module vendor: Autocore
-* Module version: 1.0.0
-* Specification: Autosar v3.0.1, Final
-*
+* Configuration of module Port (Port_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): MPC551x
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.0
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Fri Apr 30 15:54:06 CEST 2010
*/
-// File generated on Mon Aug 17 14:11:22 CEST 2009\r
-// File generated by org.autocore.modules.port.mpc5516\r
+
+#if (PORT_SW_MAJOR_VERSION != 1)
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
\r
#ifndef PORT_CFG_H_\r
#define PORT_CFG_H_\r
\r
#include "Std_Types.h"\r
\r
-#define PORT_VERSION_INFO_API STD_ON\r
-#define PORT_DEV_ERROR_DETECT STD_ON\r
-#define PORT_PIN_DIRECTION_CHANGES_ALLOWED STD_ON\r
+#define PORT_VERSION_INFO_API STD_OFF
+#define PORT_DEV_ERROR_DETECT STD_OFF
+#define PORT_PIN_DIRECTION_CHANGES_ALLOWED STD_OFF
\r
#define BIT0 (1<<15)\r
#define BIT1 (1<<14)\r
#define ODE_ENABLE BIT10\r
#define IBE_ENABLE BIT7\r
#define OBE_ENABLE BIT6\r
-#define PA_IO (0)\r
-#define PA_FUNC0 (0)\r
-#define PA_FUNC1 (BIT5)\r
-#define PA_FUNC2 (BIT4)\r
-#define PA_FUNC3 (BIT4|BIT5)\r
-#define PA_FUNC4 (BIT3)\r
+#define IO (0)
+#define FUNC0 (0)
+#define FUNC1 (BIT5)
+#define FUNC2 (BIT4)
+#define FUNC3 (BIT4|BIT5)
+#define FUNC4 (BIT3)
\r
#define PCR_RESET (0)\r
#define GPDO_RESET (0)\r
\r
#define GPDO_HIGH (1)\r
\r
-// Could also use an enum to name the pins here\r
-typedef int Port_PinType;\r
+
+typedef uint16 Port_PinType;
\r
typedef struct\r
{\r
\r
extern const Port_ConfigType PortConfigData;\r
\r
-#endif /*PORT_CFG_H_*/\r
+#endif /* PORT_CFG_H_ */
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="fc563c91-212b-48aa-9b79-bd5e8f4b5ab0">\r
+ <SHORT-NAME>switch_node_mpc551x</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="39c3afa6-22cd-4ebc-83c1-f01c24da1aa7">\r
+ <SHORT-NAME>switch_node_mpc551x</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <REVISION-LABEL>Rev 3</REVISION-LABEL>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC551x</SD>\r
+ <SD GID="AUTHOR">ArcCore AB</SD>\r
+ <SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/Can</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/CanIf</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/Com</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/EcuC</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/PduR</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/Port</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/switch_node_mpc551x/EcuM</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="903e3de6-5ad8-45e1-ba0f-4e3e3baa7a5a">\r
+ <SHORT-NAME>Can</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Can</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="4050dda2-24da-4485-bfba-357bda04e3c2">\r
+ <SHORT-NAME>CanConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="2927ceb7-ede4-4fa1-8b9f-1abd7efeee7d">\r
+ <SHORT-NAME>Controller_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet/CanController</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerActivation</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerLoopback</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerBaudRate</DEFINITION-REF>\r
+ <VALUE>125</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanHWControllerId</DEFINITION-REF>\r
+ <VALUE>FLEXCAN_A</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerPropSeg</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerSeg1</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanControllerSeg2</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="101d46d2-e7cb-45d4-b8c4-ba4c49192f74">\r
+ <SHORT-NAME>Mask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet/CanController/CanFilterMask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanController/CanFilterMask/CanFilterMaskValue</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="623800d6-d672-45fb-9454-be8ca8f1d6db">\r
+ <SHORT-NAME>HWObj_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanIdType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanObjectType</DEFINITION-REF>\r
+ <VALUE>TRANSMIT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanMBMask</DEFINITION-REF>\r
+ <VALUE>16711680</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanControllerRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/Can/CanConfigSet/Controller_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Can/CanConfigSet/CanHardwareObject/CanFilterMaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/Can/CanConfigSet/Controller_1/Mask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e724dede-61d0-48df-85e0-65806ed2523a">\r
+ <SHORT-NAME>CanGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Can/CanGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanGeneral/CanDevErrorDetection</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanGeneral/CanMultiplexedTransmission</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Can/CanGeneral/CanVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="85d102ca-e755-47c5-a266-beed10ab3b57">\r
+ <SHORT-NAME>CanIf</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/CanIf</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="7da13625-c26c-48ff-b0b2-8a76b2306155">\r
+ <SHORT-NAME>CanIfDispatchConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfDispatchConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfBusOffNotification</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfErrorNotificaton</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfWakeupNotification</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfDispatchConfig/CanIfWakeupValidNotification</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="3b595f17-b484-400d-80d1-1c4c0feb134e">\r
+ <SHORT-NAME>CanIfDriverConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfDriverConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfBusoffNotification</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfReceiveIndication</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfTransmitCancellation</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfTxConfirmation</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfDriverConfig/CanIfWakeupNotification</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f15967b5-baeb-484b-981b-5550737310ee">\r
+ <SHORT-NAME>CanIfInitConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfInitConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <STRING-VALUE>\r
+ <DEFINITION-REF DEST="STRING-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfConfigSet</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </STRING-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfNumberOfCanRxPduIds</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfNumberOfCanTXPduIds</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfNumberOfDynamicCanTXPduIds</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="de0010c7-e224-4341-a27a-b88424103f34">\r
+ <SHORT-NAME>Hoh_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfInitHohConfig</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="5b415083-c3b5-4b5f-b4bc-e71b49e1ffe9">\r
+ <SHORT-NAME>Hth_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfInitHohConfig/CanIfHthConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfInitHohConfig/CanIfHthConfig/CanIfHthType</DEFINITION-REF>\r
+ <VALUE>BASIC_CAN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfInitHohConfig/CanIfHthConfig/CanIfCanControllerIdRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/CanIf/CHANNEL_0</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="SYMBOLIC-NAME-REFERENCE-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfInitHohConfig/CanIfHthConfig/CanIfHthIdSymRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/Can/CanConfigSet/HWObj_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="adadedd5-f56c-4751-ac5d-5048c07faa64">\r
+ <SHORT-NAME>Tx_PDU_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfCanTxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfCanTxPduIdCanId</DEFINITION-REF>\r
+ <VALUE>291</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfCanTxPduIdDlc</DEFINITION-REF>\r
+ <VALUE>8</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfCanTxPduType</DEFINITION-REF>\r
+ <VALUE>STATIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfReadTxPduNotifyStatus</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfTxPduIdCanIdType</DEFINITION-REF>\r
+ <VALUE>EXTENDED_CAN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfTxUserType</DEFINITION-REF>\r
+ <VALUE>PDUR</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <FUNCTION-NAME-VALUE>\r
+ <DEFINITION-REF DEST="FUNCTION-NAME-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfUserTxConfirmation</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </FUNCTION-NAME-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/CanIfCanTxPduHthRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/CanIf/CanIfInitConfiguration/Hoh_1/Hth_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/CanIf/CanIfInitConfiguration/CanIfTxPduConfig/PduIdRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/EcuC/PduCollection/LedCommandTx</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="618e77b5-eebf-46e3-ba52-756f80010907">\r
+ <SHORT-NAME>CanIfPrivateConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/CanIf/CanIfPrivateConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfPrivateConfiguration/CanIfDlcCheck</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/CanIf/CanIfPrivateConfiguration/CanIfNumberOfTxBuffers</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/CanIf/CanIfPrivateConfiguration/CanIfSoftwareFilterType</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0ed5a5e2-65c5-429c-b717-8e87fc184cef">\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfPublicConfiguration/CanIfVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
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+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/CanIf/CanIfPublicConfiguration/CanIfWakeupEventApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="b4e9f534-4441-4a52-968c-fb41e20aa6a0">\r
+ <SHORT-NAME>Com</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
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+ <CONTAINER UUID="64ec3a02-f282-4783-a9d5-1dd92e3cf935">\r
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+ <CONTAINER UUID="66b0d698-8aa0-4883-a45b-02b0746f4636">\r
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+ <FUNCTION-NAME-VALUE>\r
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+ <VALUE></VALUE>\r
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+ <VALUE>SEND</VALUE>\r
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+ <VALUE>DIRECT</VALUE>\r
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+ <FLOAT-VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Com/ComGeneral/ComConfigurationUseDet</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="8c81925b-ee12-4860-bbe9-6893abf6866d">\r
+ <SHORT-NAME>EcuC</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuC</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="2680a1e1-37a7-43dc-a9b8-820a78d0e6dd">\r
+ <SHORT-NAME>PduCollection</SHORT-NAME>\r
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+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="2c6a8c0f-cccb-4cd6-b807-2f273efb6077">\r
+ <SHORT-NAME>LedCommandTx</SHORT-NAME>\r
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+ <SHORT-NAME>Os</SHORT-NAME>\r
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+ <SDGS>\r
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+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
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+ <VALUE>true</VALUE>\r
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+ <VALUE>1000</VALUE>\r
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+ <VALUE>2048</VALUE>\r
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+ <VALUE>512</VALUE>\r
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+ <CONTAINER UUID="3b9e5e09-7789-4dd0-80f9-8336f61037b2">\r
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+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>RELATIVE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>20</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4074607e-a4c0-440e-a1cc-167c05a9ec83">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/Os/ComTask</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="38528920-a11b-4e23-a952-969bdd19bc4b">\r
+ <SHORT-NAME>ReadSwAlarm</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="802dd1d5-57ad-4ba6-a068-5c97822717e6">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>RELATIVE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>30</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="fb1d868d-8d1b-4977-a0cc-e2eea00b912b">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/switch_node_mpc551x/Os/ReadSwitches</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="299edb5c-e9bb-4cb7-99f2-96078c8ef889">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="1672b97f-c474-47c9-9e3b-c4fb8f26804b">\r
+ <SHORT-NAME>ComTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="7997f4d1-9b0c-4282-ba4c-5fdc1708411f">\r
+ <SHORT-NAME>ReadSwitches</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="dee9715a-4fa7-42f3-b692-a89b671c2578">\r
+ <SHORT-NAME>StartupTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>20</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="030fc701-0f8e-4d53-ad7b-8e341ef54b74">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="560e71ec-57fc-4fc4-bfaf-a07ebc650bcd">\r
+ <SHORT-NAME>PduR</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/PduR</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="c02d4309-5afc-4c03-8451-668b3b8bd8ba">\r
+ <SHORT-NAME>PduRGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/PduR/PduRGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRCanIfSupport</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRCanTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRComSupport</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRDcmSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRFifoTxBufferSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRFrIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRFrTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRGatewayOperation</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRIPduMSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRLinIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRLinTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMemorySize</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingLoModule</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingLoRxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingLoTxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingUpModule</DEFINITION-REF>\r
+ <VALUE></VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingUpRxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMinimumRoutingUpTxPduId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastFromIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastFromTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastToIfSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRMulticastToTpSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRSbTxBufferSupport</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRSingleIf</DEFINITION-REF>\r
+ <VALUE>CAN_IF</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRSingleTp</DEFINITION-REF>\r
+ <VALUE>CAN_TP</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/PduR/PduRGeneral/PduRZeroCostOperation</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="31ab650e-b697-4204-ad91-3728915cef20">\r
+ <SHORT-NAME>PduRGlobalConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/PduR/PduRGlobalConfig</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/PduR/PduRGlobalConfig/PduRConfigurationId</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="c988f2e6-82ba-4053-877e-3a973ae704e5">\r
+ <SHORT-NAME>PduRRoutingTable</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/PduR/PduRGlobalConfig/PduRRoutingTable</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="28a14bc0-3b00-496d-94a3-d7046efc2b8c">\r
+ <SHORT-NAME>Port</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Port</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="c6b54ed6-2d0c-4028-b87d-a62010a7947c">\r
+ <SHORT-NAME>PortConfigSet</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="586de8a0-4877-4e82-9f18-f73fb8b906eb">\r
+ <SHORT-NAME>Can</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer</DEFINITION-REF>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b3bdba46-3617-420d-a72d-a33419b81f18">\r
+ <SHORT-NAME>CNTX_A</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_OUT</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>48</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_CAN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="10976fd3-cbb3-493d-91cb-35a890f8ea6b">\r
+ <SHORT-NAME>CNRX_A</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinPullMode</DEFINITION-REF>\r
+ <VALUE>PULL_NONE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirection</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_IN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinDirectionChangeable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinHysteresisEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinOpenDrainEnabled</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinId</DEFINITION-REF>\r
+ <VALUE>49</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinSlewRate</DEFINITION-REF>\r
+ <VALUE>SLEW_RATE_MIN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinLevelValue</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_LEVEL_LOW</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Port/PortConfigSet/PortContainer/PortPin/PortPinMode</DEFINITION-REF>\r
+ <VALUE>PORT_PIN_MODE_CAN</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="14037ce8-9c63-4019-986f-5e221ee88caf">\r
+ <SHORT-NAME>PortGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Port/PortGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinDirectionApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortSetPinModeApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Port/PortGeneral/PortVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="4e4b8e32-0309-4da2-86b0-2fb7d7450820">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.0</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="03e49c2b-e150-484b-93c4-1805e3ca0ec7">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
\r
+MOD_USE+=KERNEL MCU\r
\r
-#MOD_USE+=KERNEL MCU SIMPLE_PRINTF\r
-MOD_USE+=KERNEL MCU ECUM NEWLIB COMMON DET SIMPLE_PRINTF \r
-# WINIDEA_TERM\r
-#RAMLOG\r
+SELECT_CONSOLE = RAMLOG\r
+SELECT_OS_CONSOLE = RAMLOG\r
\r
+def-y += CFG_RAMLOG_SIZE=1024\r
+def-y += HEAPSIZE=400
\ No newline at end of file
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-#include <stdlib.h>
-#include <stdint.h>
-#include "Platform_Types.h"
-#include "Os.h" // includes Os_Cfg.h
-#include "os_config_macros.h"
-#include "kernel.h"
-#include "kernel_offset.h"
-#include "alist_i.h"
-#include "Mcu.h"
-\r
-extern void dec_exception( void );\r
-
-OsTickType OsTickFreq = 1000;
-\r
-// atleast 1\r
-\r
-//--- APPLICATIONS ----\r
-\r
-\r
-// --- RESOURCES ---\r
-\r
-GEN_RESOURCE_HEAD {
-\r
-};\r
-\r
-//--- TASKS ----\r
-\r
-DECLARE_STACK(OsIdle,PRIO_STACK_SIZE);\r
-DECLARE_STACK(etask_1,PRIO_STACK_SIZE);\r
-DECLARE_STACK(etask_2,PRIO_STACK_SIZE);\r
-DECLARE_STACK(btask_3,PRIO_STACK_SIZE);\r
-\r
-GEN_TASK_HEAD {\r
- GEN_ETASK( OsIdle,
- 0,
- FULL, /* scheduling */
- true, /* autostart */
- NULL, /* internal resource */
- 0 /* rsrc mask */),
-
- GEN_ETASK( etask_1,
- 1,
- FULL, /* scheduling */
- true, /* autostart */
- NULL, /* internal resource */
- 0 /* rsrc mask */),
-
- GEN_ETASK( etask_2,
- 2,
- FULL, /* scheduling */
- true, /* autostart */
- NULL, /* internal resource */
- 0 /* rsrc mask */),
-
- GEN_BTASK( btask_3,
- 3,
- FULL, /* scheduling */
- false, /* autostart */
- NULL, /* internal resource */
- 0, /* rsrc mask */
- 1 /* activation limit */),
-};\r
-\r
-GEN_PCB_LIST()\r
-\r
-// --- INTERRUPTS ---\r
-\r
-uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
-
-GEN_IRQ_VECTOR_TABLE_HEAD {};
-GEN_IRQ_ISR_TYPE_TABLE_HEAD {};
-GEN_IRQ_PRIORITY_TABLE_HEAD {};
-
-\r
-// --- COUNTERS ---\r
-GEN_COUNTER_HEAD {\r
- GEN_COUNTER( COUNTER_ID_OsTick,\r
- "COUNTER_ID_OsTick",\r
- COUNTER_TYPE_HARD,\r
- COUNTER_UNIT_NANO,\r
- 0xffff,1,1,0 ),\r
-};
-
-CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
-\r
-// --- MESSAGES ---\r
-\r
-// --- ALARMS ---\r
-#define ALARM_USE\r
-\r
-GEN_ALARM_AUTOSTART( 0, ALARM_AUTOSTART_ABSOLUTE, 100, 10 , OSDEFAULTAPPMODE );
-
-GEN_ALARM_HEAD {
- GEN_ALARM( 0,"Alarm_10ms",COUNTER_ID_OsTick,
- GEN_ALARM_AUTOSTART_NAME(0),
- ALARM_ACTION_SETEVENT, TASK_ID_etask_1, EVENT_2, 0 ),
-};
-\r
-// --- SCHEDULETABLES ---\r
-\r
-// --- HOOKS ---\r
-\r
-GEN_HOOKS( StartupHook, ProtectionHook, ShutdownHook, ErrorHook, PreTaskHook, PostTaskHook )\r
-\r
-\r
-\r
-// --- MISC ---\r
-\r
-uint32 os_dbg_mask = D_TASK | D_ALARM;\r
-\r
-#include "os_config_funcs.h"\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-#ifndef OS_CFG_H_
-#define OS_CFG_H_
-
-
-#if (OS_SW_MAJOR_VERSION != 2)
-#error "Os: Configuration file version differs from BSW version."
-#endif
-
-
-\r
-/* os_config.h */\r
-\r
-#define APPLICATION_ID_application_1 0\r
-#define APPLICATION_CNT 1\r
-\r
-#define TASK_ID_OsIdle 0\r
-#define TASK_ID_etask_1 1\r
-#define TASK_ID_etask_2 2\r
-#define TASK_ID_btask_3 3\r
-\r
-void etask_1( void );\r
-void etask_2( void );\r
-void btask_3( void );\r
-\r
-//#define TASK_ID_os_tick 8\r
-\r
-#define COUNTER_ID_OsTick 0
-\r
-// NOT GENERATED( for test system only )\r
-#define SYSTEM_COUNTER_PERIOD 100
-#define OS_TICK_DURATION_IN_US 2000\r
-
-#if defined(USE_SIMPLE_PRINTF)\r
-#define PRIO_STACK_SIZE 1000
-#else
-#define PRIO_STACK_SIZE 200
-#endif
-\r
-#define OS_INTERRUPT_STACK_SIZE 200\r
-\r
-#define EVENT_0 (1<<0)\r
-#define EVENT_1 (1<<1)\r
-#define EVENT_2 (1<<2)\r
-
-#define OS_ALARM_CNT 1
-#define OS_TASK_CNT 4
-#define OS_COUNTER_CNT 1
-#define OS_EVENTS_CNT 3
-#define OS_ISRS_CNT 0
-#define OS_RESOURCE_CNT 1
-#define OS_LINKED_RESOURCE_CNT 0
-#define OS_SCHTBL_CNT 0
-
-#define CFG_OS_DEBUG STD_ON
-
-
-/*
- * OsOs container
- */
-#define OS_SC1 STD_ON /* | OS_SC2 | OS_SC3 | OS_SC4 */
-#define OS_STACK_MONITORING STD_ON
-#define OS_STATUS_EXTENDED STD_ON /* OS_STATUS_STANDARD */
-#define OS_USE_GET_SERVICE_ID STD_ON
-#define OS_USE_PARAMETER_ACCESS STD_ON
-#define OS_RES_SCHEDULER STD_ON
-\r
-\r
-#endif /* OS_CFG_H_ */\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:28:16 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include <stdint.h>\r
+#include "Platform_Types.h"\r
+#include "Os.h" // includes Os_Cfg.h\r
+#include "os_config_macros.h"\r
+#include "kernel.h"\r
+#include "kernel_offset.h"\r
+#include "alist_i.h"\r
+#include "Mcu.h"\r
+\r
+extern void dec_exception( void );\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 1000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+\r
+\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD {\r
+ GEN_COUNTER( COUNTER_ID_OsTick,\r
+ "OsTick",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm_4ms, ALARM_AUTOSTART_ABSOLUTE, 100, 4, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD {\r
+ GEN_ALARM( ALARM_ID_Alarm_4ms,\r
+ "Alarm_4ms",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm_4ms),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_etask_1,\r
+ EVENT_MASK_EVENT_2,\r
+ NULL ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+GEN_RESOURCE_HEAD {\r
+ GEN_RESOURCE( \r
+ RES_SCHEDULER,\r
+ RESOURCE_TYPE_STANDARD,\r
+ 0\r
+ ),\r
+};\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(btask_3,512);\r
+DECLARE_STACK(etask_1,512);\r
+DECLARE_STACK(etask_2,512);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD {\r
+ GEN_ETASK( OsIdle,\r
+ 0,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0 \r
+ ),\r
+ GEN_BTASK(\r
+ btask_3,\r
+ 3,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_ETASK(\r
+ etask_1,\r
+ 1,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+ GEN_ETASK(\r
+ etask_2,\r
+ 2,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD {\r
+};\r
+\r
+GEN_PCB_LIST()\r
+\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
+\r
+GEN_IRQ_VECTOR_TABLE_HEAD {};\r
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};\r
+GEN_IRQ_PRIORITY_TABLE_HEAD {};\r
+\r
+#include "os_config_funcs.h"\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:28:16 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm_4ms 0\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_OsTick 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_OsTick 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_EVENT_0 0\r
+#define EVENT_MASK_EVENT_1 1\r
+#define EVENT_MASK_EVENT_2 2\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_btask_3 1\r
+#define TASK_ID_etask_1 2\r
+#define TASK_ID_etask_2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void btask_3( void );\r
+void etask_1( void );\r
+void etask_2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 512\r
+#define OS_OSIDLE_STACK_SIZE 200
+\r
+#define OS_ALARM_CNT 1 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 3\r
+#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:28:40 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include <stdint.h>\r
+#include "Platform_Types.h"\r
+#include "Os.h" // includes Os_Cfg.h\r
+#include "os_config_macros.h"\r
+#include "kernel.h"\r
+#include "kernel_offset.h"\r
+#include "alist_i.h"\r
+#include "Mcu.h"\r
+\r
+extern void dec_exception( void );\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 1000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+\r
+\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD {\r
+ GEN_COUNTER( COUNTER_ID_OsTick,\r
+ "OsTick",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm_4ms, ALARM_AUTOSTART_ABSOLUTE, 100, 4, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD {\r
+ GEN_ALARM( ALARM_ID_Alarm_4ms,\r
+ "Alarm_4ms",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm_4ms),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_etask_1,\r
+ EVENT_MASK_EVENT_2,\r
+ NULL ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+GEN_RESOURCE_HEAD {\r
+ GEN_RESOURCE( \r
+ RES_SCHEDULER,\r
+ RESOURCE_TYPE_STANDARD,\r
+ 0\r
+ ),\r
+};\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(btask_3,2048);\r
+DECLARE_STACK(etask_1,2048);\r
+DECLARE_STACK(etask_2,2048);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD {\r
+ GEN_ETASK( OsIdle,\r
+ 0,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0 \r
+ ),\r
+ GEN_BTASK(\r
+ btask_3,\r
+ 3,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_ETASK(\r
+ etask_1,\r
+ 1,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+ GEN_ETASK(\r
+ etask_2,\r
+ 2,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD {\r
+};\r
+\r
+GEN_PCB_LIST()\r
+\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
+\r
+GEN_IRQ_VECTOR_TABLE_HEAD {};\r
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};\r
+GEN_IRQ_PRIORITY_TABLE_HEAD {};\r
+\r
+#include "os_config_funcs.h"\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:28:40 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm_4ms 0\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_OsTick 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_OsTick 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_EVENT_0 0\r
+#define EVENT_MASK_EVENT_1 1\r
+#define EVENT_MASK_EVENT_2 2\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_btask_3 1\r
+#define TASK_ID_etask_1 2\r
+#define TASK_ID_etask_2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void btask_3( void );\r
+void etask_1( void );\r
+void etask_2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 2048\r
+#define OS_OSIDLE_STACK_SIZE 512
+\r
+#define OS_ALARM_CNT 1 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 3\r
+#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON\r
+\r
+#endif /*OS_CFG_H_*/\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.c)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:28:54 CEST 2010
+*/
+
+ \r
+\r
+#include <stdlib.h>\r
+#include <stdint.h>\r
+#include "Platform_Types.h"\r
+#include "Os.h" // includes Os_Cfg.h\r
+#include "os_config_macros.h"\r
+#include "kernel.h"\r
+#include "kernel_offset.h"\r
+#include "alist_i.h"\r
+#include "Mcu.h"\r
+\r
+extern void dec_exception( void );\r
+\r
+// Set the os tick frequency\r
+OsTickType OsTickFreq = 1000;\r
+\r
+\r
+// ############################### DEBUG OUTPUT #############################\r
+uint32 os_dbg_mask = 0;\r
+ \r
+\r
+\r
+// ################################# COUNTERS ###############################\r
+GEN_COUNTER_HEAD {\r
+ GEN_COUNTER( COUNTER_ID_OsTick,\r
+ "OsTick",\r
+ COUNTER_TYPE_HARD,\r
+ COUNTER_UNIT_NANO,\r
+ 0xffff,\r
+ 1,\r
+ 1,\r
+ 0),\r
+};\r
+\r
+CounterType Os_Arc_OsTickCounter = COUNTER_ID_OsTick;\r
+\r
+// ################################## ALARMS ################################\r
+GEN_ALARM_AUTOSTART(ALARM_ID_Alarm_4ms, ALARM_AUTOSTART_ABSOLUTE, 100, 4, OSDEFAULTAPPMODE );\r
+ \r
+\r
+GEN_ALARM_HEAD {\r
+ GEN_ALARM( ALARM_ID_Alarm_4ms,\r
+ "Alarm_4ms",\r
+ COUNTER_ID_OsTick,\r
+ GEN_ALARM_AUTOSTART_NAME(ALARM_ID_Alarm_4ms),\r
+ ALARM_ACTION_SETEVENT,\r
+ TASK_ID_etask_1,\r
+ EVENT_MASK_EVENT_2,\r
+ NULL ),\r
+};\r
+\r
+// ################################ RESOURCES ###############################\r
+GEN_RESOURCE_HEAD {\r
+ GEN_RESOURCE( \r
+ RES_SCHEDULER,\r
+ RESOURCE_TYPE_STANDARD,\r
+ 0\r
+ ),\r
+};\r
+\r
+// ############################## STACKS (TASKS) ############################\r
+DECLARE_STACK(OsIdle,OS_OSIDLE_STACK_SIZE);\r
+DECLARE_STACK(btask_3,2048);\r
+DECLARE_STACK(etask_1,2048);\r
+DECLARE_STACK(etask_2,2048);\r
+\r
+// ################################## TASKS #################################\r
+GEN_TASK_HEAD {\r
+ GEN_ETASK( OsIdle,\r
+ 0,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0 \r
+ ),\r
+ GEN_BTASK(\r
+ btask_3,\r
+ 3,\r
+ FULL,\r
+ FALSE,\r
+ NULL,\r
+ 0,\r
+ 1\r
+ ),\r
+ \r
+ GEN_ETASK(\r
+ etask_1,\r
+ 1,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+ GEN_ETASK(\r
+ etask_2,\r
+ 2,\r
+ FULL,\r
+ TRUE,\r
+ NULL,\r
+ 0\r
+ ),\r
+ \r
+ \r
+};\r
+\r
+// ################################## HOOKS #################################\r
+GEN_HOOKS( \r
+ StartupHook, \r
+ NULL, \r
+ ShutdownHook, \r
+ ErrorHook,\r
+ PreTaskHook, \r
+ PostTaskHook \r
+);\r
+\r
+// ################################## ISRS ##################################\r
+\r
+\r
+// ############################ SCHEDULE TABLES #############################\r
+\r
+// Table heads\r
+GEN_SCHTBL_HEAD {\r
+};\r
+\r
+GEN_PCB_LIST()\r
+\r
+uint8_t os_interrupt_stack[OS_INTERRUPT_STACK_SIZE] __attribute__ ((aligned (0x10)));\r
+\r
+GEN_IRQ_VECTOR_TABLE_HEAD {};\r
+GEN_IRQ_ISR_TYPE_TABLE_HEAD {};\r
+GEN_IRQ_PRIORITY_TABLE_HEAD {};\r
+\r
+#include "os_config_funcs.h"\r
--- /dev/null
+/*
+* Configuration of module Os (Os_Cfg.h)
+*
+* Created by: ArcCore AB
+* Configured for (MCU): Undefined MCU
+*
+* Module editor vendor: ArcCore
+* Module editor version: 2.0.7
+*
+* Copyright ArcCore AB 2010
+* Generated by Arctic Studio (http://arccore.com)
+* on Mon May 03 11:28:54 CEST 2010
+*/
+
+
+#if (OS_SW_MAJOR_VERSION != 2)
+#error "Os: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef OS_CFG_H_\r
+#define OS_CFG_H_\r
+\r
+\r
+// Alarm Id's\r
+#define ALARM_ID_Alarm_4ms 0\r
+\r
+// Counter Id's\r
+#define COUNTER_ID_OsTick 0\r
+\r
+// Counter macros\r
+#define OSMAXALLOWEDVALUE_OsTick 65535\r
+\r
+\r
+// Event masks\r
+#define EVENT_MASK_EVENT_0 0\r
+#define EVENT_MASK_EVENT_1 1\r
+#define EVENT_MASK_EVENT_2 2\r
+\r
+// Isr Id's\r
+\r
+// Resource Id's\r
+\r
+// Linked resource id's\r
+\r
+// Resource masks\r
+\r
+// Task Id's\r
+#define TASK_ID_OsIdle 0\r
+#define TASK_ID_btask_3 1\r
+#define TASK_ID_etask_1 2\r
+#define TASK_ID_etask_2 3\r
+\r
+// Task entry points\r
+void OsIdle( void );\r
+void btask_3( void );\r
+void etask_1( void );\r
+void etask_2( void );\r
+\r
+// Schedule table id's\r
+\r
+// Stack size\r
+#define OS_INTERRUPT_STACK_SIZE 2048\r
+#define OS_OSIDLE_STACK_SIZE 512
+\r
+#define OS_ALARM_CNT 1 \r
+#define OS_TASK_CNT 4\r
+#define OS_SCHTBL_CNT 0\r
+#define OS_COUNTER_CNT 1\r
+#define OS_EVENTS_CNT 3\r
+#define OS_ISRS_CNT 0\r
+#define OS_RESOURCE_CNT 0\r
+#define OS_LINKED_RESOURCE_CNT 0\r
+\r
+#define CFG_OS_DEBUG STD_OFF\r
+\r
+#define OS_SC1 STD_ON \r
+#define OS_STACK_MONITORING STD_ON\r
+#define OS_STATUS_EXTENDED STD_ON\r
+#define OS_USE_GET_SERVICE_ID STD_ON\r
+#define OS_USE_PARAMETER_ACCESS STD_ON\r
+#define OS_RES_SCHEDULER STD_ON\r
+\r
+#endif /*OS_CFG_H_*/\r
\r
LDEBUG_PRINTF("etask_1 start\n");\r
for(;;) {\r
- SetEvent(TASK_ID_etask_2,EVENT_1);\r
- WaitEvent(EVENT_2);\r
- ClearEvent(EVENT_2);\r
+ SetEvent(TASK_ID_etask_2,EVENT_MASK_EVENT_1);\r
+ WaitEvent(EVENT_MASK_EVENT_2);\r
+ ClearEvent(EVENT_MASK_EVENT_2);\r
tryFloatingPoint += 1.0F;\r
GetTaskID(&currTask);\r
Os_Arc_GetStackInfo(currTask,&si);\r
LDEBUG_PRINTF("etask_2 start\n");\r
\r
for(;;) {\r
- WaitEvent(EVENT_1);\r
- ClearEvent(EVENT_1);\r
+ WaitEvent(EVENT_MASK_EVENT_1);\r
+ ClearEvent(EVENT_MASK_EVENT_1);\r
ActivateTask(TASK_ID_btask_3);\r
{\r
StackInfoType si;\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="d3915a94-30a7-4688-a3b9-ec2496d78472">\r
+ <SHORT-NAME>tiny_hcs12</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="a6c36274-8fdc-4537-a616-437aacc31827">\r
+ <SHORT-NAME>tiny_hcs12</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <REVISION-LABEL>Rev 2</REVISION-LABEL>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">Undefined MCU</SD>\r
+ <SD GID="AUTHOR">ArcCore AB</SD>\r
+ <SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/tiny_hcs12/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="d9b75d00-e6eb-4671-a7cf-0abd1e1ed6a7">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="5ceca27a-71ff-4c71-bcb8-69a1f31f5d79">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>200</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="185f3281-13f7-459b-9ccd-66eb1aff52ca">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4c1d9bd6-69e7-48c8-8036-35c6279f2240">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="fbcd933e-5944-44dd-ac92-f9eace6bb55c">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="41f28680-c88e-4083-bacc-40cf82ec3122">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="53d449ae-bdbe-49cb-bb22-141480e62565">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b5120b2f-2b4e-4e0f-8a7f-c7466b489644">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="759524bb-836c-4d61-b59a-cf8edfb6e162">\r
+ <SHORT-NAME>Alarm_4ms</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_hcs12/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="45cda08c-e07f-4670-8f14-b85acb209a6f">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5801fbe7-6b9b-4390-9341-2dd9ab4412f5">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_hcs12/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_hcs12/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f289efa7-5957-47a1-9c32-2248195ca090">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6dde7c3-6596-4a33-96ab-3a43d4ab1429">\r
+ <SHORT-NAME>EVENT_0</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d93f5687-240e-465d-afb4-da563598d37a">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="94eef554-c26c-44d5-9b8f-501597b53d51">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.2"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE UUID="59e33e84-47d4-4613-bbcc-1aed684041be">\r
+ <SHORT-NAME>tiny_ppc</SHORT-NAME>\r
+ <CATEGORY>EcuConfiguration</CATEGORY>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <ISSUED-BY/>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ </ADMIN-DATA>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="32d49946-be5d-4b62-afd8-4976df341ab6">\r
+ <SHORT-NAME>tiny_ppc</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION>\r
+ <REVISION-LABEL>Rev 2</REVISION-LABEL>\r
+ </DOC-REVISION>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">Undefined MCU</SD>\r
+ <SD GID="AUTHOR">ArcCore AB</SD>\r
+ <SD GID="COPYRIGHT">Copyright ArcCore AB 2010</SD>\r
+ <SD GID="GENDIR"></SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/tiny_ppc/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="d9b75d00-e6eb-4671-a7cf-0abd1e1ed6a7">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="5ceca27a-71ff-4c71-bcb8-69a1f31f5d79">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="185f3281-13f7-459b-9ccd-66eb1aff52ca">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4c1d9bd6-69e7-48c8-8036-35c6279f2240">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="fbcd933e-5944-44dd-ac92-f9eace6bb55c">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="41f28680-c88e-4083-bacc-40cf82ec3122">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="53d449ae-bdbe-49cb-bb22-141480e62565">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b5120b2f-2b4e-4e0f-8a7f-c7466b489644">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="759524bb-836c-4d61-b59a-cf8edfb6e162">\r
+ <SHORT-NAME>Alarm_4ms</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_ppc/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="45cda08c-e07f-4670-8f14-b85acb209a6f">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5801fbe7-6b9b-4390-9341-2dd9ab4412f5">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_ppc/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_ppc/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f289efa7-5957-47a1-9c32-2248195ca090">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6dde7c3-6596-4a33-96ab-3a43d4ab1429">\r
+ <SHORT-NAME>EVENT_0</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d93f5687-240e-465d-afb4-da563598d37a">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="94eef554-c26c-44d5-9b8f-501597b53d51">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
#define CANIF_AR_PATCH_VERSION 2
#define CANIF_SW_MAJOR_VERSION 1
-#define CANIF_SW_MINOR_VERSION 0
+#define CANIF_SW_MINOR_VERSION 1
#define CANIF_SW_PATCH_VERSION 0
#include "Det.h"
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/** @addtogroup TBD\r
+ * @{ */\r
+\r
+/** @file CanTp.h\r
+ * TBD.\r
+ */\r
+\r
+/** @req CANTP157 */\r
+\r
+#ifndef CANTP_H_\r
+#define CANTP_H_\r
+\r
+#define CANTP_SW_MAJOR_VERSION 1\r
+#define CANTP_SW_MINOR_VERSION 0\r
+#define CANTP_SW_PATCH_VERSION 0\r
+#define CANTP_AR_MAJOR_VERSION 3\r
+#define CANTP_AR_MINOR_VERSION 0\r
+#define CANTP_AR_PATCH_VERSION 1\r
+\r
+\r
+#include "ComStack_Types.h"\r
+#include "Std_Types.h"\r
+#include "CanTp_Cfg.h" /** @req CANTP221 */\r
+//#include "Dem.h" // TODO: req: CanTp156\r
+\r
+/*\r
+ *\r
+ * Errors described by CanTp 7.4 Error classification.\r
+ *\r
+ ****************************/\r
+\r
+#define CANTP_E_PARAM_CONFIG 0x01\r
+#define CANTP_E_PARAM_ID 0x02\r
+#define CANTP_E_PARAM_ADDRESS 0x04\r
+\r
+#define CANTP_E_UNINIT 0x20\r
+#define CANTP_E_INVALID_TX_ID 0x30\r
+#define CANTP_E_INVALID_RX_ID 0x40\r
+#define CANTP_E_INVALID_TX_BUFFER 0x50\r
+#define CANTP_E_INVALID_RX_BUFFER 0x60\r
+#define CANTP_E_INVALID_TX_LENGHT 0x70\r
+#define CANTP_E_INVALID_RX_LENGTH 0x80\r
+#define CANTP_E_INVALID_TATYPE 0x90\r
+\r
+/*\r
+ * Service IDs for CanTP function definitions.
+ */\r
+\r
+#define SERVICE_ID_CANTP_INIT 0x01\r
+#define SERVICE_ID_CANTP_GET_VERSION_INFO 0x07\r
+#define SERVICE_ID_CANTP_SHUTDOWN 0x02\r
+#define SERVICE_ID_CANTP_TRANSMIT 0x03\r
+#define SERVICE_ID_CANTP_CANCEL_TRANSMIT_REQUEST 0x03\r
+#define SERVICE_ID_CANTP_MAIN_FUNCTION 0x06\r
+#define SERVICE_ID_CANTP_RX_INDICATION 0x04\r
+#define SERVICE_ID_CANTP_TX_CONFIRMATION 0x05\r
+\r
+\r
+/*\r
+ * Structs\r
+ ****************************/\r
+\r
+typedef enum {\r
+ FRTP_CNLDO,\r
+ FRTP_CNLNB,\r
+ FRTP_CNLOR\r
+} FrTp_CancelReasonType;\r
+\r
+\r
+\r
+/*\r
+ * Implemented functions\r
+ ****************************/\r
+\r
+void CanTp_Init(); /** req : CanTp208 **/\r
+\r
+void CanTp_GetVersionInfo( Std_VersionInfoType* versioninfo ); /** req : CanTp210 **/\r
+\r
+void CanTp_Shutdown();\r
+\r
+Std_ReturnType CanTp_Transmit( PduIdType CanTpTxSduId, const PduInfoType * CanTpTxInfoPtr );\r
+\r
+Std_ReturnType FrTp_CancelTransmitRequest( PduIdType FrTpTxPduId, FrTp_CancelReasonType FrTpCancelReason );\r
+\r
+void CanTp_MainFunction();\r
+\r
+\r
+#endif /* CANTP_H_ */\r
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-#ifndef PDUR_IPDUM_H_\r
-#define PDUR_IPDUM_H_\r
-\r
-#include "PduR.h"\r
-\r
-#ifdef PDUR_IPDUM_SUPPORT\r
-\r
-Std_ReturnType PduR_IpdumTransmit(PduIdType IpdumTxPduId, const PduInfoType* PduInfoPtr);\r
-\r
-void PduR_IpdumTxConfirmation(PduIdType IpdumLoTxPduId);\r
-\r
-void PduR_IpdumRxIndication(PduIdType IpdumLoRxPduId, const uint8* IpdumSduPtr);\r
-\r
-#endif\r
-\r
-#endif /* PDUR_IPDUM_H_ */\r
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/** @addtogroup TBD\r
+ * @{ */\r
+\r
+/** @file CanTp_Cbk.h\r
+ * TBD.\r
+ */\r
+\r
+/** req: **/\r
+#ifndef CANTP_CBK_H_\r
+#define CANTP_CBK_H_\r
+\r
+#include "ComStack_Types.h"\r
+\r
+\r
+void CanTp_RxIndication( PduIdType CanTpRxPduId, const PduInfoType *CanTpRxPduPtr );\r
+\r
+void CanTp_TxConfirmation( PduIdType CanTpTxPduId );\r
+\r
+\r
+#endif /* CANTP_CBK_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+/** @req CANTP160 */\r
+\r
+#ifndef CANTP_TYPES_H_\r
+#define CANTP_TYPES_H_\r
+\r
+#include "Platform_Types.h"\r
+#include "ComStack_Types.h"\r
+\r
+// - - - - - - - - - - -\r
+\r
+typedef enum {\r
+ CANTP_NOT_LAST_ENTRY, CANTP_END_OF_LIST\r
+} CanTp_ListItemType;\r
+\r
+\r
+typedef enum {\r
+ CANTP_EXTENDED, CANTP_STANDARD\r
+} CanTp_AddressingFormantType;\r
+\r
+typedef enum {\r
+ CANTP_OFF, CANTP_ON\r
+} CanTp_StateType;\r
+\r
+typedef enum { /* req: CanTp030 */\r
+ CANTP_RX_WAIT,\r
+ CANTP_RX_PROCESSING,\r
+ CANTP_TX_WAIT,\r
+ CANTP_TX_PROCESSING\r
+} CanTp_TransferInstanceMode;\r
+\r
+\r
+typedef enum {\r
+ CANTP_FUNCTIONAL, CANTP_PHYSICAL\r
+} CanTp_TaTypeType;\r
+\r
+\r
+typedef struct {\r
+ uint32 CanTpNSa; /** req: CanTp254 */\r
+} CanTp_NSaType; /** req: CanTp256: .. */\r
+\r
+typedef struct {\r
+ uint32 CanTpNTa; /** req: CanTp255 */\r
+} CanTp_NTaType;\r
+\r
+typedef struct {\r
+ const uint32 CanTpRxNPduId; /** req: CanTp258: */\r
+ const uint32 CanTpRxNPduRef; /** req: CanTp257: */\r
+} CanTp_RxNPduType;\r
+\r
+typedef struct {\r
+ const uint32 CanTpTxNPduId; /** req: CanTp258: */\r
+ const uint32 CanTpTxNPduRef; /** req: CanTp257: */\r
+} CanTp_TxNPduType;\r
+\r
+typedef struct {\r
+ const uint32 CanTpTxFcNPduRef; /** req: CanTp259: Reference to a PDU in the COM stack. */\r
+} CanTp_TxFcNPduType;\r
+\r
+typedef struct {\r
+ const uint32 CanTpRxFcNPduRef; /** req: CanTp259: Reference to a PDU in the COM stack. */\r
+ const uint32 CanTpRxFcNPduId; /** req: CanTp274: */\r
+} CanTp_RxFcNPduType;\r
+\r
+\r
+typedef struct {\r
+ const int CanIf_FcPduId; // The polite CanIf PDU index.\r
+ const int PduR_PduId; // The polite PduR index.\r
+ const CanTp_AddressingFormantType CanTpAddressingFormant;\r
+ const uint8 CanTpBs; /** req: CanTp243: Sets the maximum number of messages of N-PDUs before flow control. */\r
+ const uint16 CanTpNar; /** req: CanTp244: Timeout for transmission of a CAN frame (ms). */\r
+ const uint16 CanTpNbr; /** req: CanTp245: ?? */\r
+ const uint16 CanTpNcr; /** req: CanTp246: Time out for consecutive frames (ms). */\r
+ const uint8 CanTpRxChannel; /* Connection to runtime variable index, see CanTp 266. */\r
+ const uint16 CanTpRxDI; /** req: CanTp248: Data length code for of this RxNsdu. */\r
+ CanTp_StateType CanTpRxPaddingActivation; /** req: CanTp249: Enable use of padding. */\r
+ CanTp_TaTypeType CanTpRxTaType; /** req: CanTp250: Functional or physical addressing. */\r
+ const uint8 CanTpWftMax; /** req: CanTp251: Max number FC wait that can be transmitted consecutively. */\r
+ const uint16 CanTpSTmin; /** req: CanTp252: Minimum time the sender shall wait between transmissions of two N-PDU. */\r
+ /*const uint32 CanTpNSduRef ** req: CanTp241. This is PDU id - typeless enum. */\r
+ const CanTp_NSaType *CanTpNSa;\r
+ const CanTp_NTaType *CanTpNTa;\r
+ //CanTp_RxNPduType *CanTpRxNPdu;\r
+ //CanTp_TxFcNPduType *CanTpTxFcNPdu;\r
+ //const PduIdType CanTpRxPduId;\r
+\r
+} CanTp_RxNSduType;\r
+\r
+typedef struct {\r
+ const int CanIf_PduId; // The polite CanIf index.\r
+ const int PduR_PduId; // The polite PduR index.\r
+ const CanTp_AddressingFormantType CanTpAddressingMode; /** req: CanTp138: */\r
+ const uint16 CanTpNas; /** req: CanTp263: N_As timeout for transmission of any CAN frame. */\r
+ const uint16 CanTpNbs; /** req: CanTp264: N_Bs timeout of transmission until reception of next Flow Control. */\r
+ const uint16 CanTpNcs; /** req: CanTp265: N_Bs timeout of transmission until reception of next Flow Control. */\r
+ const uint8 CanTpTxChannel; /** req: CanTp266: Link to the TX connection channel (why?). */\r
+ const uint16 CanTpTxDI; /** req: CanTp267: Data length code for of this TxNsdu. */\r
+ /*const uint32 CanTpTxNSduId; / ** req: CanTp268: Data length code for of this TxNsdu. */\r
+ CanTp_StateType CanTpTxPaddingActivation; /** req: CanTp249: Enable use of padding. */\r
+ CanTp_TaTypeType CanTpTxTaType; /** req: CanTp270: Functional or physical addressing. */\r
+ /*const uint32 CanTpNSduRef ** req: CanTp261. This is PDU id - typeless enum. */\r
+ const CanTp_NSaType *CanTpNSa;\r
+ const CanTp_NTaType *CanTpNTa;\r
+ //CanTp_RxFcNPduType *CanTpRxFcNPdu;\r
+ //CanTp_TxNPduType *CanTpTxNPdu;\r
+ //PduIdType CanTpTxPduId;\r
+\r
+} CanTp_TxNSduType; /** req: CanTp138: */\r
+\r
+// - - - - - - - - - - -\r
+\r
+// These constants needs to move later.\r
+#define CANTP_DEV_ERROR_DETECT STD_ON /** req: CanTp239, development error detection on/off. */\r
+#define CANTP_MAIN_FUNCTION_PERIOD 0.1250 /** req: CanTp240, allow to configure time for MainFunction. */\r
+#define CANTP_TC STD_ON /** req: CanTp242, enabling transmit Cancellation. */\r
+\r
+typedef struct {\r
+ uint32 main_function_period; /** req: CanTp240: ?? */\r
+} CanTp_GeneralType;\r
+\r
+// - - - - - - - - - - -\r
+\r
+typedef enum {\r
+ IS015765_TRANSMIT, ISO15765_RECEIVE\r
+} CanTp_DirectionType;\r
+\r
+\r
+// - - - - - - - - - - -\r
+\r
+typedef struct {\r
+ const CanTp_DirectionType direction;\r
+ const CanTp_ListItemType listItemType;\r
+ union {\r
+ const CanTp_RxNSduType CanTpRxNSdu;\r
+ const CanTp_TxNSduType CanTpTxNSdu;\r
+ } configData;\r
+} CanTp_NSduType;\r
+\r
+// - - - - - - - - - - -\r
+\r
+/** Top level config container for CANTP implementation. */\r
+typedef struct {\r
+ /** General configuration paramters for the CANTP module. */\r
+ const CanTp_GeneralType *CanTpGeneral; // 10.2.3\r
+\r
+ /** */\r
+ const CanTp_NSduType *CanTpNSduList;\r
+\r
+ /** */\r
+ //const CanTp_RxNSduType *CanTpRxNSduList;\r
+\r
+ /** This container contains the init parameters of the CAN Interface. */\r
+ //const CanTp_TxNSduType *CanTpTxNSduList;\r
+\r
+} CanTp_ConfigType;\r
+\r
+#endif /* CANTP_TYPES_H_ */\r
*/\r
\r
typedef enum {\r
- BEFREQ_OK=0,\r
- BEFREQ_NOT_OK,\r
- BEFREQ_BUSY,\r
- BEFREQ_OVFL,\r
+ BUFREQ_OK=0,\r
+ BUFREQ_NOT_OK,\r
+ BUFREQ_BUSY,\r
+ BUFREQ_OVFL,\r
} BufReq_ReturnType;\r
\r
// 0x00--0x1e General return types\r
// more\r
typedef uint8 NotifResultType;\r
\r
-#define NTFRSLT_OK 0\r
-#define NTFRSLT_NOT_OK 1\r
+#define NTFRSLT_OK 0x00\r
+#define NTFRSLT_E_NOT_OK 0x01
+#define NTFRSLT_E_WRONG_SN 0x05
+#define NTFRSLT_E_NO_BUFFER 0x09
+
+\r
// TODO, more\r
\r
typedef uint8 BusTrcvErrorType;\r
*/
+
#ifndef COM_TYPES_H_\r
-#define COM_TYPES_H_\r
+#define COM_TYPES_H_
+\r
\r
#include "ComStack_Types.h"\r
-#include "Com_Cfg.h"\r
\r
typedef uint8 Com_PduGroupIdType;\r
typedef uint16 Com_SignalIdType;\r
SINT8,\r
SINT16,\r
SINT32\r
-} Com_SignalType;\r
+} Com_SignalType;
+
+#define COM_SIGNALTYPE_UNSIGNED FALSE
+#define COM_SIGNALTYPE_SIGNED TRUE\r
\r
typedef enum {\r
PENDING,\r
type == SINT8 ? sizeof(sint8) : \\r
type == SINT16 ? sizeof(sint16) : \\r
type == SINT32 ? sizeof(sint32) : sizeof(boolean)) \\r
+
+#define SignalTypeSignedness(type) \
+ ((type == SINT8 || type == SINT16 || type == SINT32) ? \
+ COM_SIGNALTYPE_SIGNED : COM_SIGNALTYPE_UNSIGNED)
\r
/** Filter configuration type.
* NOT SUPPORTED
const ComSignalEndianess_type ComSignalEndianess;\r
\r
/** Value used to initialize this signal. */
- const uint32 ComSignalInitValue;\r
-\r
- /** The number of bytes if the signal has type UINT8_N;
- * Range 1 to 8.
- */\r
- const uint8 ComSignalLength;\r
+ const void *ComSignalInitValue;\r
\r
/** Defines the type of the signal. */
const Com_SignalType ComSignalType;\r
/** Identifier for the signal.
* Should be the same value as the index in the COM signal array.
*/\r
- const uint8 ComHandleId;\r
+ const uint16 ComHandleId;\r
\r
/** Tx and Rx notification function. */
void (*ComNotification) (void);\r
const ComSignalEndianess_type ComSignalEndianess;\r
\r
/** Value used to initialized this signal. */
- const uint32 ComSignalInitValue;\r
+ const void *ComSignalInitValue;\r
\r
/** The number of bytes if the signal has type UINT8_N;
* Range 1 to 8.
/** Array of group signals.
* Only applicable if this signal is a signal group.
*/
- const ComGroupSignal_type *ComGroupSignal[COM_MAX_NR_SIGNALS_PER_SIGNAL_GROUP];\r
+ const ComGroupSignal_type **ComGroupSignal;\r
//void *Com_Arc_ShadowBuffer;\r
\r
\r
/** The ID of this IPDU. */
- const uint8 ComIPduRxHandleId;\r
+ const uint8 ComIPduRxHandleId;
+
+ /** The outgoing PDU id. For polite PDU id handling. */
+ const uint8 ArcIPduOutgoingId;\r
\r
/** Signal processing mode for this IPDU. */
const Com_IPduSignalProcessingMode ComIPduSignalProcessing;\r
/** Container of transmission related parameters. */
const ComTxIPdu_type ComTxIPdu;\r
\r
- /** References to all signal groups contained in this IPDU.
+ /** References to all signals and signal groups contained in this IPDU.
* It probably makes little sense not to define at least one signal or signal group for each IPDU.
*/\r
- const ComSignal_type *ComIPduSignalGroupRef[COM_MAX_NR_SIGNALS_PER_IPDU];\r
-\r
-\r
- /** References to all signals contained in this IPDU.
- * It probably makes little sense not to define at least one signal or signal group for each IPDU.
- */\r
- //const uint8 NComIPduSignalRef;\r
- const ComSignal_type *ComIPduSignalRef[COM_MAX_NR_SIGNALS_PER_IPDU];\r
+ const ComSignal_type **ComIPduSignalRef;\r
\r
/*\r
* The following two variables are used to control the per I-PDU based Rx/Tx-deadline monitoring.\r
/* Transmission related timers and parameters.
* These are internal variables and should not be configured.
*/
- //ComTxIPduTimer_type Com_Arc_TxIPduTimers;
-
- /* Pointer to data storage of this IPDU.
- */
- //void *ComIPduDataPtr;
-\r
+ //ComTxIPduTimer_type Com_Arc_TxIPduTimers;\r
/** Marks the end of list for this configuration array. */
const uint8 Com_Arc_EOL;\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+#ifndef DCM_H_\r
+#define DCM_H_\r
+
+#define DCM_SW_MAJOR_VERSION 1
+#define DCM_SW_MINOR_VERSION 0
+#define DCM_SW_PATCH_VERSION 0
+#define DCM_AR_MAJOR_VERSION 3
+#define DCM_AR_MINOR_VERSION 0
+#define DCM_AR_PATCH_VERSION 1
+
+#include "Dcm_Types.h"
+#include "Dcm_Cfg.h"
+#include "Dcm_Lcfg.h"
+#include "ComStack_Types.h"
+#include "Dcm_Cbk.h"
+
+#if (DCM_DEV_ERROR_DETECT == STD_ON)
+// Error codes produced by this module
+#define DCM_E_CONFIG_INVALID 0x41
+#define DCM_E_UNEXPECTED_PARAM 0x42
+#define DCM_E_NOT_IMPLEMENTED_YET 0xff
+
+// Service ID in this module
+#define DCM_INIT_ID 0x01
+#define DCM_HANDLE_RESPONSE_TRANSMISSION 0x80
+#define DCM_UDS_READ_DTC_INFO 0x81
+#define DCM_GLOBAL_ID 0xff
+
+#endif
+
+/*
+ * Interfaces for BSW components (8.3.1)
+ */
+#if (DCM_VERSION_INFO_API == STD_ON)
+void Dcm_GetVersionInfo(Std_VersionInfoType *versionInfo);
+#endif /* DCM_VERSION_INFO_API */
+
+void Dcm_Init( void );
+
+
+/*
+ * Interfaces for BSW modules and to SW-Cs (8.3.2)
+ */
+Std_ReturnType Dcm_GetSecurityLevel(Dcm_SecLevelType *secLevel);
+Std_ReturnType Dcm_GetSesCtrlType(Dcm_SesCtrlType *sesCtrlType);
+Std_ReturnType Dcm_GetActiveProtocol(Dcm_ProtocolType *activeProtocol);
+
+/*
+ * Interface for basic software scheduler (8.5)
+ */
+void Dcm_MainFunction( void );
+
+
+#endif /*DCM_H_*/\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+#ifndef DCM_CBK_H_\r
+#define DCM_CBK_H_
+
+#include "ComStack_Types.h"\r
+\r
+/*
+ * Interfaces for callback notifications from PduR and ComM (8.4)
+ */
+BufReq_ReturnType Dcm_ProvideRxBuffer(PduIdType dcmRxPduId, PduLengthType tpSduLength, PduInfoType **pduInfoPtr);
+void Dcm_RxIndication(PduIdType dcmRxPduId, NotifResultType result);
+BufReq_ReturnType Dcm_ProvideTxBuffer(PduIdType dcmTxPduId, PduInfoType **pduInfoPtr, PduLengthType length);
+void Dcm_TxConfirmation(PduIdType dcmTxPduId, NotifResultType result);
+void Dcm_ComM_NoComModeEntered(void);
+void Dcm_ComM_SilentComModeEntered(void);
+void Dcm_ComM_FullComModeEntered(void);
+\r
+#endif /*DCM_CBK_H_*/\r
#define DEM_E_PRI_MEM_EVENT_BUFF_FULL 0x43
#define DEM_E_PRI_MEM_EXT_DATA_BUFF_FULL 0x44
+#define DEM_E_UNEXPECTED_EXECUTION 0xfe
#define DEM_E_NOT_IMPLEMENTED_YET 0xff
// Service ID in this module
-#define DEM_PREINIT_ID 0x01
-#define DEM_INIT_ID 0x02
-#define DEM_SETEVENTSTATUS_ID 0x10
-#define DEM_RESETEVENTSTATUS_ID 0x11
-#define DEM_GETEVENTSTATUS_ID 0x12
-#define DEM_GETEVENTFAILED_ID 0x13
-#define DEM_GETEVENTTESTED_ID 0x14
-#define DEM_GETFAULTDETECTIONCOUNTER_ID 0x15
-#define DEM_SETOPERATIONCYCLESTATE_ID 0x16
-#define DEM_REPORTERRORSTATUS_ID 0x20
-
-#define DEM_UPDATE_EVENT_STATUS_ID 0x40
-#define DEM_MERGE_EVENT_STATUS_ID 0x41
-#define DEM_GET_EXTENDED_DATA_ID 0x42
-#define DEM_STORE_EXT_DATA_PRE_INIT_ID 0x43
-#define DEM_STORE_EVENT_PRI_MEM_ID 0x44
-#define DEM_STORE_EXT_DATA_PRI_MEM_ID 0x45
-
-#define DEM_GLOBAL_ID 0xff
+#define DEM_PREINIT_ID 0x01
+#define DEM_INIT_ID 0x02
+#define DEM_SETEVENTSTATUS_ID 0x04
+#define DEM_RESETEVENTSTATUS_ID 0x05
+#define DEM_SETOPERATIONCYCLESTATE_ID 0x08
+#define DEM_GETEVENTSTATUS_ID 0x0A
+#define DEM_GETEVENTFAILED_ID 0x0B
+#define DEM_GETEVENTTESTED_ID 0x0C
+#define DEM_REPORTERRORSTATUS_ID 0x0F
+#define DEM_GETEXTENDEDDATARECORDBYDTC_ID 0x20
+#define DEM_CLEARDTC_ID 0x22
+#define DEM_GETFAULTDETECTIONCOUNTER_ID 0x3E
+
+#define DEM_UPDATE_EVENT_STATUS_ID 0x80
+#define DEM_MERGE_EVENT_STATUS_ID 0x81
+#define DEM_GET_EXTENDED_DATA_ID 0x82
+#define DEM_STORE_EXT_DATA_PRE_INIT_ID 0x83
+#define DEM_STORE_EVENT_PRI_MEM_ID 0x84
+#define DEM_STORE_EXT_DATA_PRI_MEM_ID 0x85
+
+#define DEM_GLOBAL_ID 0xff
#endif
Std_ReturnType Dem_GetEventTested(Dem_EventIdType eventId, boolean *eventTested);
Std_ReturnType Dem_GetFaultDetectionCounter(Dem_EventIdType eventId, sint8 *counter);
Std_ReturnType Dem_SetOperationCycleState(Dem_OperationCycleIdType OperationCycleId, Dem_OperationCycleStateType CycleState);
+Std_ReturnType Dem_GetDTCOfEvent(Dem_EventIdType eventId, Dem_DTCKindType dtcKind, uint32* dtcOfEvent);
/*
/*
* Interface DCM <-> DEM (8.3.5)
*/
+Dem_ReturnClearDTCType Dem_ClearDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin);
+Dem_ReturnSetDTCFilterType Dem_SetDTCFilter(uint8 dtcStatusMask,
+ Dem_DTCKindType dtcKind,
+ Dem_DTCOriginType dtcOrigin,
+ Dem_FilterWithSeverityType filterWithSeverity,
+ Dem_DTCSeverityType dtcSeverityMask,
+ Dem_FilterForFDCType filterForFaultDetectionCounter);
+Dem_ReturnGetStatusOfDTCType Dem_GetStatusOfDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, Dem_EventStatusExtendedType* dtcStatus);
+Std_ReturnType Dem_GetDTCStatusAvailabilityMask(uint8 *dtcStatusMask);
+Dem_ReturnGetNumberOfFilteredDTCType Dem_GetNumberOfFilteredDtc(uint16* numberOfFilteredDTC);
+Dem_ReturnGetNextFilteredDTCType Dem_GetNextFilteredDTC(uint32* dtc, Dem_EventStatusExtendedType* dtcStatus);
+Dem_ReturnTypeOfDtcSupportedType Dem_GetTranslationType(void);
+Dem_ReturnControlDTCStorageType Dem_DisableDTCStorage(Dem_DTCGroupType dtcGroup, Dem_DTCKindType dtcKind);
+Dem_ReturnControlDTCStorageType Dem_EnableDTCStorage(Dem_DTCGroupType dtcGroup, Dem_DTCKindType dtcKind);
+Dem_ReturnGetExtendedDataRecordByDTCType Dem_GetExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint8 *destBuffer, uint8 *bufSize);
+Dem_ReturnGetSizeOfExtendedDataRecordByDTCType Dem_GetSizeOfExtendedDataRecordByDTC(uint32 dtc, Dem_DTCKindType dtcKind, Dem_DTCOriginType dtcOrigin, uint8 extendedDataNumber, uint16 *sizeOfExtendedDataRecord);
+
/*
* for more details.
* -------------------------------- Arctic Core ------------------------------*/
+#ifndef DIO_H_
+#define DIO_H_
+#include "Std_Types.h" /** @req DIO131 */
+// API Service ID's
+#define DIO_READCHANNEL_ID 0x00
+#define DIO_WRITECHANNEL_ID 0x01
+#define DIO_READPORT_ID 0x02
+#define DIO_WRITEPORT_ID 0x03
+#define DIO_READCHANNELGROUP_ID 0x04
+#define DIO_WRITECHANNELGROUP_ID 0x05
+#define DIO_GETVERSIONINFO_ID 0x12
-
-
-
-
-#ifndef DIO_H_\r
-#define DIO_H_\r
-\r
-#include "Std_Types.h"\r
-\r
-// API Service ID's\r
-#define DIO_READCHANNEL_ID 0x00\r
-#define DIO_WRITECHANNEL_ID 0x01\r
-#define DIO_READPORT_ID 0x02\r
-#define DIO_WRITEPORT_ID 0x03\r
-#define DIO_READCHANNELGROUP_ID 0x04\r
-#define DIO_WRITECHANNELGROUP_ID 0x05\r
-#define DIO_GETVERSIONINFO_ID 0x12\r
-\r
-#define DIO_E_PARAM_INVALID_CHANNEL_ID 10\r
-#define DIO_E_PARAM_INVALID_PORT_ID 20\r
-#define DIO_E_PARAM_INVALID_GROUP_ID 31\r
-\r
-typedef uint32 Dio_ChannelType;\r
-typedef uint32 Dio_PortType;\r
-typedef struct\r
-{\r
- Dio_PortType port;\r
- uint8 offset;\r
- uint32 mask;\r
-} Dio_ChannelGroupType;\r
-\r
-#if 0 // Gone from 3.0\r
-typedef enum\r
-{\r
- STD_LOW,\r
- STD_HIGH,\r
-}Dio_LevelType;\r
-#endif\r
-\r
-typedef uint32 Dio_LevelType;\r
-\r
-typedef uint16 Dio_PortLevelType;\r
+#define DIO_E_PARAM_INVALID_CHANNEL_ID 10
+#define DIO_E_PARAM_INVALID_PORT_ID 20
+#define DIO_E_PARAM_INVALID_GROUP_ID 31
#define DIO_SW_MAJOR_VERSION 1
#define DIO_SW_MINOR_VERSION 0
#define DIO_AR_MAJOR_VERSION 2
#define DIO_AR_MINOR_VERSION 2
#define DIO_AR_PATCH_VERSION 1
-\r
-#include "Dio_Cfg.h"\r
-\r
-#if ( DIO_VERSION_INFO_API == STD_ON)\r
-void Dio_GetVersionInfo( Std_VersionInfoType *versionInfo );\r
-#endif\r
-\r
-Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId);\r
-void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level);\r
-Dio_PortLevelType Dio_ReadPort(Dio_PortType portId);\r
-void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level);\r
-Dio_PortLevelType Dio_ReadChannelGroup( const Dio_ChannelGroupType *channelGroupIdPtr );\r
-void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr, Dio_PortLevelType level);\r
-\r
-#endif /*DIO_H_*/\r
+#include "Dio_Cfg.h"
+
+/** @req DIO124 */
+#if ( DIO_VERSION_INFO_API == STD_ON)
+/** @req DIO139 */
+void Dio_GetVersionInfo( Std_VersionInfoType *versionInfo );
+#endif
+
+/** @req DIO133 */
+/** @req DIO027 */
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId);
+/** @req DIO134 */
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level);
+
+/** @req DIO135 */
+/** @req DIO031 */
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId);
+/** @req DIO136 */
+void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level);
+
+/** @req DIO137 */
+Dio_PortLevelType Dio_ReadChannelGroup( const Dio_ChannelGroupType *channelGroupIdPtr );
+/** @req DIO138 */
+void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr, Dio_PortLevelType level);
+
+#endif /*DIO_H_*/
#ifndef _PDUR_H_
#define _PDUR_H_
-#define PDUR_VENDOR_ID 1
+#define PDUR_VENDOR_ID 1
#define PDUR_AR_MAJOR_VERSION 2
-#define PDUR_AR_MINOR_VERSION 2
-#define PDUR_AR_PATCH_VERSION 2
-#define PDUR_SW_MAJOR_VERSION 3
-#define PDUR_SW_MINOR_VERSION 0
-#define PDUR_SW_PATCH_VERSION 2
+#define PDUR_AR_MINOR_VERSION 2
+#define PDUR_AR_PATCH_VERSION 2
+#define PDUR_SW_MAJOR_VERSION 1
+#define PDUR_SW_MINOR_VERSION 0
+#define PDUR_SW_PATCH_VERSION 0
-#include "debug.h"
+
+
+// ERROR CODES
+#define PDUR_E_CONFIG_PTR_INVALID 0x06
+#define PDUR_E_INVALID_REQUEST 0x01
+#define PDUR_E_PDU_ID_INVALID 0x02
+#define PDUR_E_TP_TX_REQ_REJECTED 0x03
+#define PDUR_E_DATA_PTR_INVALID 0x05
+
+#define PDUR_INSTANCE_ID 0
+
+#include "modules.h"
#include "PduR_Cfg.h"
#include "PduR_Types.h"
-
-#ifndef PDUR_ZERO_COST_OPERATION
#include "PduR_PbCfg.h"
-#endif
#include "PduR_Com.h"
#include "PduR_CanIf.h"
#include "PduR_LinIf.h"
+#include "PduR_CanTp.h"
+#include "PduR_Dcm.h"
+
+
/* Contain the current state of the PDU router. The router is uninitialized
* until PduR_Init has been run.
extern const PduR_PBConfigType *PduRConfig;
-#ifdef PDUR_PRINT_DEBUG_STATEMENTS
-/* A simple debug macro to be used instead of printf(). This way all print
- * statements are turned off if PDUR_PRINT_DEBUG_STATEMENTS is undefined.
- */
-//#include <stdio.h>
-#define debug(...) printf(__VA_ARGS__)
-
-#else
-#define debug(...)
-
-#endif
-
-#ifdef PDUR_REENTRANCY_CHECK
-/*
- * The macros Enter and Exit performs the ReEntrancy check of the PDU router functions.
- * Enter shall be called at the beginning of the function with the current PduId and the wanted
- * return value (possibly nothing for void methods).
- * Exit should be called at the end of the function where reentrancy is desirable.
- */
-#define Enter(PduId,...) \
- static uint8 entered;\
- static PduIdType enteredId;\
- if (entered && enteredId == PduId) { \
- debug("Function already entered. EnteredId: %d, CurrentId: %d. Exiting.\n", enteredId, PduId); \
- return __VA_ARGS__; \
- } else { \
- entered = 1; \
- enteredId = PduId; \
- } \
-
-
-#define Exit() \
- entered = 0; \
-
-#else
-#define Enter(...)
-#define Exit()
-#endif
-
-#ifdef PDUR_DEV_ERROR_DETECT
+#if (PDUR_DEV_ERROR_DETECT == STD_ON)
#undef DET_REPORTERROR
#define DET_REPORTERROR(_x,_y,_z,_q) Det_ReportError(_x,_y,_z,_q)
// TODO Implement data range check if needed.
#define DevCheck(PduId,PduPtr,ApiId,...) \
if (PduRState == PDUR_UNINIT || PduRState == PDUR_REDUCED) { \
- DET_REPORTERROR(PDUR_MODULE_ID, PDUR_INSTANCE_ID, ApiId, PDUR_E_INVALID_REQUEST); \
+ DET_REPORTERROR(MODULE_ID_PDUR, PDUR_INSTANCE_ID, ApiId, PDUR_E_INVALID_REQUEST); \
DEBUG(DEBUG_LOW,"PDU Router not initialized. Routing request ignored.\n"); \
- Exit(); \
return __VA_ARGS__; \
} \
if (PduPtr == 0 && PDUR_DEV_ERROR_DETECT) { \
- DET_REPORTERROR(PDUR_MODULE_ID, PDUR_INSTANCE_ID, ApiId, PDUR_E_DATA_PTR_INVALID); \
- Exit(); \
+ DET_REPORTERROR(MODULE_ID_PDUR, PDUR_INSTANCE_ID, ApiId, PDUR_E_DATA_PTR_INVALID); \
return __VA_ARGS__; \
} \
if ((PduId >= PduRConfig->PduRRoutingTable->NRoutingPaths) && PDUR_DEV_ERROR_DETECT) { \
- DET_REPORTERROR(PDUR_MODULE_ID, PDUR_INSTANCE_ID, ApiId, PDUR_E_PDU_ID_INVALID); \
- Exit(); \
+ DET_REPORTERROR(MODULE_ID_PDUR, PDUR_INSTANCE_ID, ApiId, PDUR_E_PDU_ID_INVALID); \
return __VA_ARGS__; \
} \
/* Zero Cost Operation function definitions
* These macros replaces the original functions if zero cost
* operation is desired. */
-#ifdef PDUR_ZERO_COST_OPERATION
+#if PDUR_ZERO_COST_OPERATION == STD_ON
#define PduR_Init(...)
#define PduR_GetVersionInfo(...)
#define PduR_GetConfigurationId(...) 0
#else // Not zero cost operation
+//#error fail
void PduR_Init(const PduR_PBConfigType* ConfigPtr);
void PduR_GetVersionInfo(Std_VersionInfoType* versionInfo);
uint32 PduR_GetConfigurationId();
* API and type definitions for Port Driver.
*/
-#ifndef PORT_H_\r
-#define PORT_H_\r
+#ifndef PORT_H_
+#define PORT_H_
-#define PORT_SW_MAJOR_VERSION 1
-#define PORT_SW_MINOR_VERSION 0
-#define PORT_SW_PATCH_VERSION 0
+#define PORT_SW_MAJOR_VERSION 1
+#define PORT_SW_MINOR_VERSION 0
+#define PORT_SW_PATCH_VERSION 0
-#define PORT_AR_MAJOR_VERSION 3
-#define PORT_AR_MINOR_VERSION 0
-#define PORT_AR_PATCH_VERSION 2
-\r
-#include "Port_Cfg.h"
-\r
-#if PORT_VERSION_INFO_API == STD_ON\r
-void Port_GetVersionInfo( Std_VersionInfoType *versionInfo );\r
-#endif \r
+#define PORT_AR_MAJOR_VERSION 3
+#define PORT_AR_MINOR_VERSION 1
+#define PORT_AR_PATCH_VERSION 0
+
+#include "Port_Cfg.h" /** @req PORT130 */
+
+#if (PORT_VERSION_INFO_API == STD_ON)
+void
+Port_GetVersionInfo(Std_VersionInfoType *versionInfo);
+#endif
/** @name Error Codes */
-//@{
-#define PORT_E_PARAM_PIN 0x0a\r
-#define PORT_E_DIRECTION_UNCHANGEABLE 0x0b\r
-#define PORT_E_PARAM_CONFIG 0x0c\r
-#define PORT_E_PARAM_INVALID_MODE 0x0d\r
-#define PORT_E_MODE_UNCHANGEABLE 0x0e\r
-#define PORT_E_UNINIT 0x0f\r
+/** @req PORT051 */
+/** @req PORT116 */
+#define PORT_E_PARAM_PIN 0x0a
+#define PORT_E_DIRECTION_UNCHANGEABLE 0x0b
+#define PORT_E_PARAM_CONFIG 0x0c
+#define PORT_E_PARAM_INVALID_MODE 0x0d
+#define PORT_E_MODE_UNCHANGEABLE 0x0e
+#define PORT_E_UNINIT 0x0f
//@}
/** @name Service id's */
//@{
-#define PORT_INIT_ID 0x00\r
-#define PORT_SET_PIN_DIRECTION_ID 0x01\r
-#define PORT_REFRESH_PORT_DIRECTION_ID 0x02\r
-#define PORT_GET_VERSION_INFO_ID 0x03\r
-#define PORT_SET_PIN_MODE_ID 0x04\r
+#define PORT_INIT_ID 0x00
+#define PORT_SET_PIN_DIRECTION_ID 0x01
+#define PORT_REFRESH_PORT_DIRECTION_ID 0x02
+#define PORT_GET_VERSION_INFO_ID 0x03
+#define PORT_SET_PIN_MODE_ID 0x04
//@}
-\r
-/**
- * PORT046: The type Port_PinDirectionType is a type for defining the direction of a Port Pin. \r
- * PORT_PIN_IN Sets port pin as input. \r
- * PORT_PIN_OUT Sets port pin as output. \r
- */\r
-typedef enum\r
-{\r
- PORT_PIN_IN = 0,\r
- PORT_PIN_OUT,\r
-} Port_PinDirectionType;\r
-\r
-typedef uint32 Port_PinModeType;\r
-typedef enum\r
-{\r
- PORT_UNINITIALIZED = 0,\r
- PORT_INITIALIZED,\r
-} Port_StateType;\r
-\r
-void Port_Init( const Port_ConfigType *configType );\r
-void Port_SetPinDirection( Port_PinType pin, Port_PinDirectionType direction );\r
-void Port_RefreshPortDirection( void );\r
-void Port_SetPinMode( Port_PinType Pin, Port_PinModeType Mode );\r
-\r
-#endif /*PORT_H_*/\r
+
+/** @req PORT046
+ * The type Port_PinDirectionType is a type for defining the direction of a Port Pin.
+ * PORT_PIN_IN Sets port pin as input.
+ * PORT_PIN_OUT Sets port pin as output.
+ */
+typedef enum
+{
+ PORT_PIN_IN = 0, PORT_PIN_OUT,
+} Port_PinDirectionType;
+
+void
+Port_Init(const Port_ConfigType *configType);
+#if ( PORT_PIN_DIRECTION_CHANGES_ALLOWED == STD_ON )
+void
+Port_SetPinDirection(Port_PinType pin, Port_PinDirectionType direction);
+#endif
+void
+Port_RefreshPortDirection(void);
+#if (PORT_SET_PIN_MODE_API == STD_ON)
+void
+Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode);
+#endif
+
+#endif /*PORT_H_*/
/** @} */
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-
-
-
-
-
-/*\r
- * Pwm_Cfg.c\r
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
*\r
- * Created on: 2009-jul-09\r
- * Author: nian\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+\r
+/** @addtogroup TBD\r
+ * @{ */\r
+\r
+/** @file schM_CanTp.h\r
+ * TBD.\r
*/\r
\r
-#include "Pwm.h"\r
-#include "Pwm_Cfg.h"\r
-\r
-extern void MyPwmNotificationRoutine(void);\r
-\r
-const Pwm_ConfigType PwmConfig = {\r
- .Channels = {\r
- PWM_CHANNEL_CONFIG(PWM_CHANNEL_1, 3000, 0x6000, PWM_CHANNEL_PRESCALER_4, PWM_HIGH),\r
- PWM_CHANNEL_CONFIG(PWM_CHANNEL_2, 2000, 0x2000, PWM_CHANNEL_PRESCALER_2, PWM_LOW)\r
- },\r
-#if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
- .NotificationHandlers = {\r
- MyPwmNotificationRoutine, // PWM_CHANNEL_1\r
- NULL // PWM_CHANNEL_2\r
- }\r
-#endif\r
-};\r
+\r
+#ifndef SCHM_CANTP_H_\r
+#define SCHM_CANTP_H_\r
+\r
+\r
+#endif /* SCHM_CANTP_H_ */\r
typedef unsigned char StatusType;\r
#endif\r
\r
-#define E_NOT_OK 1\r
+#define E_NOT_OK 1
+
+#define E_NO_DTC_AVAILABLE 2
+#define E_SESSION_NOT_ALLOWED 4
+#define E_PROTOCOL_NOT_ALLOWED 5
+#define E_REQUEST_NOT_ACCEPTED 8
+#define E_REQUEST_ENV_NOK 9
+#define E_PENDING 10
+#define E_COMPARE_KEY_FAILED 11
+#define E_FORCE_RCRRP 12\r
\r
#define STD_HIGH 0x01\r
#define STD_LOW 0x00\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------
- * Arctic Core - the open source AUTOSAR platform http://arccore.com
- *
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
- *
- * This source code is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published by the
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- * -------------------------------- Arctic Core ------------------------------*/
-
-
-
-#ifndef TRACE_H_\r
-#define TRACE_H_\r
-
-\r
-/**\r
- *\r
- * NOTE!!!!\r
- * Do not use this in a header file. Should be used in the *.c file like this.\r
- *\r
- * #define USE_TRACE\r
- * #include "debug.h"\r
- *\r
- * Macro's for debugging and tracing\r
- *\r
- * Define USE_LDEBUG_PRINTF and DBG_LEVEL either globally( e.g. a makefile )\r
- * or in a specific file. The DBG_LEVEL macro controls the amount\r
- * of detail you want in the debug printout.\r
- * There are 3 levels:\r
- * DEBUG_LOW - Used mainly by drivers to get very detailed\r
- * DEBUG_MEDIUM - Medium detail\r
- * DEBUG_HIGH - General init\r
- *\r
- * Example:\r
- * #define DEBUG_LVL DEBUG_HIGH\r
- * DEBUG(DEBUG_HIGH,"Starting GPT");\r
- *\r
- * TRACE\r
- * TODO:\r
- *\r
- */\r
-\r
-#define DEBUG_LOW 1\r
-#define DEBUG_MEDIUM 2\r
-#define DEBUG_HIGH 3\r
-\r
-#ifndef DEBUG_LVL\r
-#define DEBUG_LVL 2\r
-#endif\r
-\r
-#define CH_ISR 0\r
-#define CH_PROC 1\r
-\r
-#if defined(USE_LDEBUG_PRINTF)\r
-#define DEBUG(_level,...) \\r
- do { \\r
- if(_level>=DEBUG_LVL) { \\r
- printf (__VA_ARGS__); \\r
- }; \\r
- } while(0);\r
-\r
-#else\r
-#define DEBUG(_level,...)\r
-#endif\r
-\r
-#if defined(USE_LDEBUG_PRINTF)\r
-#define LDEBUG_PRINTF(format,...) printf(format,## __VA_ARGS__ )\r
-#else\r
-#define LDEBUG_PRINTF(format,...)\r
-#endif\r
-\r
-\r
-#endif /*RAMLOG_H_*/\r
#include "stm32f10x.h"
#include "core_cm3.h"
-#define SIMULATOR() (0==0)
-
/* Call intrinsic functions directly */
#define Irq_Disable() __disable_irq()
#define Irq_Enable() __enable_irq()
-/* TODO: This is of course wrong */
-#define Irq_Save(_flags) _flags =_Irq_Save();
+#define Irq_Save(_flags) _flags = _Irq_Save();
#define Irq_Restore(_flags) _Irq_Restore(_flags);
-
#define Irq_SuspendAll() Irq_Disable()
#define Irq_ResumeAll() Irq_Enable()
-#ifndef TRACE_H_\r
-#define TRACE_H_\r
+#ifndef DEBUG_H_\r
+#define DEBUG_H_\r
\r
/**\r
* NOTE!!!!\r
* Do not use this in a header file. Should be used in the *.c file like this.\r
*\r
- * #define USE_TRACE\r
+ * #define USE_DEBUG_PRINTF\r
* #include "debug.h"\r
*\r
* Macro's for debugging and tracing\r
#endif\r
\r
\r
-#endif /*RAMLOG_H_*/\r
+#endif /*DEBUG_H_*/\r
+++ /dev/null
-\r
-#ifndef SIMPLE_PRINTF_H_\r
-#define SIMPLE_PRINTF_H_\r
-\r
-#if defined(USE_SIMPLE_PRINTF)\r
-int simple_sprintf(char *out, const char *format, ...);\r
-int printf(const char *format, ...);\r
-#define printf(format,...) printf(format,## __VA_ARGS__ )\r
-#else\r
-#define printf(format,...)\r
-#endif\r
-\r
-#endif /* SIMPLE_PRINTF_H_ */\r
export SELECT_OS_CONSOLE\r
export SELECT_CONSOLE\r
export USE_DEBUG_PRINTF\r
-export SELECT_OPT?=OPT_RELEASE\r
-export CFG_$(SELECT_OPT)=y\r
+export SELECT_OPT\r
\r
ifneq ($(filter clean_all,$(MAKECMDGOALS)),clean_all)\r
ifeq (${BOARDDIR},)\r
\r
#===== COMPILER CONFIG =====\r
\r
+# set debug optimization level as default\r
+ifeq ($(SELECT_OPT),)\r
+SELECT_OPT=OPT_DEBUG\r
+endif\r
+\r
+$(eval CFG_$(SELECT_OPT)=y)\r
+\r
ARCH_PATH-y = arch/$(ARCH_FAM)/$(ARCH)\r
\r
# Include compiler generic and arch specific\r
%.s: %.sx\r
@echo " >> CPP $(notdir $<)"\r
$(Q)$(CPP) -x assembler-with-cpp -E -o $@ $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
- $(Q)cp $@ $(ROOTDIR)/\r
\r
\r
# @cat $@ \r
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
-// This file is just examples of implementation for the stubs needed by\r
-// the EcuM. Every Autocore application should use an own version of this\r
-// file to implement the setup and tear down of the system.\r
+/* -------------------------------- Arctic Core ------------------------------
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com
+ *
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
+ *
+ * This source code is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by the
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ * -------------------------------- Arctic Core ------------------------------*/
+
+
+
+
+
+
+
+
+// This file is just examples of implementation for the stubs needed by
+// the EcuM. Every Autocore application should use an own version of this
+// file to implement the setup and tear down of the system.
+
\r
#include "EcuM.h"\r
-#include "Det.h"\r
-#if defined(USE_DEM)\r
-#include "Dem.h"\r
-#endif\r
+#include "Det.h"
+#if defined(USE_DEM)
+#include "Dem.h"
+#endif
#if defined(USE_MCU)\r
#include "Mcu.h"\r
#endif\r
#if defined(USE_COM)\r
#include "Com.h"\r
#endif\r
+#if defined(USE_CANTP)
+#include "CanTp.h"
+#endif
+#if defined(USE_DCM)
+#include "Dcm.h"
+#endif
#if defined(USE_PWM)\r
#include "Pwm.h"\r
#endif\r
void EcuM_AL_DriverInitZero()\r
{\r
Det_Init();\r
- Det_Start();\r
-\r
-#if defined(USE_DEM)\r
- // Preinitialize DEM\r
- Dem_PreInit();\r
-#endif\r
-\r
+ Det_Start();
}\r
\r
EcuM_ConfigType* EcuM_DeterminePbConfiguration()\r
;\r
#endif\r
\r
+#if defined(USE_DEM)
+ // Preinitialize DEM
+ Dem_PreInit();
+#endif
+
#if defined(USE_PORT)\r
// Setup Port\r
Port_Init(ConfigPtr->PortConfig);\r
// Setup ICU\r
// TODO\r
\r
- // Setup PWM\r
#if defined(USE_PWM)\r
// Setup PWM\r
Pwm_Init(ConfigPtr->PwmConfig);\r
CanIf_Init(ConfigPtr->CanIfConfig);\r
#endif\r
\r
+#if defined(USE_CANTP)
+ // Setup CAN TP
+ CanTp_Init();
+#endif
+
// Setup LIN\r
// TODO\r
\r
// Setup COM layer\r
Com_Init(ConfigPtr->ComConfig);\r
#endif\r
- \r
+\r
+#if defined(USE_DCM)
+ // Setup DCM
+ Dcm_Init();
+#endif
+
#if defined(USE_IOHWAB)\r
- // Setup IO Hardware Abstraction\r
+ // Setup IO hardware abstraction layer\r
IoHwAb_Init();\r
#endif\r
-\r
-#if defined(USE_DEM)\r
- // Initialize DEM\r
- Dem_Init();\r
-#endif\r
-\r
}\r
\r
void EcuM_AL_DriverInitThree(const EcuM_ConfigType ConfigPtr)\r
{\r
+ // Setup ComM
+
+#if defined(USE_DEM)
+ // Setup DEM
+ Dem_Init();
+#endif
+
+ // Setup FIM
+
#if defined(USE_CANIF)\r
- // Startup the CAN interface; due to the missing COM manager\r
- CanIf_InitController(CANIF_CHANNEL_0, CANIF_CHANNEL_0_CONFIG_0);\r
- CanIf_SetControllerMode(CANIF_CHANNEL_0, CANIF_CS_STARTED);\r
-#endif\r
+ // Startup the CAN interafce; due to the missing COM manager\r
+// CanIf_InitController(CANIF_Channel_1, CANIF_Channel_1_CONFIG_0);
+// CanIf_SetControllerMode(CANIF_Channel_1, CANIF_CS_STARTED);\r
+#endif
+
+\r
}\r
*
*
*/
- for( int i; i < Os_CfgGetTaskCnt(); i++) {
+ for( int i=0; i < Os_CfgGetTaskCnt(); i++) {
pcb_p = os_get_pcb(i);
if(pcb_p->scheduling == NON ) {
pcb_p->prio = OS_RES_SCHEDULER_PRIO;