+#if defined(CFG_MPC5668)\r
+ uint32 timeout;\r
+ /* Set the sleep bit; following a WAIT instruction, the device will go to sleep */\r
+ CRP.PSCR.B.SLEEP = 1;\r
+\r
+ /* 0x1 32k, 0x2 64k, 0x3 128k -- RAMs maintain power */\r
+ CRP.PSCR.B.RAMSEL = 0x3; // Keep all 128K\r
+\r
+ CRP.Z6VEC.R = (uint32)&McuE_LowPowerRecoverFlash;\r
+#if defined(CFG_VLE)\r
+ CRP.Z6VEC.VLE = 1;\r
+#endif\r
+\r
+ /* If we "Mcu_Wakeup()" is located in RAM, set FASTREC */\r
+ CRP.RECPTR.B.FASTREC = 0;\r
+\r
+ /* Halt everything */\r
+ SIU.HLT0.R = 0x037FFF3D;\r
+ SIU.HLT1.R = 0x18000F3C;\r
+ while((SIU.HLTACK0.R != 0x037FFF3D) && (SIU.HLTACK1.R != 0x18000F3C) && (timeout<3000)){}\r
+\r
+ /* put Z0 in reset if not used for wakeup */\r
+ CRP.Z0VEC.B.Z0RST = 1;\r
+\r
+ // TODO: Enable_all_internal_pull_devices (PULL_DOWN);\r
+\r
+ /* Save context and execute wait instruction.\r
+ *\r
+ * Things that matter here are\r
+ * - Z1VEC, determines where TLB0 will point. TLB0 is written with a\r
+ * value at startup that 4K aligned to this address.\r
+ * - LowPower_Sleep() will save a interrupt context so we will return\r
+ * intact.\r
+ * - For devices with little RAM we don't want to impose the alignment\r
+ * requirements there. Almost as we have to occupy a 4K block for this..\r
+ * although the code does not take that much space.\r
+ * */\r
+ McuE_EnterLowPower(mcuMode);\r
+\r
+ /* Clear sleep flags to allow pads to operate */\r
+ CRP.PSCR.B.SLEEPF = 0x1;\r
+#else\r