\r
+# Version of build system\r
+REQUIRED_BUILD_SYSTEM_VERSION=1.0.0\r
+\r
+# Get configuration makefiles\r
+-include ../config/*.mk\r
+-include ../config/$(BOARDDIR)/*.mk\r
+\r
+\r
+# Project settings\r
+\r
+SELECT_CONSOLE = RAMLOG\r
+\r
+SELECT_OPT = OPT_DEBUG \r
\r
-#CFG+=VLE\r
-MOD_USE+= DET ECUM MCU KERNEL RAMLOG
\ No newline at end of file
--- /dev/null
+/*\r
+* Configuration of module: Det (Det_Cfg.h)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC5668\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.1\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+*/\r
+\r
+
+#if !(((DET_SW_MAJOR_VERSION == 1) && (DET_SW_MINOR_VERSION == 0)) )
+#error Det: Configuration file expected BSW module version to be 1.0.*
+#endif
+
+/*\r
+ * Development Error Tracer driver\r
+ *\r
+ * Specification: Autosar v2.0.1, Final\r
+ *\r
+ */\r
+#ifndef DET_CFG_H\r
+#define DET_CFG_H \r
+\r
+#define DET_ENABLE_CALLBACKS STD_OFF // Enable to use callback on errors\r
+#define DET_USE_RAMLOG STD_ON // Enable to log DET errors to ramlog\r
+#define DET_WRAP_RAMLOG STD_ON // The ramlog wraps around when reaching the end\r
+#define DET_USE_STDERR STD_OFF // Enable to get DET errors on stderr\r
+#define DET_DEINIT_API STD_OFF // Enable/Disable the Det_DeInit function\r
+#define DET_RAMLOG_SIZE (16) // Number of entries in ramlog\r
+#define DET_NUMBER_OF_CALLBACKS (5) // Number of callbacks\r
+\r
+#endif /* DET_CFG_H */\r
--- /dev/null
+\r
+MOD_USE += KERNEL DET ECUM MCU \r
+\r
+def-y += ECUM_USE_SERVICE_PORTS=STDOFF\r
+\r
--- /dev/null
+/*\r
+* Configuration of module: EcuM (EcuM_Callout_Stubs.c)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC5668\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.2\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+*/\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Generated_Types.h"\r
+#include "Det.h"\r
+#if defined(USE_DEM)\r
+#include "Dem.h"\r
+#endif\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_CANTP)\r
+#include "CanTp.h"\r
+#endif\r
+#if defined(USE_J1939TP)\r
+#include "J1939Tp.h"\r
+#endif\r
+#if defined(USE_DCM)\r
+#include "Dcm.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_IOHWAB)\r
+#include "IoHwAb.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_FEE)\r
+#include "Fee.h"\r
+#endif\r
+#if defined(USE_EA)\r
+#include "Ea.h"\r
+#endif\r
+#if defined(USE_NVM)\r
+#include "NvM.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_UDPNM)\r
+#include "UdpNm.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_SPI)\r
+#include "Spi.h"\r
+#endif\r
+#if defined(USE_WDG)\r
+#include "Wdg.h"\r
+#endif\r
+#if defined(USE_WDGM)\r
+#include "WdgM.h"\r
+#endif\r
+\r
+void EcuM_AL_DriverInitZero(void)\r
+{\r
+ Det_Init();/** @req EcuM2783 */\r
+ Det_Start();/** @req EcuM2634 */\r
+}\r
+\r
+extern EcuM_ConfigType EcuMConfig;\r
+\r
+EcuM_ConfigType* EcuM_DeterminePbConfiguration(void)\r
+{\r
+ return &EcuMConfig;\r
+}\r
+\r
+void EcuM_AL_DriverInitOne(const EcuM_ConfigType *ConfigPtr)\r
+{\r
+ (void)ConfigPtr;\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_MCU)\r
+ Mcu_Init(ConfigPtr->McuConfig);\r
+\r
+ /* Set up default clock (Mcu_InitClock requires initRun==1) */\r
+ /* Ignoring return value */\r
+ (void) Mcu_InitClock( ConfigPtr->McuConfig->McuDefaultClockSettings );\r
+\r
+ // Wait for PLL to sync.\r
+ while (Mcu_GetPllStatus() != MCU_PLL_LOCKED)\r
+ {\r
+ ;\r
+ }\r
+#endif\r
+\r
+#if defined(USE_DEM)\r
+ // Preinitialize DEM\r
+ Dem_PreInit();\r
+#endif\r
+\r
+#if defined(USE_PORT)\r
+ // Setup Port\r
+ Port_Init(ConfigPtr->PortConfig);\r
+#endif\r
+\r
+\r
+#if defined(USE_GPT)\r
+ // Setup the GPT\r
+ Gpt_Init(ConfigPtr->GptConfig);\r
+#endif\r
+\r
+ // Setup watchdog\r
+#if defined(USE_WDG)\r
+ Wdg_Init(ConfigPtr->WdgConfig);\r
+#endif\r
+#if defined(USE_WDGM)\r
+ WdgM_Init(ConfigPtr->WdgMConfig);\r
+#endif\r
+\r
+#if defined(USE_DMA)\r
+ // Setup DMA\r
+ Dma_Init(ConfigPtr->DmaConfig);\r
+#endif\r
+\r
+#if defined(USE_ADC)\r
+ // Setup ADC\r
+ Adc_Init(ConfigPtr->AdcConfig);\r
+#endif\r
+\r
+ // Setup ICU\r
+ // TODO\r
+\r
+ // Setup PWM\r
+#if defined(USE_PWM)\r
+ // Setup PWM\r
+ Pwm_Init(ConfigPtr->PwmConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_AL_DriverInitTwo(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ (void)ConfigPtr;\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_SPI)\r
+ // Setup SPI\r
+ Spi_Init(ConfigPtr->SpiConfig);\r
+#endif\r
+\r
+#if defined(USE_EEP)\r
+ // Setup EEP\r
+ Eep_Init(ConfigPtr->EepConfig);\r
+#endif\r
+\r
+#if defined(USE_FLS)\r
+ // Setup Flash\r
+ Fls_Init(ConfigPtr->FlashConfig);\r
+#endif\r
+\r
+#if defined(USE_FEE)\r
+ // Setup FEE\r
+ Fee_Init();\r
+#endif\r
+\r
+#if defined(USE_EA)\r
+ // Setup EA\r
+ Ea_Init();\r
+#endif\r
+\r
+#if defined(USE_NVM)\r
+ // Setup NVRAM Manager and start the read all job\r
+ NvM_Init();\r
+ NvM_ReadAll();\r
+#endif\r
+\r
+ // Setup CAN tranceiver\r
+ // TODO\r
+\r
+#if defined(USE_CAN)\r
+ // Setup Can driver\r
+ Can_Init(ConfigPtr->CanConfig);\r
+#endif\r
+\r
+#if defined(USE_CANIF)\r
+ // Setup CanIf\r
+ CanIf_Init(ConfigPtr->CanIfConfig);\r
+#endif\r
+\r
+#if defined(USE_CANTP)\r
+ // Setup CAN TP\r
+ CanTp_Init();\r
+#endif\r
+\r
+#if defined(USE_CANSM)\r
+ CanSM_Init(ConfigPtr->CanSMConfig);\r
+#endif\r
+\r
+#if defined(USE_J1939TP)\r
+ // Setup J1939Tp\r
+ J1939Tp_Init(ConfigPtr->J1939TpConfig);\r
+#endif\r
+\r
+\r
+ // Setup LIN\r
+ // TODO\r
+\r
+#if defined(USE_PDUR)\r
+ // Setup PDU Router\r
+ PduR_Init(ConfigPtr->PduRConfig);\r
+#endif\r
+\r
+#if defined(USE_CANNM)\r
+ // Setup Can Network Manager\r
+ CanNm_Init(ConfigPtr->CanNmConfig);\r
+#endif\r
+\r
+#if defined(USE_UDPNM)\r
+ // Setup Udp Network Manager\r
+ UdpNm_Init(ConfigPtr->UdpNmConfig);\r
+#endif\r
+\r
+#if defined(USE_NM)\r
+ // Setup Network Management Interface\r
+ Nm_Init(ConfigPtr->NmConfig);\r
+#endif\r
+\r
+#if defined(USE_COM)\r
+ // Setup COM layer\r
+ Com_Init(ConfigPtr->ComConfig);\r
+#endif\r
+\r
+#if defined(USE_DCM)\r
+ // Setup DCM\r
+ Dcm_Init();\r
+#endif\r
+\r
+#if defined(USE_IOHWAB)\r
+ // Setup IO hardware abstraction layer\r
+ IoHwAb_Init();\r
+#endif\r
+\r
+}\r
+\r
+void EcuM_AL_DriverInitThree(const EcuM_ConfigType* ConfigPtr)\r
+{\r
+ (void)ConfigPtr;\r
+ //lint --e{715} PC-Lint (715) - ConfigPtr usage depends on configuration of modules\r
+\r
+#if defined(USE_DEM)\r
+ // Setup DEM\r
+ Dem_Init();\r
+#endif\r
+\r
+#if defined(USE_COMM)\r
+ // Setup Communication Manager\r
+ ComM_Init(ConfigPtr->ComMConfig);\r
+#endif\r
+}\r
+\r
+void EcuM_OnEnterRUN(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnExitPostRun(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnPrepShutdown(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoSleep(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffOne(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_OnGoOffTwo(void)\r
+{\r
+\r
+}\r
+\r
+void EcuM_AL_SwitchOff(void)\r
+{\r
+\r
+}\r
--- /dev/null
+/*\r
+* Configuration of module: EcuM (EcuM_Cfg.h)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC5668\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.2\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+*/\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error EcuM: Configuration file expected BSW module version to be 2.0.*
+#endif
+
+\r
+\r
+#ifndef ECUM_CFG_H_\r
+#define ECUM_CFG_H_\r
+\r
+#define ECUM_VERSION_INFO_API STD_ON\r
+#define ECUM_DEV_ERROR_DETECT STD_ON\r
+\r
+#define ECUM_MAIN_FUNCTION_PERIOD (200)\r
+#define ECUM_NVRAM_READALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_WRITEALL_TIMEOUT (10000)\r
+#define ECUM_NVRAM_MIN_RUN_DURATION (10000)\r
+\r
+\r
+typedef enum {\r
+ ECUM_USER_EcuMUserConfig,\r
+ ECUM_USER_ENDMARK // Must be the last in list!\r
+} EcuM_UserList;\r
+\r
+\r
+#endif /*ECUM_CFG_H_*/\r
+\r
--- /dev/null
+/*\r
+* Configuration of module: EcuM (EcuM_Generated_Types.h)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC5668\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.2\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+*/\r
+\r
+
+#if !(((ECUM_SW_MAJOR_VERSION == 2) && (ECUM_SW_MINOR_VERSION == 0)) )
+#error EcuM: Configuration file expected BSW module version to be 2.0.*
+#endif
+
+\r
+#ifndef _ECUM_GENERATED_TYPES_H_\r
+#define _ECUM_GENERATED_TYPES_H_\r
+\r
+#if (ECUM_USE_SERVICE_PORTS == STD_ON) && defined(USE_RTE)\r
+#include "Rte_EcuM.h"\r
+#endif\r
+\r
+#include "EcuM_Types.h"\r
+\r
+#if defined(USE_MCU)\r
+#include "Mcu.h"\r
+#endif\r
+#if defined(USE_PORT)\r
+#include "Port.h"\r
+#endif\r
+#if defined(USE_CAN)\r
+#include "Can.h"\r
+#endif\r
+#if defined(USE_CANIF)\r
+#include "CanIf.h"\r
+#endif\r
+#if defined(USE_PWM)\r
+#include "Pwm.h"\r
+#endif\r
+#if defined(USE_COM)\r
+#include "Com.h"\r
+#endif\r
+#if defined(USE_PDUR)\r
+#include "PduR.h"\r
+#endif\r
+#if defined(USE_DMA)\r
+#include "Dma.h"\r
+#endif\r
+#if defined(USE_ADC)\r
+#include "Adc.h"\r
+#endif\r
+#if defined(USE_GPT)\r
+#include "Gpt.h"\r
+#endif\r
+#if defined(USE_COMM)\r
+#include "ComM.h"\r
+#endif\r
+#if defined(USE_NM)\r
+#include "Nm.h"\r
+#endif\r
+#if defined(USE_CANNM)\r
+#include "CanNm.h"\r
+#endif\r
+#if defined(USE_CANSM)\r
+#include "CanSM.h"\r
+#endif\r
+#if defined(USE_J1939TP)\r
+#include "J1939Tp.h"\r
+#endif\r
+#if defined(USE_UDPNM)\r
+#include "UdpNm.h"\r
+#endif\r
+#if defined(USE_LINSM)\r
+#include "LinSM.h"\r
+#endif\r
+#if defined(USE_FLS)\r
+#include "Fls.h"\r
+#endif\r
+#if defined(USE_EEP)\r
+#include "Eep.h"\r
+#endif\r
+#if defined(USE_SPI)\r
+#include "Spi.h"\r
+#endif\r
+#if defined(USE_WDG)\r
+#include "Wdg.h"\r
+#endif\r
+#if defined(USE_WDGM)\r
+#include "WdgM.h"\r
+#endif\r
+#if defined(USE_WDGIF)\r
+#include "WdgIf.h"\r
+#endif\r
+\r
+\r
+typedef struct\r
+{\r
+ EcuM_StateType EcuMDefaultShutdownTarget;\r
+ uint8 EcuMDefaultSleepMode;\r
+ AppModeType EcuMDefaultAppMode;\r
+ uint32 EcuMRunMinimumDuration;\r
+ uint32 EcuMNvramReadAllTimeout;\r
+ uint32 EcuMNvramWriteAllTimeout;\r
+\r
+#if defined(USE_MCU)\r
+ const Mcu_ConfigType* McuConfig;\r
+#endif\r
+#if defined(USE_PORT)\r
+ const Port_ConfigType* PortConfig;\r
+#endif\r
+#if defined(USE_CAN)\r
+ const Can_ConfigType* CanConfig;\r
+#endif\r
+#if defined(USE_CANIF)\r
+ const CanIf_ConfigType* CanIfConfig;\r
+#endif\r
+#if defined(USE_CANSM)\r
+ const CanSM_ConfigType* CanSMConfig;\r
+#endif\r
+#if defined(USE_NM)\r
+ const Nm_ConfigType* NmConfig;\r
+#endif\r
+#if defined(USE_CANNM)\r
+ const CanNm_ConfigType* CanNmConfig;\r
+#endif\r
+#if defined(USE_UDPNM)\r
+ const UdpNm_ConfigType* UdpNmConfig;\r
+#endif\r
+#if defined(USE_COMM)\r
+ const ComM_ConfigType* ComMConfig;\r
+#endif\r
+#if defined(USE_COM)\r
+ const Com_ConfigType* ComConfig;\r
+#endif\r
+#if defined(USE_J1939TP)\r
+ const J1939Tp_ConfigType* J1939TpConfig;\r
+#endif\r
+#if defined(USE_PDUR)\r
+ const PduR_PBConfigType* PduRConfig;\r
+#endif\r
+#if defined(USE_PWM)\r
+ const Pwm_ConfigType* PwmConfig;\r
+#endif\r
+#if defined(USE_DMA)\r
+ const Dma_ConfigType* DmaConfig;\r
+#endif\r
+#if defined(USE_ADC)\r
+ const Adc_ConfigType* AdcConfig;\r
+#endif\r
+#if defined(USE_GPT)\r
+ const Gpt_ConfigType* GptConfig;\r
+#endif\r
+#if defined(USE_FLS)\r
+ const Fls_ConfigType* FlashConfig;\r
+#endif\r
+#if defined(USE_EEP)\r
+ const Eep_ConfigType* EepConfig;\r
+#endif\r
+#if defined(USE_SPI)\r
+ const Spi_ConfigType* SpiConfig;\r
+#endif\r
+#if defined(USE_WDG)\r
+ const Wdg_ConfigType* WdgConfig;\r
+#endif\r
+#if defined(USE_WDGIF)\r
+ const WdgIf_ConfigType* WdgIfConfig;\r
+#endif\r
+#if defined(USE_WDGM)\r
+ const WdgM_ConfigType* WdgMConfig;\r
+#endif\r
+} EcuM_ConfigType;\r
+\r
+#endif /*_ECUM_GENERATED_TYPES_H_*/\r
--- /dev/null
+/*\r
+* Configuration of module: EcuM (EcuM_PBcfg.c)\r
+*\r
+* Created by: \r
+* Copyright: \r
+*\r
+* Configured for (MCU): MPC5668\r
+*\r
+* Module vendor: ArcCore\r
+* Generator version: 2.0.2\r
+*\r
+* Generated by Arctic Studio (http://arccore.com) \r
+*/\r
+\r
+\r
+\r
+#include "EcuM.h"\r
+#include "EcuM_Generated_Types.h"\r
+\r
+#if defined(USE_CANSM)\r
+extern const CanSM_ConfigType CanSM_Config;\r
+#endif\r
+#if defined(USE_NM)\r
+extern const Nm_ConfigType Nm_Config;\r
+#endif\r
+#if defined(USE_CANNM)\r
+extern const CanNm_ConfigType CanNm_Config;\r
+#endif\r
+#if defined(USE_UDPNM)\r
+extern const UdpNm_ConfigType UdpNm_Config;\r
+#endif\r
+#if defined(USE_COMM)\r
+extern const ComM_ConfigType ComM_Config;\r
+#endif\r
+\r
+#if defined(USE_J1939TP)\r
+extern const J1939Tp_ConfigType J1939Tp_Config;\r
+#endif\r
+\r
+\r
+EcuM_ConfigType EcuMConfig =\r
+{\r
+ .EcuMDefaultShutdownTarget = ECUM_STATE_RESET,\r
+ .EcuMDefaultSleepMode = 0, // Don't care\r
+ .EcuMDefaultAppMode = OSDEFAULTAPPMODE,\r
+ .EcuMNvramReadAllTimeout = ECUM_NVRAM_READALL_TIMEOUT,\r
+ .EcuMNvramWriteAllTimeout = ECUM_NVRAM_WRITEALL_TIMEOUT,\r
+ .EcuMRunMinimumDuration = ECUM_NVRAM_MIN_RUN_DURATION,\r
+\r
+#if defined(USE_MCU)\r
+ .McuConfig = McuConfigData,\r
+#endif\r
+#if defined(USE_PORT)\r
+ .PortConfig = &PortConfigData,\r
+#endif\r
+#if defined(USE_CAN)\r
+ .CanConfig = &CanConfigData,\r
+#endif\r
+#if defined(USE_CANIF)\r
+ .CanIfConfig = &CanIf_Config,\r
+#endif\r
+#if defined(USE_CANSM)\r
+ .CanSMConfig = &CanSM_Config,\r
+#endif\r
+#if defined(USE_CANNM)\r
+ .CanNmConfig = &CanNm_Config,\r
+#endif\r
+#if defined(USE_UDPNM)\r
+ .UdpNmConfig = &UdpNm_Config,\r
+#endif\r
+#if defined(USE_COM)\r
+ .ComConfig = &ComConfiguration,\r
+#endif\r
+#if defined(USE_COMM)\r
+ .ComMConfig = &ComM_Config,\r
+#endif\r
+#if defined(USE_J1939TP)\r
+ .J1939TpConfig = &J1939Tp_Config,\r
+#endif\r
+#if defined(USE_NM)\r
+ .NmConfig = &Nm_Config,\r
+#endif\r
+#if defined(USE_PDUR)\r
+ .PduRConfig = &PduR_Config,\r
+#endif\r
+#if defined(USE_J1939TP)\r
+ .J1939TpConfig = &J1939Tp_Config,\r
+#endif\r
+#if defined(USE_DMA)\r
+ .DmaConfig = DmaConfig,\r
+#endif\r
+#if defined(USE_ADC)\r
+ .AdcConfig = AdcConfig,\r
+#endif\r
+#if defined(USE_PWM)\r
+ .PwmConfig = &PwmConfig,\r
+#endif\r
+#if defined(USE_WDG)\r
+ .WdgConfig = &WdgConfig,\r
+#endif\r
+#if defined(USE_WDGM)\r
+ .WdgMConfig = &WdgMConfig,\r
+#endif\r
+#if defined(USE_WDGIF)\r
+ .WdgIfConfig = &WdgIfConfig,\r
+#endif\r
+#if defined(USE_GPT)\r
+ .GptConfig = GptConfigData,\r
+#endif\r
+#if defined(USE_FLS)\r
+ .FlashConfig = FlsConfigSet,\r
+#endif\r
+#if defined(USE_EEP)\r
+ .EepConfig = EepConfigData,\r
+#endif\r
+#if defined(USE_SPI)\r
+ .SpiConfig = &SpiConfigData,\r
+#endif\r
+};\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-#include "Fls.h"\r
-#include "flash.h"\r
-#include <stdlib.h>\r
-\r
-\r
-#if defined(CFG_MPC5606S)\r
-\r
-/* TODO: This can actually be read from the flash instead */\r
-const FlashType flashInfo[] = {\r
- /* NO RWW */\r
-\r
- /* Bank 0, Array 0 (LOW) */\r
- [0].sectCnt = 8,\r
- [0].bankSize = 0x80000,\r
-// [0].bankRange = BANK_RANGE_CODE_LOW,\r
- [0].regBase = 0xC3F88000UL,\r
- [0].sectAddr[0] = 0, /* 0, B0F0, LOW */\r
- [0].addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 0,\r
- [0].sectAddr[1] = 0x08000, /* 1, B0F1, LOW */\r
- [0].addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1,\r
- [0].sectAddr[2] = 0x0c000, /* 2, B0F2, LOW */\r
- [0].addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2,\r
- [0].sectAddr[3] = 0x10000, /* 3, B0F3, LOW */\r
- [0].addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3,\r
- [0].sectAddr[4] = 0x18000, /* 4, B0F4, LOW */\r
- [0].addrSpace[4] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 4,\r
- [0].sectAddr[5] = 0x20000, /* 5, B0F5, LOW */\r
- [0].addrSpace[5] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 5,\r
- [0].sectAddr[6] = 0x40000, /* 6, B0F6, MID */\r
- [0].addrSpace[6] = ADDR_SPACE_SET(ADDR_SPACE_MID) + 0,\r
- [0].sectAddr[7] = 0x60000, /* 7, B0F7, MID */\r
- [0].addrSpace[7] = ADDR_SPACE_SET(ADDR_SPACE_MID) + 1,\r
- [0].sectAddr[8] = 0x80000, /* End, NOT a sector */\r
-\r
- /* Bank 1, Data */\r
- [1].sectCnt = 4,\r
- [1].bankSize = 0x810000 - 0x800000,\r
- [1].regBase = 0xC3F8C000UL,\r
- [1].sectAddr[0] = 0x800000, /* LOW */\r
- [1].addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 0,\r
- [1].sectAddr[1] = 0x804000, /* LOW */\r
- [1].addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1,\r
- [1].sectAddr[2] = 0x808000, /* LOW */\r
- [1].addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2,\r
- [1].sectAddr[3] = 0x80c000, /* LOW */\r
- [1].addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3,\r
- [1].sectAddr[4] = 0x810000, /* End, NOT a sector */\r
-\r
- /* Bank 2, Array 1 (MID)*/\r
- [2].sectCnt = 4,\r
- [2].bankSize = 0x100000-0x80000,\r
- [2].regBase = 0xC3FB0000UL,\r
- [2].sectAddr[0] = 0x80000, /* 0, B2F0, LOW */\r
- [2].addrSpace[0] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 0,\r
- [2].sectAddr[1] = 0xa0000, /* 1, B2F1, LOW */\r
- [2].addrSpace[1] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 1,\r
- [2].sectAddr[2] = 0xc0000, /* 2, B2F2, MID */\r
- [2].addrSpace[2] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 2,\r
- [2].sectAddr[3] = 0xe0000, /* 3, B2F3, MID */\r
- [2].addrSpace[3] = ADDR_SPACE_SET(ADDR_SPACE_LOW) + 3,\r
- [2].sectAddr[4] = 0x100000, /* End, NOT a sector */\r
-};\r
-#elif defined(CFG_MPC5668G)\r
- /* RWW between partitions*\r
- *\r
- * LOW 8*16KB + 2*64KB = 256KB\r
- * MID 2*128KB = 256KB\r
- * HIGH 2*256KB = 1.5MB\r
- * 2*256KB\r
- * 2*256KB\r
- */\r
-\r
-const FlashType flashInfo[] = {\r
- /* LOW */\r
- [0].sectCnt = 8,\r
- [0].bankSize = 0x200000,\r
- [0].regBase = 0xffff8000UL,\r
- [0].sectAddr[0] = 0, /* 0, B0F0, LOW */\r
- [0].addrSpace[0] = ADDR_SPACE(0, ADDR_SPACE_LOW, 1 ),\r
- [0].sectAddr[1] = 0x00004000, /* 1, B0F1, LOW */\r
- [0].addrSpace[1] = ADDR_SPACE(1, ADDR_SPACE_LOW, 1 ),\r
- [0].sectAddr[2] = 0x00008000, /* 2, B0F2, LOW */\r
- [0].addrSpace[2] = ADDR_SPACE(2, ADDR_SPACE_LOW, 1 ),\r
- [0].sectAddr[3] = 0x0000c000, /* 3, B0F3, LOW */\r
- [0].addrSpace[3] = ADDR_SPACE(3, ADDR_SPACE_LOW, 1 ),\r
- [0].sectAddr[4] = 0x00010000, /* 4, B0F4, LOW */\r
- [0].addrSpace[4] = ADDR_SPACE(4, ADDR_SPACE_LOW, 2 ),\r
- [0].sectAddr[5] = 0x00014000, /* 5, B0F5, LOW */\r
- [0].addrSpace[5] = ADDR_SPACE(5, ADDR_SPACE_LOW, 2 ),\r
- [0].sectAddr[6] = 0x00018000, /* 6, B0F6, LOW */\r
- [0].addrSpace[6] = ADDR_SPACE(6, ADDR_SPACE_LOW, 2 ),\r
- [0].sectAddr[7] = 0x0001c000, /* 7, B0F7, LOW */\r
- [0].addrSpace[7] = ADDR_SPACE(7, ADDR_SPACE_LOW, 2 ),\r
- [0].sectAddr[8] = 0x00020000, /* 8, B0F8, LOW */\r
- [0].addrSpace[8] = ADDR_SPACE(8, ADDR_SPACE_LOW, 3 ),\r
- [0].sectAddr[9] = 0x00030000, /* 9, B0F9, LOW */\r
- [0].addrSpace[9] = ADDR_SPACE(9, ADDR_SPACE_LOW, 3 ),\r
-\r
- /* MID */\r
- [0].sectAddr[10] = 0x00040000, /* 0, B0F9, LOW */\r
- [0].addrSpace[10] = ADDR_SPACE(0, ADDR_SPACE_MID, 4 ),\r
- [0].sectAddr[11] = 0x00060000, /* 1, B0F9, LOW */\r
- [0].addrSpace[11] = ADDR_SPACE(1, ADDR_SPACE_MID, 4 ),\r
-\r
- /* HIGH */\r
- [0].sectAddr[12] = 0x00080000, /* 0, B0F9, LOW */\r
- [0].addrSpace[12] = ADDR_SPACE(0, ADDR_SPACE_HIGH, 5 ),\r
- [0].sectAddr[13] = 0x000c0000, /* 1, B0F9, LOW */\r
- [0].addrSpace[13] = ADDR_SPACE(1, ADDR_SPACE_HIGH, 5 ),\r
- [0].sectAddr[14] = 0x00100000, /* 2, B0F9, LOW */\r
- [0].addrSpace[14] = ADDR_SPACE(2, ADDR_SPACE_HIGH, 6 ),\r
- [0].sectAddr[15] = 0x00140000, /* 3, B0F9, LOW */\r
- [0].addrSpace[15] = ADDR_SPACE(3, ADDR_SPACE_HIGH, 6 ),\r
- [0].sectAddr[16] = 0x00180000, /* 4, B0F9, LOW */\r
- [0].addrSpace[16] = ADDR_SPACE(4, ADDR_SPACE_HIGH, 7 ),\r
- [0].sectAddr[17] = 0x001c0000, /* 5, B0F9, LOW */\r
- [0].addrSpace[17] = ADDR_SPACE(5, ADDR_SPACE_HIGH, 7 ),\r
- [0].sectAddr[18] = 0x00200000, /* End, NOT a sector */\r
-};\r
-#else\r
-#error CPU NOT supported\r
-#endif\r
-\r
-\r
-const Fls_ConfigType FlsConfigSet[]=\r
-{\r
- {\r
-#if ( FLS_AC_LOAD_ON_JOB_START == STD_ON)\r
- .FlsAcWrite = __FLS_ERASE_RAM__,\r
- .FlsAcErase = __FLS_WRITE_RAM__,\r
-#else\r
- .FlsAcWrite = NULL,\r
- .FlsAcErase = NULL,\r
-#endif\r
- .FlsJobEndNotification = NULL,\r
- .FlsJobErrorNotification = NULL,\r
- .FlsInfo = flashInfo,\r
-// .FlsSectorList = &fls_evbSectorList[0],\r
-// .FlsSectorListSize = sizeof(fls_evbSectorList)/sizeof(Fls_SectorType),\r
-// .FlsBlockToPartitionMap = Fls_BlockToPartitionMap,\r
- }\r
-};\r
+++ /dev/null
-/* -------------------------------- Arctic Core ------------------------------\r
- * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
- *\r
- * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
- *\r
- * This source code is free software; you can redistribute it and/or modify it\r
- * under the terms of the GNU General Public License version 2 as published by the\r
- * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
- *\r
- * This program is distributed in the hope that it will be useful, but\r
- * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
- * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
- * for more details.\r
- * -------------------------------- Arctic Core ------------------------------*/\r
-\r
-/** @addtogroup Fls Flash Driver\r
- * @{ */\r
-\r
-/** @file Fls_Cfg.h\r
- * Definitions of configuration parameters for Flash Driver.\r
- */\r
-\r
-\r
-\r
-#ifndef FLS_CFG_H_\r
-#define FLS_CFG_H_\r
-\r
-#define USE_FLS_INFO STD_ON\r
-\r
-\r
-/* STD container : Fls\r
- * FlsConfigSet 1..*\r
- * FlsGeneral 1\r
- * FlsPublishedInformation 1\r
- */\r
-\r
-#include "MemIf_Types.h"\r
-\r
-/* FlsGeneral, 3.0 OK */\r
-#define FLS_VARIANT_PB STD_OFF\r
-#define FLS_AC_LOAD_ON_JOB_START STD_OFF /* NO SUPPORT */\r
-#define FLS_BASE_ADDRESS 0x00000000\r
-#define FLS_CANCEL_API STD_OFF /* NO SUPPORT */\r
-#define FLS_COMPARE_API STD_ON\r
-#define FLS_DEV_ERROR_DETECT STD_ON\r
-#define FLS_DRIVER_INDEX 0 /* NO SUPPORT */\r
-#define FLS_GET_JOB_RESULT_API STD_ON\r
-#define FLS_GET_STATUS_API STD_ON\r
-#define FLS_SET_MODE_API STD_OFF /* NO SUPPORT */\r
-//#define FLS_TOTAL_SIZE\r
-#define FLS_USE_INTERRUPTS STD_OFF /* NO SUPPORT */\r
-#define FLS_VERSION_INFO_API STD_ON\r
-\r
-/* FlsPublishedInformation, 3.0 OK */\r
-#define FLS_AC_LOCATION_ERASE 0 /* NO SUPPORT */\r
-#define FLS_AC_LOCATION_WRITE 0 /* NO SUPPORT */\r
-#define FLS_AC_SIZE_ERASE 0 /* NO SUPPORT */\r
-#define FLS_AC_SIZE_WRITE 0 /* NO SUPPORT */\r
-#define FLS_ERASE_TIME 0 /* NO SUPPORT */\r
-#define FLS_ERASED_VALUE 0xff /* NO SUPPORT */\r
-#define FLS_EXPECTED_HW_ID 0 /* NO SUPPORT */\r
-#define FLS_SPECIFIED_ERASE_CYCLES 0 /* NO SUPPORT */\r
-#define FLS_WRITE_TIME 0 /* NO SUPPORT */\r
-\r
-/* MCU Specific */\r
-#if defined(CFG_MPC5606S)\r
-#define FLASH_BANK_CNT 3\r
-#define FLASH_MAX_SECTORS 15\r
-#define FLS_TOTAL_SIZE (48*1024)\r
-#elif defined(CFG_MPC5668G)\r
-#define FLASH_BANK_CNT 1\r
-#define FLASH_MAX_SECTORS 19\r
-#define FLS_TOTAL_SIZE (2*1024*1024)\r
-#else\r
-#error CPU not supported\r
-#endif\r
-\r
-#if (USE_FLS_INFO==STD_ON)\r
-\r
-typedef struct Flash {\r
- uint32_t size;\r
- uint32_t sectCnt;\r
- uint32_t bankSize;\r
- uint32_t regBase;\r
- uint32_t sectAddr[FLASH_MAX_SECTORS];\r
- uint16_t addrSpace[FLASH_MAX_SECTORS];\r
-} FlashType;\r
-\r
-\r
-#else\r
-typedef struct {\r
- Fls_LengthType FlsNumberOfSectors;\r
- Fls_LengthType FlsPageSize;\r
- Fls_LengthType FlsSectorSize;\r
- Fls_AddressType FlsSectorStartaddress;\r
-} Fls_SectorType;\r
-#endif\r
-\r
-\r
-struct Flash;\r
-\r
-typedef struct {\r
- void (*FlsAcErase)(); /* NO SUPPORT */\r
- void (*FlsAcWrite)(); /* NO SUPPORT */\r
- // FlsCallCycle N/A in core.\r
- void (*FlsJobEndNotification)();\r
- void (*FlsJobErrorNotification)();\r
- uint32_t FlsMaxReadFastMode; /* NO SUPPORT */\r
- uint32_t FlsMaxReadNormalMode; /* NO SUPPORT */\r
- uint32_t FlsMaxWriteFastMode; /* NO SUPPORT */\r
- uint32_t FlsMaxWriteNormalMode; /* NO SUPPORT */\r
- uint32_t FlsProtection; /* NO SUPPORT */\r
-#if (USE_FLS_INFO==STD_ON)\r
- const struct Flash *FlsInfo;\r
-#else\r
- const Fls_SectorType *FlsSectorList;\r
-#endif\r
-// const uint32 FlsSectorListSize; /* NO SUPPORT */\r
-} Fls_ConfigSetType;\r
-\r
-typedef Fls_ConfigSetType Fls_ConfigType;\r
-\r
-extern const Fls_ConfigSetType FlsConfigSet[];\r
-\r
-#endif /*FLS_CFG_H_*/\r
-/** @} */\r
* Configured for (MCU): MPC5668\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.2\r
+* Generator version: 2.0.3\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
*/\r
* Configured for (MCU): MPC5668\r
*\r
* Module vendor: ArcCore\r
-* Generator version: 2.0.2\r
+* Generator version: 2.0.3\r
*\r
* Generated by Arctic Studio (http://arccore.com) \r
*/\r
\r
\r
// ############################### DEBUG OUTPUT #############################\r
-uint32 os_dbg_mask = D_RESOURCE |D_SCHTBL |D_EVENT |D_TASK |D_ALARM;\r
+uint32 os_dbg_mask = 0;\r
\r
// ############################### APPLICATIONS #############################\r
GEN_APPLICATION_HEAD = {\r
/* name */"eTask2",\r
/* priority */1,\r
/* schedule */FULL,\r
- /* name */FALSE,\r
+ /* name */TRUE,\r
/* resource_int_p */NULL,\r
/* resource mask */0,\r
/* event mask */1,\r
#define OS_LINKED_RESOURCE_CNT 0\r
#define OS_APPLICATION_CNT 1\r
#define OS_SERVICE_CNT 0 /* ARCTICSTUDIO_GENERATOR_TODO */\r
-#define CFG_OS_DEBUG STD_ON\r
+#define CFG_OS_DEBUG STD_OFF\r
\r
#define OS_SC1 STD_ON /* NOT CONFIGURABLE IN TOOLS */\r
#define OS_USE_APPLICATIONS STD_ON\r
+++ /dev/null
-/*\r
-* Configuration of module: Port (Port_Cfg.c)\r
-*\r
-* Created by: \r
-* Copyright: \r
-*\r
-* Configured for (MCU): MPC5668\r
-*\r
-* Module vendor: ArcCore\r
-* Generator version: 1.0.0\r
-*\r
-* Generated by Arctic Studio (http://arccore.com) \r
-*/\r
-\r
- \r
-\r
-#include "Port.h"\r
-#include "Port_Cfg.h"\r
-#include <stdlib.h>\r
-\r
-const uint16_t PortPadConfigData[] = {\r
- PORT_PCR_RESET, /* PCR 0 */\r
- PORT_PCR_RESET, /* PCR 1 */\r
- PORT_PCR_RESET, /* PCR 2 */\r
- PORT_PCR_RESET, /* PCR 3 */\r
- PORT_PCR_RESET, /* PCR 4 */\r
- PORT_PCR_RESET, /* PCR 5 */\r
- PORT_PCR_RESET, /* PCR 6 */\r
- PORT_PCR_RESET, /* PCR 7 */\r
- PORT_PCR_RESET, /* PCR 8 */\r
- PORT_PCR_RESET, /* PCR 9 */\r
- PORT_PCR_RESET, /* PCR 10 */\r
- PORT_PCR_RESET, /* PCR 11 */\r
- PORT_PCR_RESET, /* PCR 12 */\r
- PORT_PCR_RESET, /* PCR 13 */\r
- PORT_PCR_RESET, /* PCR 14 */\r
- PORT_PCR_RESET, /* PCR 15 */\r
- PORT_PCR_RESET, /* PCR 16 */\r
- PORT_PCR_RESET, /* PCR 17 */\r
- PORT_PCR_RESET, /* PCR 18 */\r
- PORT_PCR_RESET, /* PCR 19 */\r
- PORT_PCR_RESET, /* PCR 20 */\r
- PORT_PCR_RESET, /* PCR 21 */\r
- PORT_PCR_RESET, /* PCR 22 */\r
- PORT_PCR_RESET, /* PCR 23 */\r
- PORT_PCR_RESET, /* PCR 24 */\r
- PORT_PCR_RESET, /* PCR 25 */\r
- PORT_PCR_RESET, /* PCR 26 */\r
- PORT_PCR_RESET, /* PCR 27 */\r
- PORT_PCR_RESET, /* PCR 28 */\r
- PORT_PCR_RESET, /* PCR 29 */\r
- PORT_PCR_RESET, /* PCR 30 */\r
- PORT_PCR_RESET, /* PCR 31 */\r
- PORT_PCR_RESET, /* PCR 32 */\r
- PORT_PCR_RESET, /* PCR 33 */\r
- PORT_PCR_RESET, /* PCR 34 */\r
- PORT_PCR_RESET, /* PCR 35 */\r
- PORT_PCR_RESET, /* PCR 36 */\r
- PORT_PCR_RESET, /* PCR 37 */\r
- PORT_PCR_RESET, /* PCR 38 */\r
- PORT_PCR_RESET, /* PCR 39 */\r
- PORT_PCR_RESET, /* PCR 40 */\r
- PORT_PCR_RESET, /* PCR 41 */\r
- PORT_PCR_RESET, /* PCR 42 */\r
- PORT_PCR_RESET, /* PCR 43 */\r
- PORT_PCR_RESET, /* PCR 44 */\r
- PORT_PCR_RESET, /* PCR 45 */\r
- PORT_PCR_RESET, /* PCR 46 */\r
- PORT_PCR_RESET, /* PCR 47 */\r
- PORT_PCR_RESET, /* PCR 48 */\r
- PORT_PCR_RESET, /* PCR 49 */\r
- PORT_PCR_RESET, /* PCR 50 */\r
- PORT_PCR_RESET, /* PCR 51 */\r
- PORT_PCR_RESET, /* PCR 52 */\r
- PORT_PCR_RESET, /* PCR 53 */\r
- PORT_PCR_RESET, /* PCR 54 */\r
- PORT_PCR_RESET, /* PCR 55 */\r
- PORT_PCR_RESET, /* PCR 56 */\r
- PORT_PCR_RESET, /* PCR 57 */\r
- PORT_PCR_RESET, /* PCR 58 */\r
- PORT_PCR_RESET, /* PCR 59 */\r
- PORT_PCR_RESET, /* PCR 60 */\r
- PORT_PCR_RESET, /* PCR 61 */\r
- PORT_PCR_RESET, /* PCR 62 */\r
- PORT_PCR_RESET, /* PCR 63 */\r
- PORT_PCR_RESET, /* PCR 64 */\r
- PORT_PCR_RESET, /* PCR 65 */\r
- PORT_PCR_RESET, /* PCR 66 */\r
- PORT_PCR_RESET, /* PCR 67 */\r
- PORT_PCR_RESET, /* PCR 68 */\r
- PORT_PCR_RESET, /* PCR 69 */\r
- PORT_PCR_RESET, /* PCR 70 */\r
- PORT_PCR_RESET, /* PCR 71 */\r
- PORT_PCR_RESET, /* PCR 72 */\r
- PORT_PCR_RESET, /* PCR 73 */\r
- PORT_PCR_RESET, /* PCR 74 */\r
- PORT_PCR_RESET, /* PCR 75 */\r
- PORT_PCR_RESET, /* PCR 76 */\r
- PORT_PCR_RESET, /* PCR 77 */\r
- PORT_PCR_RESET, /* PCR 78 */\r
- PORT_PCR_RESET, /* PCR 79 */\r
- PORT_PCR_RESET, /* PCR 80 */\r
- PORT_PCR_RESET, /* PCR 81 */\r
- PORT_PCR_RESET, /* PCR 82 */\r
- PORT_PCR_RESET, /* PCR 83 */\r
- PORT_PCR_RESET, /* PCR 84 */\r
- PORT_PCR_RESET, /* PCR 85 */\r
- PORT_PCR_RESET, /* PCR 86 */\r
- PORT_PCR_RESET, /* PCR 87 */\r
- PORT_PCR_RESET, /* PCR 88 */\r
- PORT_PCR_RESET, /* PCR 89 */\r
- PORT_PCR_RESET, /* PCR 90 */\r
- PORT_PCR_RESET, /* PCR 91 */\r
- PORT_PCR_RESET, /* PCR 92 */\r
- PORT_PCR_RESET, /* PCR 93 */\r
- PORT_PCR_RESET, /* PCR 94 */\r
- PORT_PCR_RESET, /* PCR 95 */\r
- PORT_PCR_RESET, /* PCR 96 */\r
- PORT_PCR_RESET, /* PCR 97 */\r
- PORT_PCR_RESET, /* PCR 98 */\r
- PORT_PCR_RESET, /* PCR 99 */\r
- PORT_PCR_RESET, /* PCR 100 */\r
- PORT_PCR_RESET, /* PCR 101 */\r
- PORT_PCR_RESET, /* PCR 102 */\r
- PORT_PCR_RESET, /* PCR 103 */\r
- PORT_PCR_RESET, /* PCR 104 */\r
- PORT_PCR_RESET, /* PCR 105 */\r
- PORT_PCR_RESET, /* PCR 106 */\r
- PORT_PCR_RESET, /* PCR 107 */\r
- PORT_PCR_RESET, /* PCR 108 */\r
- PORT_PCR_RESET, /* PCR 109 */\r
- PORT_PCR_RESET, /* PCR 110 */\r
- PORT_PCR_RESET, /* PCR 111 */\r
- PORT_PCR_RESET, /* PCR 112 */\r
- PORT_PCR_RESET, /* PCR 113 */\r
- PORT_PCR_RESET, /* PCR 114 */\r
- PORT_PCR_RESET, /* PCR 115 */\r
- PORT_PCR_RESET, /* PCR 116 */\r
- PORT_PCR_RESET, /* PCR 117 */\r
- PORT_PCR_RESET, /* PCR 118 */\r
- PORT_PCR_RESET, /* PCR 119 */\r
- PORT_PCR_RESET, /* PCR 120 */\r
- PORT_PCR_RESET, /* PCR 121 */\r
- PORT_PCR_RESET, /* PCR 122 */\r
- PORT_PCR_RESET, /* PCR 123 */\r
- PORT_PCR_RESET, /* PCR 124 */\r
- PORT_PCR_RESET, /* PCR 125 */\r
- PORT_PCR_RESET, /* PCR 126 */\r
- PORT_PCR_RESET, /* PCR 127 */\r
- PORT_PCR_RESET, /* PCR 128 */\r
- PORT_PCR_RESET, /* PCR 129 */\r
- PORT_PCR_RESET, /* PCR 130 */\r
- PORT_PCR_RESET, /* PCR 131 */\r
- PORT_PCR_RESET, /* PCR 132 */\r
- PORT_PCR_RESET, /* PCR 133 */\r
- PORT_PCR_RESET, /* PCR 134 */\r
- PORT_PCR_RESET, /* PCR 135 */\r
- PORT_PCR_RESET, /* PCR 136 */\r
- PORT_PCR_RESET, /* PCR 137 */\r
- PORT_PCR_RESET, /* PCR 138 */\r
- PORT_PCR_RESET, /* PCR 139 */\r
- PORT_PCR_RESET, /* PCR 140 */\r
- PORT_PCR_RESET, /* PCR 141 */\r
- PORT_PCR_RESET, /* PCR 142 */\r
- PORT_PCR_RESET, /* PCR 143 */\r
- PORT_PCR_RESET, /* PCR 144 */\r
- PORT_PCR_RESET, /* PCR 145 */\r
- PORT_PCR_RESET, /* PCR 146 */\r
- PORT_PCR_RESET, /* PCR 147 */\r
- PORT_PCR_RESET, /* PCR 148 */\r
- PORT_PCR_RESET, /* PCR 149 */\r
- PORT_PCR_RESET, /* PCR 150 */\r
- PORT_PCR_RESET, /* PCR 151 */\r
- PORT_PCR_RESET, /* PCR 152 */\r
- PORT_PCR_RESET, /* PCR 153 */\r
- PORT_PCR_RESET, /* PCR 154 */\r
- PORT_PCR_RESET, /* PCR 155 */\r
- PORT_PCR_RESET, /* PCR 156 */\r
- PORT_PCR_RESET, /* PCR 157 */\r
- PORT_PCR_RESET, /* PCR 158 */\r
- PORT_PCR_RESET, /* PCR 159 */\r
- PORT_PCR_RESET, /* PCR 160 */\r
- PORT_PCR_RESET, /* PCR 161 */\r
- PORT_PCR_RESET, /* PCR 162 */\r
- PORT_PCR_RESET, /* PCR 163 */\r
- PORT_PCR_RESET, /* PCR 164 */\r
- PORT_PCR_RESET, /* PCR 165 */\r
- PORT_PCR_RESET, /* PCR 166 */\r
- PORT_PCR_RESET, /* PCR 167 */\r
- PORT_PCR_RESET, /* PCR 168 */\r
- PORT_PCR_RESET, /* PCR 169 */\r
- PORT_PCR_RESET, /* PCR 170 */\r
- PORT_PCR_RESET, /* PCR 171 */\r
- PORT_PCR_RESET, /* PCR 172 */\r
- PORT_PCR_RESET, /* PCR 173 */\r
- PORT_PCR_RESET, /* PCR 174 */\r
- PORT_PCR_RESET, /* PCR 175 */\r
- PORT_PCR_RESET, /* PCR 176 */\r
- PORT_PCR_RESET, /* PCR 177 */\r
- PORT_PCR_RESET, /* PCR 178 */\r
- PORT_PCR_RESET, /* PCR 179 */\r
- PORT_PCR_RESET, /* PCR 180 */\r
- PORT_PCR_RESET, /* PCR 181 */\r
- PORT_PCR_RESET, /* PCR 182 */\r
- PORT_PCR_RESET, /* PCR 183 */\r
- PORT_PCR_RESET, /* PCR 184 */\r
- PORT_PCR_RESET, /* PCR 185 */\r
- PORT_PCR_RESET, /* PCR 186 */\r
- PORT_PCR_RESET, /* PCR 187 */\r
- PORT_PCR_RESET, /* PCR 188 */\r
- PORT_PCR_RESET, /* PCR 189 */\r
- PORT_PCR_RESET, /* PCR 190 */\r
- PORT_PCR_RESET, /* PCR 191 */\r
- PORT_PCR_RESET, /* PCR 192 */\r
- PORT_PCR_RESET, /* PCR 193 */\r
- PORT_PCR_RESET, /* PCR 194 */\r
- PORT_PCR_RESET, /* PCR 195 */\r
- PORT_PCR_RESET, /* PCR 196 */\r
- PORT_PCR_RESET, /* PCR 197 */\r
- PORT_PCR_RESET, /* PCR 198 */\r
- PORT_PCR_RESET, /* PCR 199 */\r
- PORT_PCR_RESET, /* PCR 200 */\r
- PORT_PCR_RESET, /* PCR 201 */\r
- PORT_PCR_RESET, /* PCR 202 */\r
- PORT_PCR_RESET, /* PCR 203 */\r
- PORT_PCR_RESET, /* PCR 204 */\r
- PORT_PCR_RESET, /* PCR 205 */\r
- PORT_PCR_RESET, /* PCR 206 */\r
- PORT_PCR_RESET, /* PCR 207 */\r
- PORT_PCR_RESET, /* PCR 208 */\r
- PORT_PCR_RESET, /* PCR 209 */\r
- PORT_PCR_RESET, /* PCR 210 */\r
- PORT_PCR_RESET, /* PCR 211 */\r
- PORT_PCR_RESET, /* PCR 212 */\r
- PORT_PCR_RESET, /* PCR 213 */\r
- PORT_PCR_RESET, /* PCR 214 */\r
- PORT_PCR_RESET, /* PCR 215 */\r
- PORT_PCR_RESET, /* PCR 216 */\r
- PORT_PCR_RESET, /* PCR 217 */\r
- PORT_PCR_RESET, /* PCR 218 */\r
- PORT_PCR_RESET, /* PCR 219 */\r
- PORT_PCR_RESET, /* PCR 220 */\r
- PORT_PCR_RESET, /* PCR 221 */\r
- PORT_PCR_RESET, /* PCR 222 */\r
- PORT_PCR_RESET, /* PCR 223 */\r
- PORT_PCR_RESET, /* PCR 224 */\r
- PORT_PCR_RESET, /* PCR 225 */\r
- PORT_PCR_RESET, /* PCR 226 */\r
- PORT_PCR_RESET, /* PCR 227 */\r
- PORT_PCR_RESET, /* PCR 228 */\r
- PORT_PCR_RESET, /* PCR 229 */\r
- PORT_PCR_RESET, /* PCR 230 */\r
- PORT_PCR_RESET, /* PCR 231 */\r
- PORT_PCR_RESET, /* PCR 232 */\r
- PORT_PCR_RESET, /* PCR 233 */\r
- PORT_PCR_RESET, /* PCR 234 */\r
- PORT_PCR_RESET, /* PCR 235 */\r
- PORT_PCR_RESET, /* PCR 236 */\r
- PORT_PCR_RESET, /* PCR 237 */\r
- PORT_PCR_RESET, /* PCR 238 */\r
- PORT_PCR_RESET, /* PCR 239 */\r
- PORT_PCR_RESET, /* PCR 240 */\r
- PORT_PCR_RESET, /* PCR 241 */\r
- PORT_PCR_RESET, /* PCR 242 */\r
- PORT_PCR_RESET, /* PCR 243 */\r
- PORT_PCR_RESET, /* PCR 244 */\r
- PORT_PCR_RESET, /* PCR 245 */\r
- PORT_PCR_RESET, /* PCR 246 */\r
- PORT_PCR_RESET, /* PCR 247 */\r
- PORT_PCR_RESET, /* PCR 248 */\r
- PORT_PCR_RESET, /* PCR 249 */\r
- PORT_PCR_RESET, /* PCR 250 */\r
- PORT_PCR_RESET, /* PCR 251 */\r
- PORT_PCR_RESET, /* PCR 252 */\r
- PORT_PCR_RESET, /* PCR 253 */\r
- PORT_PCR_RESET, /* PCR 254 */\r
- PORT_PCR_RESET, /* PCR 255 */\r
- PORT_PCR_RESET, /* PCR 256 */\r
- PORT_PCR_RESET, /* PCR 257 */\r
- PORT_PCR_RESET, /* PCR 258 */\r
- PORT_PCR_RESET, /* PCR 259 */\r
- PORT_PCR_RESET, /* PCR 260 */\r
- PORT_PCR_RESET, /* PCR 261 */\r
- PORT_PCR_RESET, /* PCR 262 */\r
- PORT_PCR_RESET, /* PCR 263 */\r
- PORT_PCR_RESET, /* PCR 264 */\r
- PORT_PCR_RESET, /* PCR 265 */\r
- PORT_PCR_RESET, /* PCR 266 */\r
- PORT_PCR_RESET, /* PCR 267 */\r
- PORT_PCR_RESET, /* PCR 268 */\r
- PORT_PCR_RESET, /* PCR 269 */\r
- PORT_PCR_RESET, /* PCR 270 */\r
- PORT_PCR_RESET, /* PCR 271 */\r
- PORT_PCR_RESET, /* PCR 272 */\r
- PORT_PCR_RESET, /* PCR 273 */\r
- PORT_PCR_RESET, /* PCR 274 */\r
- PORT_PCR_RESET, /* PCR 275 */\r
- PORT_PCR_RESET, /* PCR 276 */\r
- PORT_PCR_RESET, /* PCR 277 */\r
- PORT_PCR_RESET, /* PCR 278 */\r
- PORT_PCR_RESET, /* PCR 279 */\r
- PORT_PCR_RESET, /* PCR 280 */\r
- PORT_PCR_RESET, /* PCR 281 */\r
- PORT_PCR_RESET, /* PCR 282 */\r
- PORT_PCR_RESET, /* PCR 283 */\r
- PORT_PCR_RESET, /* PCR 284 */\r
- PORT_PCR_RESET, /* PCR 285 */\r
- PORT_PCR_RESET, /* PCR 286 */\r
- PORT_PCR_RESET, /* PCR 287 */\r
- PORT_PCR_RESET, /* PCR 288 */\r
- PORT_PCR_RESET, /* PCR 289 */\r
- PORT_PCR_RESET, /* PCR 290 */\r
- PORT_PCR_RESET, /* PCR 291 */\r
- PORT_PCR_RESET, /* PCR 292 */\r
- PORT_PCR_RESET, /* PCR 293 */\r
- PORT_PCR_RESET, /* PCR 294 */\r
- PORT_PCR_RESET, /* PCR 295 */\r
- PORT_PCR_RESET, /* PCR 296 */\r
- PORT_PCR_RESET, /* PCR 297 */\r
- PORT_PCR_RESET, /* PCR 298 */\r
-};\r
-\r
-const uint8_t PortOutConfigData[] = {\r
- PORT_GPDO_RESET, /* GPDO 0 */\r
- PORT_GPDO_RESET, /* GPDO 1 */\r
- PORT_GPDO_RESET, /* GPDO 2 */\r
- PORT_GPDO_RESET, /* GPDO 3 */\r
- PORT_GPDO_RESET, /* GPDO 4 */\r
- PORT_GPDO_RESET, /* GPDO 5 */\r
- PORT_GPDO_RESET, /* GPDO 6 */\r
- PORT_GPDO_RESET, /* GPDO 7 */\r
- PORT_GPDO_RESET, /* GPDO 8 */\r
- PORT_GPDO_RESET, /* GPDO 9 */\r
- PORT_GPDO_RESET, /* GPDO 10 */\r
- PORT_GPDO_RESET, /* GPDO 11 */\r
- PORT_GPDO_RESET, /* GPDO 12 */\r
- PORT_GPDO_RESET, /* GPDO 13 */\r
- PORT_GPDO_RESET, /* GPDO 14 */\r
- PORT_GPDO_RESET, /* GPDO 15 */\r
- PORT_GPDO_RESET, /* GPDO 16 */\r
- PORT_GPDO_RESET, /* GPDO 17 */\r
- PORT_GPDO_RESET, /* GPDO 18 */\r
- PORT_GPDO_RESET, /* GPDO 19 */\r
- PORT_GPDO_RESET, /* GPDO 20 */\r
- PORT_GPDO_RESET, /* GPDO 21 */\r
- PORT_GPDO_RESET, /* GPDO 22 */\r
- PORT_GPDO_RESET, /* GPDO 23 */\r
- PORT_GPDO_RESET, /* GPDO 24 */\r
- PORT_GPDO_RESET, /* GPDO 25 */\r
- PORT_GPDO_RESET, /* GPDO 26 */\r
- PORT_GPDO_RESET, /* GPDO 27 */\r
- PORT_GPDO_RESET, /* GPDO 28 */\r
- PORT_GPDO_RESET, /* GPDO 29 */\r
- PORT_GPDO_RESET, /* GPDO 30 */\r
- PORT_GPDO_RESET, /* GPDO 31 */\r
- PORT_GPDO_RESET, /* GPDO 32 */\r
- PORT_GPDO_RESET, /* GPDO 33 */\r
- PORT_GPDO_RESET, /* GPDO 34 */\r
- PORT_GPDO_RESET, /* GPDO 35 */\r
- PORT_GPDO_RESET, /* GPDO 36 */\r
- PORT_GPDO_RESET, /* GPDO 37 */\r
- PORT_GPDO_RESET, /* GPDO 38 */\r
- PORT_GPDO_RESET, /* GPDO 39 */\r
- PORT_GPDO_RESET, /* GPDO 40 */\r
- PORT_GPDO_RESET, /* GPDO 41 */\r
- PORT_GPDO_RESET, /* GPDO 42 */\r
- PORT_GPDO_RESET, /* GPDO 43 */\r
- PORT_GPDO_RESET, /* GPDO 44 */\r
- PORT_GPDO_RESET, /* GPDO 45 */\r
- PORT_GPDO_RESET, /* GPDO 46 */\r
- PORT_GPDO_RESET, /* GPDO 47 */\r
- PORT_GPDO_RESET, /* GPDO 48 */\r
- PORT_GPDO_RESET, /* GPDO 49 */\r
- PORT_GPDO_RESET, /* GPDO 50 */\r
- PORT_GPDO_RESET, /* GPDO 51 */\r
- PORT_GPDO_RESET, /* GPDO 52 */\r
- PORT_GPDO_RESET, /* GPDO 53 */\r
- PORT_GPDO_RESET, /* GPDO 54 */\r
- PORT_GPDO_RESET, /* GPDO 55 */\r
- PORT_GPDO_RESET, /* GPDO 56 */\r
- PORT_GPDO_RESET, /* GPDO 57 */\r
- PORT_GPDO_RESET, /* GPDO 58 */\r
- PORT_GPDO_RESET, /* GPDO 59 */\r
- PORT_GPDO_RESET, /* GPDO 60 */\r
- PORT_GPDO_RESET, /* GPDO 61 */\r
- PORT_GPDO_RESET, /* GPDO 62 */\r
- PORT_GPDO_RESET, /* GPDO 63 */\r
- PORT_GPDO_RESET, /* GPDO 64 */\r
- PORT_GPDO_RESET, /* GPDO 65 */\r
- PORT_GPDO_RESET, /* GPDO 66 */\r
- PORT_GPDO_RESET, /* GPDO 67 */\r
- PORT_GPDO_RESET, /* GPDO 68 */\r
- PORT_GPDO_RESET, /* GPDO 69 */\r
- PORT_GPDO_RESET, /* GPDO 70 */\r
- PORT_GPDO_RESET, /* GPDO 71 */\r
- PORT_GPDO_RESET, /* GPDO 72 */\r
- PORT_GPDO_RESET, /* GPDO 73 */\r
- PORT_GPDO_RESET, /* GPDO 74 */\r
- PORT_GPDO_RESET, /* GPDO 75 */\r
- PORT_GPDO_RESET, /* GPDO 76 */\r
- PORT_GPDO_RESET, /* GPDO 77 */\r
- PORT_GPDO_RESET, /* GPDO 78 */\r
- PORT_GPDO_RESET, /* GPDO 79 */\r
- PORT_GPDO_RESET, /* GPDO 80 */\r
- PORT_GPDO_RESET, /* GPDO 81 */\r
- PORT_GPDO_RESET, /* GPDO 82 */\r
- PORT_GPDO_RESET, /* GPDO 83 */\r
- PORT_GPDO_RESET, /* GPDO 84 */\r
- PORT_GPDO_RESET, /* GPDO 85 */\r
- PORT_GPDO_RESET, /* GPDO 86 */\r
- PORT_GPDO_RESET, /* GPDO 87 */\r
- PORT_GPDO_RESET, /* GPDO 88 */\r
- PORT_GPDO_RESET, /* GPDO 89 */\r
- PORT_GPDO_RESET, /* GPDO 90 */\r
- PORT_GPDO_RESET, /* GPDO 91 */\r
- PORT_GPDO_RESET, /* GPDO 92 */\r
- PORT_GPDO_RESET, /* GPDO 93 */\r
- PORT_GPDO_RESET, /* GPDO 94 */\r
- PORT_GPDO_RESET, /* GPDO 95 */\r
- PORT_GPDO_RESET, /* GPDO 96 */\r
- PORT_GPDO_RESET, /* GPDO 97 */\r
- PORT_GPDO_RESET, /* GPDO 98 */\r
- PORT_GPDO_RESET, /* GPDO 99 */\r
- PORT_GPDO_RESET, /* GPDO 100 */\r
- PORT_GPDO_RESET, /* GPDO 101 */\r
- PORT_GPDO_RESET, /* GPDO 102 */\r
- PORT_GPDO_RESET, /* GPDO 103 */\r
- PORT_GPDO_RESET, /* GPDO 104 */\r
- PORT_GPDO_RESET, /* GPDO 105 */\r
- PORT_GPDO_RESET, /* GPDO 106 */\r
- PORT_GPDO_RESET, /* GPDO 107 */\r
- PORT_GPDO_RESET, /* GPDO 108 */\r
- PORT_GPDO_RESET, /* GPDO 109 */\r
- PORT_GPDO_RESET, /* GPDO 110 */\r
- PORT_GPDO_RESET, /* GPDO 111 */\r
- PORT_GPDO_RESET, /* GPDO 112 */\r
- PORT_GPDO_RESET, /* GPDO 113 */\r
- PORT_GPDO_RESET, /* GPDO 114 */\r
- PORT_GPDO_RESET, /* GPDO 115 */\r
- PORT_GPDO_RESET, /* GPDO 116 */\r
- PORT_GPDO_RESET, /* GPDO 117 */\r
- PORT_GPDO_RESET, /* GPDO 118 */\r
- PORT_GPDO_RESET, /* GPDO 119 */\r
- PORT_GPDO_RESET, /* GPDO 120 */\r
- PORT_GPDO_RESET, /* GPDO 121 */\r
- PORT_GPDO_RESET, /* GPDO 122 */\r
- PORT_GPDO_RESET, /* GPDO 123 */\r
- PORT_GPDO_RESET, /* GPDO 124 */\r
- PORT_GPDO_RESET, /* GPDO 125 */\r
- PORT_GPDO_RESET, /* GPDO 126 */\r
- PORT_GPDO_RESET, /* GPDO 127 */\r
- PORT_GPDO_RESET, /* GPDO 128 */\r
- PORT_GPDO_RESET, /* GPDO 129 */\r
- PORT_GPDO_RESET, /* GPDO 130 */\r
- PORT_GPDO_RESET, /* GPDO 131 */\r
- PORT_GPDO_RESET, /* GPDO 132 */\r
- PORT_GPDO_RESET, /* GPDO 133 */\r
- PORT_GPDO_RESET, /* GPDO 134 */\r
- PORT_GPDO_RESET, /* GPDO 135 */\r
- PORT_GPDO_RESET, /* GPDO 136 */\r
- PORT_GPDO_RESET, /* GPDO 137 */\r
- PORT_GPDO_RESET, /* GPDO 138 */\r
- PORT_GPDO_RESET, /* GPDO 139 */\r
- PORT_GPDO_RESET, /* GPDO 140 */\r
- PORT_GPDO_RESET, /* GPDO 141 */\r
- PORT_GPDO_RESET, /* GPDO 142 */\r
- PORT_GPDO_RESET, /* GPDO 143 */\r
- PORT_GPDO_RESET, /* GPDO 144 */\r
- PORT_GPDO_RESET, /* GPDO 145 */\r
- PORT_GPDO_RESET, /* GPDO 146 */\r
- PORT_GPDO_RESET, /* GPDO 147 */\r
- PORT_GPDO_RESET, /* GPDO 148 */\r
- PORT_GPDO_RESET, /* GPDO 149 */\r
- PORT_GPDO_RESET, /* GPDO 150 */\r
- PORT_GPDO_RESET, /* GPDO 151 */\r
- PORT_GPDO_RESET, /* GPDO 152 */\r
- PORT_GPDO_RESET, /* GPDO 153 */\r
- PORT_GPDO_RESET, /* GPDO 154 */\r
- PORT_GPDO_RESET, /* GPDO 155 */\r
- PORT_GPDO_RESET, /* GPDO 156 */\r
- PORT_GPDO_RESET, /* GPDO 157 */\r
- PORT_GPDO_RESET, /* GPDO 158 */\r
- PORT_GPDO_RESET, /* GPDO 159 */\r
- PORT_GPDO_RESET, /* GPDO 160 */\r
- PORT_GPDO_RESET, /* GPDO 161 */\r
- PORT_GPDO_RESET, /* GPDO 162 */\r
- PORT_GPDO_RESET, /* GPDO 163 */\r
- PORT_GPDO_RESET, /* GPDO 164 */\r
- PORT_GPDO_RESET, /* GPDO 165 */\r
- PORT_GPDO_RESET, /* GPDO 166 */\r
- PORT_GPDO_RESET, /* GPDO 167 */\r
- PORT_GPDO_RESET, /* GPDO 168 */\r
- PORT_GPDO_RESET, /* GPDO 169 */\r
- PORT_GPDO_RESET, /* GPDO 170 */\r
- PORT_GPDO_RESET, /* GPDO 171 */\r
- PORT_GPDO_RESET, /* GPDO 172 */\r
- PORT_GPDO_RESET, /* GPDO 173 */\r
- PORT_GPDO_RESET, /* GPDO 174 */\r
- PORT_GPDO_RESET, /* GPDO 175 */\r
- PORT_GPDO_RESET, /* GPDO 176 */\r
- PORT_GPDO_RESET, /* GPDO 177 */\r
- PORT_GPDO_RESET, /* GPDO 178 */\r
- PORT_GPDO_RESET, /* GPDO 179 */\r
- PORT_GPDO_RESET, /* GPDO 180 */\r
- PORT_GPDO_RESET, /* GPDO 181 */\r
- PORT_GPDO_RESET, /* GPDO 182 */\r
- PORT_GPDO_RESET, /* GPDO 183 */\r
- PORT_GPDO_RESET, /* GPDO 184 */\r
- PORT_GPDO_RESET, /* GPDO 185 */\r
- PORT_GPDO_RESET, /* GPDO 186 */\r
- PORT_GPDO_RESET, /* GPDO 187 */\r
- PORT_GPDO_RESET, /* GPDO 188 */\r
- PORT_GPDO_RESET, /* GPDO 189 */\r
- PORT_GPDO_RESET, /* GPDO 190 */\r
- PORT_GPDO_RESET, /* GPDO 191 */\r
- PORT_GPDO_RESET, /* GPDO 192 */\r
- PORT_GPDO_RESET, /* GPDO 193 */\r
- PORT_GPDO_RESET, /* GPDO 194 */\r
- PORT_GPDO_RESET, /* GPDO 195 */\r
- PORT_GPDO_RESET, /* GPDO 196 */\r
- PORT_GPDO_RESET, /* GPDO 197 */\r
- PORT_GPDO_RESET, /* GPDO 198 */\r
- PORT_GPDO_RESET, /* GPDO 199 */\r
- PORT_GPDO_RESET, /* GPDO 200 */\r
- PORT_GPDO_RESET, /* GPDO 201 */\r
- PORT_GPDO_RESET, /* GPDO 202 */\r
- PORT_GPDO_RESET, /* GPDO 203 */\r
- PORT_GPDO_RESET, /* GPDO 204 */\r
- PORT_GPDO_RESET, /* GPDO 205 */\r
- PORT_GPDO_RESET, /* GPDO 206 */\r
- PORT_GPDO_RESET, /* GPDO 207 */\r
- PORT_GPDO_RESET, /* GPDO 208 */\r
- PORT_GPDO_RESET, /* GPDO 209 */\r
- PORT_GPDO_RESET, /* GPDO 210 */\r
- PORT_GPDO_RESET, /* GPDO 211 */\r
- PORT_GPDO_RESET, /* GPDO 212 */\r
- PORT_GPDO_RESET, /* GPDO 213 */\r
-};\r
-\r
-const Port_ConfigType PortConfigData =\r
-{\r
- .padCnt = sizeof(PortPadConfigData),\r
- .padConfig = PortPadConfigData,\r
- .outCnt = sizeof(PortOutConfigData),\r
- .outConfig = PortOutConfigData,\r
-};\r
+++ /dev/null
-/*\r
-* Configuration of module: Port (Port_Cfg.h)\r
-*\r
-* Created by: \r
-* Copyright: \r
-*\r
-* Configured for (MCU): MPC5668\r
-*\r
-* Module vendor: ArcCore\r
-* Generator version: 1.0.0\r
-*\r
-* Generated by Arctic Studio (http://arccore.com) \r
-*/\r
-\r
-
-#if !(((PORT_SW_MAJOR_VERSION == 1) && (PORT_SW_MINOR_VERSION == 0)) )
-#error Port: Configuration file expected BSW module version to be 1.0.*
-#endif
-
-\r
-#ifndef PORT_CFG_H_\r
-#define PORT_CFG_H_\r
-\r
-#include "Std_Types.h"\r
-\r
-#define PORT_VERSION_INFO_API STD_ON\r
-#define PORT_DEV_ERROR_DETECT STD_OFF\r
-#define PORT_SET_PIN_MODE_API STD_OFF\r
-#define PORT_SET_PIN_DIRECTION_API STD_OFF\r
-\r
-#define PORT_BIT0 (1<<15)\r
-#define PORT_BIT1 (1<<14)\r
-#define PORT_BIT2 (1<<13)\r
-#define PORT_BIT3 (1<<12)\r
-#define PORT_BIT4 (1<<11)\r
-#define PORT_BIT5 (1<<10)\r
-#define PORT_BIT6 (1<<9)\r
-#define PORT_BIT7 (1<<8)\r
-#define PORT_BIT8 (1<<7)\r
-#define PORT_BIT9 (1<<6)\r
-#define PORT_BIT10 (1<<5)\r
-#define PORT_BIT11 (1<<4)\r
-#define PORT_BIT12 (1<<3)\r
-#define PORT_BIT13 (1<<2)\r
-#define PORT_BIT14 (1<<1)\r
-#define PORT_BIT15 (1<<0)\r
-\r
-#define PORT_WPE_BIT PORT_BIT14\r
-#define PORT_WPS_BIT PORT_BIT15\r
-#define PORT_SRC0 PORT_BIT12\r
-#define PORT_SRC1 PORT_BIT13\r
-\r
-#define PORT_PULL_UP (PORT_WPE_BIT|PORT_WPS_BIT)\r
-#define PORT_PULL_DOWN (PORT_WPE_BIT)\r
-#define PORT_PULL_NONE 0\r
-#define PORT_SLEW_RATE_MIN 0\r
-#define PORT_SLEW_RATE_MED PORT_BIT13\r
-#define PORT_SLEW_RATE_MAX (PORT_BIT12|PORT_BIT13)\r
-#define PORT_HYS_ENABLE PORT_BIT11\r
-#define PORT_ODE_ENABLE PORT_BIT10\r
-#define PORT_IBE_ENABLE PORT_BIT7\r
-#define PORT_OBE_ENABLE PORT_BIT6\r
-#define PORT_IO (0)\r
-#define PORT_GPIO_APC PORT_BIT2\r
-#define PORT_FUNC0 (0)\r
-#define PORT_FUNC1 (PORT_BIT5)\r
-#define PORT_FUNC2 (PORT_BIT4)\r
-#define PORT_FUNC3 (PORT_BIT4|PORT_BIT5)\r
-#define PORT_FUNC4 (PORT_BIT3)\r
-\r
-#define PORT_PCR_RESET (0)\r
-#define PORT_GPDO_RESET (0)\r
-\r
-#define PORT_GPDO_HIGH (1)\r
-\r
-\r
-typedef uint16 Port_PinType;\r
-\r
-typedef struct\r
-{\r
- uint16_t padCnt;\r
- const uint16_t *padConfig;\r
- uint16_t outCnt;\r
- const uint8_t *outConfig;\r
-// uint16_t inCnt;\r
-// const uint8_t *inConfig;\r
-} Port_ConfigType;\r
-\r
-extern const Port_ConfigType PortConfigData;\r
-\r
-\r
-#endif /* PORT_CFG_H_ */\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.2.1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://autosar.org/3.2.1 autosar_3-2-1.xsd">\r
+ <TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>os_simple_mpc5668_gkit</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="0ba5d649-0434-45c9-855d-8c86f12cc5ac">\r
+ <SHORT-NAME>os_simple_mpc5668_gkit</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION />\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">MPC5668</SD>\r
+ <SD GID="GENDIR">${fileDir}/config</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/os_simple_mpc5668_gkit/SwComposition_os_simple_mpc5668_gkit</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/os_simple_mpc5668_gkit/Os</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/os_simple_mpc5668_gkit/Det</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/os_simple_mpc5668_gkit/EcuM</MODULE-REF>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/os_simple_mpc5668_gkit/Mcu</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="450141c6-b3de-4605-a29e-576fe1d2d152">\r
+ <SHORT-NAME>SwComposition_os_simple_mpc5668_gkit</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="cf6eedc8-cbe2-4faa-8a6e-b8308eaabda2">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG />\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.22</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="ba7590ce-ad93-4061-bfa0-fdd660cd8edc">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
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+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
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+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
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+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
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+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/ArcOsIsrMaxCount</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsNumberOfCores</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="e3564f08-19f7-49f1-830b-cf36426e3737">\r
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+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
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+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
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+ </PARAMETER-VALUES>\r
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+ </SUB-CONTAINERS>\r
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+ <CONTAINER UUID="7d1bd13e-4e40-4788-adf0-92fb2f505a0a">\r
+ <SHORT-NAME>Alarm1</SHORT-NAME>\r
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+ </SDGS>\r
+ </ADMIN-DATA>\r
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+ <REFERENCE-VALUES>\r
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+ <CONTAINER UUID="c9304933-b723-42e4-ba88-8cce6de02eda">\r
+ <SHORT-NAME>OsAlarmAction</SHORT-NAME>\r
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+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="d448045c-da6f-4b95-833d-bff6bc2ec9ea">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
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+ </REFERENCE-VALUE>\r
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+ <VALUE-REF DEST="CONTAINER">/os_simple_mpc5668_gkit/Os/eTask2</VALUE-REF>\r
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+ </CONTAINER>\r
+ <CONTAINER UUID="64f5aeb9-1ad4-49be-b4c8-c59121511d1b">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
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+ </CONTAINER>\r
+ <CONTAINER UUID="46add099-5cd4-4e43-9c48-6c6808c2ccf5">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
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+ <VALUE>1</VALUE>\r
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+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetWrapRamlog</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetUseStdErr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Det/DetGeneral/DetDeInitAPI</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetNumberOfCallbacks</DEFINITION-REF>\r
+ <VALUE>5</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Det/DetGeneral/DetRamlogSize</DEFINITION-REF>\r
+ <VALUE>16</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="198876eb-33cf-4cbf-a37c-06d8a9670fe9">\r
+ <SHORT-NAME>EcuM</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG />\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.1</SD>\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/EcuM</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="576fbc52-a01f-44d3-9519-8e4116800610">\r
+ <SHORT-NAME>EcuMGeneral</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMGeneral</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMIncludeNvramMgr</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMGeneral/EcuMMainFunctionPeriod</DEFINITION-REF>\r
+ <VALUE>0.2</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="fa5bd3d6-0951-43a5-8529-7140d9689037">\r
+ <SHORT-NAME>EcuMConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramReadallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMRunMinimumDuration</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMNvramWriteallTimeout</DEFINITION-REF>\r
+ <VALUE>10.0</VALUE>\r
+ </FLOAT-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="09379f9e-7192-46f2-a7d8-a91e796beb1b">\r
+ <SHORT-NAME>EcuMUserConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/EcuM/EcuMConfiguration/EcuMUserConfig</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ <MODULE-CONFIGURATION UUID="7d4d4f2f-5fe6-491c-9178-7c012333d4f4">\r
+ <SHORT-NAME>Mcu</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG />\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.3</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Mcu</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="6a518624-905b-4cd3-9eeb-019352d2bd6b">\r
+ <SHORT-NAME>McuGeneralConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuGeneralConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuDevErrorDetect</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuPerformResetApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Mcu/McuGeneralConfiguration/McuVersionInfoApi</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="dad41306-3c7b-4d89-8e01-ea2b31169c22">\r
+ <SHORT-NAME>McuModuleConfiguration</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSrcFailureNotification</DEFINITION-REF>\r
+ <VALUE>DISABLED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuNumberOfMcuModes</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="DERIVED-INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuRamSectors</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuResetSetting</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="84472191-b207-48c4-943a-8d5f3b3fd5ba">\r
+ <SHORT-NAME>McuClockSettingConfig</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuDefaultClockReference</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/os_simple_mpc5668_gkit/Mcu/McuModuleConfiguration/McuClockSettingConfig/EXT_REF_112MHZ</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="f8fe5e22-4e8e-4c0e-9534-665bb66ae538">\r
+ <SHORT-NAME>EXT_REF_112MHZ</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG GID="Arccore::IdentifiableOptions">\r
+ <SD GID="@ARCCORE_COMMENT">(extal * (emfd+16)) / ((prediv+1)*(erfd+1))</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <FLOAT-VALUE>\r
+ <DEFINITION-REF DEST="FLOAT-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointFrequency</DEFINITION-REF>\r
+ <VALUE>4.0E7</VALUE>\r
+ </FLOAT-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEprediv</DEFINITION-REF>\r
+ <VALUE>9</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllEmfd</DEFINITION-REF>\r
+ <VALUE>40</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuClockSettingConfig/McuClockReferencePoint/McuClockReferencePointPllErfd</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="981c619f-8c0e-448e-8ec9-c269a1cad94f">\r
+ <SHORT-NAME>McuModeSettingConf</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Mcu/McuModuleConfiguration/McuModeSettingConf/McuMode</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES>\r
+</AUTOSAR>\r
+\r
projects / arc.git / commitdiff