}\r
\r
if (canHwConfig->Can_Arc_Fifo) {\r
+ /*\r
+ * NOTE!!!\r
+ * Do not enable RxFIFO. See [Freescale Device Errata MPC5510ACE, Rev. 10 APR 2009, errata ID: 14593].\r
+ */\r
+ \r
/* Note\r
* NOT tested at all\r
*/\r
canUnit->state = CANIF_CS_STARTED;\r
imask_t state = McuE_EnterCriticalSection();\r
if (canUnit->lock_cnt == 0) // REQ CAN196\r
+ {\r
Can_EnableControllerInterrupts(controller);\r
+ }\r
McuE_ExitCriticalSection(state);\r
break;\r
case CAN_T_WAKEUP: //CAN267\r
#if ( EEP_DEV_ERROR_DETECT == STD_ON ) // Report DEV errors\r
#define VALIDATE(_exp,_api,_err ) \\r
if( !(_exp) ) { \\r
- Det_ReportError(MODULE_ID_GPT,0,_api,_err); \\r
+ Det_ReportError(MODULE_ID_EEP,0,_api,_err); \\r
return; \\r
}\r
\r
#define VALIDATE_W_RV(_exp,_api,_err,_rv ) \\r
if( !(_exp) ) { \\r
- Det_ReportError(MODULE_ID_GPT,0,_api,_err); \\r
+ Det_ReportError(MODULE_ID_EEP,0,_api,_err); \\r
return (_rv); \\r
}\r
\r
Eep_Arc_JobType mainState;\r
Spi_SequenceType currSeq;\r
uint32 chunkSize;\r
+ uint32 pageSize;
} Eep_JobInfoType;\r
\r
#define JOB_SET_STATE(_x,_y) job->state=(_x);job->mainState=(_y)\r
\r
} Eep_GlobalType;\r
\r
-#if 0\r
+#if 0 // Use SPI synchronous transmit
#define SPI_TRANSMIT_FUNC(_x) Spi_SyncTransmit(_x)\r
-#else\r
+#else // Use SPI asynchronous transmit
#define SPI_TRANSMIT_FUNC(_x,_y) Eep_AsyncTransmit(_x,_y)\r
\r
Std_ReturnType Eep_AsyncTransmit(Spi_SequenceType Sequence,Eep_JobInfoType *job) {\r
Eep_Global.status = MEMIF_IDLE;\r
Eep_Global.jobResultType = MEMIF_JOB_OK;\r
\r
+ Eep_SetMode( CFG_P()->EepDefaultMode );
+
}\r
\r
\r
job->chunkSize = Eep_Global.config->EepNormalWriteBlockSize;\r
}\r
\r
+ job->pageSize = Eep_Global.config->EepPageSize;
job->eepAddr = EepromAddress;\r
job->targetAddr = (uint8 *)DataBufferPtr;\r
job->left = Length;\r
job->chunkSize = Eep_Global.config->EepNormalReadBlockSize;\r
}\r
\r
+ job->pageSize = Eep_Global.config->EepPageSize; // Not relevant to compare/read operations, but set anyways.
job->eepAddr = EepromAddress;\r
job->targetAddr = TargetAddressPtr;\r
job->left = Length;\r
}\r
\r
\r
-void Eep_Cancel( void ){\r
- EEP_JOB_END_NOTIFICATION();\r
+void Eep_Cancel( void ) {
+ EEP_JOB_ERROR_NOTIFICATION();
\r
if (MEMIF_JOB_PENDING==Eep_Global.jobResultType) {\r
Eep_Global.jobResultType=MEMIF_JOB_CANCELLED;\r
static Spi_SeqResultType Eep_ProcessJob( Eep_JobInfoType *job ) {\r
Spi_SeqResultType rv;\r
_Bool done = 0;\r
+ uint32 chunkSize = 0;
+ uint32 sizeLeftInPage = 0;
\r
/* Check if previous sequence is OK */\r
rv = Spi_GetSequenceResult(job->currSeq);\r
/* Check status from erase cmd, read status from flash */\r
Spi_SetupEB( CFG_P()->EepDataChannel, NULL, &Eep_Global.ebReadStatus, 1);\r
Eep_Global.ebCmd = E2_RDSR;\r
- if( SPI_TRANSMIT_FUNC(CFG_P()->EepCmd2Sequence,job ) != E_OK ) {\r
- assert(0);\r
+ if( SPI_TRANSMIT_FUNC(CFG_P()->EepCmd2Sequence,job ) == E_OK )
+ {
+ SET_STATE(1,JOB_READ_STATUS_RESULT);
+ }
+ else
+ {
+ SET_STATE(1,JOB_READ_STATUS);
}\r
- SET_STATE(1,JOB_READ_STATUS_RESULT);\r
break;\r
\r
case JOB_READ_STATUS_RESULT:\r
DEBUG(DEBUG_LOW,"%s: READ_STATUS_RESULT\n",MODULE_NAME);\r
- if( Eep_Global.ebReadStatus&1 ) {\r
+ if( Eep_Global.ebReadStatus & 1 ) {\r
SET_STATE(0,JOB_READ_STATUS);\r
} else {\r
SET_STATE(0,JOB_MAIN);\r
break;\r
\r
case JOB_MAIN:\r
- if( job->left != 0 ) {\r
- if( job->left <= job->chunkSize ) {\r
- job->chunkSize = job->left;\r
+ if( job->left > 0 ) {
+ if( job->left <= job->chunkSize ) {
+ chunkSize = job->left;
+ } else {
+ chunkSize = job->chunkSize;
}\r
\r
Spi_ConvertToSpiAddr(Eep_Global.ebE2Addr,job->eepAddr);\r
\r
- switch(job->mainState) {\r
+ BOOL spiTransmitOK = FALSE;
\r
+ switch(job->mainState)
+ {
case EEP_ERASE:\r
/* NOT USED */\r
break;\r
case EEP_READ:\r
case EEP_COMPARE:\r
- DEBUG(DEBUG_LOW,"%s: READ s:%04x d:%04x l:%04x\n",MODULE_NAME,job->eepAddr, job->targetAddr, job->left);\r
+ DEBUG(DEBUG_LOW,"%s: READ s:%04x d:%04x l:%04x\n",MODULE_NAME,job->eepAddr, job->targetAddr, job->left);\r
Eep_Global.ebCmd = E2_READ;\r
- Spi_SetupEB( CFG_P()->EepDataChannel, NULL ,job->targetAddr,job->chunkSize);\r
- SPI_TRANSMIT_FUNC(CFG_P()->EepReadSequence,job );\r
+ Spi_SetupEB( CFG_P()->EepDataChannel, NULL ,(Spi_DataType*)job->targetAddr,chunkSize);
+ if (SPI_TRANSMIT_FUNC(CFG_P()->EepReadSequence,job) == E_OK) {
+ spiTransmitOK = TRUE;
+ }
break;\r
\r
case EEP_WRITE:\r
DEBUG(DEBUG_LOW,"%s: WRITE d:%04x s:%04x first data:%02x\n",MODULE_NAME,job->eepAddr,job->targetAddr,*job->targetAddr);\r
+
+ // Calculate how much space there is left in the current EEPROM page.
+ sizeLeftInPage = job->pageSize - (job->eepAddr % job->pageSize);
+
+ // Handle EEPROM page boundaries, i.e. make sure that we limit the chunk
+ // size so we don't write over the page boundary.
+ if (chunkSize > sizeLeftInPage) {\r
+ chunkSize = sizeLeftInPage;
+ } else {
+ // Do nothing since the size of the chunk to write is less than the
+ // available space left in the page.
+ }
+
Eep_Global.ebCmd = E2_WRITE;\r
Spi_ConvertToSpiAddr(Eep_Global.ebE2Addr,job->eepAddr);\r
- Spi_SetupEB( CFG_P()->EepDataChannel, job->targetAddr, NULL, job->chunkSize);\r
- SPI_TRANSMIT_FUNC(CFG_P()->EepWriteSequence,job );\r
+ Spi_SetupEB( CFG_P()->EepDataChannel, (const Spi_DataType*)job->targetAddr, NULL, chunkSize);
+ if (SPI_TRANSMIT_FUNC(CFG_P()->EepWriteSequence,job ) == E_OK) {
+ spiTransmitOK = TRUE;
+ }
break;\r
\r
default:\r
break;\r
}\r
\r
- job->eepAddr += job->chunkSize;\r
- job->targetAddr += job->chunkSize;\r
- job->left -= job->chunkSize;\r
- SET_STATE(1,JOB_READ_STATUS);\r
+ if (spiTransmitOK) {
+ job->eepAddr += chunkSize;
+ job->targetAddr += chunkSize;
+ job->left -= chunkSize;
+
+ SET_STATE(1,JOB_READ_STATUS);\r
+ } else {
+ SET_STATE(1,JOB_MAIN);
+ }
\r
} else {\r
/* We are done :) */\r
readJob.targetAddr = Eep_CompareBuffer;\r
} else {\r
// all other cases are bad\r
- firstTime = 1;\r
- Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Eep_Global.jobType = EEP_NONE;\r
- Eep_Global.status = MEMIF_IDLE;\r
+ firstTime = 1;\r
+ Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
+ Eep_Global.jobType = EEP_NONE;\r
+ Eep_Global.status = MEMIF_IDLE;\r
\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_COMPARE_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_COMPARE_ID, MEMIF_JOB_FAILED );
EEP_JOB_ERROR_NOTIFICATION();\r
}\r
}\r
Eep_Global.jobResultType = MEMIF_JOB_OK;\r
Eep_Global.jobType = EEP_NONE;\r
Eep_Global.status = MEMIF_IDLE;\r
- EEP_JOB_END_NOTIFICATION();\r
- } else if( jobResult == SPI_SEQ_PENDING ) {\r
- /* Busy, Do nothing */\r
- } else {\r
- // Error\r
- Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
- Eep_Global.jobType = EEP_NONE;\r
- Eep_Global.status = MEMIF_IDLE;\r
-\r
- switch(Eep_Global.jobType) {\r
- case EEP_ERASE:\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ EEP_JOB_END_NOTIFICATION();\r
+ } else if( jobResult == SPI_SEQ_PENDING ) {\r
+ /* Busy, Do nothing */\r
+ } else {\r
+ // Error\r
+\r
+ Eep_EcoreJobType failedJobType = Eep_Global.jobType;
+
+ Eep_Global.jobResultType = MEMIF_JOB_FAILED;\r
+ Eep_Global.jobType = EEP_NONE;\r
+ Eep_Global.status = MEMIF_IDLE;\r
+\r
+ switch(failedJobType) {
+ case EEP_ERASE:\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_ERASE_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_ERASE_ID, MEMIF_JOB_FAILED );
break;\r
- case EEP_READ:\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ case EEP_READ:\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_READ_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_READ_ID, MEMIF_JOB_FAILED );
break;\r
- case EEP_WRITE:\r
- DET_REPORTERROR(MODULE_ID_EEP,0, 0x9, MEMIF_JOB_FAILED );\r
+ case EEP_WRITE:\r
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_WRITE_ID, EEP_E_COM_FAILURE ); // EEP056 (reporting to DET because DEM is missing)
+ DET_REPORTERROR(MODULE_ID_EEP,0, EEP_WRITE_ID, MEMIF_JOB_FAILED );
break;\r
- default:\r
- assert(0);\r
+ default:\r
+ assert(0);\r
}\r
\r
EEP_JOB_ERROR_NOTIFICATION();\r
#define SHADOW_ROW_SIZE 0x00008000\r
#define FLASH_PAGE_SIZE H7FB_PAGE_SIZE\r
\r
+#define FLASH_TOTAL_BLOCKS ( 20 )\r
+\r
#if 0\r
#define VFLAGS_ADDR_SECT (1<<0)\r
#define VFLAGS_ADDR_PAGE (1<<1)\r
}\r
\r
#define FLS_VALIDATE_PARAM_DATA_W_RV(_ptr,_api, _rv) \\r
- if( (_ptr)==((void *)0)) { \\r
+ if(( (uint32)(_ptr)%FLS_READ_PAGE_SIZE != 0 ) || ( (_ptr)==((void *)0))) { \
Det_ReportError(MODULE_ID_FLS,0,_api,FLS_E_PARAM_DATA); \\r
return _rv; \\r
}\r
endBlock = address_to_block( addr + size - 1,&rem );\r
\r
// Check so our implementation holds..\r
- assert( endBlock<=32 );\r
+ assert( endBlock <= FLASH_TOTAL_BLOCKS );\r
\r
#define BLOCK_MASK 0x0003ffffUL\r
\r
\r
\r
// shift things in to make freescale driver happy\r
- eraseBlocks->lowEnabledBlocks = mask&0x3f; // ????\r
- eraseBlocks->midEnabledBlocks = (mask>>10)&3; // ????\r
- eraseBlocks->highEnabledBlocks = mask>>12;\r
+ eraseBlocks->lowEnabledBlocks = mask&0x3ff; // Bits 0..9 indicats low blocks
+ eraseBlocks->midEnabledBlocks = (mask>>10)&3; // Bits 10..11 indicats mid blocks
+ eraseBlocks->highEnabledBlocks = mask>>12; // Bits 12..19 indicats high blocks
\r
\r
return ;\r
Std_ReturnType Fls_Erase( Fls_AddressType TargetAddress,\r
Fls_LengthType Length )\r
{\r
- uint32 block;\r
- uint32 sBlock;\r
+ uint32 endBlock;\r
+ uint32 startBlock;\r
uint32 rem;\r
Fls_EraseBlockType eraseBlock;\r
Fls_EraseInfoType eraseInfo;\r
return E_NOT_OK;\r
\r
// TargetAddress\r
- sBlock = address_to_block(TargetAddress,&rem);\r
+ startBlock = address_to_block(TargetAddress,&rem);\r
\r
- if( (sBlock == (-1)) || (rem!=0) ) {\r
+ if( (startBlock == (-1)) || (rem!=0) ) {\r
DET_REPORTERROR(MODULE_ID_FLS,0,0x0,FLS_E_PARAM_ADDRESS );\r
return E_NOT_OK;\r
}\r
\r
- block = address_to_block(TargetAddress+Length,&rem);\r
+ endBlock = address_to_block(TargetAddress+Length,&rem);\r
\r
// Check if we trying to erase a partition that we are executing in\r
pc = Fls_GetPc();\r
uint32 pcBlock = address_to_block(pc,&rem);\r
uint8 *partMap = Fls_Global.config->FlsBlockToPartitionMap;\r
\r
- if( (partMap[pcBlock] >= partMap[sBlock]) && (partMap[pcBlock] <= partMap[block]) ) {\r
-// if( address_to_block(pc,&rem) == Fls_Global.config->FlsBlockToPartitionMap[block] ) {\r
+ if( (partMap[pcBlock] >= partMap[startBlock]) && (partMap[pcBlock] <= partMap[endBlock]) ) {\r
// Can't erase and in the same partition we are executing\r
assert(0);\r
}\r
memcpy(VersioninfoPtr, &_Fls_VersionInfo, sizeof(Std_VersionInfoType));\r
}\r
\r
+void Fls_Check( uint32 flsBaseAddress, uint32 flsTotalSize )\r
+{\r
+ // ECC checking is always on by default.\r
+ // If a non correctable error is discovered\r
+ // we will get an IVOR2 exception.\r
+\r
+ // Enable Flash Non_Correctible Reporting,\r
+ // Not really necessary but makes more information\r
+ // available in the MCM registers if an error occurs.\r
+ MCM.ECR.B.EFNCR = 1;\r
+\r
+ // Read flash in 32bit chunks, it's most efficient.\r
+ uint32* memoryChunkPtr = (uint32*)flsBaseAddress;\r
+ uint32* flsTotalSizePtr = (uint32*)flsTotalSize;\r
+ uint32 memoryChunk = *memoryChunkPtr; // The first read\r
+\r
+ // Read the rest of the flash, chunk by chunk\r
+ while(memoryChunkPtr < flsTotalSizePtr)\r
+ {\r
+ memoryChunk=*(memoryChunkPtr++);\r
+ }\r
+}\r
\r
\r
returnCode = Fls_H7F_ProgramStatus(pSSDConfig,pInfo);\r
break;\r
default:\r
+ returnCode = 0;\r
assert(0);\r
break;\r
}\r
\r
//-------------------------------------------------------------------\r
\r
-\r
-/**\r
- * ISR helper-function that handles the HW channels( 0 to 8 )\r
- *\r
- * @param channel - Channel that the raised the interrupt\r
+/*\r
+ * ISR for a given PIT channel (macro)\r
*/\r
-\r
-static void Gpt_IsrCh(Gpt_ChannelType channel)\r
-{\r
- const Gpt_ConfigType *config;\r
- int confCh;\r
-\r
- confCh = Gpt_Global.channelMap[channel];\r
- assert(confCh != GPT_CHANNEL_ILL);\r
-\r
- config = &Gpt_Global.config[confCh];\r
-\r
- if (config->GptChannelMode == GPT_MODE_ONESHOT)\r
- {\r
- // Disable the channel\r
- PIT.EN.R &= ~(1<<channel);\r
-\r
- Gpt_Unit[channel].state = GPT_STATE_STOPPED;\r
+#define GPT_ISR( _channel ) \\r
+ static void Gpt_Isr_Channel##_channel( void ) \\r
+ { \\r
+ const Gpt_ConfigType *config; \\r
+ int confCh; \\r
+ \\r
+ /* Find the config entry for the PIT channel. */ \\r
+ confCh = Gpt_Global.channelMap[ _channel ]; \\r
+ ASSERT(confCh != GPT_CHANNEL_ILL); \\r
+ config = &Gpt_Global.config[ confCh ]; \\r
+ \\r
+ if( config->GptChannelMode == GPT_MODE_ONESHOT ) \\r
+ { \\r
+ /* Disable the channel. */ \\r
+ PIT.EN.R &= ~( 1 << _channel ); \\r
+ \\r
+ Gpt_Unit[_channel].state = GPT_STATE_STOPPED; \\r
+ } \\r
+ config->GptNotification(); \\r
+ \\r
+ /* Clear interrupt. */ \\r
+ PIT.FLG.R = ( 1 << _channel ); \\r
}\r
- config->GptNotification();\r
\r
- // Clear interrupt\r
- PIT.FLG.R = (1<<channel); // Added by Mattias 2009-01\r
-}\r
-\r
-//-------------------------------------------------------------------\r
-// Macro that counts leading zeroes.\r
-#define CNTLZW_INV(x) (31-cntlzw(x))\r
+#define STR__(x) #x\r
+#define XSTR__(x) STR__(x)\r
\r
-/**\r
- * ISR that handles all interrupts to the PIT channels\r
- * ( NOT the decrementer )\r
+/*\r
+ * Create instances of the ISR for each PIT channel.\r
*/\r
-\r
-static void Gpt_Isr(void)\r
-{\r
- uint32 flgMask= PIT.FLG.R;\r
- uint8 chNr = 0;\r
-\r
- // Loop over all interrupts\r
- for (; flgMask; flgMask&=~(1<<chNr))\r
- {\r
- // Find first channel that is requesting service.\r
- chNr = CNTLZW_INV(flgMask);\r
- Gpt_IsrCh(chNr);\r
- // Clear interrupt\r
- PIT.FLG.R = (1<<chNr);\r
- }\r
+GPT_ISR( 0 );\r
+GPT_ISR( 1 );\r
+GPT_ISR( 2 );\r
+GPT_ISR( 3 );\r
+GPT_ISR( 4 );\r
+GPT_ISR( 5 );\r
+GPT_ISR( 6 );\r
+GPT_ISR( 7 );\r
+GPT_ISR( 8 );\r
+\r
+#define GPT_ISR_INSTALL( _channel ) \\r
+{ \\r
+ TaskType tid; \\r
+ tid = Os_Arc_CreateIsr(Gpt_Isr_Channel##_channel, 2, XSTR__(Gpt_##_channel)); \\r
+ Irq_AttachIsr2(tid, NULL, PIT_PITFLG_RTIF + _channel); \\r
}\r
\r
//-------------------------------------------------------------------\r
{\r
if (cfg->GptNotification != NULL)\r
{\r
-\r
-#if defined(USE_KERNEL)\r
- TaskType tid;\r
- tid = Os_Arc_CreateIsr(Gpt_Isr, 2, "Gpt_Isr");\r
- Irq_AttachIsr2(tid, NULL, PIT_PITFLG_RTIF + ch);\r
-#else\r
- IntCtrl_InstallVector(Gpt_Isr, PIT_PITFLG_RTIF + ch, 1, CPU_Z1);\r
-#endif\r
+ switch( ch )\r
+ {\r
+ case 0: GPT_ISR_INSTALL( 0 ); break;\r
+ case 1: GPT_ISR_INSTALL( 1 ); break;\r
+ case 2: GPT_ISR_INSTALL( 2 ); break;\r
+ case 3: GPT_ISR_INSTALL( 3 ); break;\r
+ case 4: GPT_ISR_INSTALL( 4 ); break;\r
+ case 5: GPT_ISR_INSTALL( 5 ); break;\r
+ case 6: GPT_ISR_INSTALL( 6 ); break;\r
+ case 7: GPT_ISR_INSTALL( 7 ); break;\r
+ case 8: GPT_ISR_INSTALL( 8 ); break;\r
+ default:\r
+ {\r
+ // Unknown PIT channel.\r
+ assert( 0 );\r
+ break;\r
+ }\r
+ }\r
}\r
}\r
#if defined(USE_KERNEL)\r
{\r
remaining = get_spr(SPR_DEC);\r
}\r
+ else\r
+ {\r
+ /* We have written a fault in the fault log. Return 0. */\r
+ remaining = 0;\r
+ }\r
\r
return remaining;\r
}\r
{\r
timer = get_spr(SPR_DECAR) - get_spr(SPR_DEC);\r
}\r
+ else\r
+ {\r
+ /* We have written a fault in the fault log. Return 0. */\r
+ timer = 0;\r
+ }\r
\r
return (timer);\r
}\r
Dem_ReportErrorStatus(MCU_E_CLOCK_FAILURE, DEM_EVENT_STATUS_FAILED);\r
#endif\r
\r
+ /*\r
+ * NOTE!!!\r
+ * This interrupt may be triggered more than expected.\r
+ * If you are going to use this interrupt, see [Freescale Device Errata MPC5510ACE, Rev. 10 APR 2009, errata ID: 6764].\r
+ *\r
+ */\r
+\r
Mcu_Global.stats.lossOfLockCnt++;\r
// Clear interrupt\r
FMPLL.SYNSR.B.LOLF = 1;\r
// Pointers to the register memory areas\r
vuint16_t * padConfig = &(SIU.PCR[0].R);\r
vuint8_t * outConfig = &(SIU.GPDO[0].R);\r
-// vuint8_t * inConfig = &(SIU.GPDI[0].R);\r
+// vuint8_t * inConfig = &(SIU.GPDI[0].R); // Read only\r
\r
// Copy config to register areas\r
memcpy((void *)outConfig, configType->outConfig, configType->outCnt);\r
// This parameter is the number of bytes written within one job processing cycle in fast mode\r
Eep_LengthType EepFastWriteBlockSize;\r
\r
+ // This parameter is the EEPROM page size, i.e. number of bytes.
+ Eep_LengthType EepPageSize;
+
// This parameter is the EEPROM device base address.\r
Eep_AddressType EepBaseAddress;\r
} Eep_ConfigType;\r
.EepJobCallCycle = 0.2,\r
\r
// This parameter is the used size of EEPROM device in bytes.\r
- .EepSize = 0x8000,\r
+// .EepSize = 0x8000,\r
+ .EepSize = 0x2000,\r
\r
// This parameter is a reference to a callback function for positive job result\r
.Eep_JobEndNotification = &_JobEndNotify,\r
// This parameter is the default EEPROM device mode after initialization.\r
.EepDefaultMode = MEMIF_MODE_FAST,\r
\r
+ // Number of bytes read within one job processing cycle in normal mode.
+ .EepNormalReadBlockSize = 4,
+
// This parameter is the number of bytes read within one job processing cycle in fast mode\r
.EepFastReadBlockSize = 64,\r
\r
- .EepNormalReadBlockSize = 4,\r
-\r
// Number of bytes written within one job processing cycle in normal mode.\r
.EepNormalWriteBlockSize = 1,\r
\r
+ // This parameter is the number of bytes written within one job processing cycle in fast mode
+ .EepFastWriteBlockSize = 64,
+
// This parameter is a reference to a callback function for negative job result\r
.Eep_JobErrorNotification = &_JobErrorNotify,\r
\r
- // This parameter is the number of bytes written within one job processing cycle in fast mode\r
- .EepFastWriteBlockSize = 64,\r
+ // This parameter is the EEPROM page size, i.e. number of bytes.
+ .EepPageSize = 64,
\r
// This parameter is the EEPROM device base address.\r
.EepBaseAddress = 0\r
\r
/* Error from CAN controller */\r
typedef union {\r
- volatile uint32_t R;\r
+ vuint32_t R;\r
struct {\r
- volatile uint32_t:24;\r
- volatile uint32_t BIT1ERR:1;\r
- volatile uint32_t BIT0ERR:1;\r
- volatile uint32_t ACKERR:1;\r
- volatile uint32_t CRCERR:1;\r
- volatile uint32_t FRMERR:1;\r
- volatile uint32_t STFERR:1;\r
- volatile uint32_t TXWRN:1;\r
- volatile uint32_t RXWRN:1;\r
+ vuint32_t:24;\r
+ vuint32_t BIT1ERR:1;\r
+ vuint32_t BIT0ERR:1;\r
+ vuint32_t ACKERR:1;\r
+ vuint32_t CRCERR:1;\r
+ vuint32_t FRMERR:1;\r
+ vuint32_t STFERR:1;\r
+ vuint32_t TXWRN:1;\r
+ vuint32_t RXWRN:1;\r
} B;\r
} Can_Arc_ErrorType;\r
\r
#define EEP_E_UNINIT 0x20\r
#define EEP_E_BUSY 0x21\r
\r
+/* Production errors */\r
+// #define EEP_E_COM_FAILURE 0x30 /* Shall be located in DemIntErrId.h when its available */\r
+\r
/* Service id's for fls functions */\r
#define EEP_INIT_ID 0x00\r
#define EEP_SETMODE_ID 0x01\r
\r
void Fls_GetVersionInfo( Std_VersionInfoType *VersioninfoPtr );\r
\r
+void Fls_Check( uint32 flsBaseAddress, uint32 flsTotalSize );\r
\r
#endif /*FLS_H_*/\r
projects / arc.git / commitdiff