# switch to regexp syntax.\r
syntax: regexp\r
^.*obj_.*\.[h|c|s]\r
-\r
-\r
+^\.lib.*\.arxml\r
syntax: regexp
^.project$
\ No newline at end of file
#define DIO_GET_PORT_FROM_CHANNEL_ID(_channelId) (_channelId / 16)\r
#define DIO_GET_BIT_FROM_CHANNEL_ID(_channelId) (1 << (_channelId % 16))\r
\r
+#define CHANNEL_PTR (&DioChannelConfigData)\r
+#define PORT_PTR (&DioPortConfigData)\r
+#define CHANNEL_GRP_PTR (&DioConfigData)\r
+\r
#if ( DIO_VERSION_INFO_API == STD_ON )\r
static Std_VersionInfoType _Dio_VersionInfo =\r
{\r
#include "Os.h"\r
#include "irq.h"\r
#include "Mcu.h"\r
+#include "arc.h"\r
\r
#define DCAN1_MAX_MESSAGEBOXES 64\r
#define DCAN2_MAX_MESSAGEBOXES 64\r
return 0;\r
}\r
\r
-uint32 usedBoxes[64] = {0};\r
+#define DCAN_MC_NEWDAT 15\r
+#define DCAN_MC_EOB 7\r
+\r
+uint32 usedRxBoxes[64] = {0};\r
+uint32 usedTxBoxes[64] = {0};\r
+\r
+static inline Can_ReturnType handleRxMsgObject(uint8 MsgNr, const Can_HardwareObjectType *hoh, CanControllerIdType controller) {\r
+ uint32 MsgId;\r
+ uint8 MsgDlc;\r
+ uint8 DataByteIndex;\r
+ uint8 *SduPtr;\r
+\r
+ /* Wait until Busy Flag is 0 */\r
+ DCAN_WAIT_UNTIL_NOT_BUSY_NO_RV(controller, IfRegId);\r
+\r
+ // Read message control\r
+ uint32 mc = CanRegs[controller]->IFx[IfRegId].MC;\r
+ uint32 arb = CanRegs[controller]->IFx[IfRegId].ARB;\r
+\r
+ // Is there a new message waiting?\r
+ if (!(mc & (1 << DCAN_MC_NEWDAT))) {\r
+ return CAN_NOT_OK; // Nothing more to be done.\r
+ }\r
+\r
+ // For debug\r
+ if (MsgNr == 0) {\r
+ usedRxBoxes[MsgNr]++;\r
+ } else {\r
+ usedRxBoxes[MsgNr]++;\r
+ }\r
+\r
+\r
+ /* Extended Id */\r
+ if(arb & 0x40000000) {\r
+ /* Bring Id to standardized format (MSB marks extended Id) */\r
+ MsgId = (arb & 0x1FFFFFFF) | 0x80000000;\r
+\r
+ } else { /* Standard Id */\r
+ /* Bring Id to standardized format (MSB marks extended Id) */\r
+ MsgId = (arb & 0x1FFC0000) >> 18;\r
+ }\r
+\r
+ /* DLC (Max 8) */\r
+ MsgDlc = mc & 0x000F;\r
+ if(MsgDlc > 8) {\r
+ MsgDlc = 8;\r
+ }\r
+\r
+ /* Let SduPtr point to Shadow Buffer */\r
+ SduPtr = RxShadowBuf[controller];\r
+\r
+ /* Copy Message Data to Shadow Buffer */\r
+ for(DataByteIndex = 0; DataByteIndex < MsgDlc; DataByteIndex++)\r
+ {\r
+ SduPtr[DataByteIndex] = CanRegs[controller]->IFx[IfRegId].DATx[ElementIndex[DataByteIndex]];\r
+ }\r
+\r
+ /* Indicate successful Reception */\r
+ CanIf_RxIndication(hoh->CanObjectId, MsgId, MsgDlc, SduPtr);\r
+\r
+ // Is this the last message object of the FIFO?\r
+ if (mc & (1 << DCAN_MC_EOB)) {\r
+ return CAN_NOT_OK;\r
+ }\r
+\r
+ return CAN_OK;\r
+}\r
+\r
\r
void Can_InterruptHandler(CanControllerIdType controller)\r
{\r
uint32 MsgNr;\r
- uint32 MsgId;\r
- uint8 MsgDlc;\r
- uint8 DataByteIndex;\r
- uint8 *SduPtr;\r
-\r
- //Can_DisableControllerInterrupts(controller);\r
\r
uint32 ir = CanRegs[controller]->IR;\r
\r
- if(ir == 0x8000)\r
- {\r
+\r
+ if(ir == 0x8000) { // This is an error interrupt\r
+\r
uint32 sr = CanRegs[controller]->SR;\r
- /* WakeUp Pending */\r
- if(sr & 0x00000200) {\r
+\r
+ if(sr & 0x00000200) { /* WakeUp Pending */\r
/* Set Init Bit, so that Controller is in Stop state */\r
CanRegs[controller]->CTL |= 0x1;\r
// EcuM_CheckWakeUp(ControllerConfig[0].WakeupSrc);\r
\r
}\r
- /* Bus Off */\r
- if(sr & 0x00000080) {\r
+\r
+ if(sr & 0x00000080) { /* Bus Off */\r
Can_SetControllerMode(controller, CAN_T_STOP); // CANIF272\r
//CanIf_ControllerBusOff(0); // Not implemented in Arctic Core\r
\r
}\r
- }\r
- else\r
- {\r
- MsgNr = ir;\r
-\r
\r
- if (MsgNr == 0) {\r
- usedBoxes[MsgNr]++;\r
- } else {\r
- usedBoxes[MsgNr]++;\r
- }\r
- \r
+ } else if (ir > 0 && ir < 0x8000){ // This interrupt is from a message object.\r
+ MsgNr = ir;\r
\r
- /* Read Arbitration, Control and Data Bits and clear IntPnd and NewDat*/\r
- CanRegs[controller]->IFx[IfRegId].COM = 0x003F0000 | MsgNr;\r
+ /* Read Arbitration and control */\r
+ CanRegs[controller]->IFx[IfRegId].COM = 0x003F0000 | MsgNr;\r
\r
- /* Wait until Busy Flag is 0 */\r
- DCAN_WAIT_UNTIL_NOT_BUSY_NO_RV(controller, IfRegId);\r
+ /* Wait until Busy Flag is 0 */\r
+ DCAN_WAIT_UNTIL_NOT_BUSY_NO_RV(controller, IfRegId);\r
\r
/* Transmit Object */\r
if(CanRegs[controller]->IFx[IfRegId].ARB & 0x20000000)\r
{\r
+ // For debug\r
+ if (MsgNr == 0) {\r
+ usedTxBoxes[MsgNr]++;\r
+ } else {\r
+ usedTxBoxes[MsgNr]++;\r
+ }\r
+\r
/* Reset TxRqst-Array Element */\r
ControllerConfig[controller].TxPtr[MsgNr - 1] = 0;\r
/* A Message was successfully transmitted */\r
CanIf_TxConfirmation(ControllerConfig[controller].PduPtr[MsgNr - 1].swPduHandle);\r
- }\r
+\r
/* Receive Object */\r
- else\r
- {\r
- /* Extended Id */\r
- if(CanRegs[controller]->IFx[IfRegId].ARB & 0x40000000)\r
- {\r
- /* Bring Id to standardized format (MSB marks extended Id) */\r
- MsgId = (CanRegs[controller]->IFx[IfRegId].ARB & 0x1FFFFFFF) | 0x80000000;\r
- }\r
- /* Standard Id */\r
- else\r
- {\r
- /* Bring Id to standardized format (MSB marks extended Id) */\r
- MsgId = (CanRegs[controller]->IFx[IfRegId].ARB & 0x1FFC0000) >> 18;\r
- }\r
- /* DLC (Max 8) */\r
- MsgDlc = CanRegs[controller]->IFx[IfRegId].MC & 0x000F;\r
- if(MsgDlc > 8)\r
- {\r
- MsgDlc = 8;\r
- }\r
- /* Let SduPtr point to Shadow Buffer */\r
- SduPtr = RxShadowBuf[controller];\r
+ } else {\r
\r
- /* Copy Message Data to Shadow Buffer */\r
- for(DataByteIndex = 0; DataByteIndex < MsgDlc; DataByteIndex++)\r
- {\r
- SduPtr[DataByteIndex] = CanRegs[controller]->IFx[IfRegId].DATx[ElementIndex[DataByteIndex]];\r
- }\r
- /* Indicate successful Reception */\r
- const Can_HardwareObjectType *hoh = Can_FindRxHoh(controller, MsgNr);\r
- CanIf_RxIndication(hoh->CanObjectId, MsgId, MsgDlc, SduPtr);\r
+ // Handle all of the message objects in this FIFO buffer.\r
+ const Can_HardwareObjectType *hoh = Can_FindRxHoh(controller, MsgNr);\r
+ for(; MsgNr < ControllerConfig[controller].MaxBoxes; MsgNr++) {\r
+ if (!(hoh->Can_Arc_MbMask & (1 << (MsgNr - 1)))) {\r
+ continue;\r
+ }\r
+\r
+ /* Read setup hardware to read arbitration, control and data Bits of the message object.\r
+ * Clear IntPnd and Tx */\r
+ if (MsgNr != ir) { // Don't do this the first time.\r
+ CanRegs[controller]->IFx[IfRegId].COM = 0x003F0000 | MsgNr;\r
+ }\r
+\r
+ if (handleRxMsgObject(MsgNr, hoh, controller) == CAN_NOT_OK) {\r
+ break; // We have parsed the last object of this FIFO.\r
+ }\r
+ }\r
\r
}\r
}\r
- //Can_EnableControllerInterrupts(controller);\r
}\r
\r
void Can1_InterruptHandler() {\r
return;\r
}\r
#endif \r
- \r
+\r
+ imask_t i_state = McuE_EnterCriticalSection();\r
+\r
// TODO This should be used instead of other variables in the Can_Lcfg file.\r
CurConfig = Config;\r
\r
ModuleState = CAN_READY;\r
#endif\r
\r
-\r
+ McuE_ExitCriticalSection(i_state);\r
\r
}\r
\r
}\r
#endif \r
\r
+ imask_t i_state = McuE_EnterCriticalSection();\r
+\r
ErrCounter = CAN_TIMEOUT_DURATION;\r
\r
//for(MsgNr = 0; MsgNr < ControllerConfig[Controller].MessageBoxCount; MsgNr++)\r
/* Clear CCE Bit */\r
CanRegs[Controller]->CTL &= ~0x00000040;\r
\r
+ McuE_ExitCriticalSection(i_state);\r
}\r
\r
\r
break;\r
}\r
\r
+ /* Check if TxRqst Bit of MsgObject is set */\r
+ if(CanRegs[ControllerId]->TRx[MsgNr >> 5] & (1 << (MsgNr & 0x1F)))\r
+ {\r
+ return CAN_BUSY;\r
+ }\r
+\r
CurPduArrayPtr = ControllerConfig[ControllerId].PduPtr + (MsgNr - 1);\r
CurCancelRqstPtr = ControllerConfig[ControllerId].CancelPtr + (MsgNr - 1);\r
CurTxRqstPtr = ControllerConfig[ControllerId].TxPtr + (MsgNr - 1);\r
ArbRegValue = 0xA0000000 | ((PduInfo->id & 0x7FF) << 18);\r
}\r
\r
- /* Check if TxRqst Bit of MsgObject is set */\r
- if(CanRegs[ControllerId]->TRx[MsgNr >> 5] & (1 << (MsgNr & 0x1F)))\r
- {\r
- return CAN_BUSY;\r
- }\r
\r
DCAN_WAIT_UNTIL_NOT_BUSY(ControllerId, IfRegId);\r
\r
+ // We cannot allow an interrupt or other task to play with the COM, MC and ARB registers here.\r
+ imask_t i_state = McuE_EnterCriticalSection();\r
+\r
\r
/* Set NewDat, TxIE (dep on ControllerConfig), TxRqst, EoB and DLC */\r
CanRegs[ControllerId]->IFx[IfRegId].MC = 0x00000100 // Tx request\r
\r
IfRegId ^= 1;\r
\r
+ McuE_ExitCriticalSection(i_state);\r
return CAN_OK;\r
}\r
\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "Std_Types.h"\r
+#include "Dio.h"\r
+#include "Det.h"\r
+#include "Cpu.h"\r
+#include <string.h>\r
+\r
+GIO_RegisterType *GPIO_ports[] = { GIO_PORTA_BASE, GIO_PORTB_BASE };\r
+\r
+#define DIO_GET_PORT_FROM_CHANNEL_ID(_channelId) (_channelId >> 8)\r
+#define DIO_GET_BIT_FROM_CHANNEL_ID(_channelId) (1 << (_channelId & 0x1F))\r
+\r
+#if ( DIO_VERSION_INFO_API == STD_ON )\r
+static Std_VersionInfoType _Dio_VersionInfo =\r
+{\r
+ .vendorID = (uint16)1,\r
+ .moduleID = (uint16)1,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)DIO_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)DIO_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)DIO_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)DIO_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)DIO_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)DIO_AR_PATCH_VERSION,\r
+};\r
+#endif\r
+\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+static int Channel_Config_Contains(Dio_ChannelType channelId)\r
+{\r
+ Dio_ChannelType* ch_ptr=(Dio_ChannelType*)(&DioChannelConfigData);\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*ch_ptr)\r
+ {\r
+ if (*ch_ptr==channelId)\r
+ {\r
+ rv=1;\r
+ break;\r
+ }\r
+ ch_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Port_Config_Contains(Dio_PortType portId)\r
+{\r
+ Dio_PortType* port_ptr=(Dio_PortType*)(&DioPortConfigData);\r
+ int rv=0;\r
+ while (DIO_END_OF_LIST!=*port_ptr)\r
+ {\r
+ if (*port_ptr==portId)\r
+ { rv=1; break;}\r
+ port_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+static int Channel_Group_Config_Contains(const Dio_ChannelGroupType* _channelGroupIdPtr)\r
+{\r
+ Dio_ChannelGroupType* chGrp_ptr=(Dio_ChannelGroupType*)(&DioConfigData);\r
+ int rv=0;\r
+\r
+ while (DIO_END_OF_LIST!=chGrp_ptr->port)\r
+ {\r
+ if (chGrp_ptr->port==_channelGroupIdPtr->port&&\r
+ chGrp_ptr->offset==_channelGroupIdPtr->offset&&\r
+ chGrp_ptr->mask==_channelGroupIdPtr->mask)\r
+ { rv=1; break;}\r
+ chGrp_ptr++;\r
+ }\r
+ return rv;\r
+}\r
+\r
+#define VALIDATE_CHANNEL(_channelId, _api) \\r
+ if(0==Channel_Config_Contains(channelId)) { \\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_CHANNEL_ID ); \\r
+ level = 0; \\r
+ goto cleanup; \\r
+ }\r
+#define VALIDATE_PORT(_portId, _api)\\r
+ if(0==Port_Config_Contains(_portId)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_PORT_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\\r
+ if(0==Channel_Group_Config_Contains(_channelGroupIdPtr)) {\\r
+ Det_ReportError(MODULE_ID_DIO,0,_api,DIO_E_PARAM_INVALID_GROUP_ID ); \\r
+ level = STD_LOW;\\r
+ goto cleanup;\\r
+ }\r
+#else\r
+#define VALIDATE_CHANNEL(_channelId, _api)\r
+#define VALIDATE_PORT(_portId, _api)\r
+#define VALIDATE_CHANNELGROUP(_channelGroupIdPtr, _api)\r
+#endif\r
+\r
+Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
+{\r
+ Dio_PortLevelType level = 0;\r
+ VALIDATE_PORT(portId, DIO_READPORT_ID);\r
+\r
+ level = (uint8)GPIO_ports[portId]->DIN;\r
+\r
+ cleanup: return level;\r
+}\r
+\r
+void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
+{\r
+ VALIDATE_PORT(portId, DIO_WRITEPORT_ID);\r
+\r
+ GPIO_ports[portId]->DOUT = (uint32)level;\r
+\r
+ cleanup: return;\r
+}\r
+\r
+Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNEL(channelId, DIO_READCHANNEL_ID);\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId));\r
+ Dio_PortLevelType bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if ((portVal & bit) != STD_LOW){\r
+ level = STD_HIGH;\r
+ } else{\r
+ level = STD_LOW;\r
+ }\r
+\r
+ cleanup: return (level);\r
+}\r
+\r
+void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
+{\r
+ VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
+\r
+ Dio_PortType port = DIO_GET_PORT_FROM_CHANNEL_ID(channelId);\r
+ uint16 bit = DIO_GET_BIT_FROM_CHANNEL_ID(channelId);\r
+\r
+ if (!( GPIO_ports[port]->DIR & bit)) { // This is an input channel.\r
+ goto cleanup;\r
+ }\r
+\r
+ Dio_PortLevelType portVal = Dio_ReadPort(port);\r
+\r
+ if(level == STD_HIGH){\r
+ portVal |= bit;\r
+ }else{\r
+ portVal &= ~bit;\r
+ }\r
+\r
+ Dio_WritePort(port, portVal);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+\r
+Dio_PortLevelType Dio_ReadChannelGroup(\r
+ const Dio_ChannelGroupType *channelGroupIdPtr)\r
+{\r
+ Dio_LevelType level;\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_READCHANNELGROUP_ID);\r
+\r
+ // Get masked values\r
+ level = Dio_ReadPort(channelGroupIdPtr->port) & channelGroupIdPtr->mask;\r
+\r
+ // Shift down\r
+ level = level >> channelGroupIdPtr->offset;\r
+\r
+ cleanup: return level;\r
+}\r
+\r
+void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
+ Dio_PortLevelType level)\r
+{\r
+ VALIDATE_CHANNELGROUP(channelGroupIdPtr,DIO_WRITECHANNELGROUP_ID);\r
+\r
+ // Shift up and apply mask so that no unwanted bits are affected\r
+ level = (level << channelGroupIdPtr->offset) & channelGroupIdPtr->mask;\r
+\r
+ // Read port and clear out masked bits\r
+ Dio_PortLevelType portVal = Dio_ReadPort(channelGroupIdPtr->port) & (~channelGroupIdPtr->mask);\r
+\r
+ // Or in the upshifted masked level\r
+ portVal |= level;\r
+\r
+ Dio_WritePort(channelGroupIdPtr->port, portVal);\r
+\r
+ cleanup: return;\r
+}\r
+\r
+\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+\r
+#include "Std_Types.h"\r
+#include "Port.h"\r
+#include "Det.h"\r
+#include "Cpu.h"\r
+#include <string.h>\r
+\r
+#define GET_PIN_PORT(_pin) (_pin >> 8)\r
+#define GET_PIN_PIN(_pin) (_pin & 0x1F)\r
+#define GET_PIN_MASK(_pin) (1 << (_pin & 0x1F))\r
+\r
+typedef enum\r
+{\r
+ PORT_UNINITIALIZED = 0, PORT_INITIALIZED,\r
+} Port_StateType;\r
+\r
+\r
+typedef volatile struct\r
+{\r
+ uint32 FUN;\r
+ uint32 DIR;\r
+ uint32 DIN;\r
+ uint32 DOUT;\r
+ uint32 DSET;\r
+ uint32 DCLR;\r
+ uint32 PDR;\r
+ uint32 PULDIS;\r
+ uint32 PSL;\r
+} Port_RegisterType;\r
+\r
+\r
+#define PORT_NOT_CONFIGURED 0x00000000\r
+\r
+#define PORT_0_BASE ((Port_RegisterType *)0xFFF7BC30)\r
+#define PORT_1_BASE ((Port_RegisterType *)0xFFF7BC50)\r
+#define PORT_2_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_3_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_4_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_5_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_6_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_7_BASE ((Port_RegisterType *)PORT_NOT_CONFIGURED)\r
+#define PORT_8_BASE ((Port_RegisterType *)0xFFF7DDE0)\r
+#define PORT_9_BASE ((Port_RegisterType *)0xFFF7DFE0)\r
+#define PORT_10_BASE ((Port_RegisterType *)0xFFF7E1E0)\r
+#define PORT_NUMBER_OF_PORTS 11\r
+\r
+static Port_RegisterType * const Port_Base[] =\r
+{\r
+ PORT_0_BASE,\r
+ PORT_1_BASE,\r
+ PORT_2_BASE,\r
+ PORT_3_BASE,\r
+ PORT_4_BASE,\r
+ PORT_5_BASE,\r
+ PORT_6_BASE,\r
+ PORT_7_BASE,\r
+ PORT_8_BASE,\r
+ PORT_9_BASE,\r
+ PORT_10_BASE,\r
+};\r
+\r
+\r
+\r
+static Port_StateType _portState = PORT_UNINITIALIZED;\r
+static const Port_ConfigType * _configPtr = &PortConfigData;\r
+\r
+#if PORT_DEV_ERROR_DETECT == STD_ON\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api) \\r
+ if( (_ptr)==((void *)0) ) { \\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_CONFIG ); \\r
+ goto cleanup; \\r
+ }\r
+\r
+#define VALIDATE_STATE_INIT(_api)\\r
+ if(PORT_INITIALIZED!=_portState){\\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_UNINIT ); \\r
+ goto cleanup; \\r
+ }\r
+\r
+#define VALIDATE_PARAM_PIN(_pin, _api)\\r
+ if(GET_PIN_PORT(_pin) >= PORT_NUMBER_OF_PORTS || Port_Base[GET_PIN_PORT(_pin)] == PORT_NOT_CONFIGURED || GET_PIN_PIN(_pin) > 7 ){\\r
+ Det_ReportError(MODULE_ID_PORT, 0, _api, PORT_E_PARAM_PIN ); \\r
+ goto cleanup; \\r
+ }\r
+\r
+#else\r
+#define VALIDATE_PARAM_CONFIG(_ptr,_api)\r
+#define VALIDATE_STATE_INIT(_api)\r
+#define VALIDATE_PARAM_PIN(_pin, _api)\r
+#endif\r
+\r
+#if PORT_VERSION_INFO_API == STD_ON\r
+static Std_VersionInfoType _Port_VersionInfo =\r
+{\r
+ .vendorID = (uint16)1,\r
+ .moduleID = (uint16) MODULE_ID_PORT,\r
+ .instanceID = (uint8)1,\r
+ .sw_major_version = (uint8)PORT_SW_MAJOR_VERSION,\r
+ .sw_minor_version = (uint8)PORT_SW_MINOR_VERSION,\r
+ .sw_patch_version = (uint8)PORT_SW_PATCH_VERSION,\r
+ .ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
+ .ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
+ .ar_patch_version = (uint8)PORT_AR_PATCH_VERSION,\r
+};\r
+#endif\r
+\r
+void Port_RefreshPin(uint16 pinNumber) {\r
+ uint8 port = GET_PIN_PORT(_configPtr->pins[pinNumber].pin);\r
+ uint32 mask = GET_PIN_MASK(_configPtr->pins[pinNumber].pin);\r
+ uint16 conf = _configPtr->pins[pinNumber].conf;\r
+\r
+ if (conf & PORT_FUNC) {\r
+ // Don't do anything, let each driver configure???\r
+ return;\r
+ }\r
+\r
+ // Set pin direction\r
+ if (conf & PORT_PIN_IN) {\r
+ Port_Base[port]->DIR &= ~mask;\r
+\r
+ } else {\r
+ Port_Base[port]->DIR |= mask;\r
+\r
+ // Set open drain\r
+ if (conf & PORT_ODE_ENABLE) {\r
+ Port_Base[port]->PDR |= mask;\r
+ } else {\r
+ Port_Base[port]->PDR &= ~mask;\r
+ }\r
+ }\r
+\r
+ // Set pull up or down or nothing.\r
+ if (conf & PORT_PULL_NONE) {\r
+ Port_Base[port]->PULDIS |= mask;\r
+\r
+ } else {\r
+ Port_Base[port]->PULDIS &= ~mask;\r
+ if (conf & PORT_PULL_UP) {\r
+ Port_Base[port]->PSL |= mask;\r
+\r
+ } else {\r
+ Port_Base[port]->PSL &= ~mask;\r
+ }\r
+ }\r
+}\r
+\r
+\r
+\r
+void Port_Init(const Port_ConfigType *configType) {\r
+ VALIDATE_PARAM_CONFIG(configType, PORT_INIT_ID);\r
+\r
+ _configPtr = (Port_ConfigType *)configType;\r
+\r
+ // Bring GIO register out of reset.\r
+ gioREG->GCR0 = 1;\r
+\r
+ for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
+ Port_RefreshPin(i);\r
+ }\r
+\r
+ _portState = PORT_INITIALIZED;\r
+\r
+ cleanup:return;\r
+}\r
+\r
+#if ( PORT_SET_PIN_DIRECTION_API == STD_ON )\r
+void Port_SetPinDirection( Port_PinType pin, Port_PinDirectionType direction )\r
+{\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_DIRECTION_ID);\r
+ VALIDATE_PARAM_PIN(pin, PORT_SET_PIN_DIRECTION_ID);\r
+\r
+ uint8 port = GET_PIN_PORT(pin);\r
+ uint32 mask = GET_PIN_MASK(pin);\r
+\r
+ if (direction & PORT_PIN_IN) {\r
+ Port_Base[port]->DIR |= mask;\r
+\r
+ } else {\r
+ Port_Base[port]->DIR &= ~mask;\r
+\r
+ }\r
+\r
+cleanup:return;\r
+}\r
+#endif\r
+\r
+void Port_RefreshPortDirection( void )\r
+{\r
+ VALIDATE_STATE_INIT(PORT_REFRESH_PORT_DIRECTION_ID);\r
+ for (uint16 i = 0; i < PORT_NUMBER_OF_PINS; i++) {\r
+ if (!(_configPtr->pins[i].conf & PORT_DIRECTION_CHANGEABLE)) {\r
+ Port_RefreshPin(i);\r
+ }\r
+ }\r
+cleanup:return;\r
+}\r
+\r
+\r
+#if PORT_VERSION_INFO_API == STD_ON\r
+void Port_GetVersionInfo(Std_VersionInfoType* versionInfo)\r
+{\r
+ VALIDATE_STATE_INIT(PORT_GET_VERSION_INFO_ID);\r
+ memcpy(versionInfo, &_Port_VersionInfo, sizeof(Std_VersionInfoType));\r
+ cleanup: return;\r
+}\r
+#endif\r
+\r
+#if (PORT_SET_PIN_MODE_API == STD_ON)\r
+void Port_SetPinMode(Port_PinType Pin, Port_PinModeType Mode) {\r
+ VALIDATE_STATE_INIT(PORT_SET_PIN_MODE_ID);\r
+ VALIDATE_PARAM_PIN(Pin, PORT_SET_PIN_MODE_ID);\r
+\r
+ uint8 port = GET_PIN_PORT(Pin);\r
+ uint8 pin = GET_PIN_PIN(Pin);\r
+ uint32 mask = GET_PIN_MASK(Pin);\r
+\r
+ Port_Base[port]->FUN &= ~mask;\r
+ Port_Base[port]->FUN |= ((Mode & 1) << pin);\r
+ cleanup: return;\r
+}\r
+#endif\r
unsigned FLG; /**< 0x0020: Interrupt Flag Register */\r
unsigned OFFSET0; /**< 0x0024: Interrupt Offset A Register */\r
unsigned OFFSET1; /**< 0x0028: Interrupt Offset B Register */\r
-} gioBASE_t;\r
+} GIO_Base_RegisterType;\r
\r
\r
/** @struct gioPort\r
unsigned PDR; /**< 0x0014: Open Drain Regsiter */\r
unsigned PULDIS; /**< 0x0018: Pullup Disable Register */\r
unsigned PSL; /**< 0x001C: Pull Up/Down Selection Register */\r
-} gioPORT_t;\r
+} GIO_RegisterType;\r
+\r
+#define GIO_PORTA_BASE ((GIO_RegisterType *)0xFFF7BC34)\r
+#define GIO_PORTB_BASE ((GIO_RegisterType *)0xFFF7BC54)\r
\r
\r
/** @def gioREG\r
*\r
* This pointer is used by the GIO driver to access the gio module registers.\r
*/\r
-#define gioREG ((gioBASE_t *)0xFFF7BC00U)\r
+#define gioREG ((GIO_Base_RegisterType *)0xFFF7BC00U)\r
\r
/** @def gioPORTA\r
* @brief GIO Port (A) Register Pointer\r
__CALIB_RAM_START = ADDR(.calibration);\r
__CALIB_RAM_END = ADDR(.calibration) + SIZEOF(.calibration);\r
__CALIB_ROM_START = LOADADDR(.calibration);\r
+#else\r
+ /* failsafe to avoid trouble with defined calib variables if CALIBRATION_ENABLED is not set */\r
+ .calibration : {\r
+ *(.calibration)\r
+ } > flash\r
+ ASSERT(SIZEOF(.calibration) == 0, ".calibration section used but CALIBRATION_ENABLED is undefined")\r
#endif /* CALIBRATION_ENABLED */\r
\r
.int_vecs :\r
\r
#define MPC5516 1\r
\r
+#include "Compiler.h"\r
#include "typedefs.h"\r
\r
#ifdef __cplusplus\r
/****************************************************************************/\r
/* MODULE : CRP */\r
/****************************************************************************/\r
- struct CRP_tag {\r
+CC_EXTENSION struct CRP_tag {\r
\r
union {\r
vuint32_t R;\r
/****************************************************************************/\r
/* MODULE : DMAMUX */\r
/****************************************************************************/\r
- struct DMAMUX_tag {\r
+CC_EXTENSION struct DMAMUX_tag {\r
union {\r
vuint8_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : DSPI */\r
/****************************************************************************/\r
- struct DSPI_tag {\r
+CC_EXTENSION struct DSPI_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : External Bus Interface (EBI) */\r
/****************************************************************************/\r
- struct CS_tag {\r
+CC_EXTENSION struct CS_tag {\r
union { /* Base Register Bank */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : eDMA */\r
/****************************************************************************/\r
- struct EDMA_tag {\r
+CC_EXTENSION struct EDMA_tag {\r
union {\r
vuint32_t R;\r
struct {\r
\r
};\r
\r
- struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
+ CC_EXTENSION struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
\r
struct tcd_alt1_t {\r
vuint32_t SADDR; /* source address */\r
/****************************************************************************/\r
/* MODULE : EMIOS */\r
/****************************************************************************/\r
- struct EMIOS_tag {\r
+ CC_EXTENSION struct EMIOS_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : EQADC */\r
/****************************************************************************/\r
- struct EQADC_tag {\r
+CC_EXTENSION struct EQADC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : eSCI */\r
/****************************************************************************/\r
- struct ESCI_tag {\r
+CC_EXTENSION struct ESCI_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FLASH */\r
/****************************************************************************/\r
- struct FLASH_tag {\r
+CC_EXTENSION struct FLASH_tag {\r
union { /* Module Configuration Register */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FlexCAN */\r
/****************************************************************************/\r
- struct FLEXCAN_tag {\r
+CC_EXTENSION struct FLEXCAN_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FMPLL */\r
/****************************************************************************/\r
- struct FMPLL_tag {\r
+CC_EXTENSION struct FMPLL_tag {\r
union { /* JRichard */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : i2c */\r
/****************************************************************************/\r
- struct I2C_tag {\r
+CC_EXTENSION struct I2C_tag {\r
union {\r
vuint8_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : INTC */\r
/****************************************************************************/\r
- struct INTC_tag {\r
+CC_EXTENSION struct INTC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : MCM */\r
/****************************************************************************/\r
- struct MCM_tag {\r
+CC_EXTENSION struct MCM_tag {\r
\r
uint32_t mcm_reserved1[5];\r
\r
/****************************************************************************/\r
/* MODULE : MPU */\r
/****************************************************************************/\r
- struct MPU_tag {\r
+CC_EXTENSION struct MPU_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : pit */\r
/****************************************************************************/\r
- struct PIT_tag {\r
+CC_EXTENSION struct PIT_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : sem4 */\r
/****************************************************************************/\r
- struct SEMA4_tag {\r
+CC_EXTENSION struct SEMA4_tag {\r
union {\r
vuint8_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : SIU */\r
/****************************************************************************/\r
- struct SIU_tag {\r
+CC_EXTENSION struct SIU_tag {\r
int32_t SIU_reserved0;\r
\r
union { /* MCU ID Register */\r
/* MODULE : FlexRay */\r
/****************************************************************************/\r
\r
- typedef union uMVR {\r
+CC_EXTENSION typedef union uMVR {\r
vuint16_t R;\r
struct {\r
vuint16_t CHIVER:8; /* CHI Version Number */\r
} B;\r
} MVR_t;\r
\r
- typedef union uMCR {\r
+CC_EXTENSION typedef union uMCR {\r
vuint16_t R;\r
struct {\r
vuint16_t MEN:1; /* module enable */\r
vuint16_t:1;\r
} B;\r
} MCR_t;\r
- typedef union uSTBSCR {\r
+CC_EXTENSION typedef union uSTBSCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STBPSEL:2; /* strobe port select */\r
} B;\r
} STBSCR_t;\r
- typedef union uSTBPCR {\r
+CC_EXTENSION typedef union uSTBPCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} STBPCR_t;\r
\r
- typedef union uMBDSR {\r
+CC_EXTENSION typedef union uMBDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} MBDSR_t;\r
\r
- typedef union uMBSSUTR {\r
+CC_EXTENSION typedef union uMBSSUTR {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBSSUTR_t;\r
\r
- typedef union uPOCR {\r
+CC_EXTENSION typedef union uPOCR {\r
vuint16_t R;\r
vuint8_t byte[2];\r
struct {\r
} B;\r
} POCR_t;\r
/* protocol commands */\r
- typedef union uGIFER {\r
+CC_EXTENSION typedef union uGIFER {\r
vuint16_t R;\r
struct {\r
vuint16_t MIF:1; /* module interrupt flag */\r
vuint16_t TBIE:1; /* transmit buffer interrupt enable */\r
} B;\r
} GIFER_t;\r
- typedef union uPIFR0 {\r
+\r
+CC_EXTENSION typedef union uPIFR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIF:1; /* fatal protocol error interrupt flag */\r
vuint16_t CYSIF:1; /* cycle start interrupt flag */\r
} B;\r
} PIFR0_t;\r
- typedef union uPIFR1 {\r
+\r
+ CC_EXTENSION typedef union uPIFR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIF:1; /* error mode changed interrupt flag */\r
vuint16_t:4;\r
} B;\r
} PIFR1_t;\r
- typedef union uPIER0 {\r
+CC_EXTENSION typedef union uPIER0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIE:1; /* fatal protocol error interrupt enable */\r
vuint16_t CYSIE:1; /* cycle start interrupt enable */\r
} B;\r
} PIER0_t;\r
- typedef union uPIER1 {\r
+CC_EXTENSION typedef union uPIER1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIE:1; /* error mode changed interrupt enable */\r
vuint16_t:4;\r
} B;\r
} PIER1_t;\r
- typedef union uCHIERFR {\r
+ CC_EXTENSION typedef union uCHIERFR {\r
vuint16_t R;\r
struct {\r
vuint16_t FRLBEF:1; /* flame lost channel B error flag */\r
vuint16_t ILSAEF:1; /* illegal access error flag */\r
} B;\r
} CHIERFR_t;\r
- typedef union uMBIVEC {\r
+ CC_EXTENSION typedef union uMBIVEC {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBIVEC_t;\r
\r
- typedef union uPSR0 {\r
+ CC_EXTENSION typedef union uPSR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ERRMODE:2; /* error mode */\r
/* protocol states */\r
/* protocol sub-states */\r
/* wakeup status */\r
- typedef union uPSR1 {\r
+ CC_EXTENSION typedef union uPSR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t CSAA:1; /* cold start attempt abort flag */\r
vuint16_t APTAC:5; /* allow passive to active counter */\r
} B;\r
} PSR1_t;\r
- typedef union uPSR2 {\r
+ CC_EXTENSION typedef union uPSR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t NBVB:1; /* NIT boundary violation on channel B */\r
vuint16_t CLKCORRFAILCNT:4; /* clock correction failed counter */\r
} B;\r
} PSR2_t;\r
- typedef union uPSR3 {\r
+ CC_EXTENSION typedef union uPSR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
vuint16_t AVFA:1; /* aggregated valid frame on channel A */\r
} B;\r
} PSR3_t;\r
- typedef union uCIFRR {\r
+ CC_EXTENSION typedef union uCIFRR {\r
vuint16_t R;\r
struct {\r
vuint16_t:8;\r
vuint16_t TBIFR:1; /* transmit buffer interrupt flag */\r
} B;\r
} CIFRR_t;\r
- typedef union uSFCNTR {\r
+ CC_EXTENSION typedef union uSFCNTR {\r
vuint16_t R;\r
struct {\r
vuint16_t SFEVB:4; /* sync frames channel B, even cycle */\r
} B;\r
} SFCNTR_t;\r
\r
- typedef union uSFTCCSR {\r
+ CC_EXTENSION typedef union uSFTCCSR {\r
vuint16_t R;\r
struct {\r
vuint16_t ELKT:1; /* even cycle tables lock and unlock trigger */\r
vuint16_t SIDEN:1; /* sync frame ID table enable */\r
} B;\r
} SFTCCSR_t;\r
- typedef union uSFIDRFR {\r
+ CC_EXTENSION typedef union uSFIDRFR {\r
vuint16_t R;\r
struct {\r
vuint16_t:6;\r
} B;\r
} SFIDRFR_t;\r
\r
- typedef union uTICCR {\r
+ CC_EXTENSION typedef union uTICCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
\r
} B;\r
} TICCR_t;\r
- typedef union uTI1CYSR {\r
+ CC_EXTENSION typedef union uTI1CYSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} TI1CYSR_t;\r
\r
- typedef union uSSSR {\r
+ CC_EXTENSION typedef union uSSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} SSSR_t;\r
\r
- typedef union uSSCCR {\r
+ CC_EXTENSION typedef union uSSCCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STATUSMASK:4; /* slot status mask */\r
} B;\r
} SSCCR_t;\r
- typedef union uSSR {\r
+ CC_EXTENSION typedef union uSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t VFB:1; /* valid frame on channel B */\r
vuint16_t TCA:1; /* tx conflict on channel A */\r
} B;\r
} SSR_t;\r
- typedef union uMTSCFR {\r
+ CC_EXTENSION typedef union uMTSCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t MTE:1; /* media access test symbol transmission enable */\r
} B;\r
} MTSCFR_t;\r
\r
- typedef union uRSBIR {\r
+ CC_EXTENSION typedef union uRSBIR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} RSBIR_t;\r
\r
- typedef union uRFDSR {\r
+ CC_EXTENSION typedef union uRFDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t FIFODEPTH:8; /* fifo depth */\r
} B;\r
} RFDSR_t;\r
\r
- typedef union uRFRFCFR {\r
+ CC_EXTENSION typedef union uRFRFCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} RFRFCFR_t;\r
\r
- typedef union uRFRFCTR {\r
+ CC_EXTENSION typedef union uRFRFCTR {\r
vuint16_t R;\r
struct {\r
vuint16_t:4;\r
vuint16_t F0EN:1; /* filter enable */\r
} B;\r
} RFRFCTR_t;\r
- typedef union uPCR0 {\r
+ CC_EXTENSION typedef union uPCR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR0_t;\r
\r
- typedef union uPCR1 {\r
+ CC_EXTENSION typedef union uPCR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} PCR1_t;\r
\r
- typedef union uPCR2 {\r
+ CC_EXTENSION typedef union uPCR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_AFTER_ACTION_POINT:6;\r
} B;\r
} PCR2_t;\r
\r
- typedef union uPCR3 {\r
+ CC_EXTENSION typedef union uPCR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_SYMBOL_RX_LOW:6;\r
} B;\r
} PCR3_t;\r
\r
- typedef union uPCR4 {\r
+ CC_EXTENSION typedef union uPCR4 {\r
vuint16_t R;\r
struct {\r
vuint16_t CAS_RX_LOW_MAX:7;\r
} B;\r
} PCR4_t;\r
\r
- typedef union uPCR5 {\r
+ CC_EXTENSION typedef union uPCR5 {\r
vuint16_t R;\r
struct {\r
vuint16_t TSS_TRANSMITTER:4;\r
} B;\r
} PCR5_t;\r
\r
- typedef union uPCR6 {\r
+ CC_EXTENSION typedef union uPCR6 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR6_t;\r
\r
- typedef union uPCR7 {\r
+ CC_EXTENSION typedef union uPCR7 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_B:9;\r
} B;\r
} PCR7_t;\r
\r
- typedef union uPCR8 {\r
+ CC_EXTENSION typedef union uPCR8 {\r
vuint16_t R;\r
struct {\r
vuint16_t MAX_WITHOUT_CLOCK_CORRECTION_FATAL:4;\r
} B;\r
} PCR8_t;\r
\r
- typedef union uPCR9 {\r
+ CC_EXTENSION typedef union uPCR9 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_EXISTS:1;\r
} B;\r
} PCR9_t;\r
\r
- typedef union uPCR10 {\r
+ CC_EXTENSION typedef union uPCR10 {\r
vuint16_t R;\r
struct {\r
vuint16_t SINGLE_SLOT_ENABLED:1;\r
} B;\r
} PCR10_t;\r
\r
- typedef union uPCR11 {\r
+ CC_EXTENSION typedef union uPCR11 {\r
vuint16_t R;\r
struct {\r
vuint16_t KEY_SLOT_USED_FOR_STARTUP:1;\r
} B;\r
} PCR11_t;\r
\r
- typedef union uPCR12 {\r
+ CC_EXTENSION typedef union uPCR12 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_PASSIVE_TO_ACTIVE:5;\r
} B;\r
} PCR12_t;\r
\r
- typedef union uPCR13 {\r
+ CC_EXTENSION typedef union uPCR13 {\r
vuint16_t R;\r
struct {\r
vuint16_t FIRST_MINISLOT_ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR13_t;\r
\r
- typedef union uPCR14 {\r
+ CC_EXTENSION typedef union uPCR14 {\r
vuint16_t R;\r
struct {\r
vuint16_t RATE_CORRECTION_OUT:11;\r
} B;\r
} PCR14_t;\r
\r
- typedef union uPCR15 {\r
+ CC_EXTENSION typedef union uPCR15 {\r
vuint16_t R;\r
struct {\r
vuint16_t LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR15_t;\r
\r
- typedef union uPCR16 {\r
+ CC_EXTENSION typedef union uPCR16 {\r
vuint16_t R;\r
struct {\r
vuint16_t MACRO_INITIAL_OFFSET_B:7;\r
} B;\r
} PCR16_t;\r
\r
- typedef union uPCR17 {\r
+ CC_EXTENSION typedef union uPCR17 {\r
vuint16_t R;\r
struct {\r
vuint16_t NOISE_LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR17_t;\r
\r
- typedef union uPCR18 {\r
+ CC_EXTENSION typedef union uPCR18 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_PATTERN:6;\r
} B;\r
} PCR18_t;\r
\r
- typedef union uPCR19 {\r
+ CC_EXTENSION typedef union uPCR19 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_A:9;\r
} B;\r
} PCR19_t;\r
\r
- typedef union uPCR20 {\r
+ CC_EXTENSION typedef union uPCR20 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_INITIAL_OFFSET_B:8;\r
} B;\r
} PCR20_t;\r
\r
- typedef union uPCR21 {\r
+ CC_EXTENSION typedef union uPCR21 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_RATE_CORRECTION:3;\r
} B;\r
} PCR21_t;\r
\r
- typedef union uPCR22 {\r
+ CC_EXTENSION typedef union uPCR22 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR22_t;\r
\r
- typedef union uPCR23 {\r
+ CC_EXTENSION typedef union uPCR23 {\r
vuint16_t R;\r
struct {\r
vuint16_t micro_per_cycle_l:16;\r
} B;\r
} PCR23_t;\r
\r
- typedef union uPCR24 {\r
+ CC_EXTENSION typedef union uPCR24 {\r
vuint16_t R;\r
struct {\r
vuint16_t CLUSTER_DRIFT_DAMPING:5;\r
} B;\r
} PCR24_t;\r
\r
- typedef union uPCR25 {\r
+ CC_EXTENSION typedef union uPCR25 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MIN_L:16;\r
} B;\r
} PCR25_t;\r
\r
- typedef union uPCR26 {\r
+ CC_EXTENSION typedef union uPCR26 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_HALT_DUE_TO_CLOCK:1;\r
} B;\r
} PCR26_t;\r
\r
- typedef union uPCR27 {\r
+ CC_EXTENSION typedef union uPCR27 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MAX_L:16;\r
} B;\r
} PCR27_t;\r
\r
- typedef union uPCR28 {\r
+ CC_EXTENSION typedef union uPCR28 {\r
vuint16_t R;\r
struct {\r
vuint16_t DYNAMIC_SLOT_IDLE_PHASE:2;\r
} B;\r
} PCR28_t;\r
\r
- typedef union uPCR29 {\r
+ CC_EXTENSION typedef union uPCR29 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_OFFSET_CORRECTION:3;\r
} B;\r
} PCR29_t;\r
\r
- typedef union uPCR30 {\r
+ CC_EXTENSION typedef union uPCR30 {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} PCR30_t;\r
\r
- typedef struct uMSG_BUFF_CCS {\r
+ CC_EXTENSION typedef struct uMSG_BUFF_CCS {\r
union {\r
vuint16_t R;\r
struct {\r
} B;\r
} MBIDXR;\r
} MSG_BUFF_CCS_t;\r
- typedef union uSYSBADHR {\r
+ CC_EXTENSION typedef union uSYSBADHR {\r
vuint16_t R;\r
} SYSBADHR_t;\r
- typedef union uSYSBADLR {\r
+ CC_EXTENSION typedef union uSYSBADLR {\r
vuint16_t R;\r
} SYSBADLR_t;\r
- typedef union uPADR {\r
+ CC_EXTENSION typedef union uPADR {\r
vuint16_t R;\r
} PADR_t;\r
- typedef union uPDAR {\r
+ CC_EXTENSION typedef union uPDAR {\r
vuint16_t R;\r
} PDAR_t;\r
- typedef union uCASERCR {\r
+ CC_EXTENSION typedef union uCASERCR {\r
vuint16_t R;\r
} CASERCR_t;\r
- typedef union uCBSERCR {\r
+ CC_EXTENSION typedef union uCBSERCR {\r
vuint16_t R;\r
} CBSERCR_t;\r
- typedef union uCYCTR {\r
+ CC_EXTENSION typedef union uCYCTR {\r
vuint16_t R;\r
} CYCTR_t;\r
- typedef union uMTCTR {\r
+ CC_EXTENSION typedef union uMTCTR {\r
vuint16_t R;\r
} MTCTR_t;\r
- typedef union uSLTCTAR {\r
+ CC_EXTENSION typedef union uSLTCTAR {\r
vuint16_t R;\r
} SLTCTAR_t;\r
- typedef union uSLTCTBR {\r
+ CC_EXTENSION typedef union uSLTCTBR {\r
vuint16_t R;\r
} SLTCTBR_t;\r
- typedef union uRTCORVR {\r
+ CC_EXTENSION typedef union uRTCORVR {\r
vuint16_t R;\r
} RTCORVR_t;\r
- typedef union uOFCORVR {\r
+ CC_EXTENSION typedef union uOFCORVR {\r
vuint16_t R;\r
} OFCORVR_t;\r
- typedef union uSFTOR {\r
+ CC_EXTENSION typedef union uSFTOR {\r
vuint16_t R;\r
} SFTOR_t;\r
- typedef union uSFIDAFVR {\r
+ CC_EXTENSION typedef union uSFIDAFVR {\r
vuint16_t R;\r
} SFIDAFVR_t;\r
- typedef union uSFIDAFMR {\r
+ CC_EXTENSION typedef union uSFIDAFMR {\r
vuint16_t R;\r
} SFIDAFMR_t;\r
- typedef union uNMVR {\r
+ CC_EXTENSION typedef union uNMVR {\r
vuint16_t R;\r
} NMVR_t;\r
- typedef union uNMVLR {\r
+ CC_EXTENSION typedef union uNMVLR {\r
vuint16_t R;\r
} NMVLR_t;\r
- typedef union uT1MTOR {\r
+ CC_EXTENSION typedef union uT1MTOR {\r
vuint16_t R;\r
} T1MTOR_t;\r
- typedef union uTI2CR0 {\r
+ CC_EXTENSION typedef union uTI2CR0 {\r
vuint16_t R;\r
} TI2CR0_t;\r
- typedef union uTI2CR1 {\r
+ CC_EXTENSION typedef union uTI2CR1 {\r
vuint16_t R;\r
} TI2CR1_t;\r
- typedef union uSSCR {\r
+ CC_EXTENSION typedef union uSSCR {\r
vuint16_t R;\r
} SSCR_t;\r
- typedef union uRFSR {\r
+ CC_EXTENSION typedef union uRFSR {\r
vuint16_t R;\r
} RFSR_t;\r
- typedef union uRFSIR {\r
+ CC_EXTENSION typedef union uRFSIR {\r
vuint16_t R;\r
} RFSIR_t;\r
- typedef union uRFARIR {\r
+ CC_EXTENSION typedef union uRFARIR {\r
vuint16_t R;\r
} RFARIR_t;\r
- typedef union uRFBRIR {\r
+ CC_EXTENSION typedef union uRFBRIR {\r
vuint16_t R;\r
} RFBRIR_t;\r
- typedef union uRFMIDAFVR {\r
+ CC_EXTENSION typedef union uRFMIDAFVR {\r
vuint16_t R;\r
} RFMIDAFVR_t;\r
- typedef union uRFMIAFMR {\r
+ CC_EXTENSION typedef union uRFMIAFMR {\r
vuint16_t R;\r
} RFMIAFMR_t;\r
- typedef union uRFFIDRFVR {\r
+ CC_EXTENSION typedef union uRFFIDRFVR {\r
vuint16_t R;\r
} RFFIDRFVR_t;\r
- typedef union uRFFIDRFMR {\r
+ CC_EXTENSION typedef union uRFFIDRFMR {\r
vuint16_t R;\r
} RFFIDRFMR_t;\r
- typedef union uLDTXSLAR {\r
+ CC_EXTENSION typedef union uLDTXSLAR {\r
vuint16_t R;\r
} LDTXSLAR_t;\r
- typedef union uLDTXSLBR {\r
+ CC_EXTENSION typedef union uLDTXSLBR {\r
vuint16_t R;\r
} LDTXSLBR_t;\r
\r
volatile MSG_BUFF_CCS_t MBCCS[128]; /* message buffer configuration, control & status registers 0-31 *//*100 */\r
} FR_tag_t;\r
\r
- typedef union uF_HEADER /* frame header */\r
+ CC_EXTENSION typedef union uF_HEADER /* frame header */\r
{\r
struct {\r
vuint16_t:5;\r
} B;\r
vuint16_t WORDS[3];\r
} F_HEADER_t;\r
- typedef union uS_STSTUS /* slot status */\r
+ CC_EXTENSION typedef union uS_STSTUS /* slot status */\r
{\r
struct {\r
vuint16_t VFB:1; /* Valid Frame on channel B */\r
#ifndef _MPC5554_H_\r
#define _MPC5554_H_\r
\r
+#include "Compiler.h"\r
#include "typedefs.h"\r
\r
#ifdef __cplusplus\r
#ifndef _MPC5567_H_\r
#define _MPC5567_H_\r
\r
+#include "Compiler.h"\r
#include "typedefs.h"\r
\r
#ifdef __cplusplus\r
/****************************************************************************/\r
/* MODULE : PBRIDGE_A Peripheral Bridge */\r
/****************************************************************************/\r
- struct PBRIDGE_A_tag {\r
+ CC_EXTENSION struct PBRIDGE_A_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : PBRIDGE_B Peripheral Bridge */\r
/****************************************************************************/\r
- struct PBRIDGE_B_tag {\r
+ CC_EXTENSION struct PBRIDGE_B_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FMPLL */\r
/****************************************************************************/\r
- struct FMPLL_tag {\r
+ CC_EXTENSION struct FMPLL_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : External Bus Interface (EBI) */\r
/****************************************************************************/\r
- struct CS_tag {\r
+ CC_EXTENSION struct CS_tag {\r
union { /* Base Register Bank */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FLASH */\r
/****************************************************************************/\r
- struct FLASH_tag {\r
+ CC_EXTENSION struct FLASH_tag {\r
union { /* Module Configuration Register */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : SIU */\r
/****************************************************************************/\r
- struct SIU_tag {\r
+ CC_EXTENSION struct SIU_tag {\r
int32_t SIU_reserved0;\r
\r
union { /* MCU ID Register */\r
/****************************************************************************/\r
/* MODULE : EMIOS */\r
/****************************************************************************/\r
- struct EMIOS_tag {\r
+ CC_EXTENSION struct EMIOS_tag {\r
union {\r
vuint32_t R;\r
struct {\r
\r
/***************************Configuration Registers**************************/\r
\r
- struct ETPU_tag {\r
+ CC_EXTENSION struct ETPU_tag {\r
union { /* MODULE CONFIGURATION REGISTER */\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : XBAR CrossBar */\r
/****************************************************************************/\r
- struct XBAR_tag {\r
+ CC_EXTENSION struct XBAR_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : ECSM */\r
/****************************************************************************/\r
- struct ECSM_tag {\r
+ CC_EXTENSION struct ECSM_tag {\r
\r
uint32_t ecsm_reserved1[5];\r
\r
/****************************************************************************/\r
/* MODULE : eDMA */\r
/****************************************************************************/\r
- struct EDMA_tag {\r
+ CC_EXTENSION struct EDMA_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/* DMA2 Transfer Control Descriptor */\r
/****************************************************************************/\r
\r
- struct tcd_t { /*for "standard" format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=0 && EDMA.EMLM=0 ) */\r
+ CC_EXTENSION struct tcd_t { /*for "standard" format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=0 && EDMA.EMLM=0 ) */\r
vuint32_t SADDR; /* source address */\r
\r
vuint16_t SMOD:5; /* source address modulo */\r
\r
};\r
\r
- struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
+ CC_EXTENSION struct EDMA_TCD_alt1_tag { /*for alternate format TCDs (when EDMA.TCD[x].CITER.E_LINK==BITER.E_LINK=1 ) */\r
\r
struct tcd_alt1_t {\r
vuint32_t SADDR; /* source address */\r
/****************************************************************************/\r
/* MODULE : INTC */\r
/****************************************************************************/\r
- struct INTC_tag {\r
+ CC_EXTENSION struct INTC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : EQADC */\r
/****************************************************************************/\r
- struct EQADC_tag {\r
+ CC_EXTENSION struct EQADC_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : eSCI */\r
/****************************************************************************/\r
- struct ESCI_tag {\r
+ CC_EXTENSION struct ESCI_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FlexCAN */\r
/****************************************************************************/\r
- struct FLEXCAN2_tag {\r
+ CC_EXTENSION struct FLEXCAN2_tag {\r
union {\r
vuint32_t R;\r
struct {\r
/****************************************************************************/\r
/* MODULE : FEC */\r
/****************************************************************************/\r
- struct FEC_tag {\r
+ CC_EXTENSION struct FEC_tag {\r
\r
uint32_t fec_reserved_start[0x1];\r
\r
/* MODULE : FlexRay */\r
/****************************************************************************/\r
\r
- typedef union uMVR {\r
+ CC_EXTENSION typedef union uMVR {\r
vuint16_t R;\r
struct {\r
vuint16_t CHIVER:8; /* CHI Version Number */\r
} B;\r
} MVR_t;\r
\r
- typedef union uMCR {\r
+ CC_EXTENSION typedef union uMCR {\r
vuint16_t R;\r
struct {\r
vuint16_t MEN:1; /* module enable */\r
vuint16_t:1;\r
} B;\r
} MCR_t;\r
- typedef union uSTBSCR {\r
+ CC_EXTENSION typedef union uSTBSCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STBPSEL:2; /* strobe port select */\r
} B;\r
} STBSCR_t;\r
- typedef union uSTBPCR {\r
+ CC_EXTENSION typedef union uSTBPCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} STBPCR_t;\r
\r
- typedef union uMBDSR {\r
+ CC_EXTENSION typedef union uMBDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
vuint16_t MBSEG1DS:7; /* message buffer segment 1 data size */\r
} B;\r
} MBDSR_t;\r
- typedef union uMBSSUTR {\r
+ CC_EXTENSION typedef union uMBSSUTR {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBSSUTR_t;\r
\r
- typedef union uPOCR {\r
+ CC_EXTENSION typedef union uPOCR {\r
vuint16_t R;\r
vuint8_t byte[2];\r
struct {\r
} B;\r
} POCR_t;\r
/* protocol commands */\r
- typedef union uGIFER {\r
+ CC_EXTENSION typedef union uGIFER {\r
vuint16_t R;\r
struct {\r
vuint16_t MIF:1; /* module interrupt flag */\r
vuint16_t TBIE:1; /* transmit buffer interrupt enable */\r
} B;\r
} GIFER_t;\r
- typedef union uPIFR0 {\r
+ CC_EXTENSION typedef union uPIFR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIF:1; /* fatal protocol error interrupt flag */\r
vuint16_t CYSIF:1; /* cycle start interrupt flag */\r
} B;\r
} PIFR0_t;\r
- typedef union uPIFR1 {\r
+ CC_EXTENSION typedef union uPIFR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIF:1; /* error mode changed interrupt flag */\r
vuint16_t:4;\r
} B;\r
} PIFR1_t;\r
- typedef union uPIER0 {\r
+ CC_EXTENSION typedef union uPIER0 {\r
vuint16_t R;\r
struct {\r
vuint16_t FATLIE:1; /* fatal protocol error interrupt enable */\r
vuint16_t CYSIE:1; /* cycle start interrupt enable */\r
} B;\r
} PIER0_t;\r
- typedef union uPIER1 {\r
+ CC_EXTENSION typedef union uPIER1 {\r
vuint16_t R;\r
struct {\r
vuint16_t EMCIE:1; /* error mode changed interrupt enable */\r
vuint16_t:4;\r
} B;\r
} PIER1_t;\r
- typedef union uCHIERFR {\r
+ CC_EXTENSION typedef union uCHIERFR {\r
vuint16_t R;\r
struct {\r
vuint16_t FRLBEF:1; /* flame lost channel B error flag */\r
vuint16_t ILSAEF:1; /* illegal access error flag */\r
} B;\r
} CHIERFR_t;\r
- typedef union uMBIVEC {\r
+ CC_EXTENSION typedef union uMBIVEC {\r
vuint16_t R;\r
struct {\r
\r
} B;\r
} MBIVEC_t;\r
\r
- typedef union uPSR0 {\r
+ CC_EXTENSION typedef union uPSR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ERRMODE:2; /* error mode */\r
/* protocol states */\r
/* protocol sub-states */\r
/* wakeup status */\r
- typedef union uPSR1 {\r
+ CC_EXTENSION typedef union uPSR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t CSAA:1; /* cold start attempt abort flag */\r
vuint16_t APTAC:5; /* allow passive to active counter */\r
} B;\r
} PSR1_t;\r
- typedef union uPSR2 {\r
+ CC_EXTENSION typedef union uPSR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t NBVB:1; /* NIT boundary violation on channel B */\r
vuint16_t CLKCORRFAILCNT:4; /* clock correction failed counter */\r
} B;\r
} PSR2_t;\r
- typedef union uPSR3 {\r
+ CC_EXTENSION typedef union uPSR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
vuint16_t AVFA:1; /* aggregated valid frame on channel A */\r
} B;\r
} PSR3_t;\r
- typedef union uCIFRR {\r
+ CC_EXTENSION typedef union uCIFRR {\r
vuint16_t R;\r
struct {\r
vuint16_t:8;\r
vuint16_t TBIFR:1; /* transmit buffer interrupt flag */\r
} B;\r
} CIFRR_t;\r
- typedef union uSFCNTR {\r
+ CC_EXTENSION typedef union uSFCNTR {\r
vuint16_t R;\r
struct {\r
vuint16_t SFEVB:4; /* sync frames channel B, even cycle */\r
} B;\r
} SFCNTR_t;\r
\r
- typedef union uSFTCCSR {\r
+ CC_EXTENSION typedef union uSFTCCSR {\r
vuint16_t R;\r
struct {\r
vuint16_t ELKT:1; /* even cycle tables lock and unlock trigger */\r
vuint16_t SIDEN:1; /* sync frame ID table enable */\r
} B;\r
} SFTCCSR_t;\r
- typedef union uSFIDRFR {\r
+ CC_EXTENSION typedef union uSFIDRFR {\r
vuint16_t R;\r
struct {\r
vuint16_t:6;\r
} B;\r
} SFIDRFR_t;\r
\r
- typedef union uTICCR {\r
+ CC_EXTENSION typedef union uTICCR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
\r
} B;\r
} TICCR_t;\r
- typedef union uTI1CYSR {\r
+ CC_EXTENSION typedef union uTI1CYSR {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} TI1CYSR_t;\r
\r
- typedef union uSSSR {\r
+ CC_EXTENSION typedef union uSSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} SSSR_t;\r
\r
- typedef union uSSCCR {\r
+ CC_EXTENSION typedef union uSSCCR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t STATUSMASK:4; /* slot status mask */\r
} B;\r
} SSCCR_t;\r
- typedef union uSSR {\r
+ CC_EXTENSION typedef union uSSR {\r
vuint16_t R;\r
struct {\r
vuint16_t VFB:1; /* valid frame on channel B */\r
vuint16_t TCA:1; /* tx conflict on channel A */\r
} B;\r
} SSR_t;\r
- typedef union uMTSCFR {\r
+ CC_EXTENSION typedef union uMTSCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t MTE:1; /* media access test symbol transmission enable */\r
vuint16_t CYCCNTVAL:6; /* cycle counter value */\r
} B;\r
} MTSCFR_t;\r
- typedef union uRSBIR {\r
+ CC_EXTENSION typedef union uRSBIR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
vuint16_t RSBIDX:8; /* receive shadow buffer index */\r
} B;\r
} RSBIR_t;\r
- typedef union uRFDSR {\r
+ CC_EXTENSION typedef union uRFDSR {\r
vuint16_t R;\r
struct {\r
vuint16_t FIFODEPTH:8; /* fifo depth */\r
} B;\r
} RFDSR_t;\r
\r
- typedef union uRFRFCFR {\r
+ CC_EXTENSION typedef union uRFRFCFR {\r
vuint16_t R;\r
struct {\r
vuint16_t WMD:1; /* write mode */\r
} B;\r
} RFRFCFR_t;\r
\r
- typedef union uRFRFCTR {\r
+ CC_EXTENSION typedef union uRFRFCTR {\r
vuint16_t R;\r
struct {\r
vuint16_t:4;\r
vuint16_t F0EN:1; /* filter enable */\r
} B;\r
} RFRFCTR_t;\r
- typedef union uPCR0 {\r
+ CC_EXTENSION typedef union uPCR0 {\r
vuint16_t R;\r
struct {\r
vuint16_t ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR0_t;\r
\r
- typedef union uPCR1 {\r
+ CC_EXTENSION typedef union uPCR1 {\r
vuint16_t R;\r
struct {\r
vuint16_t:2;\r
} B;\r
} PCR1_t;\r
\r
- typedef union uPCR2 {\r
+ CC_EXTENSION typedef union uPCR2 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_AFTER_ACTION_POINT:6;\r
} B;\r
} PCR2_t;\r
\r
- typedef union uPCR3 {\r
+ CC_EXTENSION typedef union uPCR3 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_SYMBOL_RX_LOW:6;\r
} B;\r
} PCR3_t;\r
\r
- typedef union uPCR4 {\r
+ CC_EXTENSION typedef union uPCR4 {\r
vuint16_t R;\r
struct {\r
vuint16_t CAS_RX_LOW_MAX:7;\r
} B;\r
} PCR4_t;\r
\r
- typedef union uPCR5 {\r
+ CC_EXTENSION typedef union uPCR5 {\r
vuint16_t R;\r
struct {\r
vuint16_t TSS_TRANSMITTER:4;\r
} B;\r
} PCR5_t;\r
\r
- typedef union uPCR6 {\r
+ CC_EXTENSION typedef union uPCR6 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR6_t;\r
\r
- typedef union uPCR7 {\r
+ CC_EXTENSION typedef union uPCR7 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_B:9;\r
} B;\r
} PCR7_t;\r
\r
- typedef union uPCR8 {\r
+ CC_EXTENSION typedef union uPCR8 {\r
vuint16_t R;\r
struct {\r
vuint16_t MAX_WITHOUT_CLOCK_CORRECTION_FATAL:4;\r
} B;\r
} PCR8_t;\r
\r
- typedef union uPCR9 {\r
+ CC_EXTENSION typedef union uPCR9 {\r
vuint16_t R;\r
struct {\r
vuint16_t MINISLOT_EXISTS:1;\r
} B;\r
} PCR9_t;\r
\r
- typedef union uPCR10 {\r
+ CC_EXTENSION typedef union uPCR10 {\r
vuint16_t R;\r
struct {\r
vuint16_t SINGLE_SLOT_ENABLED:1;\r
} B;\r
} PCR10_t;\r
\r
- typedef union uPCR11 {\r
+ CC_EXTENSION typedef union uPCR11 {\r
vuint16_t R;\r
struct {\r
vuint16_t KEY_SLOT_USED_FOR_STARTUP:1;\r
} B;\r
} PCR11_t;\r
\r
- typedef union uPCR12 {\r
+ CC_EXTENSION typedef union uPCR12 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_PASSIVE_TO_ACTIVE:5;\r
} B;\r
} PCR12_t;\r
\r
- typedef union uPCR13 {\r
+ CC_EXTENSION typedef union uPCR13 {\r
vuint16_t R;\r
struct {\r
vuint16_t FIRST_MINISLOT_ACTION_POINT_OFFSET:6;\r
} B;\r
} PCR13_t;\r
\r
- typedef union uPCR14 {\r
+ CC_EXTENSION typedef union uPCR14 {\r
vuint16_t R;\r
struct {\r
vuint16_t RATE_CORRECTION_OUT:11;\r
} B;\r
} PCR14_t;\r
\r
- typedef union uPCR15 {\r
+ CC_EXTENSION typedef union uPCR15 {\r
vuint16_t R;\r
struct {\r
vuint16_t LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR15_t;\r
\r
- typedef union uPCR16 {\r
+ CC_EXTENSION typedef union uPCR16 {\r
vuint16_t R;\r
struct {\r
vuint16_t MACRO_INITIAL_OFFSET_B:7;\r
} B;\r
} PCR16_t;\r
\r
- typedef union uPCR17 {\r
+ CC_EXTENSION typedef union uPCR17 {\r
vuint16_t R;\r
struct {\r
vuint16_t NOISE_LISTEN_TIMEOUT_L:16;\r
} B;\r
} PCR17_t;\r
\r
- typedef union uPCR18 {\r
+ CC_EXTENSION typedef union uPCR18 {\r
vuint16_t R;\r
struct {\r
vuint16_t WAKEUP_PATTERN:6;\r
} B;\r
} PCR18_t;\r
\r
- typedef union uPCR19 {\r
+ CC_EXTENSION typedef union uPCR19 {\r
vuint16_t R;\r
struct {\r
vuint16_t DECODING_CORRECTION_A:9;\r
} B;\r
} PCR19_t;\r
\r
- typedef union uPCR20 {\r
+ CC_EXTENSION typedef union uPCR20 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_INITIAL_OFFSET_B:8;\r
} B;\r
} PCR20_t;\r
\r
- typedef union uPCR21 {\r
+ CC_EXTENSION typedef union uPCR21 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_RATE_CORRECTION:3;\r
} B;\r
} PCR21_t;\r
\r
- typedef union uPCR22 {\r
+ CC_EXTENSION typedef union uPCR22 {\r
vuint16_t R;\r
struct {\r
vuint16_t:1;\r
} B;\r
} PCR22_t;\r
\r
- typedef union uPCR23 {\r
+ CC_EXTENSION typedef union uPCR23 {\r
vuint16_t R;\r
struct {\r
vuint16_t micro_per_cycle_l:16;\r
} B;\r
} PCR23_t;\r
\r
- typedef union uPCR24 {\r
+ CC_EXTENSION typedef union uPCR24 {\r
vuint16_t R;\r
struct {\r
vuint16_t CLUSTER_DRIFT_DAMPING:5;\r
} B;\r
} PCR24_t;\r
\r
- typedef union uPCR25 {\r
+ CC_EXTENSION typedef union uPCR25 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MIN_L:16;\r
} B;\r
} PCR25_t;\r
\r
- typedef union uPCR26 {\r
+ CC_EXTENSION typedef union uPCR26 {\r
vuint16_t R;\r
struct {\r
vuint16_t ALLOW_HALT_DUE_TO_CLOCK:1;\r
} B;\r
} PCR26_t;\r
\r
- typedef union uPCR27 {\r
+ CC_EXTENSION typedef union uPCR27 {\r
vuint16_t R;\r
struct {\r
vuint16_t MICRO_PER_CYCLE_MAX_L:16;\r
} B;\r
} PCR27_t;\r
\r
- typedef union uPCR28 {\r
+ CC_EXTENSION typedef union uPCR28 {\r
vuint16_t R;\r
struct {\r
vuint16_t DYNAMIC_SLOT_IDLE_PHASE:2;\r
} B;\r
} PCR28_t;\r
\r
- typedef union uPCR29 {\r
+ CC_EXTENSION typedef union uPCR29 {\r
vuint16_t R;\r
struct {\r
vuint16_t EXTERN_OFFSET_CORRECTION:3;\r
} B;\r
} PCR29_t;\r
\r
- typedef union uPCR30 {\r
+ CC_EXTENSION typedef union uPCR30 {\r
vuint16_t R;\r
struct {\r
vuint16_t:12;\r
} B;\r
} PCR30_t;\r
\r
- typedef struct uMSG_BUFF_CCS {\r
+ CC_EXTENSION typedef struct uMSG_BUFF_CCS {\r
union {\r
vuint16_t R;\r
struct {\r
volatile MSG_BUFF_CCS_t MBCCS[128]; /* message buffer configuration, control & status registers 0-31 *//*100 */\r
} FR_tag_t;\r
\r
- typedef union uF_HEADER /* frame header */\r
+ CC_EXTENSION typedef union uF_HEADER /* frame header */\r
{\r
struct {\r
vuint16_t:5;\r
} B;\r
vuint16_t WORDS[3];\r
} F_HEADER_t;\r
- typedef union uS_STSTUS /* slot status */\r
+ CC_EXTENSION typedef union uS_STSTUS /* slot status */\r
{\r
struct {\r
vuint16_t VFB:1; /* Valid Frame on channel B */\r
LDEBUG_PRINTF(" stack: curr=%p top=%p bottom=%p\n",\r
pcb->stack.curr,\r
pcb->stack.top,\r
- pcb->stack.top+ pcb->stack.size);\r
+ (void *)((size_t)pcb->stack.top+ (size_t)pcb->stack.size));\r
stack = pcb->stack.curr;\r
LDEBUG_PRINTF(" val : context=%08x LR=%08x CR=%08x\n",\r
(unsigned)stack[C_CONTEXT_OFF/4],\r
__CALIB_RAM_START = ADDR(.calibration);\r
__CALIB_RAM_END = ADDR(.calibration) + SIZEOF(.calibration);\r
__CALIB_ROM_START = LOADADDR(.calibration);\r
+#else\r
+ /* failsafe to avoid trouble with defined calib variables if CALIBRATION_ENABLED is not set */\r
+ .calibration : {\r
+ *(.calibration)\r
+ } > flash\r
+ ASSERT(SIZEOF(.calibration) == 0, ".calibration section used but CALIBRATION_ENABLED is undefined")\r
#endif /* CALIBRATION_ENABLED */\r
\r
+\r
#if defined(USE_FEE)\r
#include "Fee_Memory_Cfg.h"\r
\r
#stm32 lib files needed by drivers\r
obj-$(CFG_ARM_CM3) += stm32f10x_rcc.o\r
obj-$(CFG_ARM_CM3)-$(USE_CAN) += stm32f10x_can.o\r
-obj-$(CFG_ARM_CM3)-$(USE_DIO) += stm32f10x_gpio.o\r
+obj-$(CFG_ARM_CM3)-$(USE_PORT) += stm32f10x_gpio.o\r
obj-$(CFG_ARM_CM3)-$(USE_ADC) += stm32f10x_adc.o\r
obj-$(CFG_ARM_CM3)-$(USE_ADC) += stm32f10x_dma.o\r
obj-$(CFG_ARM_CM3)-$(USE_FLS) += stm32f10x_flash.o\r
\r
// Channels\r
extern const Dio_ChannelType DioChannelConfigData[];\r
-#define CHANNEL_PTR (&DioChannelConfigData)\r
-\r
// Port\r
extern const Dio_PortType DioPortConfigData[];\r
-#define PORT_PTR (&DioPortConfigData)\r
-\r
// Channel group\r
extern const Dio_ChannelGroupType DioConfigData[];\r
-#define CHANNEL_GRP_PTR (&DioConfigData)\r
\r
#endif /* DIO_CFG_H_ */\r
\r
MOD_AVAIL+=MCU\r
# System + Communication + Diagnostic\r
-MOD_AVAIL+=CANIF CANTP COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE CAN\r
+MOD_AVAIL+=CANIF CANTP COM DCM DEM DET ECUM IOHWAB KERNEL PDUR WDGM RTE CAN PORT DIO\r
# Additional\r
MOD_AVAIL+=RAMLOG \r
\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:13 CET 2010\r
+ */\r
+\r
+
+#if (DIO_SW_MAJOR_VERSION != 1)
+#error "Dio: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef DIO_CFG_H_\r
+#define DIO_CFG_H_\r
+#include "Port.h"\r
+\r
+#define DIO_VERSION_INFO_API STD_ON\r
+#define DIO_DEV_ERROR_DETECT STD_ON\r
+\r
+#define DIO_END_OF_LIST -1\r
+\r
+// Physical ports\r
+typedef enum\r
+{\r
+ DIO_PORT_A = 0,\r
+ DIO_PORT_B = 1,\r
+} Dio_PortTypesType;\r
+\r
+\r
+// Channels \r
+#define DIO_CHANNEL_NAME_DioChannel_1 PORT_PAD_3\r
+\r
+// Channel group\r
+\r
+// Ports\r
+#define DIO_PORT_NAME_DioPort_1 (DIO_PORT_A)\r
+\r
+\r
+\r
+\r
+// Pointers for convenience.\r
+// Channels \r
+extern const Dio_ChannelType DioChannelConfigData[];\r
+// Channel group\r
+extern const Dio_ChannelGroupType DioConfigData[];\r
+// Port\r
+extern const Dio_PortType DioPortConfigData[];\r
+\r
+#endif /*DIO_CFG_H_*/\r
--- /dev/null
+/*\r
+ * Configuration of module Dio (Dio_Lcfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.0\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:13 CET 2010\r
+ */\r
+\r
+\r
+ \r
+#include "Dio.h"\r
+#include "Dio_Cfg.h"\r
+\r
+const Dio_ChannelType DioChannelConfigData[] = { \r
+ DIO_CHANNEL_NAME_DioChannel_1,\r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_PortType DioPortConfigData[] = { \r
+ DIO_PORT_NAME_DioPort_1, \r
+ DIO_END_OF_LIST\r
+};\r
+\r
+const Dio_ChannelGroupType DioConfigData[] = {\r
+ { \r
+ .port = DIO_END_OF_LIST, \r
+ .offset = DIO_END_OF_LIST, \r
+ .mask = DIO_END_OF_LIST, \r
+ }\r
+};\r
+\r
+\r
+uint32 Dio_GetPortConfigSize(void)\r
+{\r
+ return sizeof(DioConfigData);\r
+}\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.c)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:10 CET 2010\r
+ */\r
+\r
+ \r
+\r
+#include "Port.h"\r
+\r
+\r
+\r
+const Port_ConfigType PortConfigData =\r
+{\r
+ .pins = {\r
+ {\r
+ .pin = PORT_PIN_DCAN1_TX,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN1_RX,\r
+ .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN2_TX,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN2_RX,\r
+ .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN3_TX,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_DCAN3_RX,\r
+ .conf = ( PORT_PIN_IN | PORT_FUNC | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA0,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA3,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA4,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ {\r
+ .pin = PORT_PIN_GIOA5,\r
+ .conf = ( PORT_PIN_OUT | PORT_FUNC_NO | PORT_PULL_NONE ),\r
+ }, \r
+ }\r
+};\r
--- /dev/null
+/*\r
+ * Configuration of module Port (Port_Cfg.h)\r
+ *\r
+ * Created by: \r
+ * Configured for (MCU): TMS570\r
+ *\r
+ * Module vendor: ArcCore\r
+ * Module version: 2.0.2\r
+ *\r
+ * \r
+ * Generated by Arctic Studio (http://arccore.com) \r
+ * on Fri Dec 10 11:45:10 CET 2010\r
+ */\r
+\r
+
+#if (PORT_SW_MAJOR_VERSION != 1)
+#error "Port: Configuration file version differs from BSW version."
+#endif
+
+\r
+#ifndef PORT_CFG_H_\r
+#define PORT_CFG_H_\r
+\r
+#include "Std_Types.h"\r
+\r
+\r
+/** Build version info API */\r
+#define PORT_VERSION_INFO_API STD_ON\r
+/** Enable Development Error Trace */\r
+#define PORT_DEV_ERROR_DETECT STD_ON\r
+/** Build change pin direction API */\r
+#define PORT_SET_PIN_DIRECTION_API STD_ON\r
+/** Allow Pin mode changes during runtime */\r
+#define PORT_SET_PIN_MODE_API STD_ON\r
+\r
+#define PORT_NUMBER_OF_PINS 10\r
+\r
+#define PORT_FUNC (1 << 1)\r
+#define PORT_FUNC_NO (0 << 1)\r
+#define PORT_PULL_NONE (1 << 2)\r
+#define PORT_PULL_UP (1 << 3)\r
+#define PORT_PULL_DOWN (0 << 3)\r
+#define PORT_ODE_ENABLE (1 << 4)\r
+#define PORT_DIRECTION_CHANGEABLE (1 << 5)\r
+\r
+/** HW specific symbolic names of pins */\r
+/** @req PORT013 */\r
+typedef enum\r
+{\r
+ PORT_PIN_DCAN1_TX = 0x0800,\r
+ PORT_PIN_DCAN1_RX = 0x0801,\r
+ PORT_PIN_DCAN2_TX = 0x0900,\r
+ PORT_PIN_DCAN2_RX = 0x0901,\r
+ PORT_PIN_DCAN3_TX = 0x0a00,\r
+ PORT_PIN_DCAN3_RX = 0x0a01,\r
+ PORT_PIN_GIOA0 = 0x0000,\r
+ PORT_PIN_GIOA3 = 0x0003,\r
+ PORT_PIN_GIOA4 = 0x0004,\r
+ PORT_PIN_GIOA5 = 0x0005, \r
+} Port_PinType;\r
+\r
+/** Port pad mappings */\r
+#define PORT_PAD_106 0x0800 // PORT_PIN_DCAN1_TX\r
+#define PORT_PAD_107 0x0801 // PORT_PIN_DCAN1_RX\r
+#define PORT_PAD_108 0x0900 // PORT_PIN_DCAN2_TX\r
+#define PORT_PAD_109 0x0901 // PORT_PIN_DCAN2_RX\r
+#define PORT_PAD_110 0x0a00 // PORT_PIN_DCAN3_TX\r
+#define PORT_PAD_111 0x0a01 // PORT_PIN_DCAN3_RX\r
+#define PORT_PAD_0 0x0000 // PORT_PIN_GIOA0\r
+#define PORT_PAD_3 0x0003 // PORT_PIN_GIOA3\r
+#define PORT_PAD_4 0x0004 // PORT_PIN_GIOA4\r
+#define PORT_PAD_5 0x0005 // PORT_PIN_GIOA5\r
+\r
+typedef struct {\r
+ Port_PinType pin;\r
+ uint8 conf;\r
+} Port_ConfiguredPinType;\r
+\r
+/** Top level configuration container */\r
+/** @req PORT073 */\r
+typedef struct\r
+{\r
+ const Port_ConfiguredPinType pins[PORT_NUMBER_OF_PINS];\r
+} Port_ConfigType;\r
+\r
+/** Instance of the top level configuration container */\r
+extern const Port_ConfigType PortConfigData;\r
+\r
+\r
+#endif /*PORT_CFG_H_*/\r
\r
int arc_putchar(int fd, int c);\r
int print(FILE *file, char **buffer, size_t n, const char *format, va_list ap);\r
+static inline int emitChar( FILE *file, char **buf, char c, int *left );\r
+\r
+int fputs( const char *s, FILE *file ) {\r
+ int left = ~(size_t)0;\r
+ while(*s) {\r
+ emitChar(file,NULL,*s++,&left);\r
+ }\r
+ return 0;\r
+}\r
+\r
\r
int printf(const char *format, ...) {\r
va_list ap;\r
#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL\r
\r
#elif defined(CFG_BRD_STM32_STM3210C)\r
-#define LED_CHANNEL LED_CHANNEL1\r
+#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL\r
\r
#elif defined(CFG_BRD_STM32_MCBSTM32)\r
-#define LED_CHANNEL LED_CHANNEL1\r
+#define LED_CHANNEL DIO_CHANNEL_NAME_LED_CHANNEL\r
\r
#else\r
#warning "Unknown board or CFG_BRD_* undefined"\r
</DOC-REVISIONS>\r
<SDGS>\r
<SDG GID="Arccore::EcuOptions">\r
- <SD GID="MCU">Cortex M3</SD>\r
+ <SD GID="MCU">STM32_F103</SD>\r
<SD GID="GENDIR">/blinker/config/stm32_stm3210c</SD>\r
</SDG>\r
</SDGS>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="7cf102d9-f929-4b4a-97b6-4ef11256183a">\r
+ <SHORT-NAME>blinker_node_arm_cm3</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">STM32_F107</SD>\r
+ <SD GID="GENDIR">/blinker/config/stm32_stm3210c</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/blinker_node_arm_cm3/SwComposition_blinker_node_arm_cm3</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/blinker_node_arm_cm3/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="bf0ee133-5ed1-418a-b260-47e171242afc">\r
+ <SHORT-NAME>SwComposition_blinker_node_arm_cm3</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="4fe46a12-0672-428f-99e3-c4ca6570a776">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.7</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="80853be9-55dc-435f-95ed-9a1c90750299">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="7f1dfe11-aeff-4131-89a9-2fbe9a87f01f">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="77224460-9071-4c32-9ba5-5ee19d0a5be2">\r
+ <SHORT-NAME>alarm25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="28398b0a-02ef-4aa0-9f06-90c0683ad934">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask25</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b4e4c707-af7c-4d9f-a156-1507283b4ebe">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="44a8dc3f-2e97-4bb7-8139-57852146269a">\r
+ <SHORT-NAME>bTask25</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f9e78da1-ee81-40a0-940b-3e04d9e9034c">\r
+ <SHORT-NAME>bTask100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="157c6a3d-f8ad-4493-9d76-a8f9411066aa">\r
+ <SHORT-NAME>bTask10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="ace8439e-ddb7-4bd7-b9e5-643a759f3e55">\r
+ <SHORT-NAME>Startup</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="40214336-c4be-4506-8ccc-75ff014f39fe">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="08cf618f-ebe2-483c-8ba5-fde04f3c6160">\r
+ <SHORT-NAME>alarm10</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="8a235c19-4b95-4bf1-a309-f15916dd2d8d">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask10</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="0f791241-110b-4cac-9e54-b41ad56c7f05">\r
+ <SHORT-NAME>alarm100</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="3eb17f20-d68e-4d62-87e3-6775933e93a2">\r
+ <SHORT-NAME>OsAlarmActivateTask</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmActivateTask/OsAlarmActivateTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/blinker_node_arm_cm3/Os/bTask100</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
\r
/* Global hooks */\r
ProtectionReturnType ProtectionHook( StatusType FatalError ) {\r
- LDEBUG_PRINTF("## ProtectionHook\n");\r
+ LDEBUG_FPUTS("## ProtectionHook\n");\r
return PRO_KILLAPPL;\r
}\r
\r
void StartupHook( void ) {\r
- LDEBUG_PRINTF("## StartupHook\n");\r
+ LDEBUG_FPUTS("## StartupHook\n");\r
\r
uint32_t sys_freq = McuE_GetSystemClock();\r
\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
- LDEBUG_PRINTF("## ShutdownHook\n");\r
+ LDEBUG_FPUTS("## ShutdownHook\n");\r
while(1);\r
}\r
\r
\r
/* Global hooks */\r
ProtectionReturnType ProtectionHook( StatusType FatalError ) {\r
- LDEBUG_PRINTF("## ProtectionHook\n");\r
+ LDEBUG_FPUTS("## ProtectionHook\n");\r
return PRO_KILLAPPL;\r
}\r
\r
void StartupHook( void ) {\r
- LDEBUG_PRINTF("## StartupHook\n");\r
+ LDEBUG_FPUTS("## StartupHook\n");\r
\r
uint32_t sys_freq = McuE_GetSystemClock();\r
\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
- LDEBUG_PRINTF("## ShutdownHook\n");\r
+ LDEBUG_FPUTS("## ShutdownHook\n");\r
while(1);\r
}\r
\r
</DOC-REVISIONS>\r
<SDGS>\r
<SDG GID="Arccore::EcuOptions">\r
- <SD GID="MCU">Cortex M3</SD>\r
+ <SD GID="MCU">STM32_F103</SD>\r
<SD GID="GENDIR">/simple/config/stm32_stm3210c</SD>\r
</SDG>\r
</SDGS>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>simple_arm_cm3</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="4ab03f0b-f00d-4eb3-8406-006c42d20f4d">\r
+ <SHORT-NAME>simple_arm_cm3</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">STM32_F107</SD>\r
+ <SD GID="GENDIR">/simple/config/stm32_stm3210c</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/simple_arm_cm3/SwComposition_simple_arm_cm3</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/simple_arm_cm3/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="a5ac45c0-0dd8-4e11-8f33-bcc59510e846">\r
+ <SHORT-NAME>SwComposition_simple_arm_cm3</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="29b23c16-ee7a-4b40-afaf-6c4117db16d3">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="92c5a2e3-81e3-4e1f-9137-174435a92b41">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="6578a055-00a4-4de2-8e87-3b7758f9caf7">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="67722c4e-130a-4dac-8aeb-72ed94e3e7e9">\r
+ <SHORT-NAME>Alarm1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="78d0ecea-4ed3-4503-b0c8-4ad0b400d6ab">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>10</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6de53f9-2026-4621-887f-556572f825be">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_arm_cm3/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/simple_arm_cm3/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="9c54b7bd-b0c1-4733-a6a4-b77b22b8df12">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="170cda57-b4ad-4c67-8384-97736003af20">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="9254b1b9-6b3d-4e1a-b294-871e853d8ae0">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="8c0b5497-cc95-4e9b-b102-99f3f7e637bb">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="b5d30e9f-ae64-42ba-861e-7dd525761722">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="72dc534e-fc28-4883-b1d7-5e1162314494">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5f7216e5-bed0-4a95-bf07-26b1c54be1c0">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="896fdbc9-ed9a-4f24-9366-257760788019">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d681023d-1f60-4239-b9a2-7889a00bdaa4">\r
+ <SHORT-NAME>EVENT_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
StackInfoType si;
TaskType currTask;
- LDEBUG_PRINTF("etask_1 start\n");
+ LDEBUG_FPUTS("etask_1 start\n");
for(;;) {
SetEvent(TASK_ID_etask_2,EVENT_MASK_EVENT_1);
WaitEvent(EVENT_MASK_EVENT_2);
* and activates task: btask_3.
*/
void etask_2( void ) {
- LDEBUG_PRINTF("etask_2 start\n");
+ LDEBUG_FPUTS("etask_2 start\n");
for(;;) {
WaitEvent(EVENT_MASK_EVENT_1);
/* Global hooks */
ProtectionReturnType ProtectionHook( StatusType FatalError ) {
- LDEBUG_PRINTF("## ProtectionHook\n");
+ LDEBUG_FPUTS("## ProtectionHook\n");
return PRO_KILLAPPL;
}
void StartupHook( void ) {
uint32_t sys_freq = McuE_GetSystemClock();
- LDEBUG_PRINTF("## StartupHook\n");
+ LDEBUG_FPUTS("## StartupHook\n");
LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)sys_freq);
}
void ShutdownHook( StatusType Error ) {
- LDEBUG_PRINTF("## ShutdownHook\n");
+ LDEBUG_FPUTS("## ShutdownHook\n");
while(1);
}
StackInfoType si;\r
TaskType currTask;\r
\r
- LDEBUG_PRINTF("etask_1 start\n");\r
+ LDEBUG_FPUTS("etask_1 start\n");\r
for(;;) {\r
SetEvent(TASK_ID_etask_2,EVENT_MASK_EVENT_1);\r
WaitEvent(EVENT_MASK_EVENT_2);\r
* and activates task: btask_3.\r
*/\r
void etask_2( void ) {\r
- LDEBUG_PRINTF("etask_2 start\n");\r
+ LDEBUG_FPUTS("etask_2 start\n");\r
\r
for(;;) {\r
WaitEvent(EVENT_MASK_EVENT_1);\r
\r
/* Global hooks */\r
ProtectionReturnType ProtectionHook( StatusType FatalError ) {\r
- LDEBUG_PRINTF("## ProtectionHook\n");\r
+ LDEBUG_FPUTS("## ProtectionHook\n");\r
return PRO_KILLAPPL;\r
}\r
\r
void StartupHook( void ) {\r
uint32_t sys_freq = McuE_GetSystemClock();\r
\r
- LDEBUG_PRINTF("## StartupHook\n");\r
+ LDEBUG_FPUTS("## StartupHook\n");\r
\r
LDEBUG_PRINTF("Sys clock %u Hz\n",(unsigned)sys_freq);\r
}\r
\r
void ShutdownHook( StatusType Error ) {\r
- LDEBUG_PRINTF("## ShutdownHook\n");\r
+ LDEBUG_FPUTS("## ShutdownHook\n");\r
while(1);\r
}\r
\r
</DOC-REVISIONS>\r
<SDGS>\r
<SDG GID="Arccore::EcuOptions">\r
- <SD GID="MCU">Cortex M3</SD>\r
+ <SD GID="MCU">STM32_F103</SD>\r
<SD GID="GENDIR">/tiny/config/stm32_stm3210c</SD>\r
</SDG>\r
</SDGS>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<AUTOSAR xmlns="http://autosar.org/3.1.4"><TOP-LEVEL-PACKAGES>\r
+ <AR-PACKAGE>\r
+ <SHORT-NAME>tiny_arm_cm3</SHORT-NAME>\r
+ <ELEMENTS>\r
+ <ECU-CONFIGURATION UUID="2791ca0a-8e26-4388-976c-a48110927414">\r
+ <SHORT-NAME>tiny_arm_cm3</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <DOC-REVISIONS>\r
+ <DOC-REVISION/>\r
+ </DOC-REVISIONS>\r
+ <SDGS>\r
+ <SDG GID="Arccore::EcuOptions">\r
+ <SD GID="MCU">STM32_F107</SD>\r
+ <SD GID="GENDIR">/tiny/config/stm32_stm3210c</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <ECU-SW-COMPOSITION-REF DEST="ECU-SW-COMPOSITION">/tiny_arm_cm3/SwComposition_tiny_arm_cm3</ECU-SW-COMPOSITION-REF>\r
+ <MODULE-REFS>\r
+ <MODULE-REF DEST="MODULE-CONFIGURATION">/tiny_arm_cm3/Os</MODULE-REF>\r
+ </MODULE-REFS>\r
+ </ECU-CONFIGURATION>\r
+ <ECU-SW-COMPOSITION UUID="9aecec1e-749c-47fe-9fdb-98ed851bf12f">\r
+ <SHORT-NAME>SwComposition_tiny_arm_cm3</SHORT-NAME>\r
+ </ECU-SW-COMPOSITION>\r
+ <MODULE-CONFIGURATION UUID="d9b75d00-e6eb-4671-a7cf-0abd1e1ed6a7">\r
+ <SHORT-NAME>Os</SHORT-NAME>\r
+ <ADMIN-DATA>\r
+ <SDGS>\r
+ <SDG/>\r
+ <SDG GID="Arccore::ModuleOptions">\r
+ <SD GID="GENERATE_AND_VALIDATE">true</SD>\r
+ <SD GID="ARCCORE_EDITOR_VERSION">2.0.6</SD>\r
+ </SDG>\r
+ </SDGS>\r
+ </ADMIN-DATA>\r
+ <DEFINITION-REF DEST="MODULE-DEF">/ArcCore/Os</DEFINITION-REF>\r
+ <CONTAINERS>\r
+ <CONTAINER UUID="5ceca27a-71ff-4c71-bcb8-69a1f31f5d79">\r
+ <SHORT-NAME>OsOS</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsStackMonitoring</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsOS/OsStatus</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseGetServiceId</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseParameterAccess</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsUseResScheduler</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsTickFrequency</DEFINITION-REF>\r
+ <VALUE>1000</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsInterruptStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsOS/OsIdleStackSize</DEFINITION-REF>\r
+ <VALUE>512</VALUE>\r
+ </INTEGER-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsUseDebug</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugTask</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugAlarm</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugResource</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugScheduleTable</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/ArcCoreOsDebugEvent</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="185f3281-13f7-459b-9ccd-66eb1aff52ca">\r
+ <SHORT-NAME>OsHooks</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsOS/OsHooks</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsErrorHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPostTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsPreTaskHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsProtectionHook</DEFINITION-REF>\r
+ <VALUE>false</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsShutdownHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ <BOOLEAN-VALUE>\r
+ <DEFINITION-REF DEST="BOOLEAN-PARAM-DEF">/ArcCore/Os/OsOS/OsHooks/OsStartupHook</DEFINITION-REF>\r
+ <VALUE>true</VALUE>\r
+ </BOOLEAN-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="4c1d9bd6-69e7-48c8-8036-35c6279f2240">\r
+ <SHORT-NAME>etask_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="fbcd933e-5944-44dd-ac92-f9eace6bb55c">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="41f28680-c88e-4083-bacc-40cf82ec3122">\r
+ <SHORT-NAME>etask_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>EXTENDED</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="53d449ae-bdbe-49cb-bb22-141480e62565">\r
+ <SHORT-NAME>OsTaskAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask/OsTaskAutostart</DEFINITION-REF>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="b5120b2f-2b4e-4e0f-8a7f-c7466b489644">\r
+ <SHORT-NAME>btask_3</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsTask</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskActivation</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskPriority</DEFINITION-REF>\r
+ <VALUE>3</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskProcessType</DEFINITION-REF>\r
+ <VALUE>BASIC</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsTask/ArcCoreOsTaskStackSize</DEFINITION-REF>\r
+ <VALUE>2048</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsTask/OsTaskSchedule</DEFINITION-REF>\r
+ <VALUE>FULL</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="759524bb-836c-4d61-b59a-cf8edfb6e162">\r
+ <SHORT-NAME>Alarm_4ms</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmCounterRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_arm_cm3/Os/OsTick</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ <SUB-CONTAINERS>\r
+ <CONTAINER UUID="45cda08c-e07f-4670-8f14-b85acb209a6f">\r
+ <SHORT-NAME>OsAlarmAutostart</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAlarmTime</DEFINITION-REF>\r
+ <VALUE>100</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmAutostartType</DEFINITION-REF>\r
+ <VALUE>ABSOLUTE</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAutostart/OsAlarmCycleTime</DEFINITION-REF>\r
+ <VALUE>4</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="5801fbe7-6b9b-4390-9341-2dd9ab4412f5">\r
+ <SHORT-NAME>OsAlarmSetEvent</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent</DEFINITION-REF>\r
+ <REFERENCE-VALUES>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_arm_cm3/Os/EVENT_2</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ <REFERENCE-VALUE>\r
+ <DEFINITION-REF DEST="REFERENCE-PARAM-DEF">/ArcCore/Os/OsAlarm/OsAlarmAction/OsAlarmSetEvent/OsAlarmSetEventTaskRef</DEFINITION-REF>\r
+ <VALUE-REF DEST="CONTAINER">/tiny_arm_cm3/Os/etask_1</VALUE-REF>\r
+ </REFERENCE-VALUE>\r
+ </REFERENCE-VALUES>\r
+ </CONTAINER>\r
+ </SUB-CONTAINERS>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="f289efa7-5957-47a1-9c32-2248195ca090">\r
+ <SHORT-NAME>OsTick</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsCounter</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMaxAllowedValue</DEFINITION-REF>\r
+ <VALUE>65535</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterMinCycle</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterTicksPerBase</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ <ENUMERATION-VALUE>\r
+ <DEFINITION-REF DEST="ENUMERATION-PARAM-DEF">/ArcCore/Os/OsCounter/OsCounterType</DEFINITION-REF>\r
+ <VALUE>OS_TICK</VALUE>\r
+ </ENUMERATION-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="e6dde7c3-6596-4a33-96ab-3a43d4ab1429">\r
+ <SHORT-NAME>EVENT_0</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>0</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="d93f5687-240e-465d-afb4-da563598d37a">\r
+ <SHORT-NAME>EVENT_1</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>1</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ <CONTAINER UUID="94eef554-c26c-44d5-9b8f-501597b53d51">\r
+ <SHORT-NAME>EVENT_2</SHORT-NAME>\r
+ <DEFINITION-REF DEST="PARAM-CONF-CONTAINER-DEF">/ArcCore/Os/OsEvent</DEFINITION-REF>\r
+ <PARAMETER-VALUES>\r
+ <INTEGER-VALUE>\r
+ <DEFINITION-REF DEST="INTEGER-PARAM-DEF">/ArcCore/Os/OsEvent/OsEventMask</DEFINITION-REF>\r
+ <VALUE>2</VALUE>\r
+ </INTEGER-VALUE>\r
+ </PARAMETER-VALUES>\r
+ </CONTAINER>\r
+ </CONTAINERS>\r
+ </MODULE-CONFIGURATION>\r
+ </ELEMENTS>\r
+ </AR-PACKAGE>\r
+ </TOP-LEVEL-PACKAGES></AUTOSAR>\r
#define _STATIC_ static\r
#define NULL_PTR ((void *)0)\r
\r
+#define CC_EXTENSION __extension__\r
+\r
/* REQ:COMPILER005 */\r
/* TODO: skip the memclass for now */\r
#define FUNC(rettype,memclass) rettype\r
#define DIO_E_PARAM_INVALID_PORT_ID 20
#define DIO_E_PARAM_INVALID_GROUP_ID 31
-#if defined(CFG_HC1X)
+#if defined(CFG_HC1X) || defined(CFG_TMS570)
typedef uint8 Dio_ChannelType;
typedef uint8 Dio_PortType;
--- /dev/null
+/*\r
+ * Gpt_ConfigTypes.h\r
+ *\r
+ * Created on: 13 dec 2010\r
+ * Author: Niclas\r
+ */\r
+\r
+#ifndef GPT_CONFIGTYPES_H_\r
+#define GPT_CONFIGTYPES_H_\r
+\r
+typedef struct {\r
+ uint32 GptChannelClkSrc;\r
+ Gpt_ChannelType GptChannelId;\r
+ Gpt_ChannelMode GptChannelMode;\r
+ void (*GptNotification)();\r
+ uint32 GptChannelPrescale;\r
+ boolean GptEnableWakeup;\r
+} Gpt_ConfigType;\r
+\r
+#endif /* GPT_CONFIGTYPES_H_ */\r
OSServiceId_StartupHook,\r
OSServiceId_ShutdownHook,\r
OSServiceId_GetTaskState,\r
-} OsServiceIdType;;\r
+} OsServiceIdType;\r
\r
typedef struct OsError {\r
OsServiceIdType serviceId;\r
\r
void Os_Arc_GetStackInfo( TaskType pid, StackInfoType *s );\r
\r
-#define OS_STACK_USAGE(_x) ((((_x)->size - (uint32_t)((_x)->usage - (_x)->top))*100)/(_x)->size)\r
+#define OS_STACK_USAGE(_x) ((((_x)->size - (uint32_t)((size_t)(_x)->usage - (size_t)(_x)->top))*100)/(_x)->size)\r
\r
// int printf(const char *format, ...);\r
\r
--- /dev/null
+/*\r
+ * Adc_ConfigTypes.h\r
+ *\r
+ * Created on: 20 dec 2010\r
+ * Author: Niclas\r
+ */\r
+\r
+#ifndef ADC_CONFIGTYPES_H_\r
+#define ADC_CONFIGTYPES_H_\r
+\r
+typedef uint16_t Adc_ValueGroupType;\r
+/* Group definitions. */\r
+\r
+typedef enum\r
+{\r
+ ADC_CH0,\r
+ ADC_CH1,\r
+ ADC_CH2,\r
+ ADC_CH3,\r
+ ADC_CH4,\r
+ ADC_CH5,\r
+ ADC_CH6,\r
+ ADC_CH7,\r
+ ADC_CH8,\r
+ ADC_CH9,\r
+ ADC_CH10,\r
+ ADC_CH11,\r
+ ADC_CH12,\r
+ ADC_CH13,\r
+ ADC_CH14,\r
+ ADC_CH15,\r
+ ADC_NBR_OF_CHANNELS,\r
+}Adc_ChannelType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK\r
+}Adc_ClockSourceType;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK_DISABLED,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_1,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_2,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_4,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_6,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_8,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_10,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_12,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_14,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_16,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_18,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_20,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_22,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_24,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_26,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_28,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_30,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_32,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_34,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_36,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_38,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_40,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_42,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_44,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_46,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_48,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_50,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_52,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_54,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_56,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_58,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_60,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_62,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_64,\r
+}Adc_PrescaleType;\r
+\r
+/* Non-standard type */\r
+typedef struct\r
+{\r
+ Adc_ClockSourceType clockSource;\r
+ uint8_t hwUnitId;\r
+ Adc_PrescaleType adcPrescale;\r
+}Adc_HWConfigurationType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONVERSION_TIME_2_CLOCKS,\r
+ ADC_CONVERSION_TIME_8_CLOCKS,\r
+ ADC_CONVERSION_TIME_64_CLOCKS,\r
+ ADC_CONVERSION_TIME_128_CLOCKS\r
+}Adc_ConversionTimeType;\r
+\r
+/* Channel definitions, std container */\r
+typedef struct\r
+{\r
+ Adc_ConversionTimeType adcChannelConvTime;\r
+ // NOT SUPPORTED Adc_VoltageSourceType adcChannelRefVoltSrcLow;\r
+ // NOT SUPPORTED Adc_VoltageSourceType adcChannelRefVoltSrcHigh;\r
+ // NOT SUPPORTED Adc_ResolutionType adcChannelResolution;\r
+ // NOT SUPPORTED Adc_CalibrationType adcChannelCalibrationEnable;\r
+} Adc_ChannelConfigurationType;\r
+\r
+/* Used ?? */\r
+typedef struct\r
+{\r
+ uint8 notifictionEnable;\r
+ Adc_ValueGroupType * resultBufferPtr;\r
+ Adc_StatusType groupStatus;\r
+} Adc_GroupStatus;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONV_MODE_DISABLED,\r
+ ADC_CONV_MODE_ONESHOT = 1,\r
+ ADC_CONV_MODE_CONTINOUS = 9,\r
+} Adc_GroupConvModeType;\r
+\r
+/* Implementation specific */\r
+typedef struct\r
+{\r
+ // NOT SUPPORTED Adc_GroupAccessModeType accessMode;\r
+ Adc_GroupConvModeType conversionMode;\r
+ Adc_TriggerSourceType triggerSrc;\r
+ // NOT SUPPORTED Adc_HwTriggerSignalType hwTriggerSignal;\r
+ // NOT SUPPORTED Adc_HwTriggerTimerType hwTriggerTimer;\r
+ void (*groupCallback)(void);\r
+ // NOT SUPPORTED Adc_StreamBufferModeType streamBufferMode;\r
+ // NOT SUPPORTED Adc_StreamNumSampleType streamNumSamples;\r
+ const Adc_ChannelType *channelList;\r
+ Adc_ValueGroupType *resultBuffer;\r
+ // NOT SUPPORTED Adc_CommandType *commandBuffer;\r
+ Adc_ChannelType numberOfChannels;\r
+ Adc_GroupStatus *status;\r
+ // NOT SUPPORTED Dma_ChannelType dmaCommandChannel;\r
+ // NOT SUPPORTED Dma_ChannelType dmaResultChannel;\r
+ // NOT SUPPORTED const struct tcd_t * groupDMACommands;\r
+ // NOT SUPPORTED const struct tcd_t * groupDMAResults;\r
+} Adc_GroupDefType;\r
+\r
+/* Non-standard type */\r
+typedef struct\r
+{\r
+ const Adc_HWConfigurationType* hwConfigPtr;\r
+ const Adc_ChannelConfigurationType* channelConfigPtr;\r
+ const uint16_t nbrOfChannels;\r
+ const Adc_GroupDefType* groupConfigPtr;\r
+ const uint16_t nbrOfGroups;\r
+} Adc_ConfigType;\r
+\r
+extern const Adc_ConfigType AdcConfig [];\r
+\r
+\r
+#endif /* ADC_CONFIGTYPES_H_ */\r
--- /dev/null
+/*\r
+ * Mcu_ConfigTypes.h\r
+ *\r
+ * Created on: 13 dec 2010\r
+ * Author: Niclas\r
+ */\r
+\r
+#ifndef MCU_CONFIGTYPES_H_\r
+#define MCU_CONFIGTYPES_H_\r
+\r
+#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)\r
+#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)\r
+#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)\r
+#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)\r
+#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)\r
+\r
+#ifndef STM32F10X_CL\r
+ #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)\r
+ #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)\r
+#else\r
+ #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)\r
+ #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)\r
+ #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)\r
+ #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)\r
+#endif\r
+\r
+#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)\r
+#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)\r
+#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)\r
+#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)\r
+#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)\r
+#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)\r
+#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)\r
+#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)\r
+#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)\r
+#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)\r
+#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)\r
+#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)\r
+#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)\r
+#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)\r
+#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)\r
+#define RCC_APB1Periph_USB ((uint32_t)0x00800000)\r
+#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)\r
+#define RCC_APB1Periph_BKP ((uint32_t)0x08000000)\r
+#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)\r
+#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)\r
+#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)\r
+\r
+#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)\r
+#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)\r
+#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)\r
+#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)\r
+#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)\r
+#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)\r
+#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)\r
+#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)\r
+#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)\r
+#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)\r
+#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)\r
+#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)\r
+#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)\r
+#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)\r
+#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)\r
+\r
+typedef struct {\r
+ uint32 AHBClocksEnable;\r
+ uint32 APB1ClocksEnable;\r
+ uint32 APB2ClocksEnable;\r
+} Mcu_PerClockConfigType;\r
+\r
+extern const Mcu_PerClockConfigType McuPerClockConfigData;\r
+\r
+\r
+#endif /* MCU_CONFIGTYPES_H_ */\r
--- /dev/null
+/* -------------------------------- Arctic Core ------------------------------\r
+ * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
+ *\r
+ * Copyright (C) 2009 ArcCore AB <contact@arccore.com>\r
+ *\r
+ * This source code is free software; you can redistribute it and/or modify it\r
+ * under the terms of the GNU General Public License version 2 as published by the\r
+ * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
+ *\r
+ * This program is distributed in the hope that it will be useful, but\r
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License\r
+ * for more details.\r
+ * -------------------------------- Arctic Core ------------------------------*/\r
+\r
+#ifndef PORT_CONFIGTYPES_H_\r
+#define PORT_CONFIGTYPES_H_\r
+\r
+#define GPIO_INPUT_MODE (0)\r
+#define GPIO_OUTPUT_10MHz_MODE (1)\r
+#define GPIO_OUTPUT_2MHz_MODE (2)\r
+#define GPIO_OUTPUT_50MHz_MODE (3)\r
+\r
+/* Valid for input modes. */\r
+#define GPIO_ANALOG_INPUT_CNF (0 << 2)\r
+#define GPIO_FLOATING_INPUT_CNF (1 << 2)\r
+#define GPIO_INPUT_PULLUP_CNF (2 << 2)\r
+#define GPIO_RESERVED_CNF (3 << 2)\r
+\r
+/* Valid for output modes. */\r
+#define GPIO_OUTPUT_PUSHPULL_CNF (0 << 2)\r
+#define GPIO_OUTPUT_OPENDRAIN_CNF (1 << 2)\r
+#define GPIO_ALT_PUSHPULL_CNF (2 << 2)\r
+#define GPIO_ALT_OPENDRAIN_CNF (3 << 2)\r
+\r
+#define GPIO_OUTPUT_LOW (0)\r
+#define GPIO_OUTPUT_HIGH (1)\r
+\r
+typedef struct\r
+{\r
+ uint8_t GpioPinCnfMode_0:4;\r
+ uint8_t GpioPinCnfMode_1:4;\r
+ uint8_t GpioPinCnfMode_2:4;\r
+ uint8_t GpioPinCnfMode_3:4;\r
+ uint8_t GpioPinCnfMode_4:4;\r
+ uint8_t GpioPinCnfMode_5:4;\r
+ uint8_t GpioPinCnfMode_6:4;\r
+ uint8_t GpioPinCnfMode_7:4;\r
+ uint8_t GpioPinCnfMode_8:4;\r
+ uint8_t GpioPinCnfMode_9:4;\r
+ uint8_t GpioPinCnfMode_10:4;\r
+ uint8_t GpioPinCnfMode_11:4;\r
+ uint8_t GpioPinCnfMode_12:4;\r
+ uint8_t GpioPinCnfMode_13:4;\r
+ uint8_t GpioPinCnfMode_14:4;\r
+ uint8_t GpioPinCnfMode_15:4;\r
+}GpioPinCnfMode_Type;\r
+\r
+typedef struct\r
+{\r
+ uint8_t GpioPinOutLevel_0:1;\r
+ uint8_t GpioPinOutLevel_1:1;\r
+ uint8_t GpioPinOutLevel_2:1;\r
+ uint8_t GpioPinOutLevel_3:1;\r
+ uint8_t GpioPinOutLevel_4:1;\r
+ uint8_t GpioPinOutLevel_5:1;\r
+ uint8_t GpioPinOutLevel_6:1;\r
+ uint8_t GpioPinOutLevel_7:1;\r
+ uint8_t GpioPinOutLevel_8:1;\r
+ uint8_t GpioPinOutLevel_9:1;\r
+ uint8_t GpioPinOutLevel_10:1;\r
+ uint8_t GpioPinOutLevel_11:1;\r
+ uint8_t GpioPinOutLevel_12:1;\r
+ uint8_t GpioPinOutLevel_13:1;\r
+ uint8_t GpioPinOutLevel_14:1;\r
+ uint8_t GpioPinOutLevel_15:1;\r
+}GpioPinOutLevel_Type;\r
+\r
+/* To be compatible with Port.h */\r
+typedef uint8_t Port_PinType;\r
+\r
+/** Top level configuration container */\r
+typedef struct\r
+{\r
+ /** Total number of pins */\r
+ uint16_t padCnt;\r
+ /** List of pin configurations */\r
+ const GpioPinCnfMode_Type *padConfig;\r
+ const GpioPinOutLevel_Type *outConfig;\r
+ /** Total number of pin default levels */\r
+\r
+ uint16_t remapCount;\r
+ const uint32_t* remaps;\r
+\r
+} Port_ConfigType;\r
+\r
+\r
+#endif /* PORT_CONFIGTYPES_H_ */\r
--- /dev/null
+/*\r
+ * Pwm_ConfigTypes.h\r
+ *\r
+ * Created on: 21 dec 2010\r
+ * Author: Niclas\r
+ */\r
+\r
+#ifndef PWM_CONFIGTYPES_H_\r
+#define PWM_CONFIGTYPES_H_\r
+typedef uint16 Pwm_PeriodType;\r
+\r
+typedef enum {\r
+ PWM_CHANNEL_11 = 0, // TIM1 Channel 1\r
+ PWM_CHANNEL_12,\r
+ PWM_CHANNEL_13,\r
+ PWM_CHANNEL_14,\r
+ PWM_CHANNEL_21, // TIM2 Channel 1\r
+ PWM_CHANNEL_22,\r
+ PWM_CHANNEL_23,\r
+ PWM_CHANNEL_24,\r
+ PWM_CHANNEL_31, // TIM3 Channel 1\r
+ PWM_CHANNEL_32,\r
+ PWM_CHANNEL_33,\r
+ PWM_CHANNEL_34,\r
+ PWM_CHANNEL_41, // TIM4 Channel 1\r
+ PWM_CHANNEL_42,\r
+ PWM_CHANNEL_43,\r
+ PWM_CHANNEL_44,\r
+ PWM_TOTAL_NOF_CHANNELS,\r
+} Pwm_ChannelType;\r
+\r
+typedef enum {\r
+ PWM_CHANNEL_PRESCALER_1=0,\r
+ PWM_CHANNEL_PRESCALER_2,\r
+ PWM_CHANNEL_PRESCALER_3,\r
+ PWM_CHANNEL_PRESCALER_4,\r
+} Pwm_ChannelPrescalerType;\r
+#define DUTY_AND_PERIOD(_duty,_period) .duty = (_duty*_period)>>15, .period = _period\r
+\r
+typedef struct {\r
+ /* Number of duty ticks */\r
+ uint32_t duty:32;\r
+ /* Length of period, in ticks */\r
+ uint32_t period:32;\r
+ /* Counter */\r
+ uint32_t counter:32;\r
+ /* Enable freezing the channel when in debug mode */\r
+ uint32_t freezeEnable:1;\r
+ /* Disable output */\r
+ uint32_t outputDisable:1;\r
+ /* Select which bus disables the bus\r
+ * TODO: Figure out how this works, i.e. what bus does it refer to? */\r
+ uint32_t outputDisableSelect:2;\r
+ /* Prescale the emios clock some more? */\r
+ Pwm_ChannelPrescalerType prescaler:2;\r
+ /* Prescale the emios clock some more? */\r
+ uint32_t usePrescaler:1;\r
+ /* Whether to use DMA. Currently unsupported */\r
+ uint32_t useDma:1;\r
+ uint32_t reserved_2:1;\r
+ /* Input filter. Ignored in output mode. */\r
+ uint32_t inputFilter:4;\r
+ /* Input filter clock source. Ignored in output mode */\r
+ uint32_t filterClockSelect:1;\r
+ /* Enable interrupts/flags on this channel? Required for DMA as well. */\r
+ uint32_t flagEnable:1;\r
+ uint32_t reserved_3:3;\r
+ /* Trigger a match on channel A */\r
+ uint32_t forceMatchA:1;\r
+ /* Triggers a match on channel B */\r
+ uint32_t forceMatchB:1;\r
+ uint32_t reserved_4:1;\r
+ /* We can use different buses for the counter. Use the internal counter */\r
+ uint32_t busSelect:2;\r
+ /* What edges to flag on? */\r
+ uint32_t edgeSelect:1;\r
+ /* Polarity of the channel */\r
+ uint32_t edgePolarity:1;\r
+ /* EMIOS mode. 0x58 for buffered output PWM */\r
+ uint32_t mode:7;\r
+} Pwm_ChannelRegisterType;\r
+\r
+typedef struct {\r
+ Pwm_ChannelRegisterType r;\r
+ Pwm_ChannelType channel;\r
+} Pwm_ChannelConfigurationType;\r
+\r
+\r
+\r
+// Channel configuration macro.\r
+#define PWM_CHANNEL_CONFIG(_hwchannel, _period, _duty, _prescaler, _polarity) \\r
+ {\\r
+ .channel = _hwchannel,\\r
+ .r = {\\r
+ DUTY_AND_PERIOD(_duty, _period),\\r
+ .freezeEnable = 1,\\r
+ .outputDisable = 0,\\r
+ .usePrescaler = 1,\\r
+ .prescaler = _prescaler,\\r
+ .useDma = 0,\\r
+ .flagEnable = 0, /* See PWM052 */ \\r
+ .busSelect = 3, /* Use the internal counter bus */\\r
+ .edgePolarity = _polarity,\\r
+ .mode = 0\\r
+ }\\r
+ }\r
+\r
+#endif /* PWM_CONFIGTYPES_H_ */\r
#endif\r
\r
#if defined(USE_LDEBUG_PRINTF)\r
-#define LDEBUG_PRINTF(format,...) printf(format,## __VA_ARGS__ )\r
+#define LDEBUG_PRINTF(format,...) printf(format,## __VA_ARGS__ )\r
+#define LDEBUG_FPUTS(_str) fputs((_str),stdout)\r
#else\r
#define LDEBUG_PRINTF(format,...)\r
+#define LDEBUG_FPUTS(_str)\r
#endif\r
\r
\r
--- /dev/null
+/*\r
+ * Adc_ConfigTypes.h\r
+ *\r
+ * Created on: 20 dec 2010\r
+ * Author: Niclas\r
+ */\r
+\r
+#ifndef ADC_CONFIGTYPES_H_\r
+#define ADC_CONFIGTYPES_H_\r
+\r
+\r
+typedef uint16_t Adc_ValueGroupType;\r
+\r
+\r
+typedef enum\r
+{\r
+ ADC_CH0,\r
+ ADC_CH1,\r
+ ADC_CH2,\r
+ ADC_CH3,\r
+ ADC_CH4,\r
+ ADC_CH5,\r
+ ADC_CH6,\r
+ ADC_CH7,\r
+ ADC_NOF_CHANNELS,\r
+}Adc_ChannelType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_2,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_4,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_6,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_8,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_10,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_12,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_14,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_16,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_18,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_20,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_22,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_24,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_26,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_28,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_30,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_32,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_34,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_36,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_38,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_40,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_42,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_44,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_46,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_48,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_50,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_52,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_54,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_56,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_58,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_60,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_62,\r
+ ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_64,\r
+}Adc_PrescaleType;\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONVERSION_TIME_2_CLOCKS,\r
+ ADC_CONVERSION_TIME_4_CLOCKS,\r
+ ADC_CONVERSION_TIME_8_CLOCKS,\r
+ ADC_CONVERSION_TIME_16_CLOCKS\r
+}Adc_ConversionTimeType;\r
+\r
+\r
+typedef enum\r
+{\r
+ ADC_RESOLUTION_10_BIT,\r
+ ADC_RESOLUTION_8_BIT,\r
+}Adc_ResolutionType;\r
+\r
+typedef struct\r
+{\r
+ uint8 notifictionEnable;\r
+ Adc_ValueGroupType * resultBufferPtr;\r
+ Adc_StatusType groupStatus;\r
+} Adc_GroupStatus;\r
+\r
+\r
+/* Std-type, supplier defined */\r
+typedef enum\r
+{\r
+ ADC_CONV_MODE_DISABLED,\r
+ ADC_CONV_MODE_ONESHOT = 1,\r
+ ADC_CONV_MODE_CONTINUOUS = 9,\r
+} Adc_GroupConvModeType;\r
+\r
+typedef struct\r
+{\r
+ Adc_GroupConvModeType conversionMode;\r
+ Adc_TriggerSourceType triggerSrc;\r
+ void (*groupCallback)(void);\r
+ const Adc_ChannelType *channelList;\r
+ Adc_ValueGroupType *resultBuffer;\r
+ Adc_ChannelType numberOfChannels;\r
+ Adc_GroupStatus *status;\r
+} Adc_GroupDefType;\r
+\r
+typedef struct\r
+{\r
+ Adc_ConversionTimeType convTime;\r
+ Adc_ResolutionType resolution;\r
+ Adc_PrescaleType adcPrescale;\r
+}Adc_HWConfigurationType;\r
+\r
+typedef struct\r
+{\r
+ const Adc_HWConfigurationType* hwConfigPtr;\r
+ const Adc_GroupDefType* groupConfigPtr;\r
+} Adc_ConfigType;\r
+\r
+extern const Adc_ConfigType AdcConfig[];\r
+#endif /* ADC_CONFIGTYPES_H_ */\r
}\r
#endif\r
\r
-/*-----------------------------------------------------------------*/\r
-int Os_CfgGetTaskCnt(void) {\r
- return OS_TASK_CNT;\r
-}\r
/*-----------------------------------------------------------------*/\r
\r
OsResourceType *Os_CfgGetResource( ResourceType resource ) {\r
+#if OS_RESOURCE_CNT!=0\r
return &resource_list[resource];\r
-}\r
-\r
-int Os_CfgGetResourceCnt() {\r
- return OS_RESOURCE_CNT;\r
+#else\r
+ return NULL;\r
+#endif\r
}\r
\r
/*-----------------------------------------------------------------*/\r
return &counter_list[count_id];\r
}\r
\r
-uint32 Os_CfgGetCounterCnt(void ) {\r
- return OS_COUNTER_CNT;\r
-// return sizeof(counter_list)/sizeof(OsCounterType);\r
-}\r
/*-----------------------------------------------------------------*/\r
\r
-uint32 Os_CfgGetSchedCnt( void ) {\r
- return OS_SCHTBL_CNT;\r
-}\r
-\r
OsSchTblType *Os_CfgGetSched( ScheduleTableType sched_id ) {\r
#if (OS_SCHTBL_CNT!=0)\r
if(sched_id < OS_SCHTBL_CNT) {\r
\r
/*-----------------------------------------------------------------*/\r
\r
-uint32 Os_CfgGetAlarmCnt(void) {\r
- return OS_ALARM_CNT;\r
-}\r
-\r
OsAlarmType *Os_CfgGetAlarmObj( AlarmType alarm_id ) {\r
#if (OS_ALARM_CNT!=0)\r
if( alarm_id < OS_ALARM_CNT) {\r
\r
StatusType rv = E_OK;\r
\r
- if( alarm_id >= Os_CfgGetAlarmCnt() ) {\r
+ if( alarm_id >= OS_ALARM_CNT ) {\r
rv = E_OS_ID;\r
} else {\r
#if (OS_ALARM_CNT!=0)\r
.ShutdownHook = _shutdown, \\r
.ErrorHook = _error, \\r
.PreTaskHook = _pretask, \\r
- .PostTaskHook = _posttask, \\r
-};\r
+ .PostTaskHook = _posttask \\r
+}\r
#else\r
#define GEN_HOOKS( _startup, _protection, _shutdown, _error, _pretask, _posttask ) \\r
struct OsHooks os_conf_global_hooks = { \\r
.ShutdownHook = _shutdown, \\r
.ErrorHook = _error, \\r
.PreTaskHook = _pretask, \\r
- .PostTaskHook = _posttask, \\r
-};\r
+ .PostTaskHook = _posttask \\r
+}\r
\r
#endif\r
\r
* Note! Tried lots of other ways to do this but came up empty\r
*/\r
\r
-#define get_spr(spr_nr) \\r
+#define get_spr(spr_nr) CC_EXTENSION \\r
({\\r
uint32_t __val;\\r
asm volatile (" mfspr %0," STRINGIFY__(spr_nr) : "=r"(__val) : );\\r
\r
# Warnings\r
cflags-y += -Wall\r
-cflags-y += -Winline # warn if inline failed\r
+#cflags-y += -Winline # warn if inline failed\r
#cflags-y += -pedantic\r
\r
# Conformance\r
gcc_lib_path := $(subst \libgcc.a,,$(gcc_lib_path)) \r
lib_lib_path := "$(subst /libc.a,,$(shell $(CC) $(CFLAGS) --print-file-name=libc.a))"\r
lib_lib_path := $(subst \libc.a,,$(lib_lib_path))\r
+text_chunk := $(subst \,/,$(shell touch i_m_here.c; $(CC) -v -c i_m_here.c &> i_m_here.txt;gawk -f $(TOPDIR)/scripts/gcc_getinclude.awk i_m_here.txt))\r
+cc_inc_path := $(realpath $(text_chunk))\r
libpath-y += -L$(lib_lib_path)\r
libpath-y += -L$(gcc_lib_path)\r
\r
--- /dev/null
+\r
+lintdef_ext=-d\r
+lintinc_ext=-i\r
+\r
+lint_extra=+v -b -i$(TOPDIR)/scripts/pclint -i$(TOPDIR)/scripts/pclint/lnt std.lnt\r
+inc-y += $(cc_inc_path)\r
+#lint_files=$(TOPDIR)/scripts/lint/std.lnt\r
+#lint_files=$(TOPDIR)/scripts/lint/lnt/au-misra2.lnt\r
+#lint_files+=$(TOPDIR)/scripts/lint/lnt/au-misra2.lnt\r
+\r
+#$(addprefix -i,$(abs-inc-y)) /C/lint/std.lnt $(abspath $<))\r
--- /dev/null
+\r
+lintdef_ext=-D\r
+lintinc_ext=-I\r
+\r
+#splint_extra=+v -b -i$(TOPDIR)/scripts/pclint -i$(TOPDIR)/scripts/pclint/lnt std.lnt\r
+splint_extra=+nolib\r
+inc-y += $(cc_inc_path)\r
+#lint_files=$(TOPDIR)/scripts/lint/std.lnt\r
+#lint_files=$(TOPDIR)/scripts/lint/lnt/au-misra2.lnt\r
+#lint_files+=$(TOPDIR)/scripts/lint/lnt/au-misra2.lnt\r
+\r
+#$(addprefix -i,$(abs-inc-y)) /C/lint/std.lnt $(abspath $<))\r
mpc5567qrtech:powerpc-eabispe/bin/powerpc-eabispe-
mpc551xsim:powerpc-eabispe/bin/powerpc-eabispe-
mpc5554sim:powerpc-eabispe/bin/powerpc-eabispe-
+hcs12_elmicro_card12:m6811-elf/bin/m6811-elf-
+hcs12x_elmicro_tboard:m6811-elf/bin/m6811-elf-
linux:
--- /dev/null
+#\r
+# Get include dirs from:\r
+# touch apa.c \r
+# gcc -v -c apa.c\r
+#\r
+# "#include <...> search starts here:" to "End of search list."\r
+#\r
+\r
+/#include <...> search starts here:/,/End of search list/ {\r
+\r
+ if (!(($1=="#include")||($1=="End")))\r
+ print $0\r
+}\r
+\r
+\r
+\r
--- /dev/null
+-ss2
+-si4
+-sl4
+-sll8
+-sf4
+-sd8
+-sld8
+-sp4
+
--- /dev/null
+\r
+// au-misra.lnt -- Author options - MISRA\r
+// Traditionally this file has held the lastest misra standard.\r
+// There have been two standards published: MISRA 1998 and MISRA 2004.\r
+// We have two files bearing options that, respectively, activate\r
+// these standards: au-misra1.lnt and au-misra2.lnt\r
+// Currently MISRA 2004 is the preferred standard.\r
+// Prior to publishing the 2nd standard, the file au-misra.lnt was\r
+// used to hold the then current misra standard. We are maintaining\r
+// this file to afford backward compatibility.\r
+\r
+au-misra2.lnt\r
--- /dev/null
+\r
+// au-misra2.lnt -- Author options - MISRA 2004\r
+\r
+/*\r
+ This options file can be used to explicitly activate those\r
+ checks advocated by the Motor Industry Software Reliability\r
+ Association.\r
+\r
+ You can use this file directly when linting your programs as in:\r
+\r
+ lin au-misra2 files\r
+\r
+ Gimpel Software relies on the document, "MISRA-C:2004\r
+ Guidelines for the use of the C language in critical systems",\r
+ copyright 2004 by MIRA Limited, as the primary source for this\r
+ file. Gimpel Software makes no warranty as to the completeness\r
+ or applicability of this options file and reserves the right to\r
+ amend or alter the official contents of such at any time.\r
+\r
+ "MISRA" is a registered trademark of MIRA Limited, held on\r
+ behalf of the MISRA Consortium.\r
+\r
+ */\r
+ -misra(2)\r
+ +e960 /* enable special MISRA 2 messages */\r
+ +elib(960) \r
+ +e961 /* enable special MISRA 2 messages */\r
+ +elib(961) \r
+\r
+/* Rule 1.1 (req) **********************************/\r
+\r
+ -A(C90) /* strict ANSI */\r
+ +e950 /* flag non-ANSI word or construct */\r
+ +elib(950) \r
+ -append(950,[MISRA 2004 Rule 1.1])\r
+\r
+/* Rule 1.2 (req) **********************************/\r
+\r
+ /* Avoid the use of undefined or unspecified behavior as described\r
+ in ISO C, Appendix A.6.1 and Appendix A.6.2 */\r
+\r
+ /* Source file not ending in a new-line character, ending in\r
+ new-line character immediately preceded by a backslash\r
+ character, or ending in a partial preprocessing token or\r
+ comment (ISO C, Appendix A.6.2, point 1).\r
+ */\r
+ +e406 /* unclosed comment */\r
+ +elib(406)\r
+ -append(406,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Non-standard character usage (ISO C, Appendix A.6.2, point 2).\r
+ */\r
+ +e27 /* illegal character */\r
+ +elib(27)\r
+ -append(27,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Unclosed quotes (ISO C, Appendix A.6.2, point 4).\r
+ */\r
+ +e2 /* unclose quote */\r
+ +elib(2)\r
+ -append(2,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Repeated label within a function (ISO C, Appendix A.6.2, point\r
+ 5).\r
+ */\r
+ +e31 /* symbol redefinition */\r
+ +elib(31)\r
+ -append(31,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Non-visible identifier used (ISO C, Appendix A.6.2, point 6).\r
+ */\r
+ +e40 /* undeclared identifier */\r
+ +elib(40)\r
+ -append(40,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Identifiers for the same entity differ beyond the minimal\r
+ significant characters (ISO C, Appendix A.6.2, point 7).\r
+ See Rules 1.4 and 5.1\r
+ */\r
+\r
+ /* The same identifier has both internal and external linkage in\r
+ the same translation unit (ISO C, Appendix A.6.2, point 8).\r
+ */\r
+ +e401 /* symbol not previously declared static */\r
+ +elib(401)\r
+ -append(401,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Multiple definitions for the same externally linked identifier\r
+ (ISO C, Appendix A.6.2, point 9).\r
+ */\r
+ +e31 /* symbol redefinition */\r
+ +elib(31)\r
+\r
+ /* Using automatic storage data via a pointer after the data's\r
+ lifetime (ISO C, Appendix A.6.2, point 10).\r
+ */\r
+ +e604 /* returning address of auto variable */\r
+ +elib(604)\r
+ -append(604,[MISRA 2004 Rule 1.2])\r
+ +e934 /* taking address of near auto variable */\r
+ +elib(934)\r
+ -append(934,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Incompatible redeclarations (ISO C, Appendix A.6.2, point 11).\r
+ See Rule 8.3\r
+ */\r
+\r
+ /* Non-standard escape sequence (ISO C, Appendix A.6.2, point 12).\r
+ See Rule 4.1\r
+ */\r
+\r
+ /* Non-standard character in header name (ISO C, Appendix A.6.2,\r
+ point 15).\r
+ See Rule 19.2\r
+ */\r
+\r
+ /* No complete type available (ISO C, Appendix A.6.2, point 16).\r
+ */\r
+ +e86 /* structure has no data elements */\r
+ +elib(86)\r
+ -append(86,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Using or converting a void expression (ISO C, Appendix A.6.2,\r
+ point 17).\r
+ */\r
+ +e64 /* type mismatch */\r
+ +elib(64)\r
+ -append(64,[MISRA 2004 Rule 1.2])\r
+ +e67 /* cannot cast between types */\r
+ +elib(67)\r
+ -append(67,[MISRA 2004 Rule 1.2])\r
+ +e144 /* non-existent return value */\r
+ +elib(144)\r
+ -append(144,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Modifying an object more than once or modifying and accessing\r
+ between two sequence points (ISO C, Appendix A.6.2, point 18).\r
+ See Rule 12.2\r
+ */\r
+\r
+ /* Invalid arithmetic operations or unrepresentable results\r
+ (ISO C, Appendix A.6.2, point 19).\r
+ */\r
+ +e54 /* division by 0 */\r
+ +elib(54)\r
+ -append(54,[MISRA 2004 Rule 1.2])\r
+ +e414 /* possible division by 0 */\r
+ +elib(414)\r
+ -append(414,[MISRA 2004 Rule 1.2])\r
+ +e795 /* conceivable division by 0 */\r
+ +elib(795)\r
+ -append(795,[MISRA 2004 Rule 1.2])\r
+ /* Also, see Rule 12.11 */\r
+\r
+ /* Passing a void argument to a function (ISO C, Appendix A.6.2,\r
+ point 20).\r
+ */\r
+ +e64 /* type mismatch */\r
+ +elib(64)\r
+\r
+ /* Incompatible function redeclaration (ISO C, Appendix A.6.2,\r
+ point 22).\r
+ See Rule 8.3\r
+ */\r
+\r
+ /* An invalid array reference, null pointer reference, or\r
+ reference to an object declared with automatic storage duration in\r
+ a terminated block occurs (ISO C, Appendix A.6.2, point 24).\r
+ */\r
+ +e64 /* type mismatch */\r
+ +elib(64)\r
+ +e413 /* likely use of null pointer */\r
+ +elib(413)\r
+ -append(413,[MISRA 2004 Rule 1.2])\r
+ +e415 /* out-of-bounds pointer */\r
+ +elib(415)\r
+ -append(415,[MISRA 2004 Rule 1.2])\r
+ +e416 /* out-of-bounds pointer */\r
+ +elib(416)\r
+ -append(416,[MISRA 2004 Rule 1.2])\r
+ +e428 /* negative subscript */\r
+ +elib(428)\r
+ -append(428,[MISRA 2004 Rule 1.2])\r
+ /* Also, see Rule 17.6 */\r
+\r
+ /* A pointer to a function is converted to a pointer to an object\r
+ or a pointer to an object is converted to a pointer to a function\r
+ (ISO C, Appendix A.6.2, point 26).\r
+ */\r
+ +e64 /* type mismatch */\r
+ +elib(64)\r
+ +e740 /* unusual pointer cast */\r
+ +elib(740)\r
+ -append(740,[MISRA 2004 Rule 1.2])\r
+ /* Also, see Rule 11.2 */\r
+\r
+ /* A pointer is converted to other than an integral or pointer\r
+ type (ISO C, Appendix A.6.2, point 27).\r
+ */\r
+ +e64 /* type mismatch */\r
+ +elib(64)\r
+ +e71 /* cannot cast */\r
+ +elib(71)\r
+ +esym(920,pointer) /* cast to void */\r
+ -append(920,[MISRA 2004 Rule 1.2])\r
+\r
+ /* An expression is shifted by a negative number or by an amount\r
+ greater than or equal to the width in bits of the expression being\r
+ shifted (ISO C, Appendix A.6.2, point 30).\r
+ */\r
+ +e504 /* unusual shift */\r
+ +elib(504)\r
+ -append(504,[MISRA 2004 Rule 1.2])\r
+\r
+ /* An identifier for an object is declared with no linkage and the\r
+ type of the object is incomplete after its declarator, or after its\r
+ init-declarator if it has an initializer (ISO C, Appendix\r
+ A.6.2, point 33).\r
+ */\r
+ +e86 /* structure has no data elements */\r
+ +elib(86)\r
+\r
+ /* Declaring a function at block scope with a storage-class\r
+ specifier other than extern (ISO C, Appendix A.6.2, point 34).\r
+ */\r
+ +e629 /* static class for function */\r
+ +elib(629)\r
+ -append(629,[MISRA 2004 Rule 1.2])\r
+\r
+ /* A bit-field is declared with a type other than int, signed int,\r
+ or unsigned int (ISO C, Appendix A.6.2, point 35).\r
+ See Rule 6.4\r
+ */\r
+\r
+ /* Attempting to modify an object with const-qualified type by\r
+ means of an lvalue with non-const-qualified type (ISO C,\r
+ Appendix A.6.2, point 36).\r
+ */\r
+ +e158 /* assignment increases capability */\r
+ +elib(158)\r
+ -append(158,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Attempting to refer to an object with volatile-qualified type\r
+ by means of an lvalue with non-volatile-qualified type (ISO C,\r
+ Appendix A.6.2, point 37).\r
+ */\r
+ +e158 /* assignment increases capability */\r
+ +elib(158)\r
+\r
+ /* Using the value of uninitialized automatic object (ISO C,\r
+ Appendix A.6.2, point 38).\r
+ See Rule 9.1\r
+ */\r
+\r
+ /* An object with aggregate or union type with static storage\r
+ duration has a non-brace-enclosed initializer, or an object\r
+ with aggregate or union type with automatic storage duration\r
+ has either a single expression initializer with a type other\r
+ than that of the object or a non-brace-enclosed initializer\r
+ (ISO C, Appendix A.6.2, point 39).\r
+ Also, see Rule 9.2\r
+ */\r
+ +e64 /* type mismatch */\r
+ +elib(64)\r
+\r
+ /* The value of a function is used, but no value was returned\r
+ (ISO C, Appendix A.6.2, point 40).\r
+ See Rule 16.8\r
+ */\r
+\r
+ /* A function that accepts a variable number of arguments is\r
+ defined without a parameter type list that ends with the\r
+ ellipsis notation (ISO C, Appendix A.6.2, point 41).\r
+ See Rule 8.3\r
+ */\r
+\r
+ /* An identifier for an object with internal linkage and an\r
+ incomplete type is declared with a tentative definition (ISO C,\r
+ Appendix A.6.2, point 42).\r
+ */\r
+ +e86 /* structure has no data elements */\r
+ +elib(86)\r
+\r
+ /* Non-standard #include preprocessing directive (ISO C, Appendix\r
+ A.6.2, point 44).\r
+ See Rule 19.3\r
+ */\r
+\r
+ /* Non-standard #line directive (ISO C, Appendix A.6.2, point 49).\r
+ */\r
+ +"estring(10,a numeric constant)"\r
+\r
+ /* #defining or #undefing any of: defined, __LINE__, __FILE__,\r
+ __DATE__, __TIME__, or __STDC__ (ISO C, Appendix A.6.2, point 50).\r
+ */\r
+ +e136 /* illegal macro name */\r
+ +elib(136)\r
+ -append(136,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Format-argument mismatch in an fprintf or fscanf type of\r
+ function (ISO C, Appendix A.6.2, point 75).\r
+ */\r
+ +e558 /* too few arguments */\r
+ +elib(558)\r
+ -append(558,[MISRA 2004 Rule 1.2])\r
+ +e719 /* too many arguments */\r
+ +elib(719)\r
+ -append(719,[MISRA 2004 Rule 1.2])\r
+\r
+ /* A %% conversion specification for the fprintf or fscanf\r
+ function contains characters between the pair of % characters\r
+ (ISO C, Appendix A.6.2, point 77).\r
+ */\r
+ +e557 /* unrecognized format */\r
+ +elib(557)\r
+ -append(557,[MISRA 2004 Rule 1.2])\r
+\r
+ /* An aggregate or union, or a pointer to an aggregate or union is\r
+ an argument to the fprintf function, except for the conversion\r
+ specifiers %s (for an array of character type) or %p (for a pointer\r
+ to void) (ISO C, Appendix A.6.2, point 81).\r
+ */\r
+ +e437 /* passing struct to ellipsis */\r
+ +elib(437)\r
+ -append(437,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Referring to deallocated space (ISO C, Appendix A.6.2, point\r
+ 87).\r
+ */\r
+ +e449 /* previously deallocated pointer */\r
+ +elib(449)\r
+ -append(449,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Misuse of free or realloc (ISO C, Appendix A.6.2, point 88).\r
+ */\r
+ +esym(424,free) /* inappropriate deallocation */\r
+ -append(424,[MISRA 2004 Rule 1.2])\r
+\r
+ /* An array written to by a copying or concatenation function is\r
+ too small (ISO C, Appendix A.6.2, point 91).\r
+ */\r
+ +e419 /* data overrun */\r
+ +elib(419)\r
+ -append(419,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Order of evaluation (ISO C, Appendix A.6.1, point 7).\r
+ */\r
+ +e564 /* variable depends on order of evaluation */\r
+ +elib(564)\r
+ -append(564,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Side effects order (ISO C, Appendix A.6.1, point 8).\r
+ */\r
+ +e931 /* both sides of an expression have side-effects */\r
+ +elib(931)\r
+ -append(931,[MISRA 2004 Rule 1.2])\r
+\r
+ /* Function argument evaluation (ISO C, Appendix A.6.1, point 9).\r
+ */\r
+ +e564 /* variable depends on order of evaluation */\r
+ +elib(564)\r
+\r
+ /* The order in which # and ## operations are evaluated during\r
+ macro substitution (ISO C, Appendix A.6.1, point 12).\r
+ */\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 19.12,\r
+ multiple use of '#/##' operators in macro definition\r
+ */\r
+\r
+ /* Whether setjmp is a macro or an external identifier (ISO C,\r
+ Appendix A.6.1, point 14).\r
+ See Rule 20.1\r
+ */\r
+\r
+/* Rule 1.3 (req) **********************************/\r
+\r
+ /* This is an environmental requirement on inter-language\r
+ interfacing and is not statically checkable\r
+ */\r
+\r
+/* Rule 1.4 (req) **********************************/\r
+\r
+ -idlen(31) /* flag names identical in the first 31 characters */\r
+ +e621 /* Identifier clash - length set by -idlen */\r
+ +elib(621) \r
+ -append(621,[MISRA 2004 Rule 1.4])\r
+\r
+/* Rule 1.5 (adv) **********************************/\r
+\r
+ /* This is an environmental requirement involving the floating\r
+ point hardware and is not statically checkable\r
+ */\r
+\r
+/* Rule 2.1 (req) **********************************/\r
+\r
+ +e586 /* to activate the deprecation message */\r
+ +elib(586)\r
+ -deprecate(keyword,asm,[MISRA 2004 Rule 2.1])\r
+\r
+/* Rule 2.2 (req) **********************************/\r
+\r
+ -A(C90) /* strict ANSI */\r
+ +e950 /* flag non-ANSI word or construct */\r
+ +elib(950)\r
+ -append(950,[MISRA 2004 Rule 2.2])\r
+\r
+/* Rule 2.3 (req) **********************************/\r
+\r
+ -fnc /* flag nested comments */\r
+ +e602 /* comment within comment */\r
+ +elib(602) \r
+ -append(602,[MISRA 2004 Rule 2.3])\r
+\r
+/* Rule 2.4 (adv) **********************************/\r
+\r
+ /* This requirement (that there be no commented-out code) is, in\r
+ principle, not statically checkable. The reason given for the\r
+ requirement is that comments do not nest. Thus a commented\r
+ out section of code that happens to use slash-star commenting\r
+ could inadvertently introduce unwanted code. Rule 2.3, however,\r
+ addresses the nested comment issue and hence the major concern\r
+ that this requirement seeks to address is indeed checkable.\r
+ */\r
+ -fnc /* flag nested comments */\r
+ +e602 /* comment within comment */\r
+ +elib(602) \r
+ -append(602,[MISRA 2004 Rule 2.4])\r
+\r
+/* Rule 3.1 (req) **********************************/\r
+\r
+ /* This is a documentation requirement and as such is not statically\r
+ checkable.\r
+ */\r
+\r
+/* Rule 3.2 (req) **********************************/\r
+\r
+ /* As stated in the description of the requirement, this is a\r
+ documentation requirement denoting the characters that may be\r
+ placed in string and character literals. It is not statically\r
+ checkable.\r
+ */\r
+\r
+/* Rule 3.3 (adv) **********************************/\r
+\r
+ /* This is a requirement on the hardware implementation of\r
+ integer division and/or the program's understanding of it.\r
+ It is not statically checkable.\r
+ */\r
+\r
+/* Rule 3.4 (req) **********************************/\r
+\r
+ /* This rule requires that all uses of the pragma directive\r
+ be documented. To assist in this documentation\r
+ effort we can report on unknown pragmas. By default, all\r
+ pragmas are unknown except two, push_macro and pop_macro.\r
+ These have been approved by the C standards committee but\r
+ nonetheless may be disabled (and thus reported upon as unknown)\r
+ by use of the -pragma option. These and other pragmas can be\r
+ later added using the +pragma option.\r
+ */\r
+ +e975 /* report on unknown macros */\r
+ -pragma( push_macro ) /* disable push_macro */\r
+ -pragma( pop_macro ) /* disable pop_macro */\r
+ -append(975,[MISRA 2004 Rule 3.4])\r
+\r
+\r
+/* Rule 3.5 (req) **********************************/\r
+\r
+ /* This rule is a documentation requirement when bit fields\r
+ are being used. As such, it is not statically checkable.\r
+ */\r
+\r
+/* Rule 3.6 (req) **********************************/\r
+\r
+ /* PC-lint and FlexeLint analyze auto-generated code in precisely\r
+ the same manner as non-auto-generated code.\r
+ */\r
+\r
+/* Rule 4.1 (req) **********************************/\r
+\r
+ +e606 /* non-ANSI escape sequence */\r
+ +elib(606) \r
+ -append(606,[MISRA 2004 Rule 4.1])\r
+\r
+/* Rule 4.2 (req) **********************************/\r
+\r
+ -ftg /* inhibit use of trigraphs */\r
+ +e739 /* activate trigraph in string message */\r
+ +elib(739) \r
+ -append(739,[MISRA 2004 Rule 4.2])\r
+\r
+/* Rule 5.1 (req) **********************************/\r
+\r
+ -idlen(31) /* flag names identical in the first 31 characters */\r
+ +e621 /* Identifier clash - length set by -idlen */\r
+ +elib(621) \r
+ -append(621,[MISRA 2004 Rule 5.1])\r
+ \r
+/* Rule 5.2 (req) **********************************/\r
+\r
+ +e578 /* enable reports of name hiding */\r
+ +elib(578) \r
+ -append(578,[MISRA 2004 Rule 5.2])\r
+\r
+/* Rule 5.3 (req) **********************************/\r
+\r
+ +e578 /* enable reports of name hiding */\r
+ +elib(578)\r
+ -append(578,[MISRA 2004 Rule 5.3])\r
+ +e623 /* redefining the storage class of symbol */\r
+ +elib(623) \r
+ -append(623,[MISRA 2004 Rule 5.3])\r
+\r
+/* Rule 5.4 (req) **********************************/\r
+\r
+ +e578 /* Declaration of Symbol hides Symbol */\r
+ +elib(578)\r
+ -append(578,[MISRA 2004 Rule 5.4])\r
+ +e14 /* Symbol previously defined */\r
+ +elib(14)\r
+ -append(14,[MISRA 2004 Rule 5.4])\r
+ +e15 /* Symbol redeclared */\r
+ +elib(15)\r
+ -append(15,[MISRA 2004 Rule 5.4])\r
+\r
+/* Rule 5.5 (adv) **********************************/\r
+\r
+ +e578 /* Declaration of Symbol hides Symbol */\r
+ +elib(578)\r
+ -append(578,[MISRA 2004 Rule 5.5])\r
+ +e580 /* enable reports of name hiding */\r
+ +elib(580) \r
+ -append(580,[MISRA 2004 Rule 5.5])\r
+\r
+/* Rule 5.6 (adv) **********************************/\r
+\r
+ +e578 /* enable reports of name hiding */\r
+ +elib(578)\r
+ -append(578,[MISRA 2004 Rule 5.6])\r
+ +e580 /* enable reports of name hiding */\r
+ +elib(580) \r
+ -append(580,[MISRA 2004 Rule 5.6])\r
+\r
+/* Rule 5.7 (adv) **********************************/\r
+\r
+ +e578 /* enable reports of name hiding */\r
+ +elib(578)\r
+ -append(578,[MISRA 2004 Rule 5.7])\r
+ +e580 /* enable reports of name hiding */\r
+ +elib(580) \r
+ -append(580,[MISRA 2004 Rule 5.7])\r
+\r
+/* Rule 6.1 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 6.1, \r
+ Disallowed use of non-character value, or \r
+ Plain char mixed with type other than plain char, or \r
+ Plain char used with prohibited operator, or \r
+ Disallowed cast of plain char \r
+ */\r
+\r
+/* Rule 6.2 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 6.2, \r
+ Disallowed use of non-numeric value \r
+ */\r
+\r
+/* Rule 6.3 (adv) **********************************/\r
+\r
+ +e970 /* flag modifiers used outside of typedefs */\r
+ +elib(970)\r
+ -append(970,[MISRA 2004 Rule 6.3])\r
+\r
+/* Rule 6.4 (req) **********************************/\r
+\r
+ +e46 /* field type should be int */\r
+ +elib(46)\r
+ -append(46,[MISRA 2004 Rule 6.4])\r
+\r
+/* Rule 6.5 (req) **********************************/\r
+\r
+ +e806 /* small bit field is signed rather than unsigned */\r
+ +elib(806)\r
+ -append(806,[MISRA 2004 Rule 6.5])\r
+\r
+/* Rule 7.1 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 7.1,\r
+ Octal constant or octal escape sequence used\r
+ */\r
+\r
+/* Rule 8.1 (req) **********************************/\r
+\r
+ +e718 /* Symbol undeclared */\r
+ +elib(718)\r
+ -append(718,[MISRA 2004 Rule 8.1])\r
+ +e746 /* Call to function not made in the\r
+ presence of a prototype\r
+ */\r
+ +elib(746)\r
+ -append(746,[MISRA 2004 Rule 8.1])\r
+ +e937 /* old-style function declaration */\r
+ +elib(937)\r
+ -append(937,[MISRA 2004 Rule 8.1])\r
+ +e957 /* function defined without a prototype\r
+ in scope\r
+ */\r
+ +elib(957)\r
+ -append(957,[MISRA 2004 Rule 8.1])\r
+\r
+/* Rule 8.2 (req) **********************************/\r
+\r
+ +e745 /* function has no explicit type */\r
+ +elib(745)\r
+ -append(745,[MISRA 2004 Rule 8.2])\r
+ +e939 /* return type defaults to int */\r
+ +elib(939)\r
+ -append(939,[MISRA 2004 Rule 8.2])\r
+\r
+/* Rule 8.3 (req) **********************************/\r
+\r
+ -fvr /* varying return mode not allowed */\r
+ +e18 /* symbol redeclared */\r
+ +elib(18)\r
+ -append(18,[Encompasses MISRA 2004 Rule 8.3])\r
+ +e516 /* argument type conflict */\r
+ +elib(516)\r
+ -append(516,[MISRA 2004 Rule 8.3])\r
+ +e532 /* return mode of symbol inconsistent */\r
+ +elib(532)\r
+ -append(532,[MISRA 2004 Rule 8.3])\r
+\r
+/* Rule 8.4 (req) **********************************/\r
+\r
+ +e15 /* symbol redeclared */\r
+ +elib(15)\r
+ -append(15,[MISRA 2004 Rule 8.4])\r
+ +e64 /* flag type mismatch */\r
+ +elib(64)\r
+ -append(64,[MISRA 2004 Rule 8.4])\r
+\r
+/* Rule 8.5 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 8.5,\r
+ no object/function definitions in header files\r
+ */\r
+\r
+/* Rule 8.6 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 8.6,\r
+ function not declared at file scope\r
+ */\r
+\r
+/* Rule 8.7 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 8.7, \r
+ Could define variable at block scope \r
+ */\r
+\r
+/* Rule 8.8 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 8.8, \r
+ Object/function previously declared in location \r
+ */\r
+\r
+/* Rule 8.9 (req) **********************************/\r
+\r
+ +e14 /* Symbol previously defined */\r
+ +elib(14)\r
+ -append(14,[MISRA 2004 Rule 8.9])\r
+\r
+/* Rule 8.10 (req) *********************************/\r
+\r
+ +e765 /* symbol could be made static */\r
+ +elib(765)\r
+ -append(765,[MISRA 2004 Rule 8.10])\r
+\r
+/* Rule 8.11 (req) *********************************/\r
+\r
+ +e512 /* symbol previously used as static */\r
+ +elib(512)\r
+ -append(512,[MISRA 2004 Rule 8.11])\r
+\r
+/* Rule 8.12 (req) *********************************/\r
+\r
+ +e85 /* Array has 0 dimension */\r
+ +elib(85)\r
+ -append(85,[MISRA 2004 Rule 8.12])\r
+\r
+/* Rule 9.1 (req) **********************************/\r
+\r
+ +e644 /* Symbol may not have been initialized */\r
+ +elib(644)\r
+ -append(644,[MISRA 2004 Rule 9.1])\r
+ +e771 /* Symbol conceivably not initialized */\r
+ +elib(771)\r
+ -append(771,[MISRA 2004 Rule 9.1])\r
+ +e530 /* Symbol not initialized */\r
+ +elib(530)\r
+ -append(530,[MISRA 2004 Rule 9.1])\r
+\r
+/* Rule 9.2 (req) **********************************/\r
+\r
+ +e940 /* omitted braces within an initializer */\r
+ +elib(940)\r
+ -append(940,[MISRA 2004 Rule 9.2])\r
+\r
+/* Rule 9.3 (req) **********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 9.3,\r
+ should initialize either all enum members or only the first\r
+ */\r
+\r
+/* Rule 10.1 (req) *********************************/\r
+\r
+ +e524 /* loss of precision */\r
+ +elib(524)\r
+ -append(524,[MISRA 2004 Rule 10.1])\r
+ +e653 /* possible loss of fraction */\r
+ +elib(653)\r
+ -append(653,[MISRA 2004 Rule 10.1])\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 10.1,\r
+ Prohibited Implicit Conversion, or\r
+ Implicit conversion from integer to floating point type, or\r
+ Implicit conversion of integer to smaller type, or\r
+ Implicit conversion changes signedness, or\r
+ Implicit conversion of complex integer expression\r
+ */\r
+\r
+/* Rule 10.2 (req) *********************************/\r
+\r
+ +e747 /* significant prototype coercion */\r
+ +elib(747)\r
+ -append(747,[MISRA 2004 Rule 10.2])\r
+ +e918 /* prototype coercion of pointers */\r
+ +elib(918)\r
+ -append(918,[MISRA 2004 Rule 10.2])\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 10.2,\r
+ Prohibited Implicit Conversion, or\r
+ Implicit conversion from floating point to integer type, or\r
+ Implicit conversion of floating point to smaller type, or\r
+ Implicit conversion of complex floating point expression\r
+ */\r
+\r
+/* Rule 10.3 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 10.3,\r
+ Prohibited cast of complex integer expression\r
+ */\r
+\r
+/* Rule 10.4 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 10.4,\r
+ Prohibited cast of complex floating-point expression: Casting\r
+ to larger type\r
+ */\r
+\r
+/* Rule 10.5 (req) *********************************/\r
+\r
+ +e701 /* shift left of signed quantity */\r
+ +elib(701)\r
+ -append(701,[MISRA 2004 Rule 10.5])\r
+ +e702 /* shift right of signed quantity */\r
+ +elib(702)\r
+ -append(702,[MISRA 2004 Rule 10.5])\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 10.5,\r
+ Operators '~' and '<<' require recasting to underlying type for\r
+ sub-integers\r
+ */\r
+\r
+/* Rule 10.6 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 10.6, \r
+ Unsigned integer literals require a 'U' suffix \r
+ */\r
+\r
+/* Rule 11.1 (req) *********************************/\r
+\r
+ +esym(68,pointer) /* cannot cast to/from pointer */\r
+ -append(68,[MISRA 2004 Rule 11.1])\r
+ +esym(922,pointer) /* cast to/from pointer */\r
+ +e923 /* cast pointer/non-pointer */\r
+ +elib(923)\r
+ -append(923,[Encompasses MISRA 2004 Rule 11.1])\r
+\r
+/* Rule 11.2 (req) *********************************/\r
+\r
+ +esym(68,pointer) /* Cannot cast from pointer to float */\r
+ -append(68,[MISRA 2004 Rule 11.2])\r
+ +e71 /* Cannot cast between types */\r
+ +elib(71)\r
+ -append(71,[MISRA 2004 Rule 11.2])\r
+\r
+/* Rule 11.3 (adv) *********************************/\r
+\r
+ +e923 /* cast pointer/non-pointer */\r
+ +elib(923)\r
+ -append(923,[MISRA 2004 Rule 11.3])\r
+\r
+/* Rule 11.4 (adv) *********************************/\r
+\r
+ +e926 /* cast from pointer to pointer */\r
+ +elib(926)\r
+ -append(926,[MISRA 2004 Rule 11.4])\r
+ +e927 /* cast from pointer to pointer */\r
+ +elib(927)\r
+ -append(927,[MISRA 2004 Rule 11.4])\r
+ +e928 /* cast from pointer to pointer */\r
+ +elib(928)\r
+ -append(928,[MISRA 2004 Rule 11.4])\r
+ +e929 /* cast from pointer to pointer */\r
+ +elib(929)\r
+ -append(929,[MISRA 2004 Rule 11.4])\r
+\r
+/* Rule 11.5 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 11.5, \r
+ Attempt to cast away const/volatile from a pointer or reference \r
+ */\r
+\r
+/* Rule 12.1 (adv) *********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 961: Violates MISRA 2004 Advisory Rule 12.1,\r
+ dependence placed on C's operator precedence\r
+ */\r
+ +e834 /* confusing operator sequence (same precedence) */\r
+ +elib(834)\r
+ -append(834,[MISRA 2004 Rule 12.1])\r
+\r
+/* Rule 12.2 (req) *********************************/\r
+\r
+ +e564 /* order of evaluation */\r
+ +elib(564)\r
+ -append(564,[MISRA 2004 Rule 12.2])\r
+\r
+/* Rule 12.3 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 12.3,\r
+ 'sizeof' used on expressions with side effect\r
+ */\r
+\r
+/* Rule 12.4 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 12.4,\r
+ side effects on right hand side of logical operator\r
+ */\r
+\r
+/* Rule 12.5 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 12.5, \r
+ Non-primary expression used with logical operator \r
+ */\r
+\r
+/* Rule 12.6 (adv) *********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 961: Violates MISRA 2004 Advisory Rule 12.6, \r
+ Boolean expression used with non-permitted operator, or \r
+ Boolean expression required for operator\r
+ */\r
+\r
+/* Rule 12.7 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 12.7,\r
+ Bitwise operator applied to signed underlying type\r
+ */\r
+\r
+/* Rule 12.8 (req) *********************************/\r
+\r
+ +e572 /* excessive shift value */\r
+ +elib(572)\r
+ -append(572,[MISRA 2004 Rule 12.8])\r
+\r
+/* Rule 12.9 (req) *********************************/\r
+\r
+ +e501 /* expected signed type */\r
+ +elib(501)\r
+ -append(501,[MISRA 2004 Rule 12.9])\r
+\r
+/* Rule 12.10 (req) ********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 12.10,\r
+ comma operator used\r
+ */\r
+\r
+/* Rule 12.11 (adv) ********************************/\r
+\r
+ +e648 /* overflow in computing constant */\r
+ +elib(648)\r
+ -append(648,[MISRA 2004 Rule 12.11])\r
+\r
+/* Rule 12.12 (req) ********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 12.12, \r
+ Bit representation of a floating point type used \r
+ */\r
+\r
+/* Rule 12.13 (req) ********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 12.13, \r
+ Increment or decrement combined with another operator \r
+ */\r
+\r
+/* Rule 13.1 (req) *********************************/\r
+\r
+ +e720 /* Boolean test of assignment */\r
+ +elib(720)\r
+ -append(720,[MISRA 2004 Rule 13.1])\r
+ +e820 /* Boolean test of parenthesized\r
+ assignment\r
+ */\r
+ +elib(820)\r
+ -append(820,[MISRA 2004 Rule 13.1])\r
+\r
+/* Rule 13.2 (adv) *********************************/\r
+\r
+ +e720 /* Boolean test of assignment */\r
+ +elib(720)\r
+ -append(720,[MISRA 2004 Rule 13.2])\r
+\r
+/* Rule 13.3 (req) *********************************/\r
+\r
+ /* PC-lint and FlexeLint partially support this rule with the\r
+ following options.\r
+ */\r
+ +e777 /* testing floats for equality */\r
+ +elib(777)\r
+ -append(777,[MISRA 2004 Rule 13.3])\r
+\r
+/* Rule 13.4 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 13.4,\r
+ floating point variable used as loop counter\r
+ */\r
+\r
+/* Rule 13.5 (req) *********************************/\r
+\r
+ +e440 /* Compare 2nd 'for' expression with the 3rd */\r
+ +elib(440)\r
+ -append(440,[MISRA 2004 Rule 13.5])\r
+ +e443 /* Compare 1st 'for' expression with the 3rd */\r
+ +elib(443)\r
+ -append(443,[MISRA 2004 Rule 13.5])\r
+\r
+/* Rule 13.6 (req) *********************************/\r
+\r
+ +e850 /* detect loop variables modified within the loop */\r
+ +elib(850)\r
+ -append(850,[MISRA 2004 Rule 13.6])\r
+\r
+/* Rule 13.7 (req) *********************************/\r
+\r
+ +e506 /* constant value boolean */\r
+ +elib(506)\r
+ -append(506,[MISRA 2004 Rule 13.7])\r
+\r
+/* Rule 14.1 (req) *********************************/\r
+\r
+ +e506 /* constant value boolean */\r
+ +elib(506)\r
+ -append(506,[MISRA 2004 Rule 14.1])\r
+ +e527 /* unreachable */\r
+ +elib(527)\r
+ -append(527,[MISRA 2004 Rule 14.1])\r
+ +e681 /* loop not entered */\r
+ +elib(681)\r
+ -append(681,[MISRA 2004 Rule 14.1])\r
+ +e827 /* loop not reachable */\r
+ +elib(827)\r
+ -append(827,[MISRA 2004 Rule 14.1])\r
+\r
+/* Rule 14.2 (req) *********************************/\r
+\r
+ +e505 /* redundant left argument to comma */\r
+ +elib(505)\r
+ -append(505,[MISRA 2004 Rule 14.2])\r
+ +e522 /* no side-effects */\r
+ +elib(522)\r
+ -append(522,[MISRA 2004 Rule 14.2])\r
+\r
+/* Rule 14.3 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 14.3,\r
+ null statement not in line by itself\r
+ */\r
+\r
+/* Rule 14.4 (req) *********************************/\r
+\r
+ +e801 /* use of 'goto' is deprecated */\r
+ +elib(801)\r
+ -append(801,[MISRA 2004 Rule 14.4])\r
+\r
+/* Rule 14.5 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 14.5,\r
+ continue statement detected\r
+ */\r
+\r
+/* Rule 14.6 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 14.6,\r
+ more than one 'break' terminates loop\r
+ */\r
+\r
+/* Rule 14.7 (req) *********************************/\r
+\r
+ +e904 /* return before function end */\r
+ +elib(904)\r
+ -append(904,[MISRA 2004 Rule 14.7])\r
+\r
+/* Rule 14.8 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 14.8,\r
+ left brace expected for switch, for, do and while\r
+ */\r
+\r
+/* Rule 14.9 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 14.9,\r
+ left brace expected for if, else and else if\r
+ */\r
+\r
+/* Rule 14.10 (req) ********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 14.10,\r
+ no 'else' at end of 'if ... else if' chain\r
+ */\r
+\r
+/* Rule 15.1 (req) *********************************/\r
+\r
+ +e44 /* Need a switch */\r
+ +elib(44)\r
+ -append(44,[MISRA 2004 Rule 15.1])\r
+\r
+/* Rule 15.2 (req) *********************************/\r
+\r
+ +e616 /* control flows into case/default */\r
+ +elib(616)\r
+ -append(616,[MISRA 2004 Rule 15.2])\r
+ +e825 /* control flows into case/default without\r
+ -fallthrough comment\r
+ */\r
+ +elib(825)\r
+ -append(825,[MISRA 2004 Rule 15.2])\r
+\r
+/* Rule 15.3 (req) *********************************/\r
+\r
+ /* PC-lint and FlexeLint partially support this rule with the\r
+ following options.\r
+ */\r
+ +e744 /* switch statement has no default */\r
+ +elib(744)\r
+ -append(744,[MISRA 2004 Rule 15.3])\r
+\r
+/* Rule 15.4 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 15.4,\r
+ boolean value in switch statement\r
+ */\r
+\r
+/* Rule 15.5 (req) *********************************/\r
+\r
+ +e764 /* switch does not have a case */\r
+ +elib(764)\r
+ -append(764,[MISRA 2004 Rule 15.5])\r
+\r
+/* Rule 16.1 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 16.1,\r
+ function has variable number of arguments\r
+ */\r
+\r
+/* Rule 16.2 (req) *********************************/\r
+\r
+ +stack()\r
+ +estring(974,*recursive*) /* worst case function stack usage */\r
+ -append(974,[MISRA 2004 Rule 16.2])\r
+\r
+/* Rule 16.3 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 16.3,\r
+ all parameters shall have identifiers\r
+ */\r
+\r
+/* Rule 16.4 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 16.4, \r
+ Function parameter list differs from prior declaration \r
+ */\r
+\r
+/* Rule 16.5 (req) *********************************/\r
+\r
+ +e937 /* old-style function declaration */\r
+ +elib(937)\r
+ -append(937,[MISRA 2004 Rule 16.5])\r
+\r
+/* Rule 16.6 (req) *********************************/\r
+\r
+ +e118 /* too few arguments for prototype */\r
+ +elib(118)\r
+ -append(118,[MISRA 2004 Rule 16.6])\r
+ +e119 /* too many arguments for prototype */\r
+ +elib(119)\r
+ -append(119,[MISRA 2004 Rule 16.6])\r
+\r
+/* Rule 16.7 (adv) *********************************/\r
+\r
+ +e818 /* use const on paramaters where appropriate */\r
+ +elib(818)\r
+ -append(818,[MISRA 2004 Rule 16.7])\r
+\r
+/* Rule 16.8 (req) *********************************/\r
+\r
+ +e533 /* function should return a value */\r
+ +elib(533)\r
+ -append(533,[MISRA 2004 Rule 16.8])\r
+\r
+/* Rule 16.9 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 16.9, \r
+ Function identifier used without '&' or parenthisized parameter\r
+ list \r
+ */\r
+\r
+/* Rule 16.10 (req) ********************************/\r
+\r
+ +e534 /* ignoring return value of function */\r
+ +elib(534)\r
+ -append(534,[Encompasses MISRA 2004 Rule 16.10])\r
+\r
+/* Rule 17.1 (req) *********************************/\r
+\r
+ /* not currently supported */\r
+\r
+/* Rule 17.2 (req) *********************************/\r
+\r
+ +e946 /* relational or subtract operator applied to pointers */\r
+ +elib(946)\r
+ -append(946,[MISRA 2004 Rule 17.2])\r
+ +e947 /* relational or subtract operator applied to pointers */\r
+ +elib(947)\r
+ -append(947,[MISRA 2004 Rule 17.2])\r
+\r
+/* Rule 17.3 (req) *********************************/\r
+\r
+ +e946 /* relational or subtract operator applied to pointers */\r
+ +elib(946)\r
+ -append(946,[MISRA 2004 Rule 17.3])\r
+ +e947 /* relational or subtract operator applied to pointers */\r
+ +elib(947)\r
+ -append(947,[MISRA 2004 Rule 17.3])\r
+\r
+/* Rule 17.4 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 17.4, \r
+ Pointer arithmetic other than array indexing used, or \r
+ Pointer arithmetic by increment or decrement used\r
+ */\r
+\r
+/* Rule 17.5 (adv) *********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 961: Violates MISRA 2004 Advisory Rule 17.5,\r
+ More than two pointer indirection levels used \r
+ */\r
+\r
+/* Rule 17.6 (req) *********************************/\r
+\r
+ +e733 /* assigning address of auto to outer scope symbol */\r
+ +elib(733)\r
+ -append(733,[MISRA 2004 Rule 17.6])\r
+ +e789 /* assigning address of auto to static */\r
+ +elib(789)\r
+ -append(789,[MISRA 2004 Rule 17.6])\r
+\r
+/* Rule 18.1 (req) *********************************/\r
+\r
+ +e43 /* vacuous type for variable */\r
+ +elib(43)\r
+ -append(43,[MISRA 2004 Rule 18.1])\r
+\r
+/* Rule 18.2 (req) *********************************/\r
+\r
+ /* not currently supported */\r
+\r
+/* Rule 18.3 (req) *********************************/\r
+\r
+ /* Determining whether areas of memory are\r
+ being reused for 'unrelated' purposes is not\r
+ statically checkable.\r
+ */\r
+\r
+/* Rule 18.4 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 18.4,\r
+ unions shall not be used\r
+ */\r
+\r
+/* Rule 19.1 (adv) *********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 961: Violates MISRA 2004 Advisory Rule 19.1,\r
+ only preprocessor statements and comments before '#include'\r
+ */\r
+\r
+/* Rule 19.2 (adv) *********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 961: Violates MISRA 2004 Advisory Rule 19.2,\r
+ header file name with non-standard character\r
+ */\r
+\r
+/* Rule 19.3 (req) *********************************/\r
+\r
+ +e12 /* Need < or " after #include */\r
+ +elib(12)\r
+ -append(12,[MISRA 2004 Rule 19.3])\r
+\r
+/* Rule 19.4 (req) *********************************/\r
+\r
+ +e773 /* expression-like macro not parenthesized */\r
+ +elib(773)\r
+ -append(773,[MISRA 2004 Rule 19.4])\r
+\r
+/* Rule 19.5 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 19.5,\r
+ '#define/#undef' used within a block\r
+ */\r
+\r
+/* Rule 19.6 (req) *********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 19.6,\r
+ use of '#undef' is discouraged\r
+ */\r
+\r
+/* Rule 19.7 (adv) *********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 961: Violates MISRA 2004 Advisory Rule 19.7,\r
+ Function-like macro defined \r
+ */\r
+\r
+/* Rule 19.8 (req) *********************************/\r
+\r
+ +e131 /* syntax error in call of macro */\r
+ +elib(131)\r
+ -append(131,[MISRA 2004 Rule 19.8])\r
+\r
+/* Rule 19.9 (req) *********************************/\r
+\r
+ +e436 /* preprocessor directive in invocation of macro */\r
+ +elib(436)\r
+ -append(436,[MISRA 2004 Rule 19.9])\r
+\r
+/* Rule 19.10 (req) ********************************/\r
+\r
+ +e773 /* expression-like macro not parenthesized */\r
+ +elib(773)\r
+ -append(773,[MISRA 2004 Rule 19.10])\r
+\r
+/* Rule 19.11 (req) ********************************/\r
+\r
+ +e553 /* undefined preprocessor variable */\r
+ +elib(553)\r
+ -append(553,[MISRA 2004 Rule 19.11])\r
+\r
+/* Rule 19.12 (req) ********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 19.12,\r
+ multiple use of '#/##' operators in macro definition\r
+ */\r
+\r
+/* Rule 19.13 (adv) ********************************/\r
+\r
+ /* we generate note 961 as follows:\r
+ Note 961: Violates MISRA 2004 Advisory Rule 19.13,\r
+ '#/##' operators used\r
+ */\r
+\r
+/* Rule 19.14 (req) ********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 19.14,\r
+ non-standard use of 'defined' preprocessor statement\r
+ */\r
+\r
+/* Rule 19.15 (req) ********************************/\r
+\r
+ +e537 /* Repeated include file */\r
+ +elib(537)\r
+ -append(537,[MISRA 2004 Rule 19.15])\r
+\r
+/* Rule 19.16 (req) ********************************/\r
+\r
+ +e544 /* endif or else not followed by EOL */\r
+ +elib(544)\r
+ -append(544,[MISRA 2004 Rule 19.16])\r
+ +e16 /* # directive not followed by recognizable word */\r
+ +elib(16)\r
+ -append(16,[MISRA 2004 Rule 19.16])\r
+ /* other parts to the intent of this rule such as a syntax check\r
+ of the disabled portions of the code do not seem to be\r
+ statically checkable\r
+ */\r
+\r
+/* Rule 19.17 (req) ********************************/\r
+\r
+ +e405 /* #if not closed off */\r
+ +elib(405)\r
+ -append(405,[MISRA 2004 Rule 19.17])\r
+\r
+/* Rule 20.1 (req) *********************************/\r
+\r
+ +e683 /* complain about #define standard functions */\r
+ +elib(683)\r
+ -append(683,[MISRA 2004 Rule 20.1])\r
+ /* Undefining standard library macros is covered by rule 19.6. */\r
+ /* Defining/redefining reserved/standard identifiers is covered\r
+ by rule 20.2.\r
+ */\r
+\r
+/* Rule 20.2 (req) *********************************/\r
+\r
+ /* we generate note 960 as follows:\r
+ Note 960: Violates MISRA 2004 Required Rule 20.2,\r
+ Re-use of reserved identifier \r
+ */\r
+\r
+/* Rule 20.3 (req) *********************************/\r
+\r
+ /* The arguments to over 100 calls to standard library functions\r
+ are monitored; users can specify additional constraints for\r
+ other functions.\r
+ */\r
+\r
+/* Rule 20.4 (req) *********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( function, calloc, [MISRA 2004 Rule 20.4] )\r
+ -deprecate( function, malloc, [MISRA 2004 Rule 20.4] )\r
+ -deprecate( function, realloc, [MISRA 2004 Rule 20.4] )\r
+ -deprecate( function, free, [MISRA 2004 Rule 20.4] )\r
+\r
+/* Rule 20.5 (req) *********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( variable, errno, [MISRA 2004 Rule 20.5] )\r
+\r
+/* Rule 20.6 (req) *********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( macro, offsetof, [MISRA 2004 Rule 20.6] )\r
+\r
+/* Rule 20.7 (req) *********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( function, longjmp, [MISRA 2004 Rule 20.7] )\r
+ -deprecate( function, setjmp, [MISRA 2004 Rule 20.7] )\r
+\r
+/* Rule 20.8 (req) *********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( function, signal, [MISRA 2004 Rule 20.8] )\r
+ -deprecate( function, raise, [MISRA 2004 Rule 20.8] )\r
+\r
+/* Rule 20.9 (req) *********************************/\r
+\r
+ +e829 /* warn on header usage */\r
+ +elib(829)\r
+ -headerwarn(stdio.h)\r
+ -append(829(stdio.h),[MISRA 2004 Rule 20.9])\r
+\r
+/* Rule 20.10 (req) ********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( function, atof, [MISRA 2004 Rule 20.10] )\r
+ -deprecate( function, atoi, [MISRA 2004 Rule 20.10] )\r
+ -deprecate( function, atol, [MISRA 2004 Rule 20.10] )\r
+\r
+/* Rule 20.11 (req) ********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( function, abort, [MISRA 2004 Rule 20.11] )\r
+ -deprecate( function, exit, [MISRA 2004 Rule 20.11] )\r
+ -deprecate( function, getenv, [MISRA 2004 Rule 20.11] )\r
+ -deprecate( function, system, [MISRA 2004 Rule 20.11] )\r
+\r
+/* Rule 20.12 (req) ********************************/\r
+\r
+ +e586 /* Symbol is deprecated */\r
+ +elib(586)\r
+ -deprecate( function, time, [MISRA 2004 Rule 20.12] )\r
+ -deprecate( function, strftime, [MISRA 2004 Rule 20.12] )\r
+ -deprecate( function, clock, [MISRA 2004 Rule 20.12] )\r
+ -deprecate( function, difftime, [MISRA 2004 Rule 20.12] )\r
+ -deprecate( function, mktime, [MISRA 2004 Rule 20.12] )\r
+\r
+/* Rule 21.1 (req) *********************************/\r
+\r
+ /* achieved by using PC-lint/FlexeLint */\r
--- /dev/null
+#ifndef CO_GCC_H_\r
+#define CO_GCC_H_\r
+\r
+#ifdef _lint /* Make sure no compiler comes this way */\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/* Standard library headers typically define the assert macro so that it\r
+ expands to a complicated conditional expression that uses special\r
+ funtions that Lint does not know about by default. For linting\r
+ purposes, we can simplify things a bit by forcing assert() to expand to\r
+ a call to a special function that has the appropriate 'assert'\r
+ semantics.\r
+ */\r
+//lint -function( __assert, __lint_assert )\r
+void __lint_assert( int );\r
+//lint ++d"assert(e)=__lint_assert(!!(e))"\r
+//(++d makes this definition permanently immutable for the Lint run.)\r
+//Now that we've made our own 'assert', we need to keep people from being\r
+//punished when the marco in 'assert.h' appears not to be used:\r
+//lint -efile(766,*assert.h)\r
+\r
+/*\r
+ The headers included below must be generated; For C++, generate\r
+ with:\r
+\r
+ g++ [usual build options] -E -dM t.cpp >lint_cppmac.h\r
+\r
+ For C, generate with:\r
+\r
+ gcc [usual build options] -E -dM t.c >lint_cmac.h\r
+\r
+ ...where "t.cpp" and "t.c" are empty source files.\r
+\r
+ It's important to use the same compiler options used when compiling\r
+ project code because they can affect the existence and precise\r
+ definitions of certain predefined macros. See gcc-readme.txt for\r
+ details and a tutorial.\r
+ */\r
+#if defined(__cplusplus)\r
+# include "lint_cppmac.h"\r
+#else\r
+# include "lint_cmac.h"\r
+#endif\r
+\r
+/* If the macro set given by the generated macro files must be adjusted in\r
+ order for Lint to cope, then you can make those adjustments here.\r
+ */\r
+\r
+#define LINT_CO_GCC_H_GCC_VERSION ( __GNUC__ * 10000 + \\r
+ __GNUC_MINOR__ * 100 + \\r
+ __GNUC_PATCHLEVEL__ )\r
+\r
+/* The following is a workaround for versions of GCC with bug 25717, in\r
+ which the preprocessor does not dump a #define directive for __STDC__\r
+ when -dM is given:\r
+ http://gcc.gnu.org/bugzilla/show_bug.cgi?id=25717\r
+\r
+ We know the unconditional definition of __STDC__ was introduced no\r
+ later than version 3.0; the preprocessor bug was fixed no later than\r
+ version 4.1.0.\r
+ */\r
+#if ( LINT_CO_GCC_H_GCC_VERSION >= 30000 && \\r
+ LINT_CO_GCC_H_GCC_VERSION < 40100 )\r
+# define __STDC__ 1\r
+#endif\r
+\r
+\r
+#if LINT_CO_GCC_H_GCC_VERSION >= 40300\r
+# define __COUNTER__ __lint__COUNTER__\r
+//lint +rw( *type_traits ) // Enable type traits support\r
+#endif\r
+\r
+\r
+#ifdef __cplusplus\r
+} /* extern "C" */\r
+#endif\r
+#endif /* _lint */\r
+#endif /* CO_GCC_H_ */\r
--- /dev/null
+/* co-gcc.lnt: This is the seed file for configuring Lint for use with\r
+ GCC versions 2.95.3 and later.\r
+\r
+ Like all compiler options files this file is intended to be used\r
+ as follows:\r
+\r
+ lint co-gcc.lnt source-files-to-be-linted\r
+\r
+ Some of the information that co-gcc.lnt requires needs to be furnished\r
+ with the help of the gcc system itself. The easiest way to generate\r
+ this information is to use the makefile co-gcc.mak (supplied with the\r
+ Lint distribution) in an invocation of GNU Make; for details, see the\r
+ commentary at the top of co-gcc.mak.\r
+*/\r
+\r
+-cgnu // Notifies FlexeLint that gcc is being used.\r
+\r
+// ===========================\r
+// Preprocessor Configuration:\r
++fdi // GCC starts its #include search in the directory of the including\r
+ // file.\r
+\r
+++fln // Allow:\r
+ // # digit-sequence " [s-char-sequence] " new-line\r
+ // as a synonym for:\r
+ // # line digit-sequence " [s-char-sequence] " new-line\r
+ // GCC additionally allows flag values to follow the\r
+ // s-char-sequence, but currently Lint ignores them.\r
+\r
+-header(co-gcc.h) // Includes headers generated by GCC (bringing in\r
+ // predefined macros).\r
++libh(co-gcc.h) // Marks that header as library code.\r
+\r
+// gcc-include-path.lnt // This .lnt file should contain --i options\r
+ // and should be generated by invoking gcc with its '-v' option.\r
+ // (GCC's implicit #include search path is presented in the output.)\r
+ // This happens automatically when 'make -f co-gcc.mak' is invoked.\r
+\r
+// Assertion directives (a feature of GCC's preprocessor) have been\r
+// considered obsolete in GCC's documentation since version 3.0, so we do\r
+// not use them here. If support for #assert is needed in the form of a\r
+// lint option, one may use '-a#' like so:\r
+// -a#machine(i386) // #assert's machine(i386) (SVR4 facility).\r
+\r
+//+cpp(.cc,.C) // extensions for C++ that are commonly used in addition\r
+ // to the default extensions of .cpp and .cxx\r
+\r
+\r
+// =============\r
+// Size Options:\r
+// +fwc // wchar_t might be builtin; if so, uncomment this option. (NOTE:\r
+// // this option needs to be set before a size option is given for\r
+// // wchar_t; see the documentation for -sw# in the Lint manual.)\r
+\r
+size-options.lnt // This .lnt file should be generated (preferrably\r
+ // by a program created by invoking GCC with the compile options that\r
+ // are used in the compilation of the project to be linted). This\r
+ // happens automatically when 'make -f co-gcc.mak' is invoked.\r
+\r
+\r
+// ===========================================\r
+// +rw and -d options to cope with GNU syntax:\r
++ppw(ident) // Tolerate #ident\r
++ppw(warning)\r
+\r
+// GCC provides alternative spellings of certain keywords:\r
+-rw_asgn(__inline,inline)\r
+-rw_asgn(__inline__,inline)\r
+-rw_asgn(__signed__,signed)\r
+-rw_asgn(__signed,signed)\r
+-rw_asgn( __volatile__, volatile )\r
+-rw_asgn( __volatile, volatile )\r
+++d__const=const // gconv.h uses __const rather than const\r
+++dconst=const // ensure const expands to const.\r
+\r
+-rw_asgn( asm, _up_to_brackets )\r
+-rw_asgn( __asm, _up_to_brackets )\r
+-rw_asgn( __asm__, _up_to_brackets )\r
+// This re-definition of the various spellings of the asm keyword enables\r
+// Lint to pass gracefully over expression-statements like:\r
+// __asm __volatile ("fsqrt" : "=t" (__result) : "0" (__x));\r
+// But it may be necessary to suppress certain error messages that are\r
+// triggered by tokens that are part of an assembly declaration or\r
+// statement. For example:\r
+\r
+ -d"__asm__(p...)=/*lint -e{19}*/ __asm__(p)"\r
+\r
+// ...causes Lint to be quiet about the semicolon that follows an\r
+// __asm__() declaration. Note, the -e{N} form of suppression takes\r
+// effect only for the forward-declaration, definition or\r
+// [possibly-compound] statement that immediately follows. Because a\r
+// semicolon is seen as a declaration-terminator, Error 19 will be\r
+// re-enabled immediately after the semicolon in '__asm__(...);'.\r
+// (The elipsis after the macro parameter p allows zero or more commas to\r
+// appear in the operand.)\r
+//\r
+// If you encounter other diagnostics that appear to need suppression in\r
+// or near assembly regions, please let us know!\r
+//\r
+-esym(123,__asm__)\r
+\r
+-rw_asgn(__alignof__,__alignof)\r
+\r
+++d__attribute__()= // ignore this keyword and following parenthetical\r
+++d__attribute()= // variant spelling of "__attribute__"\r
+\r
+// "__extension__" is GCC's way of allowing the use of non-standard\r
+// constructs in a strict Standard-conforming mode. We don't currently\r
+// have explicit support for it, but we can use local suppressions. For\r
+// example, we can use -e(160) so that we will not see any Errors about\r
+// GNU statement-expressions wrapped in __extension__().\r
+++d"__extension__=/*lint -e(160) */"\r
+\r
+++d__builtin_va_list=void* // used by stdarg.h\r
+++d__builtin_stdarg_start()=_to_semi // ditto\r
+++d__builtin_va_end()=_to_semi // ditto\r
+++d"__builtin_va_arg(a,b)=(*( (b *) ( ((a) += sizeof(b)) - sizeof(b) )))"\r
+++d__null=0\r
++rw(_to_semi) // needed for the two macros above.\r
++rw(__typeof__) // activate __typeof__ keyword\r
+-d__typeof=__typeof__ // an alternative to using __typeof__\r
+\r
++rw( __restrict )\r
++rw( __restrict__ )\r
+-rw(__except) // This MS reserved word is used as an identifier\r
++rw( __complex__, __real__, __imag__ ) // reserved words that can be ignored.\r
+++d__builtin_strchr=(char*) // permits the inline definition ...\r
+++d__builtin_strpbrk=(char*) // of these functions to be linted ...\r
+++d__builtin_strrchr=(char*) // without drawing a complaint\r
+++d__builtin_strstr=(char*) // about the use of a non-standard name\r
+++d__PRETTY_FUNCTION__=___function___ // lint defines ___function___ internally\r
+++d__FUNCTION__=___function___ // lint defines ___function___ internally\r
+++d__func__=___function___ // Some C++ modes suport the implicit __func__\r
+ // identifier.\r
+\r
+// =========================================================\r
+// Other options supporting GNU C/C++ syntax:\r
++fld // enables the processing of _L_abel _D_esignators E.g.:\r
+ // union { double d; int i; } u = { d: 3.141 };\r
+\r
+// =========================================================\r
+// Generally useful suppressions:\r
+-wlib(1) // sets the warning level within library headers to 1\r
+ // (no warnings, just syntax errors). Comment out if you\r
+ // are actually linting library headers.\r
+-elib(123) // 123 is really a warning, but it's in the "Error" range.\r
+-elib(93) // allow newlines within quoted string arguments to macros\r
+-elib(46) // allow bit fields to have integral types other than\r
+ // '_Bool' and 'int'.\r
+-elibsym(628) // Suppress 628 for __builtin symbols.\r
+\r
+-esym(528,__huge_val,__nan,__qnan,__qnanf,__snan,__snanf)\r
+ // We don't care if we don't reference some GNU functions\r
+-esym(528,__gnu_malloc,__gnu_calloc)\r
+\r
+// The following functions exhibit variable return modes.\r
+// That is, they may equally-usefully be called for a value\r
+// as called just for their effects. Accordingly we inhibit\r
+// Warning 534 for these functions.\r
+// Feel free to add to or subtract from this list.\r
+\r
+-esym(534,close,creat,fclose,fprintf,fputc)\r
+-esym(534,fputs,fscanf,fseek,fwrite,lseek,memcpy,memmove,memset)\r
+-esym(534,printf,puts,scanf,sprintf,sscanf,strcat,strcpy)\r
+-esym(534,strncat,strncpy,unlink,write)\r
+\r
+// For non-ANSI compilers we suppress messages 515 and 516\r
+// for functions known to have variable argument lists.\r
+// For ANSI compilers, header files should take care of this.\r
+\r
+-esym(515,fprintf,printf,sprintf,fscanf,scanf,sscanf)\r
+-esym(516,fprintf,printf,sprintf,fscanf,scanf,sscanf)\r
+-esym(1702,*operator<<,*operator>>)\r
+-esym(534,*operator<<,*operator>>)\r
+-esym(1055,*__builtin*)\r
+-esym(718,*__builtin*) // The compiler does not need these ...\r
+-esym(746,*__builtin*) // declared and it knows their prototypes.\r
--- /dev/null
+#define __DBL_MIN_EXP__ (-1021)\r
+#define __FLT_MIN__ 1.17549435e-38F\r
+#define __CHAR_BIT__ 8\r
+#define __WCHAR_MAX__ 2147483647\r
+#define __DBL_DENORM_MIN__ 4.9406564584124654e-324\r
+#define __FLT_EVAL_METHOD__ 0\r
+#define __DBL_MIN_10_EXP__ (-307)\r
+#define __FINITE_MATH_ONLY__ 0\r
+#define __GNUC_PATCHLEVEL__ 2\r
+#define __INTMAX_TYPE__ long long int\r
+#define __SHRT_MAX__ 32767\r
+#define __LDBL_MAX__ 1.7976931348623157e+308L\r
+#define __UINTMAX_TYPE__ long long unsigned int\r
+#define __CHAR_UNSIGNED__ 1\r
+#define __LDBL_MAX_EXP__ 1024\r
+#define __SCHAR_MAX__ 127\r
+#define __USER_LABEL_PREFIX__ \r
+#define __STDC_HOSTED__ 1\r
+#define __LDBL_HAS_INFINITY__ 1\r
+#define __DBL_DIG__ 15\r
+#define __FLT_EPSILON__ 1.19209290e-7F\r
+#define _CALL_SYSV 1\r
+#define __LDBL_MIN__ 2.2250738585072014e-308L\r
+#define __DECIMAL_DIG__ 17\r
+#define __LDBL_HAS_QUIET_NAN__ 1\r
+#define __GNUC__ 4\r
+#define __NO_LWSYNC__ 1\r
+#define __DBL_MAX__ 1.7976931348623157e+308\r
+#define __DBL_HAS_INFINITY__ 1\r
+#define __DBL_MAX_EXP__ 1024\r
+#define __LONG_LONG_MAX__ 9223372036854775807LL\r
+#define __PPC__ 1\r
+#define __GXX_ABI_VERSION 1002\r
+#define __FLT_MIN_EXP__ (-125)\r
+#define __DBL_MIN__ 2.2250738585072014e-308\r
+#define __DBL_HAS_QUIET_NAN__ 1\r
+#define __REGISTER_PREFIX__ \r
+#define __NO_INLINE__ 1\r
+#define _ARCH_PPC 1\r
+#define __FLT_MANT_DIG__ 24\r
+#define __VERSION__ "4.1.2"\r
+#define __embedded__ 1\r
+#define __BIG_ENDIAN__ 1\r
+#define _BIG_ENDIAN 1\r
+#define __SIZE_TYPE__ unsigned int\r
+#define __ELF__ 1\r
+#define __FLT_RADIX__ 2\r
+#define __LDBL_EPSILON__ 2.2204460492503131e-16L\r
+#define __LDBL_DIG__ 15\r
+#define __FLT_HAS_QUIET_NAN__ 1\r
+#define __FLT_MAX_10_EXP__ 38\r
+#define __LONG_MAX__ 2147483647L\r
+#define __FLT_HAS_INFINITY__ 1\r
+#define __PPC 1\r
+#define __SPE__ 1\r
+#define __LDBL_MANT_DIG__ 53\r
+#define __WCHAR_TYPE__ long int\r
+#define __NO_FPRS__ 1\r
+#define __FLT_DIG__ 6\r
+#define __INT_MAX__ 2147483647\r
+#define __FLT_MAX_EXP__ 128\r
+#define __DBL_MANT_DIG__ 53\r
+#define __WINT_TYPE__ unsigned int\r
+#define __LDBL_MIN_EXP__ (-1021)\r
+#define __LDBL_MAX_10_EXP__ 308\r
+#define __DBL_EPSILON__ 2.2204460492503131e-16\r
+#define PPC 1\r
+#define __INTMAX_MAX__ 9223372036854775807LL\r
+#define __FLT_DENORM_MIN__ 1.40129846e-45F\r
+#define __FLT_MAX__ 3.40282347e+38F\r
+#define __FLT_MIN_10_EXP__ (-37)\r
+#define __GNUC_MINOR__ 1\r
+#define __DBL_MAX_10_EXP__ 308\r
+#define __LDBL_DENORM_MIN__ 4.9406564584124654e-324L\r
+#define __STDC__ 1\r
+#define __PTRDIFF_TYPE__ int\r
+#define __LDBL_MIN_10_EXP__ (-307)\r
--- /dev/null
+-ss2
+-si4
+-sl4
+-sll8
+-sf4
+-sd8
+-sld8
+-sp4
+
--- /dev/null
+// Gnu C/C++ (version 2.95.3 or later), -si4 -sp4, \r
+// Standard lint options\r
+\r
+//c:\lint\au-misra2.lnt //To check MISRA C rules\r
+//c:\lint\lnt\co-gcc.lnt\r
+\r
+au-misra2.lnt //To check MISRA C rules\r
+lnt\co-gcc.lnt\r
+\r
+//c:\lint\options.lnt -si4 -sp4\r
+\r
+\r
+// EIJAS STUFF:\r
+-zero //always return exit code 0 (avoiding makefile interruption)\r
+\r
+//Reset which files are viewed library-files to only treat <> as such\r
++libclass(angle)\r
+\r
+//+os(lintOutput.TMP) //append output to file\r
+//+oe(lintErrorOutput.TMP)//append error output to file\r
+\r
+//MESSAGE FORMAT:\r
++ffn // force full path names\r
+-width(0) // don't insert line breaks (unlimited output width).\r
+-hf1 // message height one\r
+-format=%f:%l:%c:\s%t:\s%n\sPC-lint:\s%m\r
+\r
+\r
+// SET WARNING LEVEL:\r
+-w3 //-wlib(0)// 1:only errors, 2: +warnings 3: + infos\r
+\r
+\r
+-A(C99)//use C99 standard\r
+\r
++fie // Use to view enums as ints (tar bort tex PC641)\r
+\r
+\r
+// RULES TO TURN OFF\r
+//-efile(755,*.h)\r
+-e755 //e switch off for header files\r
+-e756 //e switch off for header files\r
+-e757 //e switch off for header files\r
+-e758 //e switch off for header files\r
+-e768 //e switch off for header files\r
+-e769 //e switch off for header files\r
+\r
+-e537 //e switch off (unjustified complain about 19.15)\r
+\r
+-esym(961, 19.7) //Advisory Rule that should be switched off\r
+-esym(961, 19.13)//Advisory Rule that should be switched off\r
+\r
+// RULES MAYBE TO TURN OFF\r
+//-e534 //only turned of for OS, printf? kolla hur vanlig...\r
+//-e757\r
+//-e526 vad betyder detta fel?\r
+\r
+\r
+// RULES THAT MAY BE SWITCHED OFF LOCALLY\r
+// * 13.7, 14.1 Constant value boolean \r
+// * 14.2 \r
+\r
+// RULES TO DISCUSS IF TO SWITCH OFF OR NOT\r
+-esym(961,12.6)//Advisory Rule (Boolean expression required for operator...)\r
+\r
+// ERRORS SWITCHED OFF TEMPORARLY\r
+//-e525\r
+//-e526\r
+\r
+//-esym(960, 10.1) //implicit conversion....\r
+//-e714 //Symbol not referenced\r
+//-e715 //Symbol not referenced\r
+\r
+//-e830 //location cited in prior message\r
+//-e831 //reference cited in prior message\r
+\r
+//-esym(960, 12.5) //Non-primary expression used with logical operator.\r
include $(ROOTDIR)/$(ARCH_PATH-y)/scripts/gcc.mk\r
endif\r
include $(ROOTDIR)/scripts/cc_$(COMPILER).mk\r
+ifneq ($(PCLINT),)\r
+include $(ROOTDIR)/scripts/cc_pclint.mk\r
+endif\r
+ifneq ($(SPLINT),)\r
+include $(ROOTDIR)/scripts/cc_splint.mk\r
+endif\r
+\r
+\r
\r
# Get object files\r
include ../makefile\r
\r
inc-y += $(ROOTDIR)/include\r
inc-y += $(ROOTDIR)/include/$(ARCH_FAM)\r
+inc-y += $(ROOTDIR)/include/$(ARCH_FAM)/$(ARCH)\r
\r
\r
.PHONY clean: \r
# Some dependency for xxx_offset.c/h also\r
-include $(subst .h,.d,$(dep-y))\r
\r
+ifneq ($(PCLINT),)\r
+define run_pclint\r
+$(Q)$(PCLINT) $(lint_extra) $(addprefix $(lintinc_ext),$(inc-y)) $(addprefix $(lintdef_ext),$(def-y)) $(abspath $<)\r
+endef\r
+endif\r
+\r
+ifneq ($(SPLINT),)\r
+define run_splint\r
+$(Q)$(SPLINT) $(splint_extra) $(addprefix $(lintinc_ext),$(inc-y)) $(addprefix $(lintdef_ext),$(def-y)) $(abspath $<)\r
+endef\r
+endif\r
+\r
+\r
# Compile\r
%.o: %.c\r
@echo " >> CC $(notdir $<)"\r
$(Q)$(CC) -c $(CFLAGS) -o $(goal) $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $(abspath $<)\r
+ $(run_pclint)\r
+ $(run_splint)\r
\r
# Assembler\r
\r
#define COUNTER_MAX(x) (x)->counter->alarm_base.maxallowedvalue\r
#define COUNTER_MIN_CYCLE(x) (x)->counter->alarm_base.mincycle\r
#define ALARM_CHECK_ID(x) \\r
- if( (x) > Os_CfgGetAlarmCnt()) { \\r
+ if( (x) > OS_ALARM_CNT) { \\r
rv = E_OS_ID; \\r
goto err; \\r
}\r
}\r
}\r
\r
+void Os_AlarmAutostart(void) {\r
+ int j;\r
+ for (j = 0; j < OS_ALARM_CNT; j++) {\r
+ OsAlarmType *alarmPtr;\r
+ alarmPtr = Os_CfgGetAlarmObj(j);\r
+ if (alarmPtr->autostartPtr != NULL) {\r
+ const OsAlarmAutostartType *autoPtr = alarmPtr->autostartPtr;\r
+\r
+ if (os_sys.appMode & autoPtr->appModeRef) {\r
+ if (autoPtr->autostartType == ALARM_AUTOSTART_ABSOLUTE) {\r
+ SetAbsAlarm(j, autoPtr->alarmTime, autoPtr->cycleTime);\r
+ } else {\r
+ SetRelAlarm(j, autoPtr->alarmTime, autoPtr->cycleTime);\r
+ }\r
+ }\r
+ }\r
+ }\r
+}\r
+\r
\r
\r
#endif\r
\r
\r
-#define IsCounterValid(_counterId) ((_counterId) <= Os_CfgGetCounterCnt())\r
+#define IsCounterValid(_counterId) ((_counterId) <= OS_COUNTER_CNT)\r
\r
/**\r
*\r
/* Check param */\r
/** @req OS285 */\r
if( ( cPtr->type != COUNTER_TYPE_SOFT ) ||\r
- ( counter_id >= Os_CfgGetCounterCnt() ) ) {\r
+ ( counter_id >= OS_COUNTER_CNT ) ) {\r
rv = E_OS_ID;\r
Irq_Restore(flags);\r
goto err;\r
/** @req OS286 */\r
cPtr->val = Os_CounterAdd( cPtr->val, Os_CounterGetMaxValue(cPtr), 1 );\r
\r
+#if OS_ALARM_CNT!=0\r
Os_AlarmCheck(cPtr);\r
+#endif\r
+#if OS_SCHTBL_CNT!=0\r
Os_SchTblCheck(cPtr);\r
+#endif\r
\r
Irq_Restore(flags);\r
\r
cPtr->val = Os_CounterAdd( cPtr->val, Os_CounterGetMaxValue(cPtr), 1 );\r
\r
// os_sys.tick = cPtr->val;\r
-\r
+#if OS_ALARM_CNT!=0\r
Os_AlarmCheck(cPtr);\r
+#endif\r
+#if OS_SCHTBL_CNT!=0\r
Os_SchTblCheck(cPtr);\r
+#endif\r
}\r
}\r
\r
* Initialize alarms and schedule-tables for the counters\r
*/\r
void Os_CounterInit( void ) {\r
- OsCounterType *cPtr;\r
- OsAlarmType *aPtr;\r
- OsSchTblType *sPtr;\r
-\r
- /* Add the alarms to counters */\r
- for(int i=0; i < Os_CfgGetAlarmCnt(); i++ ) {\r
- aPtr = Os_CfgGetAlarmObj(i);\r
- cPtr = aPtr->counter;\r
- SLIST_INSERT_HEAD(&cPtr->alarm_head,aPtr, alarm_list);\r
+#if OS_ALARM_CNT!=0\r
+ {\r
+ OsCounterType *cPtr;\r
+ OsAlarmType *aPtr;\r
+\r
+ /* Add the alarms to counters */\r
+ for (int i = 0; i < OS_ALARM_CNT; i++) {\r
+ aPtr = Os_CfgGetAlarmObj(i);\r
+ cPtr = aPtr->counter;\r
+ SLIST_INSERT_HEAD(&cPtr->alarm_head, aPtr, alarm_list);\r
+ }\r
}\r
+#endif\r
+\r
+#if OS_SCHTBL_CNT!=0\r
+ {\r
+ OsCounterType *cPtr;\r
+ OsSchTblType *sPtr;\r
\r
- /* Add the schedule tables to counters */\r
- for(int i=0; i < Os_CfgGetSchedCnt(); i++ ) {\r
+ /* Add the schedule tables to counters */\r
+ for(int i=0; i < OS_SCHTBL_CNT; i++ ) {\r
\r
- sPtr = Os_CfgGetSched(i);\r
- cPtr = sPtr->counter;\r
- SLIST_INSERT_HEAD(&cPtr->sched_head, sPtr, sched_list);\r
+ sPtr = Os_CfgGetSched(i);\r
+ cPtr = sPtr->counter;\r
+ SLIST_INSERT_HEAD(&cPtr->sched_head, sPtr, sched_list);\r
+ }\r
}\r
+#endif\r
}\r
\r
\r
OS_DEBUG(D_EVENT,"# SetEvent %s\n",Os_TaskGetCurrent()->name);\r
\r
- if( TaskID >= Os_CfgGetTaskCnt() ) {\r
+ if( TaskID >= OS_TASK_CNT ) {\r
rv = E_OS_ID;\r
goto err;\r
}\r
OsPcbType *dest_pcb;\r
StatusType rv = E_OK;\r
\r
- if( TaskId >= Os_CfgGetTaskCnt() ) {\r
+ if( TaskId >= OS_TASK_CNT ) {\r
rv = E_OS_ID;\r
goto err;\r
}\r
\r
\r
void Os_AlarmCheck(OsCounterType *c_p);\r
+void Os_AlarmAutostart(void);\r
\r
#endif /*ALARM_I_H_*/\r
#endif\r
void (*entry)();\r
proc_type_t proc_type;\r
- uint8 autostart:1; // TASK\r
+ int autostart:1; // TASK\r
OsStackType stack; // TASK\r
\r
int vector; // ISR\r
// Calc interrupt stack
Os_CfgGetInterruptStackInfo(&int_stack);
// TODO: 16 is arch dependent
- os_sys.int_stack = int_stack.top + int_stack.size - 16;
+ os_sys.int_stack = (void *)((size_t)int_stack.top + (size_t)int_stack.size - 16);
// Init counter.. with alarms and schedule tables
+#if OS_COUNTER_CNT!=0
Os_CounterInit();
+#endif
+#if OS_SCHTBL_CNT!=0
Os_SchTblInit();
+#endif
// Put all tasks in the pcb list
// Put the one that belong in the ready queue there
// TODO: we should really hash on priority here to get speed, but I don't care for the moment
// TODO: Isn't this just EXTENED tasks ???
- for( i=0; i < Os_CfgGetTaskCnt(); i++) {
+ for( i=0; i < OS_TASK_CNT; i++) {
tmp_pcb = os_get_pcb(i);
assert(tmp_pcb->prio<=OS_TASK_PRIORITY_MAX);
}
/* Alarm autostart */
- for(int j=0; j < Os_CfgGetAlarmCnt(); j++ ) {
- OsAlarmType *alarmPtr;
- alarmPtr = Os_CfgGetAlarmObj(j);
- if(alarmPtr->autostartPtr != NULL ) {
- const OsAlarmAutostartType *autoPtr = alarmPtr->autostartPtr;
-
- if( os_sys.appMode & autoPtr->appModeRef) {
- if( autoPtr->autostartType == ALARM_AUTOSTART_ABSOLUTE ) {
- SetAbsAlarm(j,autoPtr->alarmTime, autoPtr->cycleTime);
- } else {
- SetRelAlarm(j,autoPtr->alarmTime, autoPtr->cycleTime);
- }
- }
- }
- }
+#if OS_ALARM_CNT!=0
+ Os_AlarmAutostart();
+#endif
+#if OS_SCHTBL_CNT!=0
Os_SchTblAutostart();
+#endif
// Set up the systick interrupt
{
*\r
*/\r
\r
-#define valid_standard_id() (rPtr->nr < Os_CfgGetResourceCnt()) //&& !(rPtr->type == RESOURCE_TYPE_INTERNAL) )\r
-#define valid_internal_id() (rPtr->nr < Os_CfgGetResourceCnt()) //&& (rPtr->type == RESOURCE_TYPE_INTERNAL) )\r
+#define valid_standard_id() (rPtr->nr < OS_RESOURCE_CNT) //&& !(rPtr->type == RESOURCE_TYPE_INTERNAL) )\r
+#define valid_internal_id() (rPtr->nr < OS_RESOURCE_CNT) //&& (rPtr->type == RESOURCE_TYPE_INTERNAL) )\r
\r
\r
void Os_ResourceAlloc( OsResourceType *rPtr, OsPcbType *pcbPtr) {\r
*\r
* Note that this applies both internal and standard resources.\r
* */\r
- for( int i=0; i < Os_CfgGetResourceCnt(); i++) {\r
+ for( int i=0; i < OS_RESOURCE_CNT; i++) {\r
rsrc_p = Os_CfgGetResource(i);\r
topPrio = 0;\r
\r
- for( int pi = 0; pi < Os_CfgGetTaskCnt(); pi++) {\r
+ for( int pi = 0; pi < OS_TASK_CNT; pi++) {\r
\r
pcb_p = os_get_pcb(pi);\r
\r
// Cancel\r
\r
#define SCHED_CHECK_ID(x) \\r
- if( (x) > Os_CfgGetSchedCnt()) { \\r
+ if( (x) > OS_SCHTBL_CNT) { \\r
rv = E_OS_ID; \\r
goto err; \\r
}\r
*/\r
void Os_SchTblInit( void ) {\r
OsSchTblType *s_p;\r
- for( int i=0; i < Os_CfgGetSchedCnt();i++ ) {\r
+ for( int i=0; i < OS_SCHTBL_CNT;i++ ) {\r
s_p = Os_CfgGetSched(i);\r
\r
ScheduleTableConsistenyCheck(s_p);\r
\r
void Os_SchTblAutostart( void ) {\r
\r
- for(int j=0; j < Os_CfgGetSchedCnt(); j++ ) {\r
+ for(int j=0; j < OS_SCHTBL_CNT; j++ ) {\r
OsSchTblType *sPtr;\r
sPtr = Os_CfgGetSched(j);\r
\r
/** @req OS067 */\r
\r
_Bool os_pcb_pid_valid( OsPcbType *restrict pcb ) {\r
- return ( pcb->pid > Os_CfgGetTaskCnt() ) ? 0 : 1;\r
+ return ( pcb->pid > OS_TASK_CNT ) ? 0 : 1;\r
}\r
/**\r
* Start an extended task.\r
\r
\r
#define TASK_CHECK_ID(x) \\r
- if( (x) > Os_CfgGetTaskCnt()) { \\r
+ if( (x) > OS_TASK_CNT) { \\r
rv = E_OS_ID; \\r
goto err; \\r
}\r
add\r
menu\r
(\r
- popup "Autosar"\r
+ popup "ArcCore"\r
(\r
popup "&Breakpoint"\r
(\r
DEFBUTTON "Cancel" "jumpto win_close"\r
CLOSE "jumpto win_close"\r
)\r
-\r
+ dialog.set CPU "&cfg_cpu_g"\r
stop\r
save_close:\r
&cfg_cpu_g=dialog.string(CPU)\r
setup.var %SYMBOL.on %HEX.on %decimal.on %index.on %string.on\r
setup.tabsize 2.\r
\r
-menu.rp autosar.men\r
+menu.rp arccore.men\r
\r
winpos 0% 70% 50% 30%\r
area\r
\r
area.select\r
-print "## Welcome to Arc-Core simulator environment for T32 ##"\r
+print "## Welcome to ArcCore simulator environment for T32 ##"\r
print ""\r
\r
-\r
enddo\r
\r
\r
projects / arc.git / commitdiff