Added board_info.txt to most boards. Added memory description for most boards. Missin...

diff --git a/arch/arm/arm_cm3/scripts/linkscript_gcc.ldf b/arch/arm/arm_cm3/scripts/linkscript_gcc.ldf
index 737c7d5df43ae1ba48f3b0ba502df050c2bfb452..0a937c3adabda71d5bb5b9b4dd3273b879b9aba0 100644 (file)
--- a/arch/arm/arm_cm3/scripts/linkscript_gcc.ldf
+++ b/arch/arm/arm_cm3/scripts/linkscript_gcc.ldf
@@ -16,8 +16,7 @@ ENTRY(Reset_Handler)
 \r
 MEMORY\r
 {\r
-    flash(R) : ORIGIN = 0x08000000, LENGTH = 256K\r
-    ram(RW)  : ORIGIN = 0x20000000, LENGTH = 64K\r
+#include "memory.ldf"\r
 }\r
 \r
 SECTIONS\r

diff --git a/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf b/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf
index 6172a45a624368d0c97be4f84148b79112f1dc8d..bd42da3592962f94a96f1c9b5b1ae8e00ea347f1 100644 (file)
--- a/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf
+++ b/arch/ppc/mpc55xx/scripts/linkscript_gcc.ldf
@@ -2,24 +2,18 @@
  * Copyright (C) 2009  ArcCore AB <contact@arccore.com> \r
  */\r
 \r
-/* For more info on sections check the E500 freescale doc: E500ABIUG.pdf\r
- *\r
- */\r
+/* Undef sections/keywords */ \r
+#undef PPC\r
+\r
 OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")\r
 OUTPUT_ARCH(powerpc)\r
 ENTRY(_start)\r
 \r
 \r
+\r
 MEMORY\r
 {\r
-       /* MPC55xx Reset Control Word(RCW) */\r
-       rcw(R)   : ORIGIN = 0x00000000, LENGTH = 0x8\r
-    flash(R) : ORIGIN = 0x00000008, LENGTH = 0x100000\r
-    /* 5516S, 48K\r
-     * 5517S,5516G,5516E, 64K RAM\r
-     * 5517G,E , 80K RAM\r
-     */\r
-    ram(RW)  : ORIGIN = 0x40000000, LENGTH = 0x100000\r
+#include "memory.ldf"\r
 }\r
 \r
 SECTIONS\r

diff --git a/boards/mpc5516it/board_info.txt b/boards/mpc5516it/board_info.txt
index 5714e07d7282fe408fddf1a053ff19a8a3266ebe..6d7fc39f5c3ca25812ec88e962b18f93229fe649 100644 (file)
--- a/boards/mpc5516it/board_info.txt
+++ b/boards/mpc5516it/board_info.txt
@@ -1,11 +1,26 @@
 \r
 \r
-Test board. \r
-=======================================================\r
-\r
-The regression test board comes in different variants.\r
 \r
+The Freescale MPC5510 is an PowerPC process with a e200Z1+e200Z0 core. \r
+       \r
+Datasheets:\r
+  Eval board:\r
+    http://www.asyst.si/isystem/files/downloads/evaluation_boards/ITMPC5517_V10.pdf  \r
+ \r
+  MPC5516/7\r
+    http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC5510&webpageId=1067371573986721160325&nodeId=0162468rH3bTdG06C10325&fromPage=tax\r
 \r
-This file supports:\r
-- EVB5516\r
+Board:\r
+  8Mhz external crystal\r
  \r
+Info:  \r
+  MPC5516/7 (I think that the board is always equipped with a MPC5517E now)\r
+  e200Z1 + e200Z0 (VLE only)\r
+  48-66Mhz\r
+  1.5MB Flash (MPC5516 1MB)\r
+  80KB SRAM   (MPC5516 64KB)\r
+  .. \r
+  \r
+Memory Map:\r
+ 0x0000_0000 ->           Flash\r
+ 0x4000_0000 ->           SRAM\r

diff --git a/boards/mpc5516it/memory.ldf b/boards/mpc5516it/memory.ldf
new file mode 100644 (file)
index 0000000..76b7d68
--- /dev/null
+++ b/boards/mpc5516it/memory.ldf
@@ -0,0 +1,10 @@
+\r
+\r
+/* MPC55xx Reset Control Word(RCW) */\r
+rcw(R)   : ORIGIN = 0x00000000, LENGTH = 0x8\r
+flash(R) : ORIGIN = 0x00000008, LENGTH = 1M\r
+/* 5516S, 48K\r
+ * 5517S,5516G,5516E, 64K RAM\r
+ * 5517G,E , 80K RAM\r
+ */\r
+ram(RW)  : ORIGIN = 0x40000000, LENGTH = 0x100000\r

diff --git a/boards/mpc551xsim/board_info.txt b/boards/mpc551xsim/board_info.txt
new file mode 100644 (file)
index 0000000..c174ede
--- /dev/null
+++ b/boards/mpc551xsim/board_info.txt
@@ -0,0 +1,18 @@
+\r
+The Freescale MPC5510 is an PowerPC process with a e200Z1+e200Z0 core. \r
+The simulator environment ONLY supports one core.\r
+       \r
+Datasheets:\r
+ \r
+  MPC5516/7\r
+    http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC5510&webpageId=1067371573986721160325&nodeId=0162468rH3bTdG06C10325&fromPage=tax\r
+ \r
+Info:  \r
+  MPC5516\r
+  1.5MB Flash (MPC5516 1MB)\r
+  80KB SRAM   (MPC5516 64KB)\r
+  .. \r
+  \r
+Memory Map:\r
+ 0x0000_0000 ->           Flash\r
+ 0x4000_0000 ->           SRAM\r

diff --git a/boards/mpc551xsim/memory.ldf b/boards/mpc551xsim/memory.ldf
new file mode 100644 (file)
index 0000000..76b7d68
--- /dev/null
+++ b/boards/mpc551xsim/memory.ldf
@@ -0,0 +1,10 @@
+\r
+\r
+/* MPC55xx Reset Control Word(RCW) */\r
+rcw(R)   : ORIGIN = 0x00000000, LENGTH = 0x8\r
+flash(R) : ORIGIN = 0x00000008, LENGTH = 1M\r
+/* 5516S, 48K\r
+ * 5517S,5516G,5516E, 64K RAM\r
+ * 5517G,E , 80K RAM\r
+ */\r
+ram(RW)  : ORIGIN = 0x40000000, LENGTH = 0x100000\r

diff --git a/boards/mpc5554sim/board_info.txt b/boards/mpc5554sim/board_info.txt
new file mode 100644 (file)
index 0000000..1ab8394
--- /dev/null
+++ b/boards/mpc5554sim/board_info.txt
@@ -0,0 +1,15 @@
+\r
+The Freescale MPC5554 is an PowerPC process with a e200Z6 core. \r
+The difference between this and the MPC551xsim is that this supports VLE.\r
+       \r
+Datasheets:\r
+  \r
+Info:  \r
+  MPC5554\r
+  2MB Flash\r
+  64KB SRAM\r
+  .. \r
+  \r
+Memory Map:\r
+ 0x0000_0000 ->           Flash\r
+ 0x4000_0000 ->           SRAM\r

diff --git a/boards/mpc5554sim/memory.ldf b/boards/mpc5554sim/memory.ldf
new file mode 100644 (file)
index 0000000..93f540c
--- /dev/null
+++ b/boards/mpc5554sim/memory.ldf
@@ -0,0 +1,10 @@
+\r
+\r
+/* MPC55xx Reset Control Word(RCW) */\r
+rcw(R)   : ORIGIN = 0x00000000, LENGTH = 0x8\r
+flash(R) : ORIGIN = 0x00000008, LENGTH = 2M\r
+/* 5516S, 48K\r
+ * 5517S,5516G,5516E, 64K RAM\r
+ * 5517G,E , 80K RAM\r
+ */\r
+ram(RW)  : ORIGIN = 0x40000000, LENGTH = 0x100000\r

diff --git a/boards/mpc5567qrtech/board_info.txt b/boards/mpc5567qrtech/board_info.txt
new file mode 100644 (file)
index 0000000..b6595e9
--- /dev/null
+++ b/boards/mpc5567qrtech/board_info.txt
@@ -0,0 +1,30 @@
+\r
+\r
+The Freescale MPC5567 is an PowerPC process with a e200z6 core. \r
+The EVAL board used is the "ODEEP" concept. \r
+       \r
+Datasheets:\r
+  ODEEP  \r
+    http://www.odeep.se/  \r
+ \r
+  MPC5567\r
+    http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC5567\r
+ \r
+Info:  \r
+  MPC5567\r
+  80-132Mhz\r
+  2MB Flash \r
+  80kB SRAM\r
+  2 × SCI\r
+  3 × DSPI\r
+  5 × CAN\r
+  FlexRay\r
+  Ethernet\r
+  24-ch PWM\r
+  32-ch ETPU\r
+  24-ch EMIOS\r
+  2-ch × 20-ch, 12bit ADC\r
+  \r
+Memory Map:\r
+ 0x0000_0000 ->           Flash\r
+ 0x4000_0000 ->           SRAM\r

diff --git a/boards/mpc5567qrtech/memory.ldf b/boards/mpc5567qrtech/memory.ldf
new file mode 100644 (file)
index 0000000..93f540c
--- /dev/null
+++ b/boards/mpc5567qrtech/memory.ldf
@@ -0,0 +1,10 @@
+\r
+\r
+/* MPC55xx Reset Control Word(RCW) */\r
+rcw(R)   : ORIGIN = 0x00000000, LENGTH = 0x8\r
+flash(R) : ORIGIN = 0x00000008, LENGTH = 2M\r
+/* 5516S, 48K\r
+ * 5517S,5516G,5516E, 64K RAM\r
+ * 5517G,E , 80K RAM\r
+ */\r
+ram(RW)  : ORIGIN = 0x40000000, LENGTH = 0x100000\r

diff --git a/boards/mpc563xsim/memory.ldf b/boards/mpc563xsim/memory.ldf
new file mode 100644 (file)
index 0000000..dfe21ab
--- /dev/null
+++ b/boards/mpc563xsim/memory.ldf
@@ -0,0 +1,10 @@
+\r
+\r
+/* MPC55xx Reset Control Word(RCW) */\r
+rcw(R)   : ORIGIN = 0x00000000, LENGTH = 0x8\r
+flash(R) : ORIGIN = 0x00000008, LENGTH = 0x100000\r
+/* 5516S, 48K\r
+ * 5517S,5516G,5516E, 64K RAM\r
+ * 5517G,E , 80K RAM\r
+ */\r
+ram(RW)  : ORIGIN = 0x40000000, LENGTH = 0x100000\r

diff --git a/boards/stm32_mcbstm32/readme.txt b/boards/stm32_mcbstm32/board_info.txt
similarity index 100%
rename from boards/stm32_mcbstm32/readme.txt
rename to boards/stm32_mcbstm32/board_info.txt

diff --git a/boards/stm32_mcbstm32/memory.ldf b/boards/stm32_mcbstm32/memory.ldf
new file mode 100644 (file)
index 0000000..d471073
--- /dev/null
+++ b/boards/stm32_mcbstm32/memory.ldf
@@ -0,0 +1,4 @@
+\r
+\r
+flash(R) : ORIGIN = 0x08000000, LENGTH = 128K\r
+ram(RW)  : ORIGIN = 0x20000000, LENGTH = 20K\r

diff --git a/boards/stm32_stm3210c/readme.txt b/boards/stm32_stm3210c/board_info.txt
similarity index 100%
rename from boards/stm32_stm3210c/readme.txt
rename to boards/stm32_stm3210c/board_info.txt

diff --git a/boards/stm32_stm3210c/memory.ldf b/boards/stm32_stm3210c/memory.ldf
new file mode 100644 (file)
index 0000000..571c601
--- /dev/null
+++ b/boards/stm32_stm3210c/memory.ldf
@@ -0,0 +1,4 @@
+\r
+\r
+flash(R) : ORIGIN = 0x08000000, LENGTH = 256K\r
+ram(RW)  : ORIGIN = 0x20000000, LENGTH = 64K\r

diff --git a/examples/simple/makefile b/examples/simple/makefile
index ebfd14f6920c494820f697bfeea12b28d73fe791..19b1e6c4551e37a518fe06a1049c4fc7adb4e184 100644 (file)
--- a/examples/simple/makefile
+++ b/examples/simple/makefile
@@ -22,7 +22,9 @@ include $(ROOTDIR)/boards/board_common.mk
 libitem-y += $(ROOTDIR)/libs/libkernel_$(ARCH_MCU).a\r
 \r
 #linkfile\r
-ldcmdfile-y = $(ROOTDIR)/$(ARCH_PATH-y)/scripts/linkscript_gcc.ldf\r
+ldcmdfile-y = linkscript_gcc.ldp\r
+vpath %.ldf $(ROOTDIR)/$(ARCH_PATH-y)/scripts\r
+#ldcmdfile-y = $(ROOTDIR)/$(ARCH_PATH-y)/scripts/linkscript_gcc.ldp\r
 \r
 # What I want to build\r
 build-exe-y = simple.elf\r

diff --git a/scripts/rules.mk b/scripts/rules.mk
index 171bb0433c14c5e87ea28df0bf5e7379dea019a6..c501f35715f29ce2f070f397223f22c41a49ece0 100644 (file)
--- a/scripts/rules.mk
+++ b/scripts/rules.mk
@@ -73,8 +73,7 @@ inc-y += $(ROOTDIR)/include/$(ARCH_FAM)
 \r
 .PHONY clean: \r
 clean: FORCE\r
-       @-rm -f *.o *.d *.h *.elf *.a\r
-\r
+       @-rm -f *.o *.d *.h *.elf *.a *.ldp\r
 \r
 .PHONY config: \r
 config: FORCE\r
@@ -125,6 +124,14 @@ inc-y += ../include
        $(Q)$(CPP) -x assembler-with-cpp -E -o $@ $(addprefix -I ,$(inc-y)) $(addprefix -D,$(def-y)) $<\r
 \r
 \r
+# Board linker files are in the board directory \r
+inc-y += $(ROOTDIR)/boards/$(BOARDDIR)\r
+\r
+# Preprocess linker files..\r
+%.ldp: %.ldf\r
+       @echo "  >> CPP $<"\r
+       $(Q)$(CPP) -E -P -x assembler-with-cpp -o $@ $(addprefix -I ,$(inc-y)) $<\r
+\r
 #      @cat $@ \r
        \r
 .PHONY $(ROOTDIR)/libs:\r