* -------------------------------- Arctic Core ------------------------------*/\r
\r
\r
-\r
-\r
-\r
-\r
-\r
-\r
-\r
#ifndef CPU_H\r
#define CPU_H\r
\r
#include "Std_Types.h"\r
typedef uint32_t imask_t;\r
-#if defined(__DCC__)\r
-#include <diab/ppcasm.h>\r
-#endif\r
+\r
+//#if defined(__DCC__)\r
+//#include <diab/ppcasm.h>\r
+//#endif\r
\r
// Used if we are running a T32 instruction set simulator\r
#define SIMULATOR() (SIU.MIDR.R==0)\r
* Sets a value to a specific SPR register\r
*/\r
#if defined(__DCC__)\r
-#define set_spr(spr_nr, val) (__mtspr(spr_nr,val))\r
+asm void set_spr(uint32 spr_nr, uint32 val)\r
+{\r
+%reg val; con spr_nr\r
+ mtspr spr_nr, val\r
+}\r
#else\r
-#define set_spr(spr_nr, val) \\r
+# define set_spr(spr_nr, val) \\r
asm volatile (" mtspr " STRINGIFY__(spr_nr) ",%[_val]" : : [_val] "r" (val))\r
#endif\r
/**\r
*/\r
\r
#if defined(__DCC__)\r
-#define get_spr(spr_nr) (__mfspr(spr_nr))\r
+asm uint32 get_spr(uint32 spr_nr)\r
+{\r
+% con spr_nr\r
+ mfspr r3, spr_nr\r
+}\r
#else\r
#define get_spr(spr_nr) CC_EXTENSION \\r
({\\r
* @return\r
*/\r
#if defined(__DCC__)\r
-#define get_msr() (__mfmsr())\r
+asm volatile unsigned long get_msr()\r
+{\r
+ mfmsr r3\r
+}\r
#else\r
static inline unsigned long get_msr() {\r
uint32_t msr;\r
* @param msr\r
*/\r
#if defined(__DCC__)\r
-#define set_msr(msr)\\r
- (__mtmsr(msr));\\r
- (__isync());\r
+asm volatile void set_msr(unsigned long msr)\r
+{\r
+% reg msr\r
+ mtmsr msr\r
+ isync\r
+}\r
#else\r
static inline void set_msr(unsigned long msr) {\r
asm volatile ("mtmsr %0" : : "r" (msr) );\r
\r
/* Count the number of consecutive zero bits starting at ppc-bit 0 */\r
#if defined(__DCC__)\r
-#define cntlzw(val) (__cntlzw(val))\r
+asm volatile unsigned int cntlzw(unsigned int val)\r
+{\r
+% reg val\r
+ cntlzw r3, val\r
+}\r
#else\r
static inline unsigned int cntlzw(unsigned int val)\r
{\r
}\r
\r
/*-----------------------------------------------------------------*/\r
+\r
+static inline void _Irq_Disable_restore(unsigned long flags)\r
+{\r
+ set_msr(flags);\r
+}\r
+\r
+#if 0\r
#if defined(__DCC__)\r
-#define _Irq_Disable_restore(flags) (__mtmsr(flags))\r
+#define _Irq_Disable_restore(flags) (set_msr(flags))\r
#else\r
static inline void _Irq_Disable_restore(unsigned long flags)\r
{\r
+ set_msr(flags);\r
asm volatile ("mtmsr %0" : : "r" (flags) );\r
}\r
#endif\r
+#endif\r
/*-----------------------------------------------------------------*/\r
#if defined(__DCC__)\r
#else\r
#include "EcuM_Internals.h"\r
#include "EcuM_Cbk.h"\r
#include "Mcu.h"\r
+#if defined(USE_DET)\r
#include "Det.h"\r
+#endif\r
#include "isr.h"\r
#if defined(USE_NVM)\r
#include "NvM.h"\r
\r
EcuM_GlobalType internal_data;\r
\r
+#if !defined(USE_DET) && defined(ECUM_DEV_ERROR_DETECT)\r
+#error EcuM configuration error. DET is not enabled when ECUM_DEV_ERROR_DETECT is set\r
+#endif\r
+\r
void EcuM_Init( void )\r
{\r
Std_ReturnType status;\r
// Start timer to wait for NVM job to complete\r
tickTimerStatus = GetCounterValue(Os_Arc_OsTickCounter , &tickTimerStart);\r
if (tickTimerStatus != E_OK) {\r
- Det_ReportError(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
+ DET_REPORTERROR(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
}\r
#endif\r
\r
tickTimer = tickTimerStart; // Save this because the GetElapsedCounterValue() will destroy it.\r
tickTimerStatus = GetElapsedCounterValue(Os_Arc_OsTickCounter, &tickTimer, &tickTimerElapsed);\r
if (tickTimerStatus != E_OK) {\r
- Det_ReportError(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
+ DET_REPORTERROR(MODULE_ID_ECUM, 0, ECUM_ARC_STARTUPTWO_ID, ECUM_E_ARC_TIMERERROR);\r
}\r
} while( (readAllResult == NVM_REQ_PENDING) && (tickTimerElapsed < internal_data.config->EcuMNvramReadAllTimeout) );\r
#endif\r