\r
level = GPIO_ReadInputData(GPIO_ports[portId]);\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
\r
GPIO_Write(GPIO_ports[portId], level);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
level = STD_LOW;\r
}\r
\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
\r
Dio_WritePort(DIO_GET_PORT_FROM_CHANNEL_ID(channelId), portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
// Shift down\r
level = level >> channelGroupIdPtr->offset;\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
\r
Dio_WritePort(channelGroupIdPtr->port, portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
#define VALIDATE_PARAM_PIN(_api)\r
#endif\r
\r
+#if (PORT_VERSION_INFO_API == STD_ON)\r
static Std_VersionInfoType _Port_VersionInfo =\r
{ .vendorID = (uint16)1, .moduleID = (uint16) MODULE_ID_PORT,\r
.instanceID = (uint8)1,\r
.ar_major_version = (uint8)PORT_AR_MAJOR_VERSION,\r
.ar_minor_version = (uint8)PORT_AR_MINOR_VERSION,\r
.ar_patch_version = (uint8)PORT_AR_PATCH_VERSION, };\r
+#endif\r
\r
/** @req PORT140 */\r
/** @req PORT041 Comment: To reduce flash usage the configuration tool can disable configuration of some ports */\r
\r
level = (uint8)GPIO_ports[portId]->DIN;\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
\r
GPIO_ports[portId]->DOUT = (uint32)level;\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_LevelType Dio_ReadChannel(Dio_ChannelType channelId)\r
level = STD_LOW;\r
}\r
\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
// Shift down\r
level = level >> channelGroupIdPtr->offset;\r
\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
\r
Dio_WritePort(channelGroupIdPtr->port, portVal);\r
\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
\r
{\r
level = STD_LOW;\r
}\r
- cleanup: return (level);\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return (level);\r
}\r
\r
void Dio_WriteChannel(Dio_ChannelType channelId, Dio_LevelType level)\r
VALIDATE_CHANNEL(channelId, DIO_WRITECHANNEL_ID);\r
// Write level to SIU.\r
SIU.GPDO [channelId].R = level;\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_PortLevelType Dio_ReadPort(Dio_PortType portId)\r
vuint16_t *ptr = (vuint16_t *)&SIU.PGPDI0; // The GPDI 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
#endif\r
level = ptr[portId]; // Read the bit pattern (16bits) to the port\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WritePort(Dio_PortType portId, Dio_PortLevelType level)\r
vuint16_t *ptr = (vuint16_t *)&SIU.PGPDO0; // The GPDO 0-3 is organized in 32bit chunks but we want to step them in 16bit port-widths\r
#endif\r
ptr[portId] = level; // Write the bit pattern (16bits) to the port\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
}\r
\r
Dio_PortLevelType Dio_ReadChannelGroup(\r
\r
// Shift down\r
level<<=channelGroupIdPtr->offset;\r
- cleanup: return level;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return level;\r
}\r
\r
void Dio_WriteChannelGroup(const Dio_ChannelGroupType *channelGroupIdPtr,\r
// Build the 32 bits Mask_Valule, and write to masked output register\r
ptr[channelGroupIdPtr->port] = (channelGroupIdPtr->mask << 16)&((level\r
<<channelGroupIdPtr->offset)|0xFFFF);\r
- cleanup: return;\r
+#if ( DIO_DEV_ERROR_DETECT == STD_ON )\r
+ cleanup:\r
+#endif\r
+ return;\r
#else\r
return;\r
#endif\r