{\r
VALIDATE_PARAM_CONFIG(configType, PORT_INIT_ID);\r
\r
- // Pointers to the register memory areas\r
- vuint16_t * padConfig = &(SIU.PCR[0].R);\r
- vuint8_t * outConfig = &(SIU.GPDO[0].R);\r
-\r
#if defined(CFG_MPC5606S)\r
vuint16_t i = 0;\r
vuint16_t j = 0;\r
\r
- while(i < configType->padCnt)\r
+ while(i < (configType->padCnt/sizeof(uint16_t)))\r
{\r
SIU.PCR[i].R = configType->padConfig[i];\r
++i;\r
}\r
\r
#else\r
+ // Pointers to the register memory areas\r
+ vuint16_t * padConfig = &(SIU.PCR[0].R);\r
+ vuint8_t * outConfig = &(SIU.GPDO[0].R);\r
+\r
// vuint8_t * inConfig = &(SIU.GPDI[0].R); // Read only\r
// Copy config to register areas\r
memcpy((void *)outConfig, configType->outConfig, configType->outCnt);\r
const Pwm_ChannelConfigurationType* channelConfig,\r
uint16_t* ticks, Pwm_ChannelPrescalerType* prescaler) {\r
\r
- Pwm_ChannelType channel = channelConfig->channel;\r
uint32_t pre_global = 0;\r
uint32_t f_in = 0;\r
\r
#if defined(CFG_MPC5606S)\r
+ Pwm_ChannelType channel = channelConfig->channel;\r
+\r
if(channel <= PWM_NUMBER_OF_EACH_EMIOS-1) {\r
f_in = McuE_GetPeripheralClock( PERIPHERAL_CLOCK_EMIOS_0 );\r
pre_global = EMIOS_0.MCR.B.GPRE;\r
emiosHw = &EMIOS_1;\r
}\r
\r
- ChannelRuntimeStruct[channel].Class = ConfigPtr->ChannelClass[channel_iterator];\r
-\r
emiosHw->CH[channel].CCR.B.MODE = PWM_EMIOS_OPWM;\r
emiosHw->CH[channel].CCR.B.DMA = 0;\r
emiosHw->CH[channel].CCR.B.BSL = 3;\r
// X % of the period time.\r
emiosHw->CH[channel].CCR.B.EDPOL = (channelConfig->polarity == PWM_LOW) ? 1 : 0;\r
\r
- #if PWM_SET_PERIOD_AND_DUTY==STD_ON\r
+ #if PWM_SET_PERIOD_AND_DUTY_API==STD_ON\r
ChannelRuntimeStruct[channel].Class = ConfigPtr->ChannelClass[channel_iterator];\r
#endif\r
\r
// A duty cycle of X % should give a signal with state 'channelConfig->polarity' during\r
// X % of the period time.\r
EMIOS.CH[channel].CCR.B.EDPOL = (channelConfig->polarity == PWM_LOW) ? 1 : 0;\r
+\r
+ #if PWM_SET_PERIOD_AND_DUTY_API==STD_ON\r
+ ChannelRuntimeStruct[channel].Class = ConfigPtr->ChannelClass[channel_iterator];\r
+ #endif\r
#endif\r
\r
}\r
void inline Pwm_DeInitChannel(Pwm_ChannelType Channel) {\r
Pwm_SetOutputToIdle(Channel);\r
\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516)\r
// Set the disable bit for this channel\r
- EMIOS.UCDIS.R |= (1 << (31 - Channel));\r
-\r
+ EMIOS.UCDIS.R |= (1 << (31 - Channel));\r
#elif defined(CFG_MPC5606S)\r
// Set the disable bit for this channel\r
if(Channel <= PWM_NUMBER_OF_EACH_EMIOS-1)\r
\r
// Disable module\r
\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516) || defined(CFG_MPC5567)\r
\r
EMIOS.MCR.B.MDIS = 1;\r
\r
return;\r
}\r
\r
- uint16 leading_edge_position = (uint16) (((uint32) Period\r
- * (uint32) DutyCycle) >> 15);\r
+ uint16 leading_edge_position = (uint16) (((uint32) Period * (uint32) DutyCycle) >> 15);\r
\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516) || defined(CFG_MPC5567)\r
\r
/* Timer instant for leading edge */\r
EMIOS.CH[Channel].CADR.R = leading_edge_position;\r
return;\r
}\r
\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516) || defined(CFG_MPC5567)\r
\r
uint16 leading_edge_position = (uint16) ((EMIOS.CH[Channel].CBDR.R\r
* (uint32) DutyCycle) >> 15);\r
\r
/* TODO: Make Pwm_SetOutputToIdle sensitive to PwmIdleState (currently uses PwmPolarity) */\r
\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516) || defined(CFG_MPC5567)\r
\r
EMIOS.CH[Channel].CADR.R = 0;\r
\r
return PWM_LOW;\r
}\r
\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516) || defined(CFG_MPC5567)\r
\r
return EMIOS.CH[Channel].CSR.B.UCOUT;\r
\r
}\r
\r
// Disable flags on this channel\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516) || defined(CFG_MPC5567)\r
\r
EMIOS.CH[Channel].CCR.B.FEN = 0;\r
\r
ChannelRuntimeStruct[Channel].NotificationState = Notification;\r
\r
// Enable flags on this channel\r
- #ifdef CFG_MPC5516\r
+ #if defined(CFG_MPC5516) || defined(CFG_MPC5567)\r
\r
EMIOS.CH[Channel].CCR.B.FEN = 1;\r
\r