]> rtime.felk.cvut.cz Git - arc.git/commitdiff
Added support for software interrupts for TMS570. tms570-core-2.9
authormaek <devnull@localhost>
Tue, 14 Jun 2011 12:00:38 +0000 (14:00 +0200)
committermaek <devnull@localhost>
Tue, 14 Jun 2011 12:00:38 +0000 (14:00 +0200)
arch/arm/arm_cr4/kernel/irq.c
arch/arm/arm_cr4/kernel/irq_types.h
include/isr.h
system/kernel/isr.c

index 60f91c5c6efbb34429900fb40de06f49f34e6186..b3809540764feadcca36ca125e9ec648bce8ed97 100644 (file)
@@ -75,15 +75,7 @@ void *Irq_Entry( void *stack_p )
        }
 
        stack = (uint32_t *)stack_p;
-
-       /*
-       struct OsTaskVar * pcb = (struct OsTaskVar *)Irq_VectorTable[virtualChannel];
-       // Save the hardware channel in the PCB, so that Os_Isr knows which interrupt channel to deactivate.
-       pcb->vector = channel;
-       */
-       // Don't know what to pass here yet. Use the virtual channel for now, but
-       // probably need to pass channel as well.
-       stack = Os_Isr(stack, virtualChannel);
+       stack = Os_Isr_cr4(stack, virtualChannel, channel);
 
        //Irq_Enable();
        return stack;
@@ -121,24 +113,6 @@ static inline int osPrioToCpuPio( uint8_t prio ) {
        return (prio>>1);
 }
 
-/**
- * Attach a ISR type 2 to the interrupt controller.
- *
- * @param tid
- * @param int_ctrl
- * @param vector
- */
-/*
-void Irq_AttachIsr2(TaskType tid,void *int_ctrl,IrqType vector ) {
-       OsTaskVarType *pcb;
-
-       pcb = Os_TaskGet(tid);
-       Irq_VectorTable[vector] = (void *)pcb;
-       IrqActivateChannel(vector);
-
-       // TOdo replace NVIC_InitVector(vector, osPrioToCpuPio(pcb->prio));
-}
-*/
 void Irq_EnableVector( int16_t vector, int priority, int core ) {
 
        if (vector < NUMBER_OF_INTERRUPTS_AND_EXCEPTIONS) {
index af9b9619801abafe06cdf886d3faada0107902de..b2511707d51e23fa722e64724bd91092d5eea3e6 100644 (file)
 \r
 \r
 #define Irq_SOI() \\r
-       IrqDeactivateChannel(isrPtr->constPtr->vector)\r
+       IrqDeactivateChannel(isrPtr->activeVector)\r
 \r
 \r
 #define Irq_EOI() \\r
-       IrqActivateChannel(isrPtr->constPtr->vector)\r
+       IrqActivateChannel(isrPtr->activeVector)\r
 \r
 \r
 typedef enum {\r
index cf875d10eaad21a588d517611e9ee139c9afa41e..84694805e829b7ec10769e09f7670b7f6250eb9c 100644 (file)
@@ -194,6 +194,10 @@ typedef struct {
 //     OsIsrStackType          stack;\r
        int                                     state;\r
        const OsIsrConstType *constPtr;\r
+#if defined(CFG_ARM_CR4)\r
+       int16_t activeVector;\r
+#endif\r
+\r
        /* List of resource held by this ISR */\r
        TAILQ_HEAD(,OsResource) resourceHead;\r
 } OsIsrVarType;\r
@@ -209,6 +213,9 @@ void Os_IsrInit( void );
 ISRType Os_IsrAdd( const OsIsrConstType * restrict isrPtr );\r
 void Os_IsrGetStackInfo( OsIsrStackType *stack );\r
 void *Os_Isr( void *stack, int16_t vector);\r
+#if defined(CFG_ARM_CR4)\r
+void *Os_Isr_cr4( void *stack, int16_t virtualVector, int16_t vector );\r
+#endif\r
 #if defined(CFG_ARM_CM3)\r
 void Os_Isr_cm3( int16_t vector );\r
 void TailChaining(void *stack);\r
index 727dfa01bc4c07e70b8a24ef1904f443706d7614..12fb916e976cbe382ae018bf901d17d93b032255 100644 (file)
@@ -255,6 +255,14 @@ void Os_IsrGetStackInfo( OsIsrStackType *stack ) {
 }\r
 \r
 \r
+#if defined(CFG_ARM_CR4)\r
+void *Os_Isr_cr4( void *stack, int16_t virtualVector, int16_t vector ) {\r
+       OsIsrVarType *isrPtr =  &Os_IsrVarList[Os_VectorToIsr[virtualVector]];\r
+       isrPtr->activeVector = vector;\r
+       return Os_Isr(stack, virtualVector);\r
+}\r
+#endif\r
+\r
 /**\r
  * Handle ISR type 2 interrupts from interrupt controller.\r
  *\r
@@ -262,6 +270,7 @@ void Os_IsrGetStackInfo( OsIsrStackType *stack ) {
  * @param vector\r
  */\r
 void *Os_Isr( void *stack, int16_t vector ) {\r
+\r
        OsIsrVarType *isrPtr =  &Os_IsrVarList[Os_VectorToIsr[vector]];\r
        OsTaskVarType *taskPtr = NULL;\r
 \r