+#define _ASSEMBLER_\r
#include "asm_ppc.h"\r
\r
#if defined(__GNUC__)\r
.section .rcw,4,"r"\r
#endif\r
\r
+\r
.global _resetconfiguration\r
_resetconfiguration:\r
+#if defined(CFG_VLE)\r
+ .byte 0x01 #no watchdog, VLE\r
+#else\r
.byte 0x00 #no watchdog\r
+#endif \r
.byte 0x5A #Boot identifier\r
.byte 0x00\r
.byte 0x00\r
.extern exit\r
.extern main\r
\r
- .text\r
+#if defined(__CWCC__) && defined(CFG_VLE)\r
+.section .text_vle,text_vle\r
+#else\r
+.section .text\r
+#endif\r
.align 4\r
\r
.globl _start\r
\r
// Good information about the E500 is freescale doc: E500ABIUG.pdf\r
\r
-\r
+#if 0\r
.global _redled\r
_redled:\r
// mpc5567qrtech: light up led K2 \r
ori r3, r3, 0xC3F90130@l\r
stw r0, 8(r3)\r
b _exit\r
+#endif\r
\r
__start:\r
_start:\r
// Set up the reserved registers in EABI: r1,r2 and r13\r
\r
// r1, stack pointer\r
- lis r1,__SP_INIT@h\r
- ori r1,r1,__SP_INIT@l\r
-\r
+ LOAD_ADDR_32(1,__SP_INIT)\r
+ \r
// r13, base of .sdata\r
- lis r13,_SDA_BASE_@h\r
- ori r13,r13,_SDA_BASE_@l\r
+ LOAD_ADDR_32(13,_SDA_BASE_)\r
\r
// r2, base of .sdata2 and .sbss2\r
- lis r2,_SDA2_BASE_@h\r
- ori r2,r2,_SDA2_BASE_@l\r
+ LOAD_ADDR_32(13,_SDA2_BASE_)\r
\r
// make space for initial backchain..\r
subi r1,r1,16\r
\r
/* Clear all SRAM */\r
init_RAM:\r
- lis r11,0x4000 # base address of the SRAM, 64-bit word aligned\r
- ori r11,r11,0 # not needed for this address but could be for others\r
+ LOAD_ADDR_32(11,0x40000000)\r
li r12,640 # loop counter to get all of SRAM;\r
/* 80k/4 bytes/32 GPRs = 640 */\r
mtctr r12\r
#endif\r
\r
// Copy initialized data from ROM to RAM\r
- lis r3,__DATA_ROM@h\r
- ori r3,r3,__DATA_ROM@l\r
- lis r4,__DATA_RAM@h\r
- ori r4,r4,__DATA_RAM@l\r
- lis r5,__DATA_END@h\r
- ori r5,r5,__DATA_END@l\r
-\r
+ LOAD_ADDR_32(3,__DATA_ROM)\r
+ LOAD_ADDR_32(4,__DATA_RAM)\r
+ LOAD_ADDR_32(5,__DATA_END)\r
+ \r
cmplw r3,r4\r
beq skip_data\r
cmplw r4,r5\r
skip_data:\r
\r
/* Clear uninitialized data( holds both bss and sbss ) */\r
- lis r3,__BSS_START@h\r
- ori r3,r3,__BSS_START@l\r
- lis r4,__BSS_END@h\r
- ori r4,r4,__BSS_END@l\r
+ LOAD_ADDR_32(3,__BSS_START)\r
+ LOAD_ADDR_32(4,__BSS_END)\r
cmplw r3,r4\r
beq skip_bss\r
li r0,0\r
.extern os_sys\r
.extern Os_ArchPanic\r
\r
-#if defined(CFG_VLE)\r
-#define lis e_lis\r
-#define li se_li\r
-#define lwz e_lwz\r
-#define stwu e_stwu\r
-#define stw e_stw\r
-#define b e_b\r
-#define addi e_addi /* true ?*/\r
-#define subi e_subi /* true ?*/\r
-#endif \r
\r
/* ----------------------------[private define]------------------------------*/\r
\r
+//#define OLD_CALL \r
+\r
#define INTC_IACKR_PRC0 0xfff48010 \r
#define INTC_EOIR_PRC0 0xfff48018\r
#define INTC_IACKR 0xfff48010\r
.global Os_ArchSwapContextTo\r
.global Os_ArchSwapContext\r
.global Os_ArchSetSpAndCall\r
+#if defined(__CWCC__) && defined(CFG_VLE)\r
+.section .text_vle,text_vle\r
+#else\r
.section .text\r
+#endif\r
+\r
+\r
+\r
\r
Os_ArchSetSpAndCall:\r
mr r1,r3\r
\r
/* Get the context type */\r
lwz r0, FUNC_FRM_PATTERN(sp)\r
- cmpli 0, r0, FUNC_PATTERN\r
+ cmplwi r0, FUNC_PATTERN\r
beq+ restoreFuncContext\r
- cmpli 0, r0,ISR_PATTERN\r
+ cmplwi r0,ISR_PATTERN\r
beq+ restoreIsrContext\r
li r3, OS_ERR_BAD_CONTEXT\r
b Os_ArchPanic\r
/* Switch to interrupt stack if at depth 0 */\r
/* Load the value os_sys.int_nest_cnt */\r
LOAD_IND_32(r3,os_sys+SYS_INT_NEST_CNT)\r
- cmpli 0,r3,0\r
- bne- on_int_stack\r
+ cmplwi r3,0\r
+ bne on_int_stack\r
\r
/* Load the interrupt stack */\r
LOAD_IND_32(r1,os_sys+SYS_INT_STACK)\r
#endif\r
/* Check for 0 entry */\r
mr r5,r6\r
- cmpli 0,r5,0\r
+ cmplwi r5,0\r
bne+ vectorOk\r
/* The entry was 0, call panic */\r
li r3,OS_ERR_SPURIOUS_INTERRUPT\r
vectorOk:\r
extrwi r5,r5,9,21\r
/* Check for soft INT */\r
- cmpli 0,r5,7\r
+ cmplwi r5,7\r
bgt noSoftInt\r
/* Clear soft interrupt */\r
- li r0,1 \r
- lis r3, INTC_SSCIR0@h\r
- ori r3, r3, INTC_SSCIR0@l\r
+ li r0,1\r
+ LOAD_ADDR_32(3,INTC_SSCIR0)\r
+// lis r3, INTC_SSCIR0@h\r
+// ori r3, r3, INTC_SSCIR0@l\r
stbx r0,r5,r3 \r
\r
noSoftInt: \r
-\r
- lis r3, Os_Isr@h\r
- ori r3, r3,Os_Isr@l\r
+ LOAD_ADDR_32(3,Os_Isr)\r
+// lis r3, Os_Isr@h\r
+// ori r3, r3,Os_Isr@l\r
mtlr r3\r
mr r3,r4 /* "old" stack as arg1 */\r
+#if defined(OLD_CALL) \r
lwz r4, 0x0(r6) /* Read the address from the for function/pcb entry */\r
+#else\r
+ mr r4,r5\r
+#endif \r
blrl /* Call the entry */\r
\r
/* Notes!\r
#if defined(__GNUC__) \r
.section ".exception_tbl","ax"\r
#elif defined(__CWCC__)\r
+#if defined(CFG_VLE)\r
+.section .exception_tbl,text_vle\r
+#else\r
.section .exception_tbl,4,"rw"\r
#endif\r
+#endif\r
.balign 0x1000\r
.global exception_tbl\r
\r
OUTPUT_ARCH(powerpc)\r
ENTRY(_start)\r
\r
-\r
+/*\r
+ * _idata - Start of .data in flash \r
+ * _data - start address of .data in RAM\r
+ * _edata - end address of .data in RAM\r
+ * _bss - start address of .bss\r
+ * _ebss - end address of .bss\r
+ * _etext - end of .text\r
+ * _end - End of something.... \r
+ * \r
+ * More stuff:\r
+ * \r
+ * _arc_heap_start\r
+ * _arc_heap_end\r
+ * _arc_stack\r
+ *\r
+ * Dwarf stuff: (same as Dwarf3 .debug_frame? )\r
+ * eh_frame_hdr (C++ only? unwind info for C++ exceptions?)\r
+ * eh_frame (C++ only?)\r
+ *\r
+ * Exception table:\r
+ * _exc_frame_start\r
+ * _exc_frame_end\r
+ *\r
+ * PowerPC EABI special:\r
+ * _SDA2_BASE_\r
+ * _SDA_BASE\r
+ */\r
\r
MEMORY\r
{\r
\r
.data : {\r
. = . + ALIGN(4);\r
- __DATA_RAM = .; *(.data .data.* .gnu.linkonce.d.* .gnu.linkonce.r.* .eh_frame)\r
+ __DATA_RAM = .; \r
+ *(.data .data.* .gnu.linkonce.d.* .gnu.linkonce.r.* .eh_frame)\r
} > ram AT> flash\r
\r
.sdata : {\r
__SBSS_START__ = .;\r
*(.sbss .sbss.* .scommon .gnu.linkonce.sb.* .t32_outport);\r
__SBSS_END__ = .;\r
+ _end = .;\r
} > ram\r
\r
- .got2 ALIGN(0x10): {. = . + ALIGN(16);*(.got2); . = . + ALIGN(8); } > ram\r
- .fixup : { . = . + ALIGN(16);*(.fixup); . = . + ALIGN(8); } > ram\r
- .t32_outport ALIGN(0x10): { *(.t32_outport); } > ram\r
- .got : AT(ALIGN(LOADADDR(.sdata)+SIZEOF(.sdata),4)) { *(.got.plt) *(.got) } > ram\r
- /* .bss : { *(.bss .bss.* COMMON .gnu.linkonce.b.*);__BSS_END = .; } > ram */\r
- .bss : AT(ADDR(.bss)) { *(.bss .bss.* COMMON .gnu.linkonce.b.*);__BSS_END = .; } > ram\r
- .init_stack ALIGN(16) (NOLOAD) : { __SP_END = .;. = . + 1000; __SP_INIT = .; } > ram\r
+ .got2 ALIGN(0x10): \r
+ {\r
+ . = . + ALIGN(16);\r
+ *(.got2); \r
+ . = . + ALIGN(8); \r
+ } > ram\r
+ .fixup : \r
+ { \r
+ . = . + ALIGN(16);\r
+ *(.fixup);\r
+ . = . + ALIGN(8); \r
+ } > ram\r
+ .t32_outport ALIGN(0x10): \r
+ { \r
+ *(.t32_outport); \r
+ } > ram\r
+ \r
+ .got : AT(ALIGN(LOADADDR(.sdata)+SIZEOF(.sdata),4)) \r
+ { \r
+ *(.got.plt) *(.got) \r
+ } > ram\r
+ \r
+ .bss : AT(ADDR(.bss)) \r
+ { \r
+ *(.bss .bss.* COMMON .gnu.linkonce.b.*);\r
+ __BSS_END = .; \r
+ } > ram\r
+ .init_stack ALIGN(16) (NOLOAD) : \r
+ { \r
+ __SP_END = .;\r
+ . = . + 1000; \r
+ __SP_INIT = .; \r
+ } > ram\r
+ \r
/* Fls RAM section */\r
.fls_ram ALIGN(16) (NOLOAD) : {\r
__FLS_ERASE_RAM__ = .;\r
. = . + SIZEOF(.fls_rom);\r
} > ram\r
+ \r
+ /* Always place last in RAM */\r
+ .heap ALIGN(0x4): {\r
+ PROVIDE(_heap_start = .);\r
+ } > ram\r
+ \r
\r
.ctors :\r
{\r
.debug_varnames 0 : { *(.debug_varnames) }\r
}\r
\r
+_heap_end = ORIGIN(ram) + LENGTH(ram);\r
+\r
__TEXT_START = ADDR(.text);\r
__RAM_START = ADDR(.sdata);\r
\r
#define CC_EXTENSION\r
#endif\r
\r
+#if defined(__GNUC__)\r
+#define SECTION_BALIGN(_align ) __attribute__ ((aligned (_align)))\r
+#elif defined(__CWCC__)\r
+#define SECTION_BALIGN(_align ) __attribute__ ((aligned (_align)))\r
+#endif\r
+\r
+\r
/* REQ:COMPILER005 */\r
/* TODO: skip the memclass for now */\r
#define FUNC(rettype,memclass) rettype\r
\r
#if defined(__GNUC__)\r
\r
- #define SECTION_RAMLOG __attribute__ ((section (".ramlog")))\r
+ #define SECTION_RAMLOG __attribute__ ((section (".ramlog")))\r
+\r
\r
#elif defined(__CWCC__)\r
\r
#pragma section RW ".ramlog" ".ramlog"\r
\r
- #define SECTION_RAMLOG __declspec(section ".ramlog")\r
+ #define SECTION_RAMLOG __declspec(section ".ramlog")\r
+\r
\r
#endif\r
\r
#ifndef BIT_H_\r
#define BIT_H_\r
\r
+#include <stdint.h>\r
/**\r
* @param aPtr Ptr to an array of unsigned chars.\r
* @param num The bit number to get.\r
\r
#if defined(_ASSEMBLER_)\r
/*\r
- * Misc macros\r
+ * PPC vs VLE assembler:\r
+ * Most PPC assembler instructions can be pre-processed to VLE assembler.\r
+ * I can't find any way to load a 32-bit immediate with just search/replace (number\r
+ * of operators differ for addis and e_add2is )\r
+ * Thats why there are different load macros below.\r
+ *\r
*/\r
+\r
+#if defined(CFG_VLE)\r
+#define LOAD_IND_32( reg, addr) \\r
+ lis reg, addr@ha; \\r
+ lwz reg, addr@l(reg)\r
+\r
+#define LOAD_ADDR_32(reg, addr ) \\r
+ e_add2is reg, addr@ha; \\r
+ e_add16i reg, reg, addr@l\r
+\r
+#else\r
#define LOAD_IND_32( reg, addr) \\r
lis reg, addr@ha; \\r
lwz reg, addr@l(reg)\r
addis reg, 0, addr@ha; \\r
addi reg, reg, addr@l\r
\r
+#endif\r
+\r
\r
\r
/* GPRS */\r
#define r29 29\r
#define r30 30\r
#define r31 31\r
+\r
+\r
+#if defined(CFG_VLE)\r
+\r
+#define lis e_lis\r
+#define li e_li\r
+#define lwz e_lwz\r
+#define lbzu e_lbzu\r
+#define stwu e_stwu\r
+#define stw e_stw\r
+#define stbu e_stbu\r
+#define b e_b\r
+//#define addi e_addi /* true ?*/\r
+#define addi e_add16i /* true ?*/\r
+//#define addis e_add16i\r
+#define subi e_subi /* true ?*/\r
+#define blr se_blr\r
+#define rfi se_rfi\r
+#define stb e_stb\r
+#define cmplwi e_cmpl16i\r
+#define ori e_ori\r
+#define beq e_beq\r
+//#define bne- e_bne-\r
+#define bne e_bne\r
+#define bgt e_bgt\r
+#define extrwi e_extrwi\r
+#define blrl se_blrl\r
+#define stmw e_stmw\r
+#define bdnz e_bdnz\r
+#define bl e_bl\r
#endif\r
\r
+#endif /* _ASSEMBLER_ */\r
+\r
#endif /*PPC_ASM_H_*/\r
include $(ROOTDIR)/scripts/version_check.mk\r
\r
# Check cross compiler setting against default from board config\r
+ifneq (${COMPILER},cw)\r
ifneq (${DEFAULT_CROSS_COMPILE},)\r
ifneq (${CROSS_COMPILE},${DEFAULT_CROSS_COMPILE})\r
${warning Not using default cross compiler for architecture.}\r
${warning DEFAULT_CROSS_COMPILE: ${DEFAULT_CROSS_COMPILE} [${origin DEFAULT_CROSS_COMPILE}]}\r
endif\r
endif\r
+endif\r
\r
###############################################################################\r
# MODULE CONFIGURATION #\r
@echo " >> Cleaning $(CURDIR)"\r
$(Q)-rm -f *.o *.d *.h *.elf *.a *.ldp *.tmp *.s *.c *.map\r
@echo\r
-\r
+ \r
.PHONY config: \r
config: FORCE\r
@echo "board modules:" $(MOD_AVAIL)\r