1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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27 * =================================================
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28 * We have two context's large and small. Large is saved on
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29 * interrupt and small is saved for everything else.
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34 * -------------------------------
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35 * 0--1 : context indicator, 0xde - small, 0xad - large
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41 * 16-- : General regs r14--r31
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44 * 16-- : General regs r0--r31
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51 #define SPR_CSRR0 58
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52 #define SPR_CSRR1 59
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54 #define SPR_SPRG0_RW_S 272
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55 #define SPR_SPRG1_RW_S 273
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60 #define SPR_SPEFSCR 512
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61 #define SPR_MCSR 572
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63 #define SPR_MAS0 624
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64 #define SPR_MAS1 625
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65 #define SPR_MAS2 626
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66 #define SPR_MAS3 627
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67 #define SPR_MAS4 628
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68 #define SPR_MAS6 630
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71 #define ESR_PTR (1<<(38-32))
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76 #define INTC_SSCIR7 0xFFF48027
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79 #define MAS1_TSIZE_4K (1<<8)
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80 #define MAS1_TSIZE_16K (2<<8)
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81 #define MAS1_TSIZE_64K (3<<8)
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82 #define MAS1_TSIZE_256K (4<<8)
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83 #define MAS1_TSIZE_1M (5<<8)
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84 #define MAS1_TSIZE_4M (6<<8)
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85 #define MAS1_TSIZE_16M (7<<8)
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86 #define MAS1_TSIZE_64M (8<<8)
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87 #define MAS1_TSIZE_256M (8<<9)
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89 #define MAS2_VLE (1<<5)
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90 #define MAS2_W (1<<4)
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91 #define MAS2_I (1<<3)
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92 #define MAS2_M (1<<2)
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93 #define MAS2_G (1<<1)
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94 #define MAS2_E (1<<0)
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96 #define MAS3_UX (1<<5)
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97 #define MAS3_SX (1<<4)
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98 #define MAS3_UW (1<<3)
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99 #define MAS3_SW (1<<2)
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100 #define MAS3_UR (1<<1)
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101 #define MAS3_SR (1<<0)
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103 #define MAS3_FULL_ACCESS (MAS3_UX+MAS3_UW+MAS3_UR+MAS3_SX+MAS3_SW+MAS3_SR)
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106 #if defined(_ASSEMBLER_)
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108 * PPC vs VLE assembler:
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109 * Most PPC assembler instructions can be pre-processed to VLE assembler.
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110 * I can't find any way to load a 32-bit immediate with just search/replace (number
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111 * of operators differ for addis and e_add2is )
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112 * Thats why there are different load macros below.
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116 #if defined(CFG_VLE)
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117 #define LOAD_IND_32( reg, addr) \
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118 e_lis reg, addr@ha; \
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119 e_lwz reg, addr@l(reg)
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121 #define LOAD_ADDR_32(reg, addr ) \
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122 e_lis reg, addr@ha; \
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123 e_add16i reg, reg, addr@l
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126 #define LOAD_IND_32( reg, addr) \
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127 lis reg, addr@ha; \
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128 lwz reg, addr@l(reg)
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130 #define LOAD_ADDR_32(reg, addr ) \
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131 addis reg, 0, addr@ha; \
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132 addi reg, reg, addr@l
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174 #if defined(CFG_VLE)
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180 #define lbzu e_lbzu
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181 #define stwu e_stwu
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184 #define stbu e_stbu
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187 //#define addi e_addi /* true ?*/
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188 #define addi e_add16i /* true ?*/
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189 //#define addis e_add16i
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190 #define subi e_subi /* true ?*/
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194 #define cmplwi e_cmpl16i
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195 #define cmpwi se_cmpi
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198 //#define bne- e_bne-
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201 #define extrwi e_extrwi
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202 #define blrl se_blrl
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203 #define stmw e_stmw
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204 #define bdnz e_bdnz
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210 #endif /* _ASSEMBLER_ */
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212 #endif /*PPC_ASM_H_*/
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