1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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18 * Freescale uses two flavors for DMA.
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22 * 1. eDMA only (MPC5557, etc)
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23 * The "DMA Request Assignments" are used and configured in Dma_Cfg.h using Dma_ChannelType.
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25 * 2. eDMA + DMA_MUX (MPC551x , MPC5668, etc )
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26 * The eDMA + DMA_MUX the "DMA Request Assignments" are just mappings from the DMA_MUX.
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27 * The file Dma.h contains the Dma_MuxChannels
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33 * MPC5605B,MPC5606B,MPC5607B
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47 #include "Std_Types.h"
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48 #include "Dma_Cfg.h"
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49 #include "mpc55xx.h"
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51 #if defined(CFG_MPC5516) || defined(CFG_MPC5517) || (CFG_MPC5606S) || defined(CFG_MPC5668)
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52 #if !defined(CFG_DMA_MUX)
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57 #if defined(CFG_DMA_MUX)
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59 #if defined(CFG_MPC5606S)
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62 DMA_CHANNEL_DISABLED,
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81 DMA_EMIOS200_0_FLAG_F0,
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82 DMA_EMIOS200_0_FLAG_F1,
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83 DMA_EMIOS200_0_FLAG_F2,
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84 DMA_EMIOS200_0_FLAG_F3,
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85 DMA_EMIOS200_0_FLAG_F4,
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86 DMA_EMIOS200_0_FLAG_F5,
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87 DMA_EMIOS200_0_FLAG_F6,
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88 DMA_EMIOS200_0_FLAG_F7,
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89 DMA_EMIOS200_0_FLAG_F8,
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90 DMA_EMIOS200_0_FLAG_F9,
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91 DMA_EMIOS200_0_FLAG_F10,
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92 DMA_EMIOS200_0_FLAG_F11,
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93 DMA_EMIOS200_0_FLAG_F12,
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94 DMA_EMIOS200_0_FLAG_F13,
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95 DMA_EMIOS200_0_FLAG_F14,
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96 DMA_EMIOS200_0_FLAG_F15,
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97 DMA_EMIOS200_1_FLAG_F0,
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98 DMA_EMIOS200_1_FLAG_F1,
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99 DMA_EMIOS200_1_FLAG_F2,
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100 DMA_EMIOS200_1_FLAG_F3,
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101 DMA_EMIOS200_1_FLAG_F4,
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102 DMA_EMIOS200_1_FLAG_F5,
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103 DMA_EMIOS200_1_FLAG_F6,
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104 DMA_EMIOS200_1_FLAG_F7,
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129 DMA_ALWAYS_REQUESTORS1,
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130 DMA_ALWAYS_REQUESTORS2,
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131 DMA_ALWAYS_REQUESTORS3,
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132 DMA_ALWAYS_REQUESTORS4,
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133 DMA_ALWAYS_REQUESTORS5,
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134 DMA_ALWAYS_REQUESTORS6,
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135 DMA_ALWAYS_REQUESTORS7,
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136 DMA_ALWAYS_REQUESTORS8
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139 #elif defined(CFG_MPC5668)
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141 /* Table 22-4. DMA Source Configuration */
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145 DMA_CHANNEL_DISABLED, /* 0 */
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146 DMA_CHANNEL_RESERVED,
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164 DMA_DSPI_A_SR_TFFF, /* 0x12 */
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165 DMA_DSPI_A_SR_RFRD,
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166 DMA_DSPI_B_SR_TFFF,
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167 DMA_DSPI_B_SR_RFRD,
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168 DMA_DSPI_E_SR_TFFF,
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169 DMA_DSPI_E_SR_RFRD,
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170 DMA_DSPI_F_SR_TFFF,
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171 DMA_DSPI_F_SR_RFRD,
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173 DMA_EMIOS200_FLAG_F0, /* 0x1a */
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174 DMA_EMIOS200_FLAG_F1,
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175 DMA_EMIOS200_FLAG_F2,
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176 DMA_EMIOS200_FLAG_F3,
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177 DMA_EMIOS200_FLAG_F4,
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178 DMA_EMIOS200_FLAG_F5,
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179 DMA_EMIOS200_FLAG_F6,
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180 DMA_EMIOS200_FLAG_F7,
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181 DMA_EMIOS200_FLAG_F8,
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182 DMA_EMIOS200_FLAG_F9,
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183 DMA_EMIOS200_FLAG_F10,
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184 DMA_EMIOS200_FLAG_F11,
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185 DMA_EMIOS200_FLAG_F12,
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186 DMA_EMIOS200_FLAG_F13,
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187 DMA_EMIOS200_FLAG_F14,
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188 DMA_EMIOS200_FLAG_F15,
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190 DMA_IIC_A_TX, /* 0x2a */
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195 DMA_SIU_EISR_EIF0, /* 0x2e */
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198 DMA_IIC_C_TX, /* 0x30 */
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203 DMA_IIC_D_TX, /* 0x33 */
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206 DMA_SCI_J_COMBTX, /* 0x35 */
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215 DMA_ALWAYS_ENABLED_0, /* 0x3d */
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216 DMA_ALWAYS_ENABLED_1,
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217 DMA_ALWAYS_ENABLED_2,
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220 #elif defined(CFG_MPC5516) || defined(CFG_MPC5517)
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221 /* MPC551x "Table 13-4. DMA Source Configuration" */
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225 DMA_CHANNEL_DISABLED,
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243 DMA_DSPI_A_SR_TFFF,
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244 DMA_DSPI_A_SR_RFRD,
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245 DMA_DSPI_B_SR_TFFF,
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246 DMA_DSPI_B_SR_RFRD,
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247 DMA_DSPI_C_SR_TFFF,
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248 DMA_DSPI_C_SR_RFRD,
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249 DMA_DSPI_D_SR_TFFF,
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250 DMA_DSPI_D_SR_RFRD,
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252 DMA_EMIOS200_FLAG_F0,
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253 DMA_EMIOS200_FLAG_F1,
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254 DMA_EMIOS200_FLAG_F2,
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255 DMA_EMIOS200_FLAG_F3,
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256 DMA_EMIOS200_FLAG_F4,
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257 DMA_EMIOS200_FLAG_F5,
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258 DMA_EMIOS200_FLAG_F6,
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259 DMA_EMIOS200_FLAG_F7,
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260 DMA_EMIOS200_FLAG_F8,
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261 DMA_EMIOS200_FLAG_F9,
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262 DMA_EMIOS200_FLAG_F10,
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263 DMA_EMIOS200_FLAG_F11,
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264 DMA_EMIOS200_FLAG_F12,
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265 DMA_EMIOS200_FLAG_F13,
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266 DMA_EMIOS200_FLAG_F14,
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267 DMA_EMIOS200_FLAG_F15,
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280 DMA_EQADC_FISR0_RFDF0,
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281 DMA_EQADC_FISR0_CFFF0,
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282 DMA_EQADC_FISR1_RFDF0,
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283 DMA_EQADC_FISR1_CFFF0,
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290 DMA_ALWAYS_ENABLED1,
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291 DMA_ALWAYS_ENABLED2,
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292 DMA_ALWAYS_ENABLED3,
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293 DMA_ALWAYS_ENABLED4,
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294 DMA_ALWAYS_ENABLED5,
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295 DMA_ALWAYS_ENABLED6,
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296 DMA_ALWAYS_ENABLED7,
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297 DMA_ALWAYS_ENABLED8
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304 #if defined(CFG_DMA_MUX)
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307 vuint8_t DMA_CHANNEL_ENABLE;
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308 vuint8_t DMA_CHANNEL_TRIG_ENABLE;
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309 Dma_MuxChannels DMA_CHANNEL_SOURCE;
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310 } Dma_MuxConfigType;
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315 vuint8_t DMA_CHANNEL_PRIORITY;
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316 vuint8_t DMA_CHANNEL_PREEMTION_ENABLE;
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317 }Dma_ChannelConfigType;
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321 DMA_TRANSFER_SIZE_8BITS,
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322 DMA_TRANSFER_SIZE_16BITS,
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323 DMA_TRANSFER_SIZE_32BITS,
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324 DMA_TRANSFER_SIZE_64BITS,
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325 DMA_TRANSFER_SIZE_16BYTES_BURST,
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326 DMA_TRANSFER_SIZE_32BYTES_BURST
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327 }Dma_DataTranferSizeType;
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331 DMA_FIXED_PRIORITY_ARBITRATION,
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332 DMA_ROUND_ROBIN_ARBITRATION
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333 }Dma_ChannelArbitrationType;
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337 // 5567 has no Dma Mux, but maybe this should be left in anyway?
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338 #if defined(CFG_DMA_MUX)
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339 const Dma_MuxConfigType *dmaMuxConfigPtr;
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341 const Dma_ChannelConfigType *dmaChannelConfigPtr;
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342 const Dma_ChannelArbitrationType dmaChannelArbitration;
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345 extern const Dma_ConfigType DmaConfig [];
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348 void Dma_Init (const Dma_ConfigType *ConfigPtr);
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349 void Dma_DeInit (void );
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350 void Dma_ConfigureChannel (Dma_TcdType *tcd, Dma_ChannelType channel);
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351 void Dma_ConfigureChannelTranferSize (uint32_t nbrOfIterations, Dma_ChannelType channel);
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352 void Dma_ConfigureChannelSourceCorr (uint32_t sourceCorrection, Dma_ChannelType channel);
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353 void Dma_ConfigureChannelDestinationCorr (uint32_t destinationCorrection, Dma_ChannelType channel);
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354 void Dma_ConfigureDestinationAddress (uint32_t destAddr, Dma_ChannelType channel);
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355 void Dma_ConfigureSourceAddress (uint32_t sourceAddr, Dma_ChannelType channel);
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356 void Dma_StartChannel (Dma_ChannelType channel);
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357 void Dma_StopChannel (Dma_ChannelType channel);
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358 Std_ReturnType Dma_ChannelDone (Dma_ChannelType channel);
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359 volatile Dma_TcdType * Dma_GetTcd( Dma_ChannelType channel );
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360 boolean Dma_CheckConfig( void );
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362 #endif /* DMA_H_ */
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