1 /* -------------------------------- Arctic Core ------------------------------
2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
6 * This source code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * -------------------------------- Arctic Core ------------------------------*/
24 ******************************************************************************
\r
26 * @author MCD Application Team
\r
29 * @brief This file provides all the miscellaneous firmware functions (add-on
\r
30 * to CMSIS functions).
\r
31 ******************************************************************************
\r
34 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
\r
35 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
\r
36 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
\r
37 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
\r
38 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
\r
39 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
\r
41 * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
\r
44 /* Includes ------------------------------------------------------------------*/
\r
47 #define assert_param(expr) ((void)0)
49 /** @addtogroup STM32F10x_StdPeriph_Driver
\r
54 * @brief MISC driver modules
\r
58 /** @defgroup MISC_Private_TypesDefinitions
\r
66 /** @defgroup MISC_Private_Defines
\r
70 #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
\r
75 /** @defgroup MISC_Private_Macros
\r
83 /** @defgroup MISC_Private_Variables
\r
91 /** @defgroup MISC_Private_FunctionPrototypes
\r
99 /** @defgroup MISC_Private_Functions
\r
104 * @brief Configures the priority grouping: pre-emption priority and subpriority.
\r
105 * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
\r
106 * This parameter can be one of the following values:
\r
107 * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
\r
108 * 4 bits for subpriority
\r
109 * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
\r
110 * 3 bits for subpriority
\r
111 * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
\r
112 * 2 bits for subpriority
\r
113 * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
\r
114 * 1 bits for subpriority
\r
115 * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
\r
116 * 0 bits for subpriority
\r
119 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
\r
121 /* Check the parameters */
\r
122 assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
\r
124 /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
\r
125 SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
\r
129 * @brief Initializes the NVIC peripheral according to the specified
\r
130 * parameters in the NVIC_InitStruct.
\r
131 * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
\r
132 * the configuration information for the specified NVIC peripheral.
\r
135 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
\r
137 uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
\r
139 /* Check the parameters */
\r
140 assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
\r
141 assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
\r
142 assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
\r
144 if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
\r
146 /* Compute the Corresponding IRQ Priority --------------------------------*/
\r
147 tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
\r
148 tmppre = (0x4 - tmppriority);
\r
149 tmpsub = tmpsub >> tmppriority;
\r
151 tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
\r
152 tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
\r
153 tmppriority = tmppriority << 0x04;
\r
155 NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
\r
157 /* Enable the Selected IRQ Channels --------------------------------------*/
\r
158 NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
\r
159 (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
\r
163 /* Disable the Selected IRQ Channels -------------------------------------*/
\r
164 NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
\r
165 (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
\r
170 * @brief Sets the vector table location and Offset.
\r
171 * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
\r
172 * This parameter can be one of the following values:
\r
173 * @arg NVIC_VectTab_RAM
\r
174 * @arg NVIC_VectTab_FLASH
\r
175 * @param Offset: Vector Table base offset field. This value must be a multiple of 0x100.
\r
178 void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
\r
180 /* Check the parameters */
\r
181 assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
\r
182 assert_param(IS_NVIC_OFFSET(Offset));
\r
184 SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
\r
188 * @brief Selects the condition for the system to enter low power mode.
\r
189 * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
\r
190 * This parameter can be one of the following values:
\r
191 * @arg NVIC_LP_SEVONPEND
\r
192 * @arg NVIC_LP_SLEEPDEEP
\r
193 * @arg NVIC_LP_SLEEPONEXIT
\r
194 * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
\r
197 void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
\r
199 /* Check the parameters */
\r
200 assert_param(IS_NVIC_LP(LowPowerMode));
\r
201 assert_param(IS_FUNCTIONAL_STATE(NewState));
\r
203 if (NewState != DISABLE)
\r
205 SCB->SCR |= LowPowerMode;
\r
209 SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
\r
214 * @brief Configures the SysTick clock source.
\r
215 * @param SysTick_CLKSource: specifies the SysTick clock source.
\r
216 * This parameter can be one of the following values:
\r
217 * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
\r
218 * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
\r
221 void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
\r
223 /* Check the parameters */
\r
224 assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
\r
225 if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
\r
227 SysTick->CTRL |= SysTick_CLKSource_HCLK;
\r
231 SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
\r
247 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
\r