boards/stm32_mcbstm32/config/Pwm_Cfg.h

   1 /* -------------------------------- Arctic Core ------------------------------\r
   2  * Arctic Core - the open source AUTOSAR platform http://arccore.com\r
   3  *\r
   4  * Copyright (C) 2009  ArcCore AB <contact@arccore.com>\r
   5  *\r
   6  * This source code is free software; you can redistribute it and/or modify it\r
   7  * under the terms of the GNU General Public License version 2 as published by the\r
   8  * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.\r
   9  *\r
  10  * This program is distributed in the hope that it will be useful, but\r
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
  12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License\r
  13  * for more details.\r
  14  * -------------------------------- Arctic Core ------------------------------*/\r
  15 \r
  16 /*\r
  17  * Pwm_Cfg.h\r
  18  *\r
  19  *  Created on: 2009-okt-02\r
  20  *      Author: jonte\r
  21  */\r
  22 #warning "This default file may only be used as an example!"\r
  23 \r
  24 #ifndef PWM_CFG_H_\r
  25 #define PWM_CFG_H_\r
  26 \r
  27 /****************************************************************************\r
  28  * Global configuration options and defines\r
  29  */\r
  30 /*\r
  31  * PWM003: The detection of development errors is configurable (STD_ON/STD_OFF) at\r
  32  * pre-compile time. The switch PwmDevErorDetect shall activate or disable\r
  33  * the detection of all development errors\r
  34  */\r
  35 #define PWM_DEV_EROR_DETECT                     STD_ON\r
  36 #define PWM_GET_OUTPUT_STATE                    STD_ON\r
  37 #define PWM_STATICALLY_CONFIGURED               STD_OFF\r
  38 #define PWM_NOTIFICATION_SUPPORTED      STD_ON\r
  39 \r
  40 #define PWM_SET_PERIOD_AND_DUTY                 STD_ON\r
  41 \r
  42 /*\r
  43  * PWM132: Switch for enabling the update of duty cycle parameter at the end\r
  44  * of the current period.\r
  45  *\r
  46  * Note: Currently only STD_ON mode is supported.\r
  47  */\r
  48 #define PWM_DUTYCYCLE_UPDATED_ENDPERIOD STD_ON\r
  49 \r
  50 /*\r
  51  * Setting to STD_ON freezes the current output state of a PWM channel when in\r
  52  * debug mode.\r
  53  */\r
  54 #define PWM_FREEZE_ENABLE STD_ON\r
  55 \r
  56 typedef uint16 Pwm_PeriodType;\r
  57 \r
  58 /*\r
  59  * PWM106: This is implementation specific but not all values may be valid\r
  60  * within the type. This shall be chosen in order to have the most efficient\r
  61  * implementation on a specific microcontroller platform.\r
  62  *\r
  63  * PWM106 => Pwm_ChannelType == eemios channel id.\r
  64  */\r
  65 typedef enum {\r
  66   PWM_CHANNEL_11 = 0, // TIM1 Channel 1\r
  67   PWM_CHANNEL_12,\r
  68   PWM_CHANNEL_13,\r
  69   PWM_CHANNEL_14,\r
  70   PWM_CHANNEL_21,     // TIM2 Channel 1\r
  71   PWM_CHANNEL_22,\r
  72   PWM_CHANNEL_23,\r
  73   PWM_CHANNEL_24,\r
  74   PWM_CHANNEL_31,     // TIM3 Channel 1\r
  75   PWM_CHANNEL_32,\r
  76   PWM_CHANNEL_33,\r
  77   PWM_CHANNEL_34,\r
  78   PWM_CHANNEL_41,     // TIM4 Channel 1\r
  79   PWM_CHANNEL_42,\r
  80   PWM_CHANNEL_43,\r
  81   PWM_CHANNEL_44,\r
  82   PWM_TOTAL_NOF_CHANNELS,\r
  83 } Pwm_ChannelType;\r
  84 \r
  85 /****************************************************************************\r
  86  * Enumeration of channels\r
  87  * Maps a symbolic name to a hardware channel\r
  88  */\r
  89 typedef enum {\r
  90     PWM_CHANNEL_1 = PWM_CHANNEL_23, //PB10\r
  91     PWM_CHANNEL_2 = PWM_CHANNEL_24, //PB11\r
  92     PWM_NUMBER_OF_CHANNELS = 2\r
  93 } Pwm_NamedChannelsType;\r
  94 \r
  95 \r
  96 /* NEW NEW */\r
  97 \r
  98 typedef enum {\r
  99         PWM_CHANNEL_PRESCALER_1=0,\r
 100         PWM_CHANNEL_PRESCALER_2,\r
 101         PWM_CHANNEL_PRESCALER_3,\r
 102         PWM_CHANNEL_PRESCALER_4,\r
 103 } Pwm_ChannelPrescalerType;\r
 104 \r
 105 #define DUTY_AND_PERIOD(_duty,_period) .duty = (_duty*_period)>>15, .period = _period\r
 106 \r
 107 typedef struct {\r
 108         /* Number of duty ticks */\r
 109         uint32_t                 duty:32;\r
 110         /* Length of period, in ticks */\r
 111         uint32_t                 period:32;\r
 112         /* Counter */\r
 113         uint32_t                 counter:32;\r
 114         /* Enable freezing the channel when in debug mode */\r
 115         uint32_t                 freezeEnable:1;\r
 116         /* Disable output */\r
 117         uint32_t                 outputDisable:1;\r
 118         /* Select which bus disables the bus\r
 119          * TODO: Figure out how this works, i.e. what bus does it refer to? */\r
 120         uint32_t                                 outputDisableSelect:2;\r
 121         /* Prescale the emios clock some more? */\r
 122         Pwm_ChannelPrescalerType prescaler:2;\r
 123         /* Prescale the emios clock some more? */\r
 124         uint32_t                                 usePrescaler:1;\r
 125         /* Whether to use DMA. Currently unsupported */\r
 126         uint32_t                                 useDma:1;\r
 127         uint32_t                                 reserved_2:1;\r
 128         /* Input filter. Ignored in output mode. */\r
 129         uint32_t                                 inputFilter:4;\r
 130         /* Input filter clock source. Ignored in output mode */\r
 131         uint32_t                                 filterClockSelect:1;\r
 132         /* Enable interrupts/flags on this channel? Required for DMA as well. */\r
 133         uint32_t                                 flagEnable:1;\r
 134         uint32_t                                 reserved_3:3;\r
 135         /* Trigger a match on channel A */\r
 136         uint32_t                                 forceMatchA:1;\r
 137         /* Triggers a match on channel B */\r
 138         uint32_t                                 forceMatchB:1;\r
 139         uint32_t                                 reserved_4:1;\r
 140         /* We can use different buses for the counter. Use the internal counter */\r
 141         uint32_t                                 busSelect:2;\r
 142         /* What edges to flag on? */\r
 143         uint32_t                                 edgeSelect:1;\r
 144         /* Polarity of the channel */\r
 145         uint32_t                                 edgePolarity:1;\r
 146         /* EMIOS mode. 0x58 for buffered output PWM */\r
 147         uint32_t                                 mode:7;\r
 148 } Pwm_ChannelRegisterType;\r
 149 \r
 150 typedef struct {\r
 151         Pwm_ChannelRegisterType r;\r
 152         Pwm_ChannelType channel;\r
 153 } Pwm_ChannelConfigurationType;\r
 154 \r
 155 \r
 156 typedef struct {\r
 157         Pwm_ChannelConfigurationType Channels[PWM_NUMBER_OF_CHANNELS];\r
 158 #if PWM_NOTIFICATION_SUPPORTED==STD_ON\r
 159         Pwm_NotificationHandlerType NotificationHandlers[PWM_NUMBER_OF_CHANNELS];\r
 160 #endif\r
 161 } Pwm_ConfigType;\r
 162 \r
 163 // Channel configuration macro.\r
 164 #define PWM_CHANNEL_CONFIG(_hwchannel, _period, _duty, _prescaler, _polarity) \\r
 165     {\\r
 166         .channel = _hwchannel,\\r
 167         .r = {\\r
 168             DUTY_AND_PERIOD(_duty, _period),\\r
 169             .freezeEnable = 1,\\r
 170             .outputDisable = 0,\\r
 171             .usePrescaler = 1,\\r
 172             .prescaler = _prescaler,\\r
 173             .useDma = 0,\\r
 174             .flagEnable = 0, /* See PWM052 */ \\r
 175             .busSelect = 3, /* Use the internal counter bus */\\r
 176             .edgePolarity = _polarity,\\r
 177             .mode = 0\\r
 178         }\\r
 179     }\r
 180 \r
 181 #endif /*PWM_CFG_H_*/\r