1 /* -------------------------------- Arctic Core ------------------------------
2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
6 * This source code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by the
8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * -------------------------------- Arctic Core ------------------------------*/
17 #warning "This default file may only be used as an example!"
22 #define MCU_DEV_ERROR_DETECT STD_ON
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23 #define MCU_PERFORM_RESET_API STD_ON
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24 #define MCU_VERSION_INFO_API STD_ON
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26 #include "Std_Types.h"
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28 #define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001)
29 #define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002)
30 #define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004)
31 #define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010)
32 #define RCC_AHBPeriph_CRC ((uint32_t)0x00000040)
35 #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100)
36 #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400)
38 #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000)
39 #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000)
40 #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000)
41 #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000)
44 #define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
45 #define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
46 #define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
47 #define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
48 #define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
49 #define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
50 #define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
51 #define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
52 #define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
53 #define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
54 #define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
55 #define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
56 #define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
57 #define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
58 #define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
59 #define RCC_APB1Periph_USB ((uint32_t)0x00800000)
60 #define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
61 #define RCC_APB1Periph_BKP ((uint32_t)0x08000000)
62 #define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
63 #define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
64 #define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
66 #define RCC_APB2Periph_AFIO ((uint32_t)0x00000001)
67 #define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004)
68 #define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008)
69 #define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010)
70 #define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020)
71 #define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040)
72 #define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080)
73 #define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100)
74 #define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200)
75 #define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400)
76 #define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800)
77 #define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
78 #define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000)
79 #define RCC_APB2Periph_USART1 ((uint32_t)0x00004000)
80 #define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000)
83 uint32 AHBClocksEnable;
84 uint32 APB1ClocksEnable;
85 uint32 APB2ClocksEnable;
86 } Mcu_PerClockConfigType;
88 extern const Mcu_PerClockConfigType McuPerClockConfigData;
91 MCU_CLOCKTYPE_EXT_REF_8MHZ = 0,
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95 #define MCU_DEFAULT_CONFIG McuConfigData[0]
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97 #endif /*MCU_CFG_H_*/
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