1 /* -------------------------------- Arctic Core ------------------------------
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2 * Arctic Core - the open source AUTOSAR platform http://arccore.com
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4 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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6 * This source code is free software; you can redistribute it and/or modify it
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7 * under the terms of the GNU General Public License version 2 as published by the
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8 * Free Software Foundation; See <http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt>.
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10 * This program is distributed in the hope that it will be useful, but
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11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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14 * -------------------------------- Arctic Core ------------------------------*/
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19 #warning "This default file may only be used as an example!"
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21 #include "Std_Types.h"
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23 /** Build version info API */
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24 #define PORT_VERSION_INFO_API STD_ON /** @req PORT100 PORT101 */
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25 /** Enable Development Error Trace */
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26 #define PORT_DEV_ERROR_DETECT STD_ON
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27 /** Build change pin direction API */
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28 #define PORT_SET_PIN_DIRECTION_API STD_ON
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29 /** Allow Pin mode changes during runtime (not avail on this CPU) */
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30 #define PORT_SET_PIN_MODE_API STD_ON
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32 /** Parameter to enable/disable configuration on a port */
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33 #define PORTA_CONFIGURABLE STD_OFF
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34 #define PORTB_CONFIGURABLE STD_OFF
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35 #define PORTE_CONFIGURABLE STD_OFF
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36 #define PORTK_CONFIGURABLE STD_OFF
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37 #define PORTH_CONFIGURABLE STD_ON
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38 #define PORTJ_CONFIGURABLE STD_OFF
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39 #define PORTM_CONFIGURABLE STD_OFF
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40 #define PORTP_CONFIGURABLE STD_OFF
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41 #define PORTS_CONFIGURABLE STD_OFF
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42 #define PORTT_CONFIGURABLE STD_OFF
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44 #define PORT_A_BASE 0x0100
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45 #define PORT_B_BASE 0x0200
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46 #define PORT_E_BASE 0x0300
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47 #define PORT_K_BASE 0x0400
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48 #define PORT_H_BASE 0x0500
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49 #define PORT_J_BASE 0x0600
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50 #define PORT_M_BASE 0x0700
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51 #define PORT_P_BASE 0x0800
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52 #define PORT_S_BASE 0x0900
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53 #define PORT_T_BASE 0x0A00
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54 #define PORT_BITMASK 0x00FF
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55 #define PORT_BASEMASK 0xFF00;
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57 /** HW specific symbolic names of pins */
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61 PORT_PA0 = PORT_A_BASE,
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69 PORT_PB0 = PORT_B_BASE,
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77 PORT_PE0 = PORT_E_BASE,
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85 PORT_PH0 = PORT_H_BASE,
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93 PORT_PJ0 = PORT_J_BASE,
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101 PORT_PK0 = PORT_K_BASE,
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109 PORT_PM0 = PORT_M_BASE,
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117 PORT_PP0 = PORT_P_BASE,
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125 PORT_PS0 = PORT_S_BASE,
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133 PORT_PT0 = PORT_T_BASE,
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143 /** @req PORT124 */
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144 //typedef uint8 Port_PinModeType;
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146 /** Top level configuration container */
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147 /** @req PORT073 */
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150 const uint8_t corePullUpRegister; // PUCR
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151 const uint8_t coreReducedDriveRegister; // RDRIV
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152 const uint8_t modeRoutingRegister; // MODRR
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156 * a direction (input or output)
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157 * a default out value
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158 * a mask that is 0 if the direction is allowed to change during runtime
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161 * a reduced drive conf (power saving)
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162 * a pull enable conf (enable pull-up/pull-down
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163 * a pull direction conf (pull-up or pull-down)
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164 * a wired mode (enable open drain outputs)
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166 #if ( PORTA_CONFIGURABLE == STD_ON )
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167 const uint8_t portADirection;
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168 const uint8_t portAOutValue;
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169 const uint8_t portAMask;
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172 #if ( PORTB_CONFIGURABLE == STD_ON )
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173 const uint8_t portBDirection;
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174 const uint8_t portBOutValue;
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175 const uint8_t portBMask;
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178 #if ( PORTE_CONFIGURABLE == STD_ON )
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179 const uint8_t portEDirection;
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180 const uint8_t portEOutValue;
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181 const uint8_t portEMask;
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184 #if ( PORTK_CONFIGURABLE == STD_ON )
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185 const uint8_t portKDirection;
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186 const uint8_t portKOutValue;
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187 const uint8_t portKMask;
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190 #if ( PORTH_CONFIGURABLE == STD_ON )
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191 const uint8_t portHDirection;
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192 const uint8_t portHOutValue;
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193 const uint8_t portHMask;
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194 const uint8_t portHPullEnableRegister;
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195 const uint8_t portHPullPolarityRegsiter;
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196 const uint8_t portHReducedDriveRegister;
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199 #if ( PORTJ_CONFIGURABLE == STD_ON )
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200 const uint8_t portJDirection;
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201 const uint8_t portJOutValue;
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202 const uint8_t portJMask;
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203 const uint8_t portJPullEnableRegister;
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204 const uint8_t portJPullPolarityRegsiter;
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205 const uint8_t portJReducedDriveRegister;
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208 #if ( PORTM_CONFIGURABLE == STD_ON )
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209 const uint8_t portMDirection;
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210 const uint8_t portMOutValue;
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211 const uint8_t portMMask;
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212 const uint8_t portMPullEnableRegister;
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213 const uint8_t portMPullPolarityRegsiter;
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214 const uint8_t portMWiredModeRegsiter;
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215 const uint8_t portMReducedDriveRegister;
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218 #if ( PORTP_CONFIGURABLE == STD_ON )
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219 const uint8_t portPDirection;
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220 const uint8_t portPOutValue;
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221 const uint8_t portPMask;
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222 const uint8_t portPPullEnableRegister;
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223 const uint8_t portPPullPolarityRegsiter;
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224 const uint8_t portPReducedDriveRegister;
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227 #if ( PORTS_CONFIGURABLE == STD_ON )
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228 const uint8_t portSDirection;
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229 const uint8_t portSOutValue;
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230 const uint8_t portSMask;
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231 const uint8_t portSPullEnableRegister;
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232 const uint8_t portSPullPolarityRegsiter;
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233 const uint8_t portSWiredModeRegsiter;
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234 const uint8_t portSReducedDriveRegister;
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237 #if ( PORTT_CONFIGURABLE == STD_ON )
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238 const uint8_t portTDirection;
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239 const uint8_t portTOutValue;
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240 const uint8_t portTMask;
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241 const uint8_t portTPullEnableRegister;
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242 const uint8_t portTPullPolarityRegsiter;
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243 const uint8_t portTReducedDriveRegister;
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247 /** Instance of the top level configuration container */
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248 extern const Port_ConfigType PortConfigData;
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250 #endif /*PORT_CFG_H_*/
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