2 * Copyright (C) 2009 ArcCore AB <contact@arccore.com>
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5 #include "Calibration_Settings.h"
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6 /* Undef sections/keywords */
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9 OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")
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10 OUTPUT_ARCH(powerpc)
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14 * _idata - Start of .data in flash
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15 * _data - start address of .data in RAM
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16 * _edata - end address of .data in RAM
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17 * _bss - start address of .bss
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18 * _ebss - end address of .bss
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19 * _etext - end of .text
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20 * _end - End of something....
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28 * Dwarf stuff: (same as Dwarf3 .debug_frame? )
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29 * eh_frame_hdr (C++ only? unwind info for C++ exceptions?)
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30 * eh_frame (C++ only?)
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36 * PowerPC EABI special:
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43 #include "memory.ldf"
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50 /* __CALIB_RAM_START, __CALIB_RAM_END, __CALIB_ROM_START are needed by the a2l and the rte generator.
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51 CALIBRATION_ENABLED, CALIBRATION_INITIALIZED_RAM, CALIBRATION_FLS_START are generated by rte
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53 #if defined(CALIBRATION_ENABLED)
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54 #if defined(CALIBRATION_INITIALIZED_RAM)
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55 /* when calibration is active a flash and ram area is needed. the rte will copy the calibration area from flash to ram. */
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56 .calibration : AT(CALIBRATION_FLS_START) {
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59 #else /* CALIBRATION_INITIALIZED_RAM */
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60 /* when calibration isnt active only a flash area is needed. */
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61 .calibration CALIBRATION_FLS_START : {
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66 __CALIB_RAM_START = ADDR(.calibration);
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67 __CALIB_RAM_END = ADDR(.calibration) + SIZEOF(.calibration);
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68 __CALIB_ROM_START = LOADADDR(.calibration);
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70 /* failsafe to avoid trouble with defined calib variables if CALIBRATION_ENABLED is not set */
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74 ASSERT(SIZEOF(.calibration) == 0, ".calibration section used but CALIBRATION_ENABLED is undefined")
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75 #endif /* CALIBRATION_ENABLED */
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78 #if defined(USE_FEE)
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79 #include "Fee_Memory_Cfg.h"
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81 .fee_bank1 FEE_BANK1_OFFSET : {
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82 . = . + FEE_BANK1_LENGTH;
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85 .fee_bank2 FEE_BANK2_OFFSET : {
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86 . = . + FEE_BANK2_LENGTH;
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90 #if defined(USE_FEE) || defined(CALIBRATION_ENABLED)
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91 /* Place the rest of the code is in another flash partition that the calibration and fee banks. */
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92 __FLS_PROG_START__ = 0x20000; /* Must be aligned to a sector start. */
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95 __FLS_PROG_START__ = 0; /* Must be aligned to a sector start. */
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98 #if !defined(CFG_BOOT)
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99 .rcw __FLS_PROG_START__ : { *(.rcw) } > flash
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105 *(.text .text.* .init .fini* .eini* .gnu.linkonce* .gnu.warning);
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106 PROVIDE( btask_sup_matrix = .);
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107 SORT(*)(.test_btask);
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108 PROVIDE( etask_sup_matrix = .);
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109 SORT(*)(.test_etask);
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113 __FLS_ERASE_ROM__ = .;
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115 __FLS_WRITE_ROM__ = .;
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117 __FLS_END_ROM__ = .;
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120 /* mpc5554, align 64K. mpc5516, 4k */
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121 .exception_tbl ALIGN(0x10000) :
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126 /* Read-only data section. */
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128 *(.rodata .rodata.* .gnu.linkonce.r.*);
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129 *(.got.plt) *(.got)
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132 /* initialized read-only small data section. */
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134 _SDA2_BASE_ = .; /* r2 */
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135 *(.sdata2 .sdata2.* .gnu.linkonce.s2.*);
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136 *(PPC.EMB.sdata2 .PPC.EMB.sbss2)
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140 /* uninitialized read-only small data section. */
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142 *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*);
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146 #if defined(CFG_MPC5516)
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147 .McuE_LowPowerRecoverFlash 0x000ff000: {
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150 .lowpower_vector 0x000ffffc: {
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151 *(.lowpower_vector);
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158 *(.data .data.* .gnu.linkonce.d.* .gnu.linkonce.r.* .eh_frame)
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163 __SDATA_START__ = .;
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164 _SDA_BASE_ = .; /* r13 */
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165 *(.sdata .sdata.* .gnu.linkonce.s.*)
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166 *(PPC.EMB.sdata2 .PPC.EMB.sbss2)
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172 __SBSS_START__ = .;
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173 *(.sbss .sbss.* .scommon .gnu.linkonce.sb.* .t32_outport);
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178 .t32_outport ALIGN(0x10):
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187 *(.bss .bss.* COMMON .gnu.linkonce.b.*);
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191 .init_stack ALIGN(16) (NOLOAD) :
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198 /* Fls RAM section */
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199 .fls_ram ALIGN(16) (NOLOAD) : {
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200 __FLS_ERASE_RAM__ = .;
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201 . = . + SIZEOF(.fls_rom);
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205 KEEP (*(SORT(.ctors.*)))
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208 .uninit ALIGN(0x10) (NOLOAD) : { *(.winidea_port .ramlog .dem_eventmemory_pri) ; } > ram
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210 /* Always place last in RAM */
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211 .heap ALIGN(0x4): {
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212 PROVIDE(_heap_start = .);
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216 __FLS_SIZE__ = SIZEOF(.fls_rom);
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217 __FLS_WRITE_RAM__ = __FLS_ERASE_RAM__ + (__FLS_WRITE_ROM__ - __FLS_ERASE_ROM__);
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219 /* Stabs debugging sections. */
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220 .stab 0 : { *(.stab) }
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221 .stabstr 0 : { *(.stabstr) }
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222 .stab.excl 0 : { *(.stab.excl) }
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223 .stab.exclstr 0 : { *(.stab.exclstr) }
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224 .stab.index 0 : { *(.stab.index) }
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225 .stab.indexstr 0 : { *(.stab.indexstr) }
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226 .comment 0 : { *(.comment) }
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227 /* DWARF debug sections.
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228 Symbols in the DWARF debugging sections are relative to the beginning
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229 of the section so we begin them at 0. */
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231 .debug 0 : { *(.debug) }
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232 .line 0 : { *(.line) }
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233 /* GNU DWARF 1 extensions */
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234 .debug_srcinfo 0 : { *(.debug_srcinfo) }
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235 .debug_sfnames 0 : { *(.debug_sfnames) }
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236 /* DWARF 1.1 and DWARF 2 */
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237 .debug_aranges 0 : { *(.debug_aranges) }
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238 .debug_pubnames 0 : { *(.debug_pubnames) }
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240 .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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241 .debug_abbrev 0 : { *(.debug_abbrev) }
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242 .debug_line 0 : { *(.debug_line) }
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243 .debug_frame 0 : { *(.debug_frame) }
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244 .debug_str 0 : { *(.debug_str) }
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245 .debug_loc 0 : { *(.debug_loc) }
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246 .debug_macinfo 0 : { *(.debug_macinfo) }
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247 /* SGI/MIPS DWARF 2 extensions */
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248 .debug_weaknames 0 : { *(.debug_weaknames) }
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249 .debug_funcnames 0 : { *(.debug_funcnames) }
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250 .debug_typenames 0 : { *(.debug_typenames) }
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251 .debug_varnames 0 : { *(.debug_varnames) }
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254 _heap_end = ORIGIN(ram) + LENGTH(ram);
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256 __TEXT_START = ADDR(.text);
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257 __RAM_START = ADDR(.sdata);
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259 __DATA_RAM = ADDR(.data);
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260 __DATA_ROM = LOADADDR(.data);
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261 /*__DATA_END = ADDR(.sdata)+SIZEOF(.sdata);*/
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262 /*__BSS_START = ADDR(.sbss);*/
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263 __BSS_START = ADDR(.sbss);
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265 /* _SDA_BASE_ and _SDA2_BASE_ is defined in e500 ABI
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266 * Some of the symbols below is used by eabi() that does interesting.
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267 * Can't get rid of it even with no-eabi option
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270 /* __SBSS_END__ = ADDR(.sbss) + SIZEOF(.sbss); */
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271 __SDATA2_START__ = ADDR(.sdata2);
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272 __SBSS2_END__ = ADDR(.sbss2) + SIZEOF(.sbss2);
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273 //__GOT_START__ = ADDR(.got);
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274 //__GOT_END__ = ADDR(.got) + SIZEOF(.got);
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275 //__GOT2_START__ = ADDR(.got2);
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276 //__GOT2_END__ = ADDR(.got2) + SIZEOF(.got2);
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277 //__FIXUP_START__ = ADDR(.fixup);
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278 //__FIXUP_END__ = ADDR(.fixup) + SIZEOF(.fixup);
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280 __EXCEPT_START__ = 0x0;
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281 __EXCEPT_END__ = 0x0;
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