Use of EXR interrupts is now configurable through config.omk.

EXR is enable by default, which is different from previous
configuration. Applications should not see any differences.

darcs-hash:20060814065620-f2ef6-aca4e7fafd623e531cd2918ee781fa43bcc88b0f.gz

diff --git a/arch/h8300/generic/defines/Makefile.omk b/arch/h8300/generic/defines/Makefile.omk
index 176b8a66429ec13e4ca298003731cc6fbb7cdd13..bd7465d76d899acabf9c032bf901085df76a1ade 100644 (file)
--- a/arch/h8300/generic/defines/Makefile.omk
+++ b/arch/h8300/generic/defines/Makefile.omk
@@ -1,2 +1,6 @@
 # -*- makefile -*-
 include_HEADERS = $(notdir $(wildcard $(SOURCES_DIR)/*.h))
+
+default_CONFIG = CONFIG_USE_EXR_LEVELS=y
+config_include_HEADERS = h8300config.h
+h8300config_DEFINES = CONFIG_USE_EXR_LEVELS

diff --git a/arch/h8300/generic/defines/cpu_def.h b/arch/h8300/generic/defines/cpu_def.h
index 24ab58cb13dfe694d5db5096dff65c673fd7e177..68516b7246e4642b9d47d5f7b538f2d2263ea3bb 100644 (file)
--- a/arch/h8300/generic/defines/cpu_def.h
+++ b/arch/h8300/generic/defines/cpu_def.h
@@ -15,6 +15,8 @@
 #ifndef _H8S_CPU_DEF_H
 #define _H8S_CPU_DEF_H
 
+#include <h8300config.h>
+
 /* atomic access routines */
 
 /* There should be possible to generate more optimized code
@@ -222,9 +224,7 @@
 
 /* IRQ handling code */
 
-//#define _USE_EXR_LEVELS 1
-
-#ifdef _USE_EXR_LEVELS
+#ifdef CONFIG_USE_EXR_LEVELS
 
 #define __sti() __asm__ __volatile__ ("andc #0xf8,exr": : : "memory")
 
@@ -244,7 +244,7 @@
   }while(0)
 
 
-#else /* _USE_EXR_LEVELS */
+#else /* CONFIG_USE_EXR_LEVELS */
 
 #define __sti() __asm__ __volatile__ ("andc #0x7f,ccr": : : "memory")
 
@@ -263,7 +263,7 @@
     __asm__ __volatile__("ldc %0,ccr": :"m" (__ccr) :"cc","memory"); \
   }while(0)
 
-#endif /* _USE_EXR_LEVELS */
+#endif /* CONFIG_USE_EXR_LEVELS */
 
 #define __get_vbr(x) 0
 

diff --git a/arch/h8300/generic/defines/more/cpu_def.h.with_U b/arch/h8300/generic/defines/more/cpu_def.h.with_U
index 75968263a786bf2cb0afd78c0ef24fb5589c9ca7..fcf3363d256d1ee09dcbb69f81c9b17376e8bb9d 100644 (file)
--- a/arch/h8300/generic/defines/more/cpu_def.h.with_U
+++ b/arch/h8300/generic/defines/more/cpu_def.h.with_U
@@ -144,9 +144,7 @@
 
 /* IRQ handling code */
 
-//#define _USE_EXR_LEVELS 1
-
-#ifdef _USE_EXR_LEVELS
+#ifdef CONFIG_USE_EXR_LEVELS
 
 #define __sti() __asm__ __volatile__ ("andc #0xf8,exr": : : "memory")
 
@@ -166,7 +164,7 @@
   }while(0)
 
 
-#else /* _USE_EXR_LEVELS */
+#else /* CONFIG_USE_EXR_LEVELS */
 
 #define __sti() __asm__ __volatile__ ("andc #0x7f,ccr": : : "memory")
 
@@ -185,7 +183,7 @@
     __asm__ __volatile__("ldc %0,ccr": :"m" (__ccr) :"cc","memory"); \
   }while(0)
 
-#endif /* _USE_EXR_LEVELS */
+#endif /* CONFIG_USE_EXR_LEVELS */
 
 #define __get_vbr(x) 0
 

diff --git a/arch/h8300/generic/defines/more/cpu_def.h.with_r b/arch/h8300/generic/defines/more/cpu_def.h.with_r
index 3f2ea97cfca7edb0ee724f4541ca1e6e96e13aee..31dbc835399a4e56566e3dd6ee9784b5dfcd1b0c 100644 (file)
--- a/arch/h8300/generic/defines/more/cpu_def.h.with_r
+++ b/arch/h8300/generic/defines/more/cpu_def.h.with_r
@@ -144,9 +144,7 @@
 
 /* IRQ handling code */
 
-//#define _USE_EXR_LEVELS 1
-
-#ifdef _USE_EXR_LEVELS
+#ifdef CONFIG_USE_EXR_LEVELS
 
 #define __sti() __asm__ __volatile__ ("andc #0xf8,exr": : : "memory")
 
@@ -166,7 +164,7 @@
   }while(0)
 
 
-#else /* _USE_EXR_LEVELS */
+#else /* CONFIG_USE_EXR_LEVELS */
 
 #define __sti() __asm__ __volatile__ ("andc #0x7f,ccr": : : "memory")
 
@@ -185,7 +183,7 @@
     __asm__ __volatile__("ldc %0,ccr": :"m" (__ccr) :"cc","memory"); \
   }while(0)
 
-#endif /* _USE_EXR_LEVELS */
+#endif /* CONFIG_USE_EXR_LEVELS */
 
 #define __get_vbr(x) 0
 

diff --git a/arch/h8300/generic/defines/more/cpu_def.h.with_ri b/arch/h8300/generic/defines/more/cpu_def.h.with_ri
index 85a568d6b0a4a367ec759963312b592ea6e0f356..643f10bcd89ef3dbad43231ad828b20095089802 100644 (file)
--- a/arch/h8300/generic/defines/more/cpu_def.h.with_ri
+++ b/arch/h8300/generic/defines/more/cpu_def.h.with_ri
@@ -180,9 +180,7 @@
 
 /* IRQ handling code */
 
-//#define _USE_EXR_LEVELS 1
-
-#ifdef _USE_EXR_LEVELS
+#ifdef CONFIG_USE_EXR_LEVELS
 
 #define __sti() __asm__ __volatile__ ("andc #0xf8,exr": : : "memory")
 
@@ -202,7 +200,7 @@
   }while(0)
 
 
-#else /* _USE_EXR_LEVELS */
+#else /* CONFIG_USE_EXR_LEVELS */
 
 #define __sti() __asm__ __volatile__ ("andc #0x7f,ccr": : : "memory")
 
@@ -221,7 +219,7 @@
     __asm__ __volatile__("ldc %0,ccr": :"m" (__ccr) :"cc","memory"); \
   }while(0)
 
-#endif /* _USE_EXR_LEVELS */
+#endif /* CONFIG_USE_EXR_LEVELS */
 
 #define __get_vbr(x) 0
 

diff --git a/arch/h8300/generic/defines/more/cpu_def.h.with_ricase b/arch/h8300/generic/defines/more/cpu_def.h.with_ricase
index e633262012336d5ed006191ecd17ec53e26655c2..9a9be48a1606f86730fb8664d2fef0f47dc14c76 100644 (file)
--- a/arch/h8300/generic/defines/more/cpu_def.h.with_ricase
+++ b/arch/h8300/generic/defines/more/cpu_def.h.with_ricase
@@ -191,9 +191,7 @@
 
 /* IRQ handling code */
 
-//#define _USE_EXR_LEVELS 1
-
-#ifdef _USE_EXR_LEVELS
+#ifdef CONFIG_USE_EXR_LEVELS
 
 #define __sti() __asm__ __volatile__ ("andc #0xf8,exr": : : "memory")
 
@@ -213,7 +211,7 @@
   }while(0)
 
 
-#else /* _USE_EXR_LEVELS */
+#else /* CONFIG_USE_EXR_LEVELS */
 
 #define __sti() __asm__ __volatile__ ("andc #0x7f,ccr": : : "memory")
 
@@ -232,7 +230,7 @@
     __asm__ __volatile__("ldc %0,ccr": :"m" (__ccr) :"cc","memory"); \
   }while(0)
 
-#endif /* _USE_EXR_LEVELS */
+#endif /* CONFIG_USE_EXR_LEVELS */
 
 #define __get_vbr(x) 0