hwinit is now working for h8eurobot board.

darcs-hash:20070329064027-f2ef6-a57b32c3edd1d325f9a14c3a658ee1d816c9d82c.gz

diff --git a/board/h8300/h8eurobot/defines/system_def_h8eurobot.h b/board/h8300/h8eurobot/defines/system_def_h8eurobot.h
index 28cabbb559e751e5aa7870e425e294965ecd0c9f..88cf5b6242285a9e193fad668cb3e4302ea09fd1 100644 (file)
--- a/board/h8300/h8eurobot/defines/system_def_h8eurobot.h
+++ b/board/h8300/h8eurobot/defines/system_def_h8eurobot.h
@@ -115,13 +115,14 @@ volatile unsigned long msec_time;
 
 __u8 DIO_P1DDR_shadow;
 __u8 DIO_P3DDR_shadow;
+__u8 DIO_PADDR_shadow;
 __u8 DIO_PEDDR_shadow;
 __u8 DIO_PFDDR_shadow;
 __u8 DIO_PJDDR_shadow;
 
 #define DEB_LED_INIT() \
        do {\
-       *DIO_PEDR=0x00;\
+       *DIO_PEDR=0xff;\
        SHADOW_REG_SET(DIO_PEDDR,0x0f); /* set PJ.1, PJ.2, PJ.3 LED output */ \
        } while (0)
        

diff --git a/board/h8300/h8eurobot/libs/bspbase/bsp0common.c b/board/h8300/h8eurobot/libs/bspbase/bsp0common.c
index b18ae5b083bfa9c4974f94fae60013a6db04d735..6ed0f6c85c2c3b4e50bf780b5f103ad4f54fd34e 100644 (file)
--- a/board/h8300/h8eurobot/libs/bspbase/bsp0common.c
+++ b/board/h8300/h8eurobot/libs/bspbase/bsp0common.c
@@ -8,5 +8,6 @@
 
 __u8 DIO_P1DDR_shadow SHADOW_SECT;
 __u8 DIO_P3DDR_shadow SHADOW_SECT;
+__u8 DIO_PADDR_shadow SHADOW_SECT;
 __u8 DIO_PFDDR_shadow SHADOW_SECT;
 __u8 DIO_PJDDR_shadow SHADOW_SECT;

diff --git a/board/h8300/h8eurobot/libs/bspbase/bsp0hwinit.c b/board/h8300/h8eurobot/libs/bspbase/bsp0hwinit.c
index 4d111af7103155c8202fa646f66d926842a42063..3fb011e866476a1960ba5fda66dcc297cad7dd29 100644 (file)
--- a/board/h8300/h8eurobot/libs/bspbase/bsp0hwinit.c
+++ b/board/h8300/h8eurobot/libs/bspbase/bsp0hwinit.c
@@ -49,6 +49,8 @@ void _setup_board()
   /* set shadow registers */
   DIO_P1DDR_shadow=0;
   DIO_P3DDR_shadow=0;
+  DIO_PADDR_shadow=0;
+  DIO_PEDDR_shadow=0;
   DIO_PFDDR_shadow=0;
   DIO_PJDDR_shadow=0;
 
@@ -58,10 +60,12 @@ void _setup_board()
   deb_led_out(0);
   FlWait(1*100000);
 
-  SHADOW_REG_SET(DIO_P1DDR,0x03); /* A20 and A21 are outputs */
+/*   SHADOW_REG_SET(DIO_P1DDR,0x03); /\* A20 and A21 are outputs *\/ */
 
   *DIO_P3DR=0x09;      /* Inactive value of TxD0 and TxD1 has to be log 1 */
   SHADOW_REG_SET(DIO_P3DDR,0x09); /* TxD0 and TxD1 to outputs */
+  *DIO_PADR=0x02;      /* Inactive value of TxD2 has to be log 1 */
+  SHADOW_REG_SET(DIO_PADDR,0x02); /* TxD0 and TxD1 to outputs */
 
   /* Setup system clock oscilator */
   /* PLL mode x4, */
@@ -80,7 +84,7 @@ void _setup_board()
                               clkrat2stc[(CPU_SYS_HZ+CPU_REF_HZ/2)/CPU_REF_HZ]);
   }
   deb_led_out(1);
-  FlWait(1*100000);
+  //FlWait(1*100000);
 
   /* No clock disable, immediate change, busmaster high-speed */
   *SYS_SCKCR=(0*SCKCR_PSTOPm)|(1*SCKCR_STCSm)|(0&SCKCR_SCKxm);
@@ -101,7 +105,7 @@ void _setup_board()
   // SHADOW_REG_SET(DIO_PGDDR,2|4); no on 2638
 #endif
 
-#if 1
+#if 0
   /* setup chipselect 0 - FLASH */
   *BUS_ABWCR&=~ABWCR_ABW0m;    /* 16 bit width */
   *BUS_ASTCR&=~ASTCR_AST0m;    /* 2 states access */
@@ -143,9 +147,9 @@ void _setup_board()
 #endif
 
   deb_led_out(2);
-  FlWait(1*100000);
+  //FlWait(1*100000);
 
-#if 1
+#if 0
   /*  cross cs wait| rd/wr wait    | no burst and DRAM */
   *BUS_BCRH=0*BCRH_ICIS1m | 0*BCRH_ICIS0m;
   /* release      | no DMAC buffer | no external wait */
@@ -164,7 +168,7 @@ void _setup_board()
 
 #endif /* registers setup */
 
-  FlWait(1*100000);
+  //FlWait(1*100000);
 
 #ifdef FULL_XRAM_ADRBUS
   /* Setup full 22 address lines */