--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = generic $(ARCH)
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = defines
\ No newline at end of file
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+include_HEADERS += byteswap.h endian.h
+#include_HEADERS = $(notdir $(wildcard $(SOURCES_DIR)/*.h))
--- /dev/null
+#ifndef _BYTESWAP_H
+#define _BYTESWAP_H 1
+
+#if defined(__KEIL__)
+#define __bswap_16(x) ( (((x) << 8) & 0xFF00) | (((x) >> 8) & 0x00FF) )
+#else
+#define __bswap_16(x) ({unsigned short __x=(x); \
+ (((__x>>8)&0xff)|((__x&0xff)<<8)); })
+#endif
+
+#if defined(__KEIL__)
+ //todo
+#else
+#define __bswap_32(x) ({unsigned long __y=(x); \
+ (__bswap_16(__y>>16)|__bswap_16(__y)<<16); })
+#endif
+
+#define bswap_16(x) __bswap_16 (x)
+
+#define bswap_32(x) __bswap_32 (x)
+
+#endif /* byteswap.h */
--- /dev/null
+#ifndef _ENDIAN_H
+#define _ENDIAN_H 1
+
+#define __LITTLE_ENDIAN 1234
+#define __BIG_ENDIAN 4321
+#define __PDP_ENDIAN 3412
+
+#if defined(__i386__) || defined(SDCC) || defined (__ARMEL__)
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#endif
+
+#if defined(__H8300__) || defined(__H8500__) || defined (__H8300H__) || defined(__W65__) || defined (__H8300S__) || defined (__m68k__) || defined (__ARMEB__) || defined(__KEIL__)
+#define __BYTE_ORDER __BIG_ENDIAN
+#endif
+
+#endif /* endian.h */
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = generic mach-$(MACH)
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = defines libs
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+include_HEADERS = cpu_def.h types.h
\ No newline at end of file
--- /dev/null
+
+#if defined(SDCC) // sdcc
+ #ifndef NULL
+ #define NULL 0x0000
+ #endif /*NULL*/
+#endif // keil, gcc ???
+
+#ifndef CODE
+ #define CODE code
+#endif
+
+#ifndef XDATA
+ #define XDATA xdata
+#endif
+
+#ifndef DATA
+ #define DATA data
+#endif
+
+#define inline
--- /dev/null
+#ifndef _MSC1210_TYPES_H
+#define _MSC1210_TYPES_H
+
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+#define __signed__ signed
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+#if defined (__KEIL__) || (SDCC) || __INT_MAX__ == 32767
+typedef __signed__ long __s32;
+typedef unsigned long __u32;
+#else
+typedef int __s32;
+typedef unsigned int __u32;
+#endif
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+#ifndef __BIT_TYPES_DEFINED__
+#define __BIT_TYPES_DEFINED__
+
+typedef __u8 uint8_t;
+typedef __s8 int8_t;
+typedef __u16 uint16_t;
+typedef __s16 int16_t;
+typedef __u32 uint32_t;
+typedef __s32 int32_t;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __s64 int64_t;
+typedef __u64 uint64_t;
+#endif
+
+#endif /* !(__BIT_TYPES_DEFINED__) */
+
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef __s8 s8;
+typedef __u8 u8;
+
+typedef __s16 s16;
+typedef __u16 u16;
+
+typedef __s32 s32;
+typedef __u32 u32;
+
+typedef __s64 s64;
+typedef __s64 u64;
+
+#define BITS_PER_LONG 32
+
+#endif /* __KERNEL__ */
+
+#endif /* _MSC1210_TYPES_H */
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
+# DO NOT DELETE
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = ulan misc
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+default_CONFIG += CONFIG_MISC_VECT_MSC_BOOT=n
+default_CONFIG += CONFIG_MISC_VECT_MSC_APP=n
+
+ifeq ($(CONFIG_MISC_VECT_MSC_BOOT),y)
+asm_build_HEADERS += \
+config-vect-msc-boot.inc->cf_vect.inc
+lib_LIBRARIES = misc
+include_HEADERS += vect.h
+misc_SOURCES += vect_a2c.c vect_fnc.asm
+endif #CONFIG_MISC_VECT_BOOT
+
+ifeq ($(CONFIG_MISC_VECT_MSC_APP),y)
+asm_build_HEADERS += \
+config-vect-msc-app.inc->cf_vect.inc
+lib_LIBRARIES = misc
+include_HEADERS += vect.h
+misc_SOURCES += vect_a2c.c vect_fnc.asm
+endif #CONFIG_MISC_VECT_APP
--- /dev/null
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (FOR_BOOTLOADER) (0)
+%DEFINE (TGT_MSC1210) (1) ; Kod pro MSC1210
+
+VEC_ARR XDATA 8400H
+VEC_CAR CODE 8400H
+\r
--- /dev/null
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (FOR_BOOTLOADER) (1)
+%DEFINE (TGT_MSC1210) (1) ; Kod pro MSC1210
+
+VEC_ARR XDATA 8400H
+VEC_CAR CODE 8400H
+
+VEC_STA CODE 2000H
+
+
+\r
--- /dev/null
+#ifndef _VECT_H
+#define _VECT_H
+
+#ifdef __cplusplus
+/*extern "C" {*/
+#endif
+
+#if !defined(SDCC_MODEL_LARGE) || !defined(SDCC)
+ #define VECT_FNC_REENTRANT
+#else
+ #define VECT_FNC_REENTRANT reentrant
+#endif
+
+typedef code void (*prot_int)(void) interrupt;
+
+void code *vec_set(prot_int fnc,unsigned char vec) VECT_FNC_REENTRANT;
+void vec_jmp(unsigned char vec);
+
+#define IADDR_EXTI0 0x03
+#define IADDR_SYSFNC 0x06
+#define IADDR_TIMER0 0x0B
+//#define VADDR_? 0x0E
+#define IADDR_EXTI1 0x13
+//#define VADDR_? 0x16
+#define IADDR_TIMER1 0x1B
+#define IADDR_V_uL_ADD 0x1E
+#define IADDR_SINT 0x23
+#define IADDR_SINT 0x23
+#define IADDR_V_uL_FNC 0x26
+#define IADDR_SIIC 0x2B
+#define IADDR_TIMER2 0x2B
+//#define VADDR_? 0x2E
+#define IADDR_T2CAP0 0x33
+//#define VADDR_? 0x36
+#define IADDR_T2CAP1 0x3B
+//#define VADDR_? 0x3E
+#define IADDR_T2CAP2 0x43
+//#define VADDR_? 0x46
+#define IADDR_T2CAP3 0x4B
+//#define VADDR_? 0x4E
+#define IADDR_ADCINT 0x53
+//#define VADDR_? 0x56
+#define IADDR_T2CMP0 0x5B
+//#define VADDR_? 0x5E
+#define IADDR_T2CMP1 0x63
+//#define VADDR_? 0x66
+#define IADDR_T2CMP2 0x6B
+//#define VADDR_? 0x6E
+//#define IADDR_TIMER2 0x73
+#define IADDR_ASTARTUP 0x7B
+
+#ifdef __cplusplus
+/*}*/ /* extern "C"*/
+#endif
+
+#endif /* _VECT_H */
+
--- /dev/null
+#include "vect.h"
+
+#ifdef SDCC
+#ifndef SDCC_MODEL_LARGE
+data unsigned char vec_param1;
+#endif /* SDCC_MODEL_LARGE */
+#endif /* SDCC */
+
+#ifdef SDCC
+#ifndef SDCC_MODEL_LARGE
+void code *vec_set(prot_int fnc,unsigned char vec)
+{
+ vec_param1=vec;
+ _asm
+ .globl vec_set
+ mov r4,_vec_param1
+ lcall vec_set
+ mov dpl,r4
+ mov dph,r5
+ _endasm;
+}
+#else
+/* For large model
+ * vec Allocated to stack - offset -3 (the push _bp taken into account)
+ * fnc Allocated to registers
+ */
+void code *vec_set(prot_int fnc,unsigned char vec) reentrant
+{
+ _asm
+ .globl vec_set
+ mov a,sp
+ add a,#-3
+ mov r0,a
+ mov a,@r0
+ mov r4,a
+ lcall vec_set
+ mov dpl,r4
+ mov dph,r5
+ _endasm;
+}
+#endif /* SDCC_MODEL_LARGE */
+#else
+void code *vec_set(void code *fnc,unsigned char vec)
+{
+#pragma asm
+ extrn code(VEC_SET)
+ mov dpl,r7 ; fnc address into DPTR
+ mov dph,r6
+ mov a,r5 ; vec into r4
+ mov r4,a
+ lcall VEC_SET ;
+ mov a,r4
+ mov r7,a
+ mov a,r5 ; return previous vector setting
+ mov r6,a
+#pragma endasm
+}
+#endif /* SDCC */
+
+#ifdef SDCC
+void vec_jmp(unsigned char vec)
+{
+ _asm
+ .globl vec_get
+ mov dph,#0
+ clr a
+ jmp @a+dptr
+ _endasm;
+}
+#else /*SDCC*/
+#error "todo!"
+#endif
--- /dev/null
+$INCLUDE(cf_vect.inc)\r
+
+%IF(%TGT_MSC1210)THEN(
+EICON DATA 0D8H
+AIE DATA 0A6H
+EIE DATA 0E8H
+PDCON DATA 0F1H
+EWU DATA 0C6H
+)FI
+
+PUBLIC VEC_SET,VEC_USR,VEC_GET
+
+%IF(%FOR_SDCC)THEN(
+PUBLIC __SDCC_EXTERNAL_STARTUP
+)ELSE(
+EXTRN CODE(?C_START)
+PUBLIC ?C_STARTUP
+?STACK__I SEGMENT IDATA
+ RSEG ?STACK__I
+ DS 1
+)FI
+
+C51START__C SEGMENT CODE
+
+ RSEG C51START__C
+
+%IF(%FOR_BOOTLOADER)THEN(
+CSEG AT 0000H
+ JMP 080H ; BOOTLOADER STARTUP CODE
+ JMP VEC_CAR+03H ; EXTI0
+ JMP VEC_CAR+06H ; SYS_FNC
+ DS 2
+ JMP VEC_CAR+0BH ; TIMER0
+ JMP VEC_CAR+0EH ;
+ DS 2
+ JMP VEC_CAR+13H ; EXTI1
+ JMP VEC_CAR+16H ;
+ DS 2
+ JMP VEC_CAR+1BH ; TIMER1
+ JMP VEC_CAR+1EH ; V_uL_ADD
+ DS 2
+ JMP VEC_CAR+23H ; SINT
+ JMP VEC_CAR+26H ; V_uL_FNC
+ DS 2
+ JMP VEC_CAR+2BH ; SIIC
+ JMP VEC_CAR+2EH ;
+ DS 2
+ JMP VEC_CAR+33H ; T2CAP0
+ JMP VEC_CAR+36H ;
+ DS 2
+ JMP VEC_CAR+3BH ; T2CAP1
+ JMP VEC_CAR+3EH ;
+ DS 2
+ JMP VEC_CAR+43H ; T2CAP2
+ JMP VEC_CAR+46H ;
+ DS 2
+ JMP VEC_CAR+4BH ; T2CAP3
+ JMP VEC_CAR+4EH ;
+ DS 2
+ JMP VEC_CAR+53H ; ADCINT
+ JMP VEC_CAR+56H ;
+ DS 2
+ JMP VEC_CAR+5BH ; T2CMP0
+ JMP VEC_CAR+5EH ;
+ DS 2
+ JMP VEC_CAR+63H ; T2CMP1
+ JMP VEC_CAR+66H ;
+ DS 2
+ JMP VEC_CAR+6BH ; T2CMP2
+ JMP VEC_CAR+6EH ;
+ DS 2
+ JMP VEC_CAR+73H ; TIMER2
+ JMP VEC_CAR+76H ;
+ DS 2
+; JMP VEC_CAR+7BH ;
+ JMP VEC_STA ; ASTARTUP
+
+CSEG AT VEC_STA
+VEC_STL:JMP VEC_STL
+)FI
+
+
+VECT__C SEGMENT CODE
+
+RSEG VECT__C
+
+VEC_SET:MOV A,R4
+ MOV R4,DPL
+ MOV R5,DPH
+ %IF(0)THEN(
+ MOV DPTR,#VEC_ARR
+ CALL ADDATDP
+ )ELSE(
+ ADD A,#LOW VEC_ARR
+ MOV DPL,A
+ CLR A
+ ADDC A,#HIGH VEC_ARR
+ MOV DPH,A
+ )FI
+VEC_USR:MOV A,#2
+ MOV C,EA
+ CLR EA
+ MOVX @DPTR,A
+ INC DPTR
+ MOVX A,@DPTR
+ XCH A,R5
+ MOVX @DPTR,A
+ INC DPTR
+ MOVX A,@DPTR
+ XCH A,R4
+ MOVX @DPTR,A
+ MOV EA,C
+ RET
+
+VEC_GET:MOV DPL,R4
+ MOV DPH,#HIGH VEC_ARR
+ INC DPTR
+ MOVX A,@DPTR
+ MOV R5,A
+ INC DPTR
+ MOVX A,@DPTR
+ MOV R4,A
+ RET
+
+__SDCC_EXTERNAL_STARTUP:
+ MOV IE,#0
+%IF(%TGT_MSC1210)THEN(
+ MOV EICON,#040h
+ MOV AIE,#0
+ MOV EWU,#0
+)FI
+ CALL SRETI
+ CALL SRETI
+ CALL SRETI
+ CALL SRETI
+ MOV DPL,#0
+ RET
+SRETI: RETI
+
+ END
\ No newline at end of file
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+default_CONFIG = CONFIG_ULAN=n
+
+ifeq ($(CONFIG_ULAN),y)
+
+lib_LIBRARIES = ulan
+
+include_HEADERS = ulan.h
+
+asm_build_HEADERS = \
+reg1210.inc->reg1210.inc
+
+asm_build_HEADERS += \
+config-$(ULAN_CFG).inc->cf_ulan.inc
+
+CFLAGS += -DMACH=$(MACH) -DAPPID=$(APPID)
+
+ulan_SOURCES = ul_l_c2a.c ulan.asm ul_idstr.c
+
+ifeq ($(CONFIG_ULAN_DY),y)
+include_HEADERS += ul_drv_fnc.h
+ulan_SOURCES += ul_drv_fnc.c
+endif #CONFIG_ULAN_DY
+
+endif #CONFIG_ULAN
--- /dev/null
+
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (VECTOR_FL) (1) ; Vyuzivaji se vektory preruseni v RAM
+%DEFINE (NEG_DR_EO) (0) ; Negovana hodnota DR_EO
+%DEFINE (WITH_TAILS) (0) ; Povolit podporu tailovanych zprav
+%DEFINE (CX_MERGED_FL) (0) ; CODE a XDATA zcela sloucena
+%DEFINE (TGT_T89C51RD2) (0) ; Kod pro T89C51RD2
+%DEFINE (TGT_MSC1210) (1) ; Kod pro MSC1210
+%DEFINE (DY_ADDR) (1) ; Dynamicka adresace bez vektoru
+
+%DEFINE (SPN) (1) ; Cislo serioveho portu
+
+SER_STACK_EXT EQU 0 ; Pridavna hodnota pro stack
+
+END_RAM XDATA 8800H ; Konec pameti
+LENG_IB EQU 1 ; Delka vstupniho bufferu v 256 bytu
+LENG_OB EQU 1 ; Delka vystupniho bufferu
+S_SPEED EQU 3 ; Bd=OSC/12/16/S_SPEED pro 19200 pri 11.0592 MHz
+S_FRLN EQU 1024 ; maximalni delka ramce
+
+DR_EO BIT P3.5 ; Aktivni v dle NEG_DR_EO
+;DR_EO BIT P3.4 ; Aktivni v dle NEG_DR_EO
+;DR_EI BIT P1.6 ; Aktivni v 0 pro RS-486
+ ; Aktivni v 1 pro RS-232
+
--- /dev/null
+
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (VECTOR_FL) (1) ; Vyuzivaji se vektory preruseni v RAM
+%DEFINE (NEG_DR_EO) (0) ; Negovana hodnota DR_EO
+%DEFINE (WITH_TAILS) (1) ; Povolit podporu tailovanych zprav
+%DEFINE (CX_MERGED_FL) (0) ; CODE a XDATA zcela sloucena
+%DEFINE (TGT_T89C51RD2) (0) ; Kod pro T89C51RD2
+%DEFINE (TGT_MSC1210) (1) ; Kod pro MSC1210
+%DEFINE (DY_ADDR) (0) ; Dynamicka adresace bez vektoru
+
+%DEFINE (SPN) (1) ; Cislo serioveho portu
+
+SER_STACK_EXT EQU 0 ; Pridavna hodnota pro stack
+
+END_RAM XDATA F0000H ; Konec pameti
+LENG_IB EQU 8 ; Delka vstupniho bufferu v 256 bytu
+LENG_OB EQU 8 ; Delka vystupniho bufferu
+S_SPEED EQU 3 ; Bd=OSC/12/16/S_SPEED pro 19200 pri 11.0592 MHz
+S_FRLN EQU 1024 ; maximalni delka ramce
+
+DR_EO BIT P3.5 ; Aktivni v dle NEG_DR_EO
+;DR_EO BIT P3.4 ; Aktivni v dle NEG_DR_EO
+;DR_EI BIT P1.6 ; Aktivni v 0 pro RS-486
+ ; Aktivni v 1 pro RS-232
+
--- /dev/null
+
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (VECTOR_FL) (1) ; Vyuzivaji se vektory preruseni v RAM
+%DEFINE (NEG_DR_EO) (0) ; Negovana hodnota DR_EO
+%DEFINE (WITH_TAILS) (0) ; Povolit podporu tailovanych zprav
+%DEFINE (CX_MERGED_FL) (0) ; CODE a XDATA zcela sloucena
+%DEFINE (TGT_T89C51RD2) (0) ; Kod pro T89C51RD2
+%DEFINE (TGT_MSC1210) (1) ; Kod pro MSC1210
+%DEFINE (DY_ADDR) (0) ; Dynamicka adresace bez vektoru
+
+%DEFINE (SPN) (1) ; Cislo serioveho portu
+
+SER_STACK_EXT EQU 0 ; Pridavna hodnota pro stack
+
+END_RAM XDATA 8800H ; Konec pameti
+LENG_IB EQU 1 ; Delka vstupniho bufferu v 256 bytu
+LENG_OB EQU 1 ; Delka vystupniho bufferu
+S_SPEED EQU 3 ; Bd=OSC/12/16/S_SPEED pro 19200 pri 11.0592 MHz
+S_FRLN EQU 1024 ; maximalni delka ramce
+
+DR_EO BIT P3.5 ; Aktivni v dle NEG_DR_EO
+;DR_EO BIT P3.4 ; Aktivni v dle NEG_DR_EO
+;DR_EI BIT P1.6 ; Aktivni v 0 pro RS-486
+ ; Aktivni v 1 pro RS-232
+
--- /dev/null
+
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (VECTOR_FL) (1) ; Vyuzivaji se vektory preruseni v RAM
+%DEFINE (NEG_DR_EO) (0) ; Negovana hodnota DR_EO
+%DEFINE (WITH_TAILS) (0) ; Povolit podporu tailovanych zprav
+%DEFINE (CX_MERGED_FL) (0) ; CODE a XDATA zcela sloucena
+%DEFINE (TGT_T89C51RD2) (0) ; Kod pro T89C51RD2
+%DEFINE (TGT_MSC1210) (1) ; Kod pro MSC1210
+%DEFINE (DY_ADDR) (0) ; Dynamicka adresace bez vektoru
+
+%DEFINE (SPN) (1) ; Cislo serioveho portu
+
+SER_STACK_EXT EQU 0 ; Pridavna hodnota pro stack
+
+END_RAM XDATA 08800H ; Konec pameti
+LENG_IB EQU 1 ; Delka vstupniho bufferu v 256 bytu
+LENG_OB EQU 1 ; Delka vystupniho bufferu
+S_SPEED EQU 3 ; Bd=OSC/12/16/S_SPEED pro 19200 pri 11.0592 MHz
+S_FRLN EQU 1024 ; maximalni delka ramce
+
+DR_EO BIT P3.5 ; Aktivni v dle NEG_DR_EO
+;DR_EO BIT P3.4 ; Aktivni v dle NEG_DR_EO
+;DR_EI BIT P1.6 ; Aktivni v 0 pro RS-486
+ ; Aktivni v 1 pro RS-232
+
--- /dev/null
+
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (VECTOR_FL) (0) ; Vyuzivaji se vektory preruseni v RAM
+%DEFINE (NEG_DR_EO) (1) ; Negovana hodnota DR_EO
+%DEFINE (WITH_TAILS) (1) ; Povolit podporu tailovanych zprav
+%DEFINE (CX_MERGED_FL) (0) ; CODE a XDATA zcela sloucena
+%DEFINE (TGT_T89C51RD2) (1) ; Kod pro T89C51RD2
+%DEFINE (TGT_MSC1210) (0) ; Kod pro MSC1210
+%DEFINE (DY_ADDR) (0) ; Dynamicka adresace bez vektoru
+
+%DEFINE (SPN) (0) ; Cislo serioveho portu
+
+SER_STACK_EXT EQU 0 ; Pridavna hodnota pro stack
+
+END_RAM XDATA F0000H ; Konec pameti
+LENG_IB EQU 32 ; Delka vstupniho bufferu v 256 bytu
+LENG_OB EQU 8 ; Delka vystupniho bufferu
+S_SPEED EQU 3 ; Bd=OSC/12/16/S_SPEED pro 19200 pri 11.0592 MHz
+S_FRLN EQU 1024 ; maximalni delka ramce
+
+DR_EO BIT P3.4 ; Aktivni v dle NEG_DR_EO
+;DR_EO BIT P3.4 ; Aktivni v dle NEG_DR_EO
+;DR_EI BIT P1.6 ; Aktivni v 0 pro RS-486
+ ; Aktivni v 1 pro RS-232
+
--- /dev/null
+
+%DEFINE (FOR_SDCC) (1) ; The SDCC ASX8051 is used
+%DEFINE (VECTOR_FL) (1) ; Vyuzivaji se vektory preruseni v RAM
+%DEFINE (NEG_DR_EO) (0) ; Negovana hodnota DR_EO
+%DEFINE (WITH_TAILS) (1) ; Povolit podporu tailovanych zprav
+%DEFINE (CX_MERGED_FL) (0) ; CODE a XDATA zcela sloucena
+%DEFINE (TGT_T89C51RD2) (0) ; Kod pro T89C51RD2
+%DEFINE (TGT_MSC1210) (1) ; Kod pro MSC1210
+%DEFINE (DY_ADDR) (0) ; Dynamicka adresace bez vektoru
+
+%DEFINE (SPN) (1) ; Cislo serioveho portu
+
+SER_STACK_EXT EQU 0 ; Pridavna hodnota pro stack
+
+END_RAM XDATA F0000H ; Konec pameti
+LENG_IB EQU 32 ; Delka vstupniho bufferu v 256 bytu
+LENG_OB EQU 8 ; Delka vystupniho bufferu
+S_SPEED EQU 3 ; Bd=OSC/12/16/S_SPEED pro 19200 pri 11.0592 MHz
+S_FRLN EQU 1024 ; maximalni delka ramce
+
+DR_EO BIT P3.5 ; Aktivni v dle NEG_DR_EO
+;DR_EO BIT P3.4 ; Aktivni v dle NEG_DR_EO
+;DR_EI BIT P1.6 ; Aktivni v 0 pro RS-486
+ ; Aktivni v 1 pro RS-232
+
--- /dev/null
+; Texas Instruments
+; Name: Reg1210.inc
+; Revision: 1.0
+; Description: Include file for TI MSC1210 microcontroller
+;$NOMOD51
+
+;$SAVE
+;$NOLIST
+
+; BYTE Registers
+P0 DATA 080H ;STANDARD 8051
+SP DATA 081H ;STANDARD 8051
+DPL DATA 082H ;STANDARD 8051
+DPH DATA 083H ;STANDARD 8051
+DPL1 DATA 084H
+DPH1 DATA 085H
+DPS DATA 086H
+PCON DATA 087H ;STANDARD 8051
+TCON DATA 088H ;STANDARD 8051
+TMOD DATA 089H ;STANDARD 8051
+TL0 DATA 08AH ;STANDARD 8051
+TL1 DATA 08BH ;STANDARD 8051
+TH0 DATA 08CH ;STANDARD 8051
+TH1 DATA 08DH ;STANDARD 8051
+CKCON DATA 08EH
+MWS DATA 08FH
+P1 DATA 090H ;STANDARD 8051
+EXIF DATA 091H
+MPAGE DATA 092H
+CADDR DATA 093H
+CDATA DATA 094H
+MCON DATA 095H
+SCON DATA 098H ;STANDARD 8051
+SBUF DATA 099H ;STANDARD 8051
+SPICON DATA 09AH
+SPIDATA DATA 09BH
+SPIRCON DATA 09CH
+SPITCON DATA 09DH
+SPISTRT DATA 09EH
+SPIEND DATA 09FH
+P2 DATA 0A0H ;STANDARD 8051
+PWMCON DATA 0A1H
+PWMLOW DATA 0A2H
+PWMHI DATA 0A3H
+PAI DATA 0A5H
+AIE DATA 0A6H
+AISTAT DATA 0A7H
+IE DATA 0A8H ;STANDARD 8051
+BPCON DATA 0A9H
+BPL DATA 0AAH
+BPH DATA 0ABH
+P0DDRL DATA 0ACH
+P0DDRH DATA 0ADH
+P1DDRL DATA 0AEH
+P1DDRH DATA 0AFH
+P3 DATA 0B0H ;STANDARD 8051
+P2DDRL DATA 0B1H
+P2DDRH DATA 0B2H
+P3DDRL DATA 0B3H
+P3DDRH DATA 0B4H
+IP DATA 0B8H ;STANDARD 8051
+SCON1 DATA 0C0H
+SBUF1 DATA 0C1H
+EWU DATA 0C6H
+T2CON DATA 0C8H ;8052 REGISTER
+RCAP2L DATA 0CAH ;8052 REGISTER
+RCAP2H DATA 0CBH ;8052 REGISTER
+TL2 DATA 0CCH ;8052 REGISTER
+TH2 DATA 0CDH ;8052 REGISTER
+PSW DATA 0D0H ;STANDARD 8051
+OCL DATA 0D1H
+OCM DATA 0D2H
+OCH DATA 0D3H
+GCL DATA 0D4H
+GCM DATA 0D5H
+GCH DATA 0D6H
+ADMUX DATA 0D7H
+EICON DATA 0D8H
+ADRESL DATA 0D9H
+ADRESM DATA 0DAH
+ADRESH DATA 0DBH
+ADCON0 DATA 0DCH
+ADCON1 DATA 0DDH
+ADCON2 DATA 0DEH
+ADCON3 DATA 0DFH
+ACC DATA 0E0H ;STANDARD 8051
+SSCON DATA 0E1H
+SUMR0 DATA 0E2H
+SUMR1 DATA 0E3H
+SUMR2 DATA 0E4H
+SUMR3 DATA 0E5H
+ODAC DATA 0E6H
+LVDCON DATA 0E7H
+EIE DATA 0E8H
+HWPCO DATA 0E9H
+HWPC1 DATA 0EAH
+HWID DATA 0EBH
+;RSRVD DATA 0ECH
+;RSVRD DATA 0EDH
+FMCON DATA 0EEH
+FTCON DATA 0EFH
+B DATA 0F0H ;STANDARD 8051
+PDCON DATA 0F1H
+PASEL DATA 0F2H
+;RSRVD DATA 0F3H
+;RSRVD DATA 0F4H
+ACLK DATA 0F6H
+SRST DATA 0F7H
+EIP DATA 0F8H
+SECINT DATA 0F9H
+MSINT DATA 0FAH
+USEC DATA 0FBH
+MSECL DATA 0FCH
+MSECH DATA 0FDH
+HMSEC DATA 0FEH
+WDTCON DATA 0FFH
+
+
+; BIT Registers
+; *** TCON (088H) ***
+TF1 BIT 08FH
+TR1 BIT 08EH
+TF0 BIT 08DH
+TR0 BIT 08CH
+IE1 BIT 08BH
+IT1 BIT 08AH
+IE0 BIT 089H
+IT0 BIT 088H
+
+; *** P1 (090H) ***
+INT5 BIT 097H
+INT4 BIT 096H
+INT3 BIT 095H
+INT2 BIT 094H
+TXD1 BIT 093H
+RXD1 BIT 092H
+T2EX BIT 091H
+T2 BIT 090H
+
+; *** SCON (098H) ***
+SM0 BIT 09FH
+SM1 BIT 09EH
+SM2 BIT 09DH
+REN BIT 09CH
+TB8 BIT 09BH
+RB8 BIT 09AH
+TI BIT 099H
+RI BIT 098H
+
+; *** IE (0A8H) ***
+EA BIT 0AFH
+ES1 BIT 0AEH
+ET2 BIT 0ADH
+ES BIT 0ACH
+ET1 BIT 0ABH
+EX1 BIT 0AAH
+ET0 BIT 0A9H
+EX0 BIT 0A8H
+
+; *** P3 (0B0H) ***
+RD BIT 0B7H
+WR BIT 0B6H
+T1 BIT 0B5H
+T0 BIT 0B4H
+INT1 BIT 0B3H
+INT0 BIT 0B2H
+TXD0 BIT 0B1H
+RXD0 BIT 0B0H
+
+; *** IP (0B8H) ***
+PS1 BIT 0BEH
+PT2 BIT 0BDH
+PS BIT 0BCH
+PT1 BIT 0BBH
+PX1 BIT 0BAH
+PT0 BIT 0B9H
+PX0 BIT 0B8H
+
+; *** SCON1 (0C0H) ***
+SM01 BIT 0C7H
+SM11 BIT 0C6H
+SM21 BIT 0C5H
+REN1 BIT 0C4H
+TB81 BIT 0C3H
+RB81 BIT 0C2H
+TI1 BIT 0C1H
+RI1 BIT 0C0H
+
+; *** T2CON (0C8H) ***
+TF2 BIT 0CFH
+EXF2 BIT 0CEH
+RCLK BIT 0CDH
+TCLK BIT 0CCH
+EXEN2 BIT 0CBH
+TR2 BIT 0CAH
+C_T2 BIT 0C9H
+CP_RL2 BIT 0C8H
+
+; *** PSW (0D0H) ***
+CY BIT 0D7H
+AC BIT 0D6H
+F0 BIT 0D5H
+RS1 BIT 0D4H
+RS0 BIT 0D3H
+OV BIT 0D2H
+F1 BIT 0D1H
+P BIT 0D0H
+
+; *** EICON (0D8H) ***
+SMOD1 BIT 0DFH
+EAI BIT 0DDH
+AI BIT 0DCH
+WDTI BIT 0DBH
+
+; *** EIE (0E8H) ***
+EWDI BIT 0ECH
+EX5 BIT 0EBH
+EX4 BIT 0EAH
+EX3 BIT 0E9H
+EX2 BIT 0E8H
+
+; *** EIP (0F8H) ***
+PWDI BIT 0FCH
+PX5 BIT 0FBH
+PX4 BIT 0FAH
+PX3 BIT 0F9H
+PX2 BIT 0F8H
+
+; *** Reg ***
+Reg0 Data 00H
+Reg1 Data 01H
+Reg2 Data 02H
+Reg3 Data 03H
+Reg4 Data 04H
+Reg5 Data 05H
+Reg6 Data 06H
+Reg7 Data 07H
+RegB Data 0F0H
+
+; *** interrupts ***
+SINT0 CODE 0023H
+SINT1 CODE 003BH
+
+;$RESTORE
--- /dev/null
+#include <cpu_def.h>
+#include "ul_drv_fnc.h"
+
+#ifdef SDCC
+#ifndef SDCC_MODEL_LARGE
+data uchar ul_dy_len;
+#endif /* SDCC_MODEL_LARGE */
+#endif /* SDCC */
+
+#ifdef SDCC
+unsigned long ul_drv_get_sn()
+{
+ _asm
+ mov dptr,#ser_num
+ movx a,@dptr
+ mov r2,a
+ inc dptr
+ movx a,@dptr
+ mov r3,a
+ inc dptr
+ movx a,@dptr
+ mov b,a
+ inc dptr
+ movx a,@dptr
+ mov dpl,r2
+ mov dph,r3
+ _endasm;
+}
+#else
+#error "unsuported compiler!"
+#endif
+
+#ifdef SDCC
+void ul_drv_set_sn(unsigned long sn)
+{
+ _asm
+ mov r2,a
+ mov r3,dpl
+ mov r4,dph
+ mov dptr,#ser_num
+ mov a,r3
+ movx @dptr,a
+ inc dptr
+ mov a,r4
+ movx @dptr,a
+ inc dptr
+ mov a,b
+ movx @dptr,a
+ inc dptr
+ mov a,r2
+ movx @dptr,a
+ _endasm;
+}
+#else
+#error "unsuported compiler!"
+#endif
+
+
+#ifdef SDCC
+ul_idstr_t *ul_drv_get_idstr()
+{
+ _asm
+ mov dptr,#_ul_idstr
+ mov b,#0x80
+ _endasm;
+}
+#else
+#error "unsuported compiler!"
+#endif
+
+#ifdef SDCC
+unsigned char ul_drv_get_adr()
+{
+ _asm
+ mov dptr,#ul_adr
+ movx a,@dptr
+ mov dpl,a
+ _endasm;
+}
+#else
+#error "unsuported compiler!"
+#endif
+
+#ifdef SDCC
+unsigned char ul_drv_get_dysa()
+{
+ _asm
+ mov dptr,#ud_dysa
+ movx a,@dptr
+ mov dpl,a
+ _endasm;
+}
+#else
+#error "unsuported compiler!"
+#endif
+
+#ifdef SDCC
+char ul_drv_rqa()
+{
+ _asm
+ mov dpl,#0
+ jnb uld_rqa,UD_RQ01
+ dec ul_fld
+ mov dpl,#1
+UD_RQ01:
+ _endasm;
+}
+#else
+#error "unsuported compiler!"
+#endif
+
+#ifdef SDCC
+void ul_drv_clr_rq()
+{
+ _asm
+ mov a,ul_fld
+ anl a,#0xF8
+ mov ul_fld,a
+ _endasm;
+}
+#else
+#error "unsuported compiler!"
+#endif
+
+#ifdef SDCC
+#ifndef SDCC_MODEL_LARGE
+void ul_drv_set_status(uchar UL_ARGPTRTYPE *status,uchar len)
+{
+ ul_dy_len=len;
+ _asm
+ mov r2,dpl
+ mov r3,dph
+ mov dptr,#ud_stad
+ mov a,r2
+ movx @dptr,a
+ inc dptr
+ mov a,r3
+ movx @dptr,a
+ inc dptr
+ mov a,_ul_dy_len
+ movx @dptr,a
+ _endasm;
+}
+#else
+void ul_drv_set_status(uchar UL_ARGPTRTYPE *status,uchar len) UL_FNC_REENTRANT UL_FNC_NAKED
+{
+ _asm
+ mov a,sp
+ #ifdef UL_WITH_NAKED
+ add a,#-3
+ #else /*UL_WITH_NAKED*/
+ add a,#-4
+ #endif /*UL_WITH_NAKED*/
+ mov r0,a
+ mov a,@r0
+ mov r4,a
+ mov r2,dpl
+ mov r3,dph
+ mov dptr,#ud_stad
+ mov a,r2
+ movx @dptr,a
+ inc dptr
+ mov a,r3
+ movx @dptr,a
+ inc dptr
+ mov a,r4
+ movx @dptr,a
+ #ifdef UL_WITH_NAKED
+ ret
+ #endif /*UL_WITH_NAKED*/
+ _endasm;
+}
+#endif /* SDCC_MODEL_LARGE */
+#else
+#error "unsuported compiler!"
+#endif
--- /dev/null
+#ifndef _UL_DRV_FNC_H
+#define _UL_DRV_FNC_H
+
+#include "ulan.h"
+
+#ifdef __cplusplus
+/*extern "C" {*/
+#endif
+
+unsigned long ul_drv_get_sn();
+void ul_drv_set_sn(unsigned long sn);
+ul_idstr_t *ul_drv_get_idstr();
+void ul_drv_set_status(uchar UL_ARGPTRTYPE *status,uchar len) UL_FNC_REENTRANT UL_FNC_NAKED;
+unsigned char ul_drv_get_adr();
+unsigned char ul_drv_get_dysa();
+char ul_drv_rqa();
+void ul_drv_clr_rq();
+
+#ifdef __cplusplus
+/*}*/ /* extern "C"*/
+#endif
+
+#endif /* _UL_DYAC_H */
--- /dev/null
+#include <cpu_def.h>
+#include <ulan.h>
+
+#define __STRINGIFY(x) #x /* stringify without expanding x */
+#define STRINGIFY(x) __STRINGIFY(x) /* expand x, then stringify */
+
+#define NAME ".mt " \
+ STRINGIFY(APPID) \
+ " .uP " \
+ STRINGIFY(MACH) \
+ " .c " \
+ __DATE__ " " __TIME__
+
+ul_idstr_t CODE ul_idstr = {NAME, sizeof(NAME)-1};
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = defines
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+include_HEADERS = mcu_regs.h
--- /dev/null
+// Texas Instruments
+// Name: Reg1210.h
+// Revision: 1.0
+// Description: Header file for TI MSC1210 microcontroller
+
+#ifdef SDCC
+ #include <at89c51ed2.h>
+#else
+ #ifdef __KEIL__
+ #include <atmel/at89c51ed2.h>
+ #else
+ #error Unknown 8051 kompiler
+ #endif
+#endif
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = defines libs
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+include_HEADERS = mcu_regs.h reg1210.hke reg1210.hsd
--- /dev/null
+// Texas Instruments
+// Name: Reg1210.h
+// Revision: 1.0
+// Description: Header file for TI MSC1210 microcontroller
+
+#ifdef SDCC
+ #include "reg1210.hsd"
+#else
+ #ifdef __KEIL__
+ #include "reg1210.hke"
+ #else
+ #error Unknown 8051 kompiler
+ #endif
+#endif
--- /dev/null
+// Texas Instruments\r
+// Name: Reg1210.h\r
+// Revision: 1.0\r
+// Description: Header file for TI MSC1210 microcontroller\r
+\r
+#ifndef __REG1210_H__\r
+#define __REG1210_H__\r
+\r
+/* BYTE Registers */\r
+sfr P0 = 0x80;\r
+sfr SP = 0x81;\r
+sfr DPL = 0x82;\r
+sfr DPH = 0x83;\r
+sfr DPL0 = 0x82;\r
+sfr DPH0 = 0x83;\r
+sfr DPL1 = 0x84;\r
+sfr DPH1 = 0x85;\r
+sfr DPS = 0x86;\r
+sfr PCON = 0x87;\r
+sfr TCON = 0x88;\r
+ sbit TF1 = TCON^7;\r
+ sbit TR1 = TCON^6;\r
+ sbit TF0 = TCON^5;\r
+ sbit TR0 = TCON^4;\r
+ sbit IE1 = TCON^3;\r
+ sbit IT1 = TCON^2;\r
+ sbit IE0 = TCON^1;\r
+ sbit IT0 = TCON^0;\r
+sfr TMOD = 0x89;\r
+sfr TL0 = 0x8A;\r
+sfr TL1 = 0x8B;\r
+sfr TH0 = 0x8C;\r
+sfr TH1 = 0x8D;\r
+sfr CKCON = 0x8E;\r
+sfr MWS = 0x8F;\r
+sfr P1 = 0x90;\r
+ sbit INT5 = P1^7; \r
+ sbit SCK = P1^7; \r
+ sbit INT4 = P1^6; \r
+ sbit MISO = P1^6; \r
+ sbit INT3 = P1^5; \r
+ sbit MOSI = P1^5; \r
+ sbit INT2 = P1^4; \r
+ sbit SS = P1^4; \r
+ sbit TXD1 = P1^3; \r
+ sbit RXD1 = P1^2; \r
+ sbit T2EX = P1^1; \r
+ sbit T2 = P1^0;\r
+sfr EXIF = 0x91;\r
+sfr MPAGE = 0x92;\r
+sfr CADDR = 0x93;\r
+sfr CDATA = 0x94;\r
+sfr MCON = 0x95;\r
+sfr SCON = 0x98;\r
+sfr SCON0 = 0x98;\r
+ sbit SM0_0 = SCON0^7;\r
+ sbit SM1_0 = SCON0^6;\r
+ sbit SM2_0 = SCON0^5;\r
+ sbit REN_0 = SCON0^4;\r
+ sbit TB8_0 = SCON0^3;\r
+ sbit RB8_0 = SCON0^2;\r
+ sbit TI_0 = SCON0^1;\r
+ sbit TI = SCON0^1;\r
+ sbit RI_0 = SCON0^0;\r
+ sbit RI = SCON0^0;\r
+sfr SBUF = 0x99;\r
+sfr SBUF0 = 0x99;\r
+sfr SPICON = 0x9A;\r
+sfr SPIDATA = 0x9B;\r
+sfr SPIRCON = 0x9C;\r
+sfr SPITCON = 0x9D;\r
+sfr SPISTART = 0x9E;\r
+sfr SPIEND = 0x9F;\r
+sfr P2 = 0xA0;\r
+sfr PWMCON = 0xA1;\r
+sfr PWMLOW = 0xA2;\r
+sfr PWMHI = 0xA3;\r
+sfr PAI = 0xA5;\r
+sfr AIE = 0xA6;\r
+sfr AISTAT = 0xA7;\r
+sfr IE = 0xA8;\r
+ sbit EA = IE^7;\r
+ sbit ES1 = IE^6;\r
+ sbit ET2 = IE^5;\r
+ sbit ES = IE^4;\r
+ sbit ES0 = IE^4;\r
+ sbit ET1 = IE^3;\r
+ sbit EX1 = IE^2;\r
+ sbit ET0 = IE^1;\r
+ sbit EX0 = IE^0;\r
+sfr BPCON = 0xA9;\r
+sfr BPL = 0xAA;\r
+sfr BPH = 0xAB;\r
+sfr P0DDRL = 0xAC;\r
+sfr P0DDRH = 0xAD;\r
+sfr P1DDRL = 0xAE;\r
+sfr P1DDRH = 0xAF;\r
+sfr P3 = 0xB0;\r
+ sbit RD = P3^7;\r
+ sbit WR = P3^6;\r
+ sbit T1 = P3^5;\r
+ sbit T0 = P3^4;\r
+ sbit INT1 = P3^3;\r
+ sbit INT0 = P3^2;\r
+ sbit TXD = P3^1;\r
+ sbit TXD0 = P3^1;\r
+ sbit RXD = P3^0;\r
+ sbit RXD0 = P3^0;\r
+sfr P2DDRL = 0xB1;\r
+sfr P2DDRH = 0xB2;\r
+sfr P3DDRL = 0xB3;\r
+sfr P3DDRH = 0xB4;\r
+sfr IP = 0xB8;\r
+ sbit PS1 = IP^6;\r
+ sbit PT2 = IP^5;\r
+ sbit PS = IP^4;\r
+ sbit PS0 = IP^4;\r
+ sbit PT1 = IP^3;\r
+ sbit PX1 = IP^2;\r
+ sbit PT0 = IP^1;\r
+ sbit PX0 = IP^0;\r
+sfr SCON1 = 0xC0;\r
+ sbit SM0_1 = SCON1^7;\r
+ sbit SM1_1 = SCON1^6;\r
+ sbit SM2_1 = SCON1^5;\r
+ sbit REN_1 = SCON1^4;\r
+ sbit TB8_1 = SCON1^3;\r
+ sbit RB8_1 = SCON1^2;\r
+ sbit TI_1 = SCON1^1;\r
+ sbit RI_1 = SCON1^0;\r
+sfr SBUF1 = 0xC1;\r
+sfr EWU = 0xC6;\r
+sfr T2CON = 0xC8;\r
+ sbit TF2 = T2CON^7;\r
+ sbit EXF2 = T2CON^6;\r
+ sbit RCLK = T2CON^5;\r
+ sbit TCLK = T2CON^4;\r
+ sbit EXEN2 = T2CON^3;\r
+ sbit TR2 = T2CON^2;\r
+ sbit C_T2 = T2CON^1;\r
+ sbit CP_RL2 = T2CON^0;\r
+sfr RCAP2L = 0xCA;\r
+sfr RCAP2H = 0xCB;\r
+sfr TL2 = 0xCC;\r
+sfr TH2 = 0xCD;\r
+sfr PSW = 0xD0;\r
+ sbit CY = PSW^7;\r
+ sbit AC = PSW^6;\r
+ sbit F0 = PSW^5;\r
+ sbit RS1 = PSW^4;\r
+ sbit RS0 = PSW^3;\r
+ sbit OV = PSW^2;\r
+ sbit F1 = PSW^1;\r
+ sbit P = PSW^0;\r
+sfr OCL = 0xD1;\r
+sfr OCM = 0xD2;\r
+sfr OCH = 0xD3;\r
+sfr GCL = 0xD4;\r
+sfr GCM = 0xD5;\r
+sfr GCH = 0xD6;\r
+sfr ADMUX = 0xD7;\r
+sfr EICON = 0xD8;\r
+ sbit SMOD1 = EICON^7;\r
+ sbit EAI = EICON^5;\r
+ sbit AI = EICON^4;\r
+ sbit WDTI = EICON^3;\r
+sfr ADRESL = 0xD9;\r
+sfr ADRESM = 0xDA;\r
+sfr ADRESH = 0xDB;\r
+sfr ADCON0 = 0xDC;\r
+sfr ADCON1 = 0xDD;\r
+sfr ADCON2 = 0xDE;\r
+sfr ADCON3 = 0xDF;\r
+sfr ACC = 0xE0;\r
+sfr SSCON = 0xE1;\r
+sfr SUMR0 = 0xE2;\r
+sfr SUMR1 = 0xE3;\r
+sfr SUMR2 = 0xE4;\r
+sfr SUMR3 = 0xE5;\r
+sfr ODAC = 0xE6;\r
+sfr LVDCON = 0xE7;\r
+sfr EIE = 0xE8;\r
+ sbit EWDI = EIE^4;\r
+ sbit EX5 = EIE^3;\r
+ sbit EX4 = EIE^2;\r
+ sbit EX3 = EIE^1;\r
+ sbit EX2 = EIE^0;\r
+sfr HWPC0 = 0xE9;\r
+sfr HWPC1 = 0xEA;\r
+sfr HWID = 0xEB;\r
+sfr FMCON = 0xEE;\r
+sfr FTCON = 0xEF;\r
+sfr B = 0xF0;\r
+sfr PDCON = 0xF1;\r
+sfr PASEL = 0xF2;\r
+sfr ACLK = 0xF6;\r
+sfr SRST = 0xF7;\r
+sfr EIP = 0xF8;\r
+ sbit PWDI = EIP^4;\r
+ sbit PX5 = EIP^3;\r
+ sbit PX4 = EIP^2;\r
+ sbit PX3 = EIP^1;\r
+ sbit PX2 = EIP^0;\r
+sfr SECINT = 0xF9;\r
+sfr MSINT = 0xFA;\r
+sfr USEC = 0xFB;\r
+sfr MSECL = 0xFC;\r
+sfr MSECH = 0xFD;\r
+sfr HMSEC = 0xFE;\r
+sfr WDTCON = 0xFF;\r
+\r
+/*-----------------*/\r
+/* Word Registers */\r
+/*-----------------*/\r
+sfr16 DECIMATION = 0xde;\r
+sfr16 THL2 = 0xcc;\r
+sfr16 RCAP2 = 0xca;\r
+sfr16 ONEMS = 0xfc;\r
+sfr16 PWM = 0xa2;\r
+sfr16 P0DDR = 0xac;\r
+sfr16 P1DDR = 0xae;\r
+sfr16 P2DDR = 0xb1;\r
+sfr16 P3DDR = 0xb3;\r
+sfr16 BRKPT = 0xaa;\r
+\r
+#endif /*__REG1210_H__*/\r
--- /dev/null
+// Texas Instruments\r
+// Name: Reg1210.h\r
+// Revision: 1.0\r
+// Description: Header file for TI MSC1210 microcontroller\r
+\r
+#ifndef __REG1210_H__\r
+#define __REG1210_H__\r
+\r
+/* BYTE Registers */\r
+sfr at 0x80 P0;\r
+sfr at 0x81 SP;\r
+sfr at 0x82 DPL;\r
+sfr at 0x83 DPH;\r
+sfr at 0x82 DPL0;\r
+sfr at 0x83 DPH0;\r
+sfr at 0x84 DPL1;\r
+sfr at 0x85 DPH1;\r
+sfr at 0x86 DPS;\r
+sfr at 0x87 PCON;\r
+sfr at 0x88 TCON;\r
+ sbit at 0x88+7 TF1;\r
+ sbit at 0x88+6 TR1;\r
+ sbit at 0x88+5 TF0;\r
+ sbit at 0x88+4 TR0;\r
+ sbit at 0x88+3 IE1;\r
+ sbit at 0x88+2 IT1;\r
+ sbit at 0x88+1 IE0;\r
+ sbit at 0x88+0 IT0;\r
+sfr at 0x89 TMOD;\r
+sfr at 0x8A TL0;\r
+sfr at 0x8B TL1;\r
+sfr at 0x8C TH0;\r
+sfr at 0x8D TH1;\r
+sfr at 0x8E CKCON;\r
+sfr at 0x8F MWS;\r
+sfr at 0x90 P1;\r
+ sbit at 0x90+7 INT5; \r
+ sbit at 0x90+7 SCK; \r
+ sbit at 0x90+6 INT4; \r
+ sbit at 0x90+6 MISO; \r
+ sbit at 0x90+5 INT3; \r
+ sbit at 0x90+5 MOSI; \r
+ sbit at 0x90+4 INT2; \r
+ sbit at 0x90+4 SS; \r
+ sbit at 0x90+3 TXD1; \r
+ sbit at 0x90+2 RXD1; \r
+ sbit at 0x90+1 T2EX; \r
+ sbit at 0x90+0 T2;\r
+sfr at 0x91 EXIF;\r
+sfr at 0x92 MPAGE;\r
+sfr at 0x93 CADDR;\r
+sfr at 0x94 CDATA;\r
+sfr at 0x95 MCON;\r
+sfr at 0x98 SCON;\r
+sfr at 0x98 SCON0;\r
+ sbit at 0x98+7 SM0_0;\r
+ sbit at 0x98+6 SM1_0;\r
+ sbit at 0x98+5 SM2_0;\r
+ sbit at 0x98+4 REN_0;\r
+ sbit at 0x98+3 TB8_0;\r
+ sbit at 0x98+2 RB8_0;\r
+ sbit at 0x98+1 TI_0;\r
+ sbit at 0x98+1 TI;\r
+ sbit at 0x98+0 RI_0;\r
+ sbit at 0x98+0 RI;\r
+sfr at 0x99 SBUF;\r
+sfr at 0x99 SBUF0;\r
+sfr at 0x9A SPICON;\r
+sfr at 0x9B SPIDATA;\r
+sfr at 0x9C SPIRCON;\r
+sfr at 0x9D SPITCON;\r
+sfr at 0x9E SPISTART;\r
+sfr at 0x9F SPIEND;\r
+sfr at 0xA0 P2;\r
+sfr at 0xA1 PWMCON;\r
+sfr at 0xA2 PWMLOW;\r
+sfr at 0xA3 PWMHI;\r
+sfr at 0xA5 PAI;\r
+sfr at 0xA6 AIE;\r
+sfr at 0xA7 AISTAT;\r
+sfr at 0xA8 IE;\r
+ sbit at 0xA8+7 EA;\r
+ sbit at 0xA8+6 ES1;\r
+ sbit at 0xA8+5 ET2;\r
+ sbit at 0xA8+4 ES0;\r
+ sbit at 0xA8+3 ET1;\r
+ sbit at 0xA8+2 EX1;\r
+ sbit at 0xA8+1 ET0;\r
+ sbit at 0xA8+0 EX0;\r
+sfr at 0xA9 BPCON;\r
+sfr at 0xAA BPL;\r
+sfr at 0xAB BPH;\r
+sfr at 0xAC P0DDRL;\r
+sfr at 0xAD P0DDRH;\r
+sfr at 0xAE P1DDRL;\r
+sfr at 0xAF P1DDRH;\r
+sfr at 0xB0 P3;\r
+ sbit at 0xB0+7 RD;\r
+ sbit at 0xB0+6 WR;\r
+ sbit at 0xB0+5 T1;\r
+ sbit at 0xB0+4 T0;\r
+ sbit at 0xB0+3 INT1;\r
+ sbit at 0xB0+2 INT0;\r
+ sbit at 0xB0+1 TXD;\r
+ sbit at 0xB0+1 TXD0;\r
+ sbit at 0xB0+0 RXD;\r
+ sbit at 0xB0+0 RXD0;\r
+sfr at 0xB1 P2DDRL;\r
+sfr at 0xB2 P2DDRH;\r
+sfr at 0xB3 P3DDRL;\r
+sfr at 0xB4 P3DDRH;\r
+sfr at 0xB8 IP;\r
+ sbit at 0xB8+6 PS1;\r
+ sbit at 0xB8+5 PT2;\r
+ sbit at 0xB8+4 PS;\r
+ sbit at 0xB8+4 PS0;\r
+ sbit at 0xB8+3 PT1;\r
+ sbit at 0xB8+2 PX1;\r
+ sbit at 0xB8+1 PT0;\r
+ sbit at 0xB8+0 PX0;\r
+sfr at 0xC0 SCON1;\r
+ sbit at 0xc0+7 SM0_1;\r
+ sbit at 0xc0+6 SM1_1;\r
+ sbit at 0xc0+5 SM2_1;\r
+ sbit at 0xc0+4 REN_1;\r
+ sbit at 0xc0+3 TB8_1;\r
+ sbit at 0xc0+2 RB8_1;\r
+ sbit at 0xc0+1 TI_1;\r
+ sbit at 0xc0+0 RI_1;\r
+sfr at 0xC1 SBUF1;\r
+sfr at 0xC6 EWU;\r
+sfr at 0xC8 T2CON;\r
+ sbit at 0xC8+7 TF2;\r
+ sbit at 0xC8+6 EXF2;\r
+ sbit at 0xC8+5 RCLK;\r
+ sbit at 0xC8+4 TCLK;\r
+ sbit at 0xC8+3 EXEN2;\r
+ sbit at 0xC8+2 TR2;\r
+ sbit at 0xC8+1 C_T2;\r
+ sbit at 0xC8+0 CP_RL2;\r
+sfr at 0xCA RCAP2L;\r
+sfr at 0xCB RCAP2H;\r
+sfr at 0xCC TL2;\r
+sfr at 0xCD TH2;\r
+sfr at 0xD0 PSW;\r
+ sbit at 0xD0+7 CY;\r
+ sbit at 0xD0+6 AC;\r
+ sbit at 0xD0+5 F0;\r
+ sbit at 0xD0+4 RS1;\r
+ sbit at 0xD0+3 RS0;\r
+ sbit at 0xD0+2 OV;\r
+ sbit at 0xD0+1 F1;\r
+ sbit at 0xD0+0 P;\r
+sfr at 0xD1 OCL;\r
+sfr at 0xD2 OCM;\r
+sfr at 0xD3 OCH;\r
+sfr at 0xD4 GCL;\r
+sfr at 0xD5 GCM;\r
+sfr at 0xD6 GCH;\r
+sfr at 0xD7 ADMUX;\r
+sfr at 0xD8 EICON;\r
+ sbit at 0xD8+7 SMOD1;\r
+ sbit at 0xD8+5 EAI;\r
+ sbit at 0xD8+4 AI;\r
+ sbit at 0xD8+3 WDTI;\r
+sfr at 0xD9 ADRESL;\r
+sfr at 0xDA ADRESM;\r
+sfr at 0xDB ADRESH;\r
+sfr at 0xDC ADCON0;\r
+sfr at 0xDD ADCON1;\r
+sfr at 0xDE ADCON2;\r
+sfr at 0xDF ADCON3;\r
+sfr at 0xE0 ACC;\r
+sfr at 0xE1 SSCON;\r
+sfr at 0xE2 SUMR0;\r
+sfr at 0xE3 SUMR1;\r
+sfr at 0xE4 SUMR2;\r
+sfr at 0xE5 SUMR3;\r
+sfr at 0xE6 ODAC;\r
+sfr at 0xE7 LVDCON;\r
+sfr at 0xE8 EIE;\r
+ sbit at 0xE8+4 EWDI;\r
+ sbit at 0xE8+3 EX5;\r
+ sbit at 0xE8+2 EX4;\r
+ sbit at 0xE8+1 EX3;\r
+ sbit at 0xE8+0 EX2;\r
+sfr at 0xE9 HWPC0;\r
+sfr at 0xEA HWPC1;\r
+sfr at 0xEB HWID;\r
+sfr at 0xEE FMCON;\r
+sfr at 0xEF FTCON;\r
+sfr at 0xF0 B;\r
+sfr at 0xF1 PDCON;\r
+sfr at 0xF2 PASEL;\r
+sfr at 0xF6 ACLK;\r
+sfr at 0xF7 SRST;\r
+sfr at 0xF8 EIP;\r
+ sbit at 0xF8+4 PWDI;\r
+ sbit at 0xF8+3 PX5;\r
+ sbit at 0xF8+2 PX4;\r
+ sbit at 0xF8+1 PX3;\r
+ sbit at 0xF8+0 PX2;\r
+sfr at 0xF9 SECINT;\r
+sfr at 0xFA MSINT;\r
+sfr at 0xFB USEC;\r
+sfr at 0xFC MSECL;\r
+sfr at 0xFD MSECH;\r
+sfr at 0xFE HMSEC;\r
+sfr at 0xFF WDTCON;\r
+\r
+/*-----------------*/\r
+/* Word Registers */\r
+/*-----------------*/\r
+#if 0\r
+sfr16 at 0xde DECIMATION;\r
+sfr16 at 0xcc THL2;\r
+sfr16 at 0xca RCAP2;\r
+sfr16 at 0xfc ONEMS;\r
+sfr16 at 0xa2 PWM;\r
+sfr16 at 0xac P0DDR;\r
+sfr16 at 0xae P1DDR;\r
+sfr16 at 0xb1 P2DDR;\r
+sfr16 at 0xb3 P3DDR;\r
+sfr16 at 0xaa BRKPT;\r
+#endif\r
+\r
+#endif /*__REG1210_H__*/\r
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = flash boot
+
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+lib_LIBRARIES = mscflash
+include_HEADERS = mscflash.h
+mscflash_SOURCES = mscflash_a2c.c mscflash.asm
--- /dev/null
+; Texas Instruments
+; Name: mscflash.asm
+; Revision: 1.0
+; Description: MSC1210 BootRom APIs
+
+PUBLIC _page_erase ; char page_erase (int faddr, char fdata, char fdm)
+PUBLIC _write_flash_chk ; char write_flash_chk (int faddr, char fdata, char fdm)
+
+
+ CSEG AT 0FFD7H
+_page_erase: ; char page_erase (int faddr, char fdata, char fdm)
+
+
+ CSEG AT 0FFDBH
+_write_flash_chk: ; char write_flash_chk (int faddr, char fdata, char fdm)
+
+ END
\ No newline at end of file
--- /dev/null
+#ifndef _MSCFLASH_H
+#define _MSCFLASH_H
+
+#ifdef __cplusplus
+/*extern "C" {*/
+#endif
+
+#include <types.h>
+
+#if !defined(SDCC_MODEL_LARGE) || !defined(SDCC)
+ #define MSC_FNC_REENTRANT
+#else
+ #define MSC_FNC_REENTRANT reentrant
+#endif
+
+#define MSC_FDM 1 // Flash Data Memory
+#define MSC_FPM 0 // Flash Program Memory
+
+char page_erase (int faddr, char fdata, char fdm);
+char write_flash_chk (int faddr, char fdata, char fdm);
+int flash_erase(void *base,int size);
+int flash_copy(void *des,const void *src,int len);
+
+char __page_erase (int faddr, char fdata, char fdm) MSC_FNC_REENTRANT;
+char __write_flash_chk (int faddr, char fdata, char fdm) MSC_FNC_REENTRANT;
+
+#define page_erase(faddr,fdata,fdm) __page_erase(faddr,fdata,fdm)
+#define write_flash_chk(faddr,fdata,fdm) __write_flash_chk(faddr,fdata,fdm)
+
+#ifdef __cplusplus
+/*}*/ /* extern "C"*/
+#endif
+
+#endif /* _MSCFLASH_H */
+
--- /dev/null
+#include "mscflash.h"
+#include "mcu_regs.h"
+
+#ifdef SDCC
+#ifndef SDCC_MODEL_LARGE
+data char mscflash_fdata;
+data char mscflash_fdm;
+#endif /* SDCC_MODEL_LARGE */
+#endif /*SDCC*/
+bit ea,eai;
+
+#ifdef SDCC
+#ifndef SDCC_MODEL_LARGE
+char __page_erase (int faddr, char fdata, char fdm)
+{
+ mscflash_fdata=fdata;
+ mscflash_fdm=fdm;
+ ea=EA,eai=EAI;
+ EA=0;EAI=0; // Disable interrupts
+ _asm
+ .globl _page_erase
+ mov r7,dpl
+ mov r6,dph
+ mov a,_mscflash_fdata
+ mov r5,a
+ mov a,_mscflash_fdm
+ mov r3,a
+ lcall _page_erase
+ mov dpl,r7
+ _endasm;
+ EAI=eai;EA=ea;
+}
+#else
+/* For large model
+ * vec Allocated to stack - offset -4 (the push _bp taken into account)
+ * fnc Allocated to registers
+ */
+char __page_erase (int faddr, char fdata, char fdm) reentrant
+{
+ ea=EA,eai=EAI;
+ EA=0;EAI=0; // Disable interrupts
+ _asm
+ .globl _page_erase
+ mov r7,dpl
+ mov r6,dph
+ mov a,sp
+ add a,#-4
+ mov r0,a
+ mov a,@r0
+ mov r3,a
+ inc r0
+ mov a,@r0
+ mov r5,a
+ lcall _page_erase
+ mov dpl,r7
+ _endasm;
+ EAI=eai;EA=ea;
+}
+#endif /* SDCC_MODEL_LARGE */
+#else /* SDCC */
+char __page_erase (int faddr, char fdata, char fdm)
+{
+ ea=EA,eai=EAI;
+ EA=0;EAI=0; // Disable interrupts
+ #pragma asm
+ extrn code(_page_erase)
+ call _page_erase
+ #pragma endasm
+ EAI=eai;EA=ea;
+}
+#endif /* SDCC */
+
+
+#ifdef SDCC
+#ifndef SDCC_MODEL_LARGE
+char __write_flash_chk (int faddr, char fdata, char fdm)
+{
+ mscflash_fdata=fdata;
+ mscflash_fdm=fdm;
+ ea=EA,eai=EAI;
+ EA=0;EAI=0; // Disable interrupts
+ _asm
+ .globl _write_flash_chk
+ mov r7,dpl
+ mov r6,dph
+ mov a,_mscflash_fdata
+ mov r5,a
+ mov a,_mscflash_fdm
+ mov r3,a
+ lcall _write_flash_chk
+ mov dpl,r7
+ _endasm;
+ EAI=eai;EA=ea;
+}
+#else
+/* For large model
+ * vec Allocated to stack - offset -4 (the push _bp taken into account)
+ * fnc Allocated to registers
+ */
+char __write_flash_chk (int faddr, char fdata, char fdm) reentrant
+{
+ ea=EA,eai=EAI;
+ EA=0;EAI=0; // Disable interrupts
+ _asm
+ .globl _write_flash_chk
+ mov r7,dpl
+ mov r6,dph
+ mov a,sp
+ add a,#-4
+ mov r0,a
+ mov a,@r0
+ mov r3,a
+ inc r0
+ mov a,@r0
+ mov r5,a
+ lcall _write_flash_chk
+ mov dpl,r7
+ _endasm;
+ EAI=eai;EA=ea;
+}
+#endif /* SDCC_MODEL_LARGE */
+#else /* SDCC */
+char __write_flash_chk (int faddr, char fdata, char fdm)
+{
+ ea=EA,eai=EAI;
+ EA=0;EAI=0; // Disable interrupts
+ #pragma asm
+ extrn code(_write_flash_chk)
+ call _write_flash_chk
+ #pragma endasm
+ EAI=eai;EA=ea;
+}
+#endif /* SDCC */
+
+int flash_erase(void *base,int size) {
+ size=size-((unsigned int)base&0x7f);
+ base=(xdata uint8_t*)((unsigned int)base&0xFF80);
+ while (size) {
+ page_erase ((unsigned int)base, 0xff, MSC_FPM);
+ base=(uint8_t *)base+0x80;
+ size-=0x80;
+ }
+ return 0;
+}
+
+int flash_copy(void *des,const void *src,int len) {
+ while(len) {
+ write_flash_chk ((unsigned int)des, *(uint8_t *)src, MSC_FPM);
+ src=(uint8_t *)src+1;
+ des=(uint8_t *)des+1;
+ len--;
+ }
+ return len;
+}
--- /dev/null
+#include <types.h>
+#include <system_def.h>
+#include <string.h>
+#include <stdio.h>
+
+#include "usb_loader.h"
+
+#ifdef PDI_EP0_PACKET_SIZE
+ #define LOADER_BUFFER_SIZE PDI_EP0_PACKET_SIZE
+#else /*PDI_EP0_PACKET_SIZE*/
+ #define LOADER_BUFFER_SIZE 128
+#endif /*PDI_EP0_PACKET_SIZE*/
+
+unsigned char loader_buffer[LOADER_BUFFER_SIZE];
+
+int msc1210_erase(unsigned addr, unsigned len)
+{
+ unsigned end = addr + len - 1;
+ if(addr<0x8000) //0x1000)
+ return -1;
+
+ while(addr < end) {
+ *((xdata unsigned char *)addr) = 0;
+ }
+ return 0;
+}
+
+int msc1210_mass_erase(unsigned mode, unsigned addr)
+{
+ while( addr != 0xffff) {
+ addr++;
+ if ( !(addr & 0x00ff)) printf(" erase segm. 0x%X\n", addr);
+ *((xdata unsigned char *)addr) = 0;
+ }
+ return 0;
+}
+
+
+#ifdef SDCC
+void msc1210_goto( unsigned addr)
+{
+ _asm
+ pop acc
+ pop acc
+ mov a,dpl
+ push acc
+ mov a,dph
+ push acc
+ ret
+ _endasm;
+}
+#else /*SDCC*/
+#pragma asm
+;void msc1210_goto( unsigned addr)
+;{
+ public _msc1210_goto
+_msc1210_goto:
+ pop acc
+ pop acc
+ mov a,r7
+ push acc
+ mov a,r6
+ push acc
+ ret
+; return 0;
+;}
+#pragma endasm
+#endif
+
+
+
+void msc1210_reset_device( void)
+{
+ printf("...reset...\n");
+}
+
+
+int usb_msc1210_loader(usb_device_t *udev)
+{
+ unsigned long addr;
+ unsigned len;
+
+ switch ( udev->request.bRequest & USB_VENDOR_MASK) {
+
+ case USB_VENDOR_GET_CAPABILITIES:
+ printf("GET_CAPABILITIES\n");
+ loader_buffer[0] = 0xAA; // test
+ usb_send_control_data(udev, loader_buffer, 1);
+ return 1;
+
+ case USB_VENDOR_RESET_DEVICE:
+ printf("RESET_DEVICE\n");
+// InitController();
+// InitTarget();
+// if (!GetDevice()) {
+// return -1;
+// }
+ usb_ack_setup(&udev->ep0);
+ msc1210_reset_device();
+ return 1;
+
+ case USB_VENDOR_GOTO:
+ //printf( "GOTO 0x%X\n", udev->request.wValue);
+ usb_ack_setup(&udev->ep0);
+ msc1210_goto(udev->request.wValue);
+ return 1;
+
+ case USB_VENDOR_ERASE_MEMORY:
+ printf( "ERASE 0x%X 0x%X\n", udev->request.wValue, udev->request.wIndex);
+ usb_ack_setup(&udev->ep0);
+ msc1210_erase(udev->request.wValue, udev->request.wIndex);
+ return 1;
+
+ case USB_VENDOR_MASS_ERASE:
+ printf( "MASSERASE 0x%X 0x%X\n", udev->request.wIndex, udev->request.wValue);
+ usb_ack_setup(&udev->ep0);
+ msc1210_mass_erase(udev->request.wIndex, udev->request.wValue);
+ return 1;
+
+ case USB_VENDOR_GET_SET_MEMORY:
+ addr = (udev->request.wValue & 0xffff) | (((unsigned long)udev->request.wIndex&0xffff)<<16);
+ len = udev->request.wLength;
+ //printf("GET_SET_MEMORY, addr=0x%lx, len=%d\n", (long)addr, len);
+ if (( udev->request.bmRequestType & USB_DATA_DIR_MASK) == USB_DATA_DIR_FROM_HOST) {
+ // read from HOST ???
+ switch( udev->request.bRequest & USB_VENDOR_TARGET_MASK) {
+ case USB_VENDOR_TARGET_XDATA:
+ udev->ep0.ptr = (xdata unsigned char *)addr;
+ break;
+ case USB_VENDOR_TARGET_DATA:
+ udev->ep0.ptr = (data unsigned char *)addr;
+ break;
+ default: return -1;
+ }
+ if ( len) usb_set_control_endfnc( udev, usb_ack_setup);
+ else usb_ack_setup(&udev->ep0);
+ return 1;
+ } else {
+ switch( udev->request.bRequest & USB_VENDOR_TARGET_MASK) {
+ case USB_VENDOR_TARGET_XDATA:
+ usb_send_control_data( udev, (xdata unsigned char *)addr, len); //(void*)addr, len);
+ break;
+ case USB_VENDOR_TARGET_DATA:
+ usb_send_control_data( udev, (data unsigned char *)addr, len); //(void*)addr, len);
+ break;
+ default: return -1;
+ }
+ return 1;
+ }
+ break;
+ }
+
+ return 0;
+}
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = $(ARCH)
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+SUBDIRS = $(BOARD)
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+include_HEADERS = system_def.h
+
--- /dev/null
+# -*- makefile -*-
+
+ARCH=mcs51
+MACH=msc1210
+BOARD=hisc
+
+APP=blinder
+APPID=$(APP)-$(BOARD)
+ULAN_CFG=generic-$(BOARD)
+
+TARGET_ARCH = -mmcs51 --model-large
+CFLAGS += $(TARGET_ARCH)
+LDFLAGS += $(TARGET_ARCH)
+
+XRAM = 0x8480
+STACK = 0xC0
+DATA = 0x28
+IDATA = 0x80
+CODE = 0x2000
+
+PROG_START = 0x2000
+BOOTLOADER_START = 0x0000
+
+LDFLAGS += \
+--xram-loc $(XRAM) \
+--code-loc $(CODE) \
+--data-loc $(DATA) \
+--idata-loc $(IDATA) \
+--stack-loc $(STACK) \
+--no-pack-iram
+
+CONFIG_APP_HISC_BLINDER=y
+CONFIG_ULAN=y
+CONFIG_ULAN_DY=y
+CONFIG_MISC_VECT_MSC_APP=y
+CONFIG_KEYVAL=y
--- /dev/null
+# -*- makefile -*-
+
+ARCH=mcs51
+MACH=msc1210
+BOARD=hisc
+
+APP=kswtimer
+APPID=$(APP)-$(BOARD)
+ULAN_CFG=generic-$(BOARD)
+
+TARGET_ARCH = -mmcs51 --model-large
+CFLAGS += $(TARGET_ARCH)
+LDFLAGS += $(TARGET_ARCH)
+
+XRAM = 0x8480
+STACK = 0xC0
+DATA = 0x28
+IDATA = 0x80
+CODE = 0x2000
+
+PROG_START = 0x2000
+BOOTLOADER_START = 0x0000
+
+LDFLAGS += \
+--xram-loc $(XRAM) \
+--code-loc $(CODE) \
+--data-loc $(DATA) \
+--idata-loc $(IDATA) \
+--stack-loc $(STACK) \
+--no-pack-iram
+
+CONFIG_APP_HISC_HEATING_KSWTIMER=y
+CONFIG_ULAN=y
+CONFIG_ULAN_DY=y
+CONFIG_MISC_VECT_MSC_APP=y
+CONFIG_KEYVAL=y
--- /dev/null
+# -*- makefile -*-
+
+ARCH=mcs51
+MACH=msc1210
+BOARD=hisc
+
+APP=mscboot
+APPID=$(APP)-$(BOARD)
+ULAN_CFG=$(APPID)
+
+TARGET_ARCH = -mmcs51 --model-small
+CFLAGS += $(TARGET_ARCH)
+LDFLAGS += $(TARGET_ARCH)
+
+XRAM = 0x8480
+STACK = 0xC0
+DATA = 0x28
+IDATA = 0x80
+CODE = 0x0080
+
+PROG_START = 0x0000
+BOOTLOADER_START = 0x0000
+
+LDFLAGS += \
+--xram-loc $(XRAM) \
+--code-loc $(CODE) \
+--data-loc $(DATA) \
+--idata-loc $(IDATA) \
+--stack-loc $(STACK) \
+--no-pack-iram
+
+CONFIG_APP_MSCBOOT=y
+CONFIG_ULAN=y
+CONFIG_MISC_VECT_MSC_BOOT=y
+CONFIG_KEYVAL=y
--- /dev/null
+/*******************************************************************
+ Components for embedded applications builded for
+ hisc firmware
+
+ system_def_hisc.h - definition of hardware adresses and registers
+
+ Copyright (C) 2004 by Petr Smolik petr.smolik@wo.cz
+
+ *******************************************************************/
+
+#ifndef _SYSTEM_DEF_HISC_H
+#define _SYSTEM_DEF_HISC_H
+
+#include <mcu_regs.h>
+
+#define CPU_SYS_HZ 11059200l
+
+#define BAUD2BAUDDIV(baud) \
+ ((CPU_SYS_HZ+12*8l*baud)/(12*16l*baud))
+
+#define HZ2TMODE1H(x) \
+ (0x100-((CPU_SYS_HZ/12/x) / 256))
+#define HZ2TMODE1L(x) \
+ (0x100-((CPU_SYS_HZ/12/x) % 256))
+
+#define ES_U ES1
+
+#ifdef SDCC
+ sbit at 0xB2 LED; // P3.2
+ sbit at 0xB6 CS_WR; // P3.6
+ sbit at 0xA6 CS_O; // P2.6
+#else
+ sbit LED = P3^2;
+#endif /*SDCC*/
+
+//unsigned char xdata at 0xbfff addr_out;
+//unsigned char xdata at 0x7fff addr_disp;
+
+#define his_putb_outs(x) { \
+ CS_O=1;CS_WR=0; \
+ P0=x; \
+ CS_O=0;CS_WR=1; \
+ }
+
+/* IRAM 16 kB of on-chip memory */
+/* 0xffb000-0xffcfff .. 8 kB free */
+/* 0xffd000-0xffdfff .. 4 kB for Flash emulation */
+/* 0xffe000-0xffffc0 .. 4 kB - 64 B free*/
+/* 0xffffc0-0xffffff .. 64 B free*/
+
+//#define IRAM_START (volatile __u8 * const)(0xffb000)
+//#define IRAM_START1 (volatile __u8 * const)(0xffe000)
+//#define FRAM_START (volatile __u8 * const)(0xffffc0)
+
+//#define FBRAM_START 0x0000 /* FLASH BOOTLOADER ADDRESS */
+//#define FARAM_START 0x1500 /* APPLICATION ADDRESS */
+//#define FDRAM_START 0x0400 /* FLASH DATA ADDRESS */
+
+#define KVPB_MINIMALIZED
+#define KVPB_FRAM_START 0x1e00
+#define KVPB_FRAM_SIZE 0x100
+
+
+#endif /* _SYSTEM_DEF_HISC_H_ */
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+include_HEADERS = system_def.h
+
+lib_LIBRARIES = boardsup
+
+boardsup_SOURCES = i2c.c
+
+nobase_include_HEADERS = periph/i2c.h
+
--- /dev/null
+# -*- makefile -*-
+
+ARCH=mcs51
+MACH=at89c51ed2
+BOARD=ps1
+
+APP=u2u
+APPID=$(APP)-$(BOARD)
+ULAN_CFG=$(APPID)
+
+TARGET_ARCH = -mmcs51 --model-large
+CFLAGS += $(TARGET_ARCH)
+LDFLAGS += $(TARGET_ARCH)
+
+XRAM = 0x8000
+STACK = 0xC0
+DATA = 0x28
+IDATA = 0x80
+CODE = 0x0000
+
+PROG_START = 0x0000
+BOOTLOADER_START = 0xfc00
+
+LDFLAGS += \
+--xram-loc $(XRAM) \
+--code-loc $(CODE) \
+--data-loc $(DATA) \
+--idata-loc $(IDATA) \
+--stack-loc $(STACK) \
+--no-pack-iram
+
+CONFIG_APP_U2U=y
+CONFIG_ULAN=y
+CONFIG_USB_BASE=y
+CONFIG_USB_PDIUSB=y
--- /dev/null
+#include <stdio.h>
+#include <system_def.h>
+#include <periph/i2c.h>
+#ifdef __KEIL__
+#include <intrins.h>
+#endif /*__KEIL__*/
+
+void i2c_init( void) {
+ SDAO = 1; SDAI = 1; SCL = 1;
+}
+/***************************************************************************/
+
+void i2c_wait(void) {
+ #ifdef __KEIL__
+ _nop_();
+ _nop_();
+ _nop_();
+ _nop_();
+ _nop_();
+ #elif SDCC
+ _asm
+ nop;
+ nop;
+ nop;
+ nop;
+ nop;
+ _endasm;
+ #else
+ #error "unsuported compiler!"
+ #endif
+}
+#define i2c_DELAY i2c_wait()
+
+/***************************************************************************/
+void i2c_start( void) {
+ SDAO = 0;
+ i2c_DELAY;
+ SCL = 0;
+ i2c_DELAY;
+}
+/***************************************************************************/
+char i2c_stop( void) {
+ SDAO = 0;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ SDAO = 1;
+ return SDAI;
+}
+/***************************************************************************/
+char i2c_outbyte( unsigned char byte) {
+ unsigned char b=8;
+ bit ack = 1;
+
+ while(b--) {
+ SDAO = (byte & 0x80) ? 1 : 0;
+ byte<<= 1;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ SCL = 0;
+ }
+ i2c_DELAY;
+ SDAO = 1;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ ack = SDAI;
+ SCL = 0;
+// SDAO = 0;
+ return ack; /* if ack == 0 then OK */
+}
+/***************************************************************************/
+char i2c_inbyte( unsigned char *byte, bit last) {
+ unsigned char b = 8;
+ unsigned char out = 0;
+ bit ack = 1;
+
+ while(b--) {
+ SDAO = 1;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ out <<= 1;
+ out |= SDAI ? 1 : 0;
+ SCL = 0;
+ }
+ SDAO = last;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ ack = SDAI;
+ SCL = 0;
+// SDAO = 0;
+ if ( ack == last) *byte = out;
+ return ack;
+}
+/***************************************************************************/
+/***************************************************************************/
+/***************************************************************************/
+char i2c_write( unsigned char adr, unsigned char *bytes, unsigned char cnt) {
+ i2c_start();
+ if ( i2c_outbyte( adr)) {
+ i2c_stop();
+// printf("iA%02X",adr);
+ return 0;
+ }
+ while(cnt) {
+ if ( i2c_outbyte( *bytes++)) {
+ i2c_stop();
+// printf("iW%02X(%02X)",adr,*(bytes-1));
+ return 0;
+ }
+ cnt--;
+ }
+ i2c_stop(); /* return bit */
+ return 1;
+}
+/***************************************************************************/
+char i2c_read( unsigned char adr, unsigned char *bytes, unsigned char cnt) {
+ i2c_start();
+ if ( i2c_outbyte( adr)) {
+ i2c_stop();
+// printf("ia%02X",adr);
+ return 0;
+ }
+ while(cnt) {
+ i2c_inbyte( bytes++, cnt==1); /* check line */
+ cnt--;
+ }
+ i2c_stop(); /* check stop */
+ return 1;
+}
+
--- /dev/null
+#if !defined(__I2C_H)
+#define __I2C_H
+
+void i2c_init( void);
+char i2c_write( unsigned char adr, unsigned char *bytes, unsigned char cnt);
+char i2c_read( unsigned char adr, unsigned char *bytes, unsigned char cnt);
+
+#define I2C_Write i2c_write
+#define I2C_Read i2c_read
+
+#endif
+
--- /dev/null
+/*******************************************************************
+ Components for embedded applications builded for
+ hisc firmware
+
+ system_def_hisc.h - definition of hardware adresses and registers
+
+ Copyright (C) 2004 by Petr Smolik petr.smolik@wo.cz
+
+ *******************************************************************/
+
+#ifndef _SYSTEM_DEF_HISC_H
+#define _SYSTEM_DEF_HISC_H
+
+#include <mcu_regs.h>
+
+#define CPU_SYS_HZ 11059200l
+
+#define BAUD2BAUDDIV(baud) \
+ ((CPU_SYS_HZ+12*8l*baud)/(12*16l*baud))
+
+#define HZ2TMODE1H(x) \
+ (0x100-((CPU_SYS_HZ/12/x) / 256))
+#define HZ2TMODE1L(x) \
+ (0x100-((CPU_SYS_HZ/12/x) % 256))
+
+#define ES_U ES
+
+//volatile unsigned long msec_time;
+
+#if 1 /* special for PDIUSBD11 */
+#define PDIUSB_READ_DATA_ADDR (0x35)
+#define PDIUSB_WRITE_DATA_ADDR (0x34)
+#define PDIUSB_COMMAND_ADDR (0x36)
+
+#if defined(SDCC) // sdcc
+ sbit at 0x96 SCL; // P1.6
+ sbit at 0x97 SDAI; // P1.7
+ sbit at 0x97 SDAO; // P1.7
+
+ sbit at 0xB2 IPDI; // P3.2
+ sbit at 0x94 LEDRX; // P1.4
+ sbit at 0x95 LEDTX; // P1.5
+#else
+ sbit SCL = P1^6;
+ sbit SDAI = P1^7;
+ sbit SDAO = P1^7;
+
+ sbit IPDI = P3^2;
+ sbit LEDRX = P1^4;
+ sbit LEDTX = P1^5;
+#endif
+
+/* P1.0 .. DACK_N/DMACK0, P7.0 .. DMREQ/DREQ0, P7.2 .. EOT_N/TEND0 */
+//#define ISR_USB_INTV EXCPTVEC_IRQ6 /* pin IRQ6 on PG.0 */
+#undef PDIUSB_WITH_ADD_IRQ_HANDLER
+#undef PDIUSB_WITH_EXCPTVECT_SET
+#define PDIUSB_SUPPORT_ENABLED
+#endif
+
+#endif /* _SYSTEM_DEF_HISC_H_ */
--- /dev/null
+# Generic directory or leaf node makefile for OCERA make framework
+
+ifndef MAKERULES_DIR
+MAKERULES_DIR := $(shell ( old_pwd="" ; while [ ! -e Makefile.rules ] ; do if [ "$$old_pwd" == `pwd` ] ; then exit 1 ; else old_pwd=`pwd` ; cd -L .. 2>/dev/null ; fi ; done ; pwd ) )
+endif
+
+ifeq ($(MAKERULES_DIR),)
+all : default
+.DEFAULT::
+ @echo -e "\nThe Makefile.rules has not been found in this or partent directory\n"
+else
+include $(MAKERULES_DIR)/Makefile.rules
+endif
+
--- /dev/null
+# -*- makefile -*-
+
+include_HEADERS = system_def.h system_def_msc51_uc1.h
+
+lib_LIBRARIES = boardsup
+
+boardsup_SOURCES = i2c.c
+
+nobase_include_HEADERS = periph/i2c.h
--- /dev/null
+# -*- makefile -*-
+
+ARCH=mcs51
+MACH=msc1210
+BOARD=ulad21
+
+APP=mscboot
+APPID=$(APP)-$(BOARD)
+ULAN_CFG=$(APPID)
+
+TARGET_ARCH = -mmcs51 --model-small
+CFLAGS += $(TARGET_ARCH)
+LDFLAGS += $(TARGET_ARCH)
+
+XRAM = 0x8480
+STACK = 0xC0
+DATA = 0x28
+IDATA = 0x80
+CODE = 0x0080
+
+PROG_START = 0x0000
+BOOTLOADER_START = 0x0000
+
+LDFLAGS += \
+--xram-loc $(XRAM) \
+--code-loc $(CODE) \
+--data-loc $(DATA) \
+--idata-loc $(IDATA) \
+--stack-loc $(STACK) \
+--no-pack-iram
+
+CONFIG_APP_MSCBOOT=y
+CONFIG_ULAN=y
+CONFIG_MISC_VECT_MSC_BOOT=y
+CONFIG_KEYVAL=y
--- /dev/null
+# -*- makefile -*-
+
+ARCH=mcs51
+MACH=msc1210
+BOARD=ulad21
+
+APP=thermometer
+APPID=$(APP)-$(BOARD)
+ULAN_CFG=generic-$(BOARD)
+
+TARGET_ARCH = -mmcs51 --model-large
+CFLAGS += $(TARGET_ARCH)
+LDFLAGS += $(TARGET_ARCH)
+
+XRAM = 0x8480
+STACK = 0xC0
+DATA = 0x28
+IDATA = 0x80
+CODE = 0x2000
+
+PROG_START = 0x2000
+BOOTLOADER_START = 0x0000
+
+LDFLAGS += \
+--xram-loc $(XRAM) \
+--code-loc $(CODE) \
+--data-loc $(DATA) \
+--idata-loc $(IDATA) \
+--stack-loc $(STACK) \
+--no-pack-iram
+
+CONFIG_APP_PIKRON_THERMOMETR=y
+CONFIG_ULAN=y
+CONFIG_MISC_VECT_MSC_APP=y
+CONFIG_ULOI_LT=y
--- /dev/null
+# -*- makefile -*-
+
+ARCH=mcs51
+MACH=msc1210
+BOARD=ulad21
+
+APP=u2u
+APPID=$(APP)-$(BOARD)
+ULAN_CFG=$(APPID)
+
+TARGET_ARCH = -mmcs51 --model-large
+CFLAGS += $(TARGET_ARCH)
+LDFLAGS += $(TARGET_ARCH)
+
+XRAM = 0x8480
+STACK = 0xC0
+DATA = 0x28
+IDATA = 0x80
+CODE = 0x2000
+
+PROG_START = 0x2000
+BOOTLOADER_START = 0x0000
+
+LDFLAGS += \
+--xram-loc $(XRAM) \
+--code-loc $(CODE) \
+--data-loc $(DATA) \
+--idata-loc $(IDATA) \
+--stack-loc $(STACK) \
+--no-pack-iram
+
+CONFIG_APP_U2U=y
+CONFIG_ULAN=y
+CONFIG_MISC_VECT_MSC_APP=y
+CONFIG_USB_BASE=y
+CONFIG_USB_PDIUSB=y
--- /dev/null
+#include <stdio.h>
+#include <system_def.h>
+#include <periph/i2c.h>
+#ifdef __KEIL__
+#include <intrins.h>
+#endif /*__KEIL__*/
+
+void i2c_init( void) {
+ SDAO = 1; SDAI = 1; SCL = 1;
+}
+/***************************************************************************/
+
+void i2c_wait(void) {
+ #ifdef __KEIL__
+ _nop_();
+ _nop_();
+ _nop_();
+ _nop_();
+ _nop_();
+ #elif SDCC
+ _asm
+ nop;
+ nop;
+ nop;
+ nop;
+ nop;
+ _endasm;
+ #else
+ #error "unsuported compiler!"
+ #endif
+}
+#define i2c_DELAY i2c_wait()
+
+/***************************************************************************/
+void i2c_start( void) {
+ SDAO = 0;
+ i2c_DELAY;
+ SCL = 0;
+ i2c_DELAY;
+}
+/***************************************************************************/
+char i2c_stop( void) {
+ SDAO = 0;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ SDAO = 1;
+ return SDAI;
+}
+/***************************************************************************/
+char i2c_outbyte( unsigned char byte) {
+ unsigned char b=8;
+ bit ack = 1;
+
+ while(b--) {
+ SDAO = (byte & 0x80) ? 1 : 0;
+ byte<<= 1;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ SCL = 0;
+ }
+ i2c_DELAY;
+ SDAO = 1;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ ack = SDAI;
+ SCL = 0;
+// SDAO = 0;
+ return ack; /* if ack == 0 then OK */
+}
+/***************************************************************************/
+char i2c_inbyte( unsigned char *byte, bit last) {
+ unsigned char b = 8;
+ unsigned char out = 0;
+ bit ack = 1;
+
+ while(b--) {
+ SDAO = 1;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ out <<= 1;
+ out |= SDAI ? 1 : 0;
+ SCL = 0;
+ }
+ SDAO = last;
+ i2c_DELAY;
+ SCL = 1;
+ i2c_DELAY;
+ ack = SDAI;
+ SCL = 0;
+// SDAO = 0;
+ if ( ack == last) *byte = out;
+ return ack;
+}
+/***************************************************************************/
+/***************************************************************************/
+/***************************************************************************/
+char i2c_write( unsigned char adr, unsigned char *bytes, unsigned char cnt) {
+ i2c_start();
+ if ( i2c_outbyte( adr)) {
+ i2c_stop();
+// printf("iA%02X",adr);
+ return 0;
+ }
+ while(cnt) {
+ if ( i2c_outbyte( *bytes++)) {
+ i2c_stop();
+// printf("iW%02X(%02X)",adr,*(bytes-1));
+ return 0;
+ }
+ cnt--;
+ }
+ i2c_stop(); /* return bit */
+ return 1;
+}
+/***************************************************************************/
+char i2c_read( unsigned char adr, unsigned char *bytes, unsigned char cnt) {
+ i2c_start();
+ if ( i2c_outbyte( adr)) {
+ i2c_stop();
+// printf("ia%02X",adr);
+ return 0;
+ }
+ while(cnt) {
+ i2c_inbyte( bytes++, cnt==1); /* check line */
+ cnt--;
+ }
+ i2c_stop(); /* check stop */
+ return 1;
+}
+
--- /dev/null
+#if !defined(__I2C_H)
+#define __I2C_H
+
+void i2c_init( void);
+char i2c_write( unsigned char adr, unsigned char *bytes, unsigned char cnt);
+char i2c_read( unsigned char adr, unsigned char *bytes, unsigned char cnt);
+
+#define I2C_Write i2c_write
+#define I2C_Read i2c_read
+
+#endif
+
--- /dev/null
+/*******************************************************************
+ Components for embedded applications builded for
+ laboratory and medical instruments firmware
+
+ system_def.h - common cover for definition of hardware adresses,
+ registers, timing and other hardware dependant
+ parts of embedded hardware
+
+ Copyright (C) 2001 by Pavel Pisa pisa@cmp.felk.cvut.cz
+ (C) 2002 by PiKRON Ltd. http://www.pikron.com
+
+ *******************************************************************/
+
+#ifndef _SYSTEM_DEF_H_
+#define _SYSTEM_DEF_H_
+
+#include <types.h>
+
+#define WITH_SFI_SEL
+
+#define VER_CODE(major,minor,patch) (major*0x10000+minor*0x100+patch)
+/* Software version */
+#define SW_VER_ID "MSC51_UC"
+#define SW_VER_MAJOR 0
+#define SW_VER_MINOR 1
+#define SW_VER_PATCH 0
+#define SW_VER_CODE VER_CODE(SW_VER_MAJOR,SW_VER_MINOR,SW_VER_PATCH)
+/* Hardware version */
+#define HW_VER_ID "MSC51_UC"
+#define HW_VER_MAJOR 1
+#define HW_VER_MINOR 0
+#define HW_VER_PATCH 0
+#define HW_VER_CODE VER_CODE(HW_VER_MAJOR,HW_VER_MINOR,HW_VER_PATCH)
+/* Version of mechanical */
+#define MECH_VER_ID "MSC51_UC"
+#define MECH_VER_MAJOR 0
+#define MECH_VER_MINOR 0
+#define MECH_VER_PATCH 0
+#define MECH_VER_CODE VER_CODE(MECH_VER_MAJOR,MECH_VER_MINOR,MECH_VER_PATCH)
+
+//#include <system_def_jt_usb1.h>
+#include <system_def_msc51_uc1.h>
+//#include <system_def_msc51_u2u_ps1.h>
+//#include <system_def_hisc.h>
+
+#endif /* _SYSTEM_DEF_H_ */
--- /dev/null
+/*******************************************************************
+ Components for embedded applications builded for
+ laboratory and medical instruments firmware
+
+ system_def_jt_usb1.h - definition of hardware adresses and registers
+ of the second prototype version of syringe
+ infussion pump
+
+ Copyright (C) 2002 by Pavel Pisa pisa@cmp.felk.cvut.cz
+ (C) 2002 by PiKRON Ltd. http://www.pikron.com
+
+ *******************************************************************/
+
+#ifndef _SYSTEM_DEF_HW01_H_
+#define _SYSTEM_DEF_HW01_H_
+
+#include <mcu_regs.h>
+
+#define CPU_SYS_HZ 18432100l
+
+#define BAUD2BAUDDIV(baud) \
+ ((CPU_SYS_HZ+12*8l*baud)/(12*16l*baud))
+
+#define HZ2TMODE1H(x) \
+ (0x100-((CPU_SYS_HZ/12/x) / 256))
+#define HZ2TMODE1L(x) \
+ (0x100-((CPU_SYS_HZ/12/x) % 256))
+
+#define ES_U ES1
+
+//volatile unsigned long msec_time;
+
+#if 1 /* special for PDIUSBD11 */
+#define PDIUSB_READ_DATA_ADDR (0x35)
+#define PDIUSB_WRITE_DATA_ADDR (0x34)
+#define PDIUSB_COMMAND_ADDR (0x36)
+
+#ifdef SDCC
+ sbit at 0xB4 SCL; // P3.4
+ sbit at 0x90 SDAI; // P1.0
+ sbit at 0x91 SDAO; // P1.1
+
+ sbit at 0xB2 IPDI; // P3.2
+ sbit at 0xB3 LEDTX; // P3.3
+ sbit at 0xB3 LEDRX; // P3.3
+
+ sbit at 0xB3 LED;
+#else
+ sbit SCL = P3^4;
+ sbit SDAI = P1^0;
+ sbit SDAO = P1^1;
+
+ sbit IPDI = P3^2;
+ sbit LEDRX = P3^3;
+ sbit LEDTX = P3^3;
+#endif /*SDCC*/
+
+/* P1.0 .. DACK_N/DMACK0, P7.0 .. DMREQ/DREQ0, P7.2 .. EOT_N/TEND0 */
+//#define ISR_USB_INTV EXCPTVEC_IRQ6 /* pin IRQ6 on PG.0 */
+#undef PDIUSB_WITH_ADD_IRQ_HANDLER
+#undef PDIUSB_WITH_EXCPTVECT_SET
+#define PDIUSB_SUPPORT_ENABLED
+#endif
+
+/* IRAM 16 kB of on-chip memory */
+/* 0xffb000-0xffcfff .. 8 kB free */
+/* 0xffd000-0xffdfff .. 4 kB for Flash emulation */
+/* 0xffe000-0xffffc0 .. 4 kB - 64 B free*/
+/* 0xffffc0-0xffffff .. 64 B free*/
+/*
+#define IRAM_START (volatile __u8 * const)(0xffb000)
+#define IRAM_START1 (volatile __u8 * const)(0xffe000)
+#define FRAM_START (volatile __u8 * const)(0xffffc0)
+*/
+
+#define KVPB_MINIMALIZED
+#define KVPB_FRAM_START 0x1e00
+#define KVPB_FRAM_SIZE 0x100
+
+#endif /* _SYSTEM_DEF_HW01_H_ */
+# -*- makefile -*-
+
default_CONFIG = CONFIG_KEYVAL=n
ifeq ($(CONFIG_KEYVAL),y)
int kvpb_err_keys(kvpb_block_t *kvpb_block, kvpb_keyid_t keyid);
int kvpb_check(kvpb_block_t *kvpb_block, uint8_t mode);
#else
-extern kvpb_block_t kvpb_store;
-#define kvpb_block (&kvpb_store)
+extern kvpb_block_t kvpb_block_global;
+#define kvpb_block (&kvpb_block_global)
KVPB_DPTRTYPE kvpb_key_t *__kvpb_first(uint8_t mode);
KVPB_DPTRTYPE kvpb_key_t *__kvpb_find(kvpb_keyid_t keyid, uint8_t mode, KVPB_DPTRTYPE kvpb_key_t *key);
int __kvpb_get_key(kvpb_keyid_t keyid, kvpb_size_t size, void *buf);
+# -*- makefile -*-
+
SUBDIRS = base pdiusb more
+# -*- makefile -*-
+
default_CONFIG = CONFIG_USB_BASE=n
ifeq ($(CONFIG_USB_BASE),y)
+# -*- makefile -*-
+
default_CONFIG = CONFIG_USB_MORE=n
ifeq ($(CONFIG_USB_MORE),y)
+# -*- makefile -*-
+
default_CONFIG = CONFIG_USB_PDIUSB=n
ifeq ($(CONFIG_USB_PDIUSB),y)
projects / sysless.git / commitdiff