]> rtime.felk.cvut.cz Git - sysless.git/blobdiff - arch/h8300/mach-2638/defines/h8s2638h.h
Added come constant for PWM to h8s2638h.h.
[sysless.git] / arch / h8300 / mach-2638 / defines / h8s2638h.h
index 6a0322a97befc2e9625d35c52334f54f348f9cb7..5f5afc0abc8744f20151d842a3eb7d628bc800da 100644 (file)
 #define   PWCR1_CKS0m  0x01 
 #define   PWCR1_CKS1m  0x02 
 #define   PWCR1_CKS2m  0x04 
+#define   PWCR1_CKS_F1 0x00 
+#define   PWCR1_CKS_F2 0x01
+#define   PWCR1_CKS_F4 0x02 
+#define   PWCR1_CKS_F8 0x03 
+#define   PWCR1_CKS_F16        0x07 
 #define   PWCR1_CSTm   0x08 
 #define   PWCR1_CMFm   0x10 
 #define   PWCR1_IEm    0x20 
 #define PWM_PWBFR1A    __PORT16 0xFFFC08       /* PWM Buffer Register 1A */ 
 #define   PWBFR1A_DT8m 0x0100 
 #define   PWBFR1A_DT9m 0x0200 
+#define   PWBFR1A_DTxm 0x03ff 
 #define   PWBFR1A_OTSm 0x1000 
 #define PWM_PWBFR1C    __PORT16 0xFFFC0A       /* PWM Buffer Register 1C */ 
 #define   PWBFR1C_DT8m 0x0100 
 #define   PWBFR1C_DT9m 0x0200 
+#define   PWBFR1C_DTxm 0x03ff 
 #define   PWBFR1C_OTSm 0x1000 
 #define PWM_PWBFR1E    __PORT16 0xFFFC0C       /* PWM Buffer Register 1E */ 
 #define   PWBFR1E_DT8m 0x0100 
 #define   PWBFR1E_DT9m 0x0200 
+#define   PWBFR1E_DTxm 0x03ff 
 #define   PWBFR1E_OTSm 0x1000 
 #define PWM_PWBFR1G    __PORT16 0xFFFC0E       /* PWM Buffer Register 1G */ 
 #define   PWBFR1G_DT8m 0x0100 
 #define   PWBFR1G_DT9m 0x0200 
+#define   PWBFR1G_DTxm 0x03ff 
 #define   PWBFR1G_OTSm 0x1000 
 /* Motor control PWM timer 2 */
 #define PWM_PWCR2      __PORT8 0xFFFC10        /* PWM Control Register 2 */ 
 #define   PWCR2_CKS0m  0x01 
 #define   PWCR2_CKS1m  0x02 
 #define   PWCR2_CKS2m  0x04 
+#define   PWCR2_CKS_F1 0x00 
+#define   PWCR2_CKS_F2 0x01
+#define   PWCR2_CKS_F4 0x02 
+#define   PWCR2_CKS_F8 0x03 
+#define   PWCR2_CKS_F16        0x07 
 #define   PWCR2_CSTm   0x08 
 #define   PWCR2_CMFm   0x10 
 #define   PWCR2_IEm    0x20 
 #define PWM_PWBFR2A    __PORT16 0xFFFC18       /* PWM Buffer Register 2A */
 #define   PWBFR2A_DT8m 0x0100 
 #define   PWBFR2A_DT9m 0x0200 
+#define   PWBFR2A_DTxm 0x03ff 
 #define   PWBFR2A_TDSm 0x1000 
 #define PWM_PWBFR2B    __PORT16 0xFFFC1A       /* PWM Buffer Register 2B */ 
 #define   PWBFR2B_DT8m 0x0100 
 #define   PWBFR2B_DT9m 0x0200 
+#define   PWBFR2B_DTxm 0x03ff 
 #define   PWBFR2B_TDSm 0x1000 
 #define PWM_PWBFR2C    __PORT16 0xFFFC1C       /* PWM Buffer Register 2C */
 #define   PWBFR2C_DT8m 0x0100 
 #define   PWBFR2C_DT9m 0x0200 
+#define   PWBFR2C_DTxm 0x03ff 
 #define   PWBFR2C_TDSm 0x1000 
 #define PWM_PWBFR2D    __PORT16 0xFFFC1E       /* PWM Buffer Register 2E */ 
 #define   PWBFR2D_DT8m 0x0100 
 #define   PWBFR2D_DT9m 0x0200 
+#define   PWBFR2D_DTxm 0x03ff 
 #define   PWBFR2D_TDSm 0x1000 
 /* Port H and J Registers */
 #define DIO_PHDDR      __PORT8 0xFFFC20        /* DIO H Data Direction Register */