]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
tegra21: dvfs: Add 0x87 SKU
authorAnshul Jain <anshulj@nvidia.com>
Wed, 28 Oct 2015 19:07:54 +0000 (12:07 -0700)
committermobile promotions <svcmobile_promotions@nvidia.com>
Sat, 31 Oct 2015 04:57:15 +0000 (21:57 -0700)
Add sku for Darcy that is capable of CPU 2Ghz at 1.15V

Bug 1669968

Change-Id: Ie6eac1a744760d0bf8afc1d2dd76c270aaf73ba1
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/824333
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinayak Pane <vpane@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
drivers/platform/tegra/tegra21_dvfs.c
drivers/platform/tegra/tegra21_speedo.c

index fc55b7f89e88c93a93ec939a27d68a55ea025693..e3eebaf35365575d26dd4d362218cea9f7fe25be 100644 (file)
@@ -193,6 +193,38 @@ static struct dvfs_rail *tegra21_dvfs_rails[] = {
        }
 
 static struct cpu_cvb_dvfs cpu_cvb_dvfs_table[] = {
+       {
+               .speedo_id = 6,
+               .process_id = 0,
+               .dfll_tune_data  = {
+                       .tune0          = 0xFFEAD0FF,
+                       .tune1          = 0x020091D9,
+                       .droop_rate_min = 1000000,
+                       .min_millivolts = 870,
+               },
+               .pll_tune_data = {
+                       .min_millivolts = 950,
+               },
+               .max_mv = 1150,
+               .max_freq = 2014500,
+               CPU_CVB_TABLE,
+       },
+       {
+               .speedo_id = 6,
+               .process_id = 1,
+               .dfll_tune_data  = {
+                       .tune0          = 0xFFEAD0FF,
+                       .tune1          = 0x025501D0,
+                       .droop_rate_min = 1000000,
+                       .min_millivolts = 870,
+               },
+               .pll_tune_data = {
+                       .min_millivolts = 950,
+               },
+               .max_mv = 1150,
+               .max_freq = 2014500,
+               CPU_CVB_TABLE,
+       },
        {
                .speedo_id = 5,
                .process_id = 0,
index da838c51cdba262fd414e7181ca396cc56690f14..cd56c7966853610fbcac167f5e300e61832df3ca 100644 (file)
@@ -127,7 +127,6 @@ static void rev_sku_to_speedo_ids(int rev, int sku, int speedo_rev)
        case 0x01: /* Engg sku */
        case 0x07:
        case 0x17:
-       case 0x87:
                if (!vcm31_sku || (sku != 0x17)) {
                        if (a02) {
                                cpu_speedo_id = shield_sku ? 2 : 1;
@@ -162,6 +161,16 @@ static void rev_sku_to_speedo_ids(int rev, int sku, int speedo_rev)
                        core_min_mv = 800;
                        break;
                }
+               /* fall thru for a01 part and Darcy*/
+       case 0x87:
+               if (a02) {
+                       cpu_speedo_id = 6;
+                       soc_speedo_id = 0;
+                       gpu_speedo_id = 2;
+                       threshold_index = 0;
+                       core_min_mv = 800;
+                       break;
+               }
                /* fall thru for a01 part */
        default:
                pr_warn("Tegra21: Unknown SKU %d\n", sku);