mmc: tegra: Enable E_Input before setting 3.3v.

-Enable E_Input before setting 3.3V, this change is required
for T210 only hence NVQUIRK2_SET_PAD_E_INPUT_3_v_3 is used.

Bug 1645608

Change-Id: I448e4481ab5a4038be4290482b676962dbf308f9
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/747026
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index c2e7a302e4ee57d9f87dccb67547b5d28661dc36..36eab34e2d67c79804eb50c738bccc309db12d6f 100644 (file)
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -234,6 +234,7 @@
 /* Select SDR50 UHS mode for host if the device runs at SDR50 mode on T210 */
 #define NVQUIRK2_SELECT_SDR50_MODE             BIT(4)
 #define NVQUIRK2_ADD_DELAY_AUTO_CALIBRATION    BIT(5)
+#define NVQUIRK2_SET_PAD_E_INPUT_3_v_3         BIT(6)
 
 /* Common subset of quirks for Tegra3 and later sdmmc controllers */
 #define TEGRA_SDHCI_NVQUIRKS   (NVQUIRK_ENABLE_PADPIPE_CLKEN | \
@@ -2010,6 +2011,19 @@ static void tegra_sdhci_update_sdmmc_pinctrl_register(struct sdhci_host *sdhci,
        }
 }
 
+static void tegra_sdhci_configure_e_input(struct sdhci_host *sdhci, bool enable)
+{
+       unsigned int val;
+
+       val = sdhci_readl(sdhci, SDMMC_SDMEMCOMPPADCTRL);
+       if (enable)
+               val |= SDMMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD_MASK;
+       else
+               val &= ~SDMMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD_MASK;
+       sdhci_writel(sdhci, val, SDMMC_SDMEMCOMPPADCTRL);
+
+}
+
 static void tegra_sdhci_do_calibration(struct sdhci_host *sdhci,
        unsigned char signal_voltage)
 {
@@ -2097,11 +2111,8 @@ static void tegra_sdhci_do_calibration(struct sdhci_host *sdhci,
        if (!timeout)
                dev_err(mmc_dev(sdhci->mmc), "Auto calibration failed\n");
 
-       if (soc_data->nvquirks & NVQUIRK_SET_PAD_E_INPUT_OR_E_PWRD) {
-               val = sdhci_readl(sdhci, SDMMC_SDMEMCOMPPADCTRL);
-               val &= ~SDMMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD_MASK;
-               sdhci_writel(sdhci, val, SDMMC_SDMEMCOMPPADCTRL);
-       }
+       if (soc_data->nvquirks & NVQUIRK_SET_PAD_E_INPUT_OR_E_PWRD)
+               tegra_sdhci_configure_e_input(sdhci, false);
 
        if (unlikely(soc_data->nvquirks & NVQUIRK_SET_DRIVE_STRENGTH)) {
                /* Disable Auto calibration */
@@ -2175,6 +2186,7 @@ static int tegra_sdhci_validate_sd2_0(struct sdhci_host *sdhci)
        }
 
 }
+
 static int tegra_sdhci_signal_voltage_switch(struct sdhci_host *sdhci,
        unsigned int signal_voltage)
 {
@@ -2197,6 +2209,8 @@ static int tegra_sdhci_signal_voltage_switch(struct sdhci_host *sdhci,
                min_uV = SDHOST_LOW_VOLT_MIN;
                max_uV = SDHOST_LOW_VOLT_MAX;
        } else if (signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
+               if (soc_data->nvquirks & NVQUIRK2_SET_PAD_E_INPUT_3_v_3)
+                       tegra_sdhci_configure_e_input(sdhci, true);
                if (ctrl & SDHCI_CTRL_VDD_180)
                        ctrl &= ~SDHCI_CTRL_VDD_180;
        }
@@ -2215,6 +2229,8 @@ static int tegra_sdhci_signal_voltage_switch(struct sdhci_host *sdhci,
                dev_err(mmc_dev(sdhci->mmc),
                        "setting 1.8V failed %d. Revert to 3.3V\n", rc);
                signal_voltage = MMC_SIGNAL_VOLTAGE_330;
+               if (soc_data->nvquirks & NVQUIRK2_SET_PAD_E_INPUT_3_v_3)
+                       tegra_sdhci_configure_e_input(sdhci, true);
                rc = tegra_sdhci_configure_regulators(tegra_host,
                        CONFIG_REG_SET_VOLT, tegra_host->vddio_min_uv,
                        tegra_host->vddio_max_uv);
@@ -5180,6 +5196,7 @@ static struct sdhci_tegra_soc_data soc_data_tegra21 = {
                     NVQUIRK2_BROKEN_SD2_0_SUPPORT |
                     NVQUIRK2_SELECT_SDR50_MODE |
                     NVQUIRK2_ADD_DELAY_AUTO_CALIBRATION |
+                    NVQUIRK2_SET_PAD_E_INPUT_3_v_3 |
                     NVQUIRK2_DYNAMIC_TRIM_SUPPLY_SWITCH,
 };