Bug
1291108
Change-Id: Ic833e7618fc1f97dc79e7a060543960aa3844f75
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/267648
#include <linux/regulator/tegra-dfll-bypass-regulator.h>
#include <asm/mach-types.h>
+#include <mach/tegra_fuse.h>
#include "pm.h"
#include "dvfs.h"
int __init ardbeg_soctherm_init(void)
{
- return tegra11_soctherm_init(&ardbeg_soctherm_data);
+ /* do this only for supported CP,FT fuses */
+ if (!tegra_fuse_calib_base_get_cp(NULL, NULL) &&
+ !tegra_fuse_calib_base_get_ft(NULL, NULL))
+ return tegra11_soctherm_init(&ardbeg_soctherm_data);
+
+ return -EINVAL;
}
s32 calib_cp, calib_ft;
s32 nominal_calib_cp, nominal_calib_ft;
- tegra_fuse_calib_base_get_cp(&fuse_calib_base_cp, &calib_cp);
- tegra_fuse_calib_base_get_ft(&fuse_calib_base_ft, &calib_ft);
+ if (tegra_fuse_calib_base_get_cp(&fuse_calib_base_cp, &calib_cp) ||
+ tegra_fuse_calib_base_get_ft(&fuse_calib_base_ft, &calib_ft)) {
+ pr_err("soctherm: ERROR: Improper CP or FT calib fuse.\n");
+ return -EINVAL;
+ }
nominal_calib_cp = 25;
if (tegra_chip_id == TEGRA_CHIPID_TEGRA11)