]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
video: tegra: host: gk20a: Use correct size in global ctx buffers
authorArto Merilainen <amerilainen@nvidia.com>
Wed, 19 Mar 2014 11:20:00 +0000 (13:20 +0200)
committerTerje Bergstrom <tbergstrom@nvidia.com>
Fri, 21 Mar 2014 06:14:11 +0000 (23:14 -0700)
Change-Id: I92c3e0289efe1031cb80ab092d96dad174867de8
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/383820
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
drivers/video/tegra/host/gk20a/channel_gk20a.h
drivers/video/tegra/host/gk20a/gr_gk20a.c

index e2bac4e74b07258be68dccb7b75bf31e1230eca3..fca9a48ce0f5724f6f151f4658f3786b2252b628 100644 (file)
@@ -62,6 +62,7 @@ struct channel_ctx_gk20a {
        struct patch_desc       patch_ctx;
        struct zcull_ctx_desc   zcull_ctx;
        u64     global_ctx_buffer_va[NR_GLOBAL_CTX_BUF_VA];
+       u64     global_ctx_buffer_size[NR_GLOBAL_CTX_BUF_VA];
        bool    global_ctx_buffer_mapped;
 };
 
index afb6848b46543b56ecb3f13c42af5c22f1f62fe1..988812b64f8595c3b4c98441e42c45ca38bcbe05 100644 (file)
@@ -2386,6 +2386,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
 {
        struct vm_gk20a *ch_vm = c->vm;
        u64 *g_bfr_va = c->ch_ctx.global_ctx_buffer_va;
+       u64 *g_bfr_size = c->ch_ctx.global_ctx_buffer_size;
        struct gr_gk20a *gr = &g->gr;
        struct sg_table *sgt;
        u64 size;
@@ -2408,6 +2409,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
        if (!gpu_va)
                goto clean_up;
        g_bfr_va[CIRCULAR_VA] = gpu_va;
+       g_bfr_size[CIRCULAR_VA] = size;
 
        /* Attribute Buffer */
        if (!c->vpr || (gr->global_ctx_buffer[ATTRIBUTE_VPR].sgt == NULL)) {
@@ -2424,6 +2426,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
        if (!gpu_va)
                goto clean_up;
        g_bfr_va[ATTRIBUTE_VA] = gpu_va;
+       g_bfr_size[ATTRIBUTE_VA] = size;
 
        /* Page Pool */
        if (!c->vpr || (gr->global_ctx_buffer[PAGEPOOL_VPR].sgt == NULL)) {
@@ -2440,6 +2443,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
        if (!gpu_va)
                goto clean_up;
        g_bfr_va[PAGEPOOL_VA] = gpu_va;
+       g_bfr_size[PAGEPOOL_VA] = size;
 
        /* Golden Image */
        sgt = gr->global_ctx_buffer[GOLDEN_CTX].sgt;
@@ -2449,6 +2453,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
        if (!gpu_va)
                goto clean_up;
        g_bfr_va[GOLDEN_CTX_VA] = gpu_va;
+       g_bfr_size[GOLDEN_CTX_VA] = size;
 
        /* Priv register Access Map */
        sgt = gr->global_ctx_buffer[PRIV_ACCESS_MAP].sgt;
@@ -2458,6 +2463,7 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
        if (!gpu_va)
                goto clean_up;
        g_bfr_va[PRIV_ACCESS_MAP_VA] = gpu_va;
+       g_bfr_size[PRIV_ACCESS_MAP_VA] = size;
 
        c->ch_ctx.global_ctx_buffer_mapped = true;
        return 0;
@@ -2477,8 +2483,8 @@ static int gr_gk20a_map_global_ctx_buffers(struct gk20a *g,
 static void gr_gk20a_unmap_global_ctx_buffers(struct channel_gk20a *c)
 {
        struct vm_gk20a *ch_vm = c->vm;
-       struct gr_gk20a *gr = &c->g->gr;
        u64 *g_bfr_va = c->ch_ctx.global_ctx_buffer_va;
+       u64 *g_bfr_size = c->ch_ctx.global_ctx_buffer_size;
        u32 i;
 
        gk20a_dbg_fn("");
@@ -2486,9 +2492,10 @@ static void gr_gk20a_unmap_global_ctx_buffers(struct channel_gk20a *c)
        for (i = 0; i < NR_GLOBAL_CTX_BUF_VA; i++) {
                if (g_bfr_va[i]) {
                        gk20a_gmmu_unmap(ch_vm, g_bfr_va[i],
-                                        gr->global_ctx_buffer[i].size,
+                                        g_bfr_size[i],
                                         gk20a_mem_flag_none);
                        g_bfr_va[i] = 0;
+                       g_bfr_size[i] = 0;
                }
        }
        c->ch_ctx.global_ctx_buffer_mapped = false;