increases pcie link up time from its current 100ms
value to 350ms value because of the specific USB3.0 controller
card based on VIA chipset takes around 350ms time to linkup
with rootport. To be at par with x86 machine interms of
device enumeration, this change is required.
Also, this changes comes into picture only if there is a device
found (i.e. only if TX_RDET_STATUS is already set)
Bug
200171635
Change-Id: I1ccdd395467eb78fed59319f1ab9199210d7bd62
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-on: http://git-master/r/
1009897
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
* can result in the increase of the bootup time as there are big timeout
* loops.
*/
-#define TEGRA_PCIE_LINKUP_TIMEOUT 100 /* up to 100 ms */
+#define TEGRA_PCIE_LINKUP_TIMEOUT 350 /* up to 350 ms */
static bool tegra_pcie_port_check_link(struct tegra_pcie_port *port)
{
unsigned int retries = 3;