- ucode CL http://git-master/r/#/c/
1021926/
- EXTERR exception for ZBC L2 regsiters access
during ELPG entry/exit.
FIX : ZBC L2 is not part of GR, so ZBC L2 rigsters
save/restore not required for ELPG entry/exit,
P4 CL
20490253
Bug
200166877
Change-Id: If066e0e217d1f97cd92d060a86e558e5111007b6
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/
1022004
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Kerwin Wan <kerwinw@nvidia.com>
*
* GK20A PMU (aka. gPMU outside gk20a context)
*
- * Copyright (c) 2011-2015, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2011-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
#define PMU_AP_IDLE_MASK_GRAPHICS (PMU_AP_IDLE_MASK_HIST_IDX_1)
#define APP_VERSION_T186_0 19494277
-#define APP_VERSION_GM20B_4 19008461
+#define APP_VERSION_GM20B_4 20432445
#define APP_VERSION_GM20B_3 18935575
#define APP_VERSION_GM20B_2 18694072
#define APP_VERSION_GM20B_1 18547257