if ((caps2 & MMC_CAP2_HS400_1_8V_DDR &&
card_type & EXT_CSD_CARD_TYPE_UHS_DDR_1_8V) ||
(caps2 & MMC_CAP2_HS400_1_2V_DDR &&
- card_type & EXT_CSD_CARD_TYPE_UHS_DDR_1_2V))
- hs_max_dtr = MMC_HS400_MAX_DTR;
+ card_type & EXT_CSD_CARD_TYPE_UHS_DDR_1_2V)) {
+ if (caps2 & MMC_CAP2_HS533)
+ hs_max_dtr = MMC_HS533_MAX_DTR;
+ else
+ hs_max_dtr = MMC_HS400_MAX_DTR;
+ }
card->ext_csd.hs_max_dtr = hs_max_dtr;
card->ext_csd.card_type = card_type;
index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
EXT_CSD_PWR_CL_52_195 :
EXT_CSD_PWR_CL_DDR_52_195;
- else if (host->ios.clock <= 200000000) {
+ else if (host->ios.clock <= 266000000) {
if (mmc_card_hs400(card))
index = EXT_CSD_PWR_CL_DDR_200;
else
index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ?
EXT_CSD_PWR_CL_52_360 :
EXT_CSD_PWR_CL_DDR_52_360;
- else if (host->ios.clock <= 200000000)
+ else if (host->ios.clock <= 266000000)
index = EXT_CSD_PWR_CL_200_360;
break;
default:
mmc_card_set_hs400(card);
mmc_card_clr_highspeed(card);
- mmc_set_clock(host, MMC_HS400_MAX_DTR);
+ mmc_set_clock(host, max_dtr);
err = mmc_select_powerclass(card, EXT_CSD_DDR_BUS_WIDTH_8,
ext_csd);
if (err) {
>> SDHCI_CLOCK_BASE_SHIFT;
host->max_clk *= 1000000;
+
+ if (mmc->caps2 & MMC_CAP2_HS533)
+ host->max_clk = MMC_HS533_MAX_DTR;
+
if (host->max_clk == 0 || host->quirks &
SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) {
if (!host->ops->get_max_clock) {
#define MMC_HIGH_DDR_MAX_DTR 52000000
#define MMC_HS200_MAX_DTR 200000000
#define MMC_HS400_MAX_DTR 200000000
+#define MMC_HS533_MAX_DTR 266000000
unsigned int sectors;
unsigned int card_type;
unsigned int hc_erase_size; /* In sectors */
#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V_DDR | \
MMC_CAP2_HS400_1_2V_DDR)
#define MMC_CAP2_EN_STROBE (1 << 19) /* can support enhanced strobe*/
+#define MMC_CAP2_HS533 (1 << 20) /* can support HS533*/
mmc_pm_flag_t pm_caps; /* supported pm features */
#ifdef CONFIG_MMC_CLKGATE