arm64: tegra21: emc: Add missing DT parsing

Add missing periodic training DTB parsing. This was causing
the periodic training enabled flag in the DTB to be ignored.

Change-Id: Icfc7a1467c810e82b5b556cb5dc71ae22a59d8d2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/664651
(cherry picked from commit 5628fb063d10bbaf3f366286e9d57141d55654ef)
Reviewed-on: http://git-master/r/674042
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

diff --git a/drivers/platform/tegra/mc/tegra_emc_dt_parse.c b/drivers/platform/tegra/mc/tegra_emc_dt_parse.c
index 5015da56a6926c72b3139bc04997bd2bde87b696..8787c0474836a42271db5d89ab6a721445d547bd 100644 (file)
--- a/drivers/platform/tegra/mc/tegra_emc_dt_parse.c
+++ b/drivers/platform/tegra/mc/tegra_emc_dt_parse.c
@@ -170,6 +170,42 @@ static void *tegra_emc_dt_parse_pdata_comp(const char *emc_mode,
 #elif defined(CONFIG_ARCH_TEGRA_21x_SOC)
                        PNE_U32(iter, "nvidia,needs-training", needs_training);
                        PNE_U32(iter, "nvidia,trained", trained);
+                       PNE_U32(iter, "nvidia,periodic_training",
+                               periodic_training);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c0d0u0",
+                               trained_dram_clktree_c0d0u0);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c0d0u1",
+                               trained_dram_clktree_c0d0u1);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c0d1u0",
+                               trained_dram_clktree_c0d1u0);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c0d1u1",
+                               trained_dram_clktree_c0d1u1);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c1d0u0",
+                               trained_dram_clktree_c1d0u0);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c1d0u1",
+                               trained_dram_clktree_c1d0u1);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c1d1u0",
+                               trained_dram_clktree_c1d1u0);
+                       PNE_U32(iter, "nvidia,trained_dram_clktree_c1d1u1",
+                               trained_dram_clktree_c1d1u1);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c0d0u0",
+                               current_dram_clktree_c0d0u0);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c0d0u1",
+                               current_dram_clktree_c0d0u1);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c0d1u0",
+                               current_dram_clktree_c0d1u0);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c0d1u1",
+                               current_dram_clktree_c0d1u1);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c1d0u0",
+                               current_dram_clktree_c1d0u0);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c1d0u1",
+                               current_dram_clktree_c1d0u1);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c1d1u0",
+                               current_dram_clktree_c1d1u0);
+                       PNE_U32(iter, "nvidia,current_dram_clktree_c1d1u1",
+                               current_dram_clktree_c1d1u1);
+                       PNE_U32(iter, "nvidia,run_clocks", run_clocks);
+                       PNE_U32(iter, "nvidia,tree_margin", tree_margin);
                        PNE_U32(iter, "nvidia,burst-regs-per-ch-num",
                                burst_regs_per_ch_num);
                        PNE_U32(iter, "nvidia,trim-regs-num", trim_regs_num);