]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
video: tegra: dc: adjust pclk for HDMI audio
authorJon Mayo <jmayo@nvidia.com>
Sat, 2 Mar 2013 00:39:48 +0000 (16:39 -0800)
committerDan Willemsen <dwillemsen@nvidia.com>
Sat, 14 Sep 2013 20:02:25 +0000 (13:02 -0700)
If an EDID's pixel clock is within 1% of the rate supported for HDMI audio,
then use the audio table clock rate instead of the EDID.

Bug 1232458

Change-Id: Iedbbf0b0ee19c584598036cd065dd3e008437f7f
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/207270
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
drivers/video/tegra/dc/hdmi.c

index 09bf2ab608fb5920bb1c71f8f350476d6dd17066..bb67f69de94c7f54decd9ada21a2f3f0f6b316f4 100644 (file)
@@ -693,6 +693,32 @@ static bool tegra_dc_check_constraint(const struct fb_videomode *mode)
                mode->xres >= 16 && mode->yres >= 16;
 }
 
+/* adjusts pixclock to fit audio table */
+static bool tegra_dc_hdmi_adjust_pixclock(const struct tegra_dc *dc,
+                                       struct fb_videomode *mode)
+{
+       const struct tegra_hdmi_audio_config *cfg = tegra_hdmi_audio_44_1k;
+       unsigned pclk;
+
+       if (!mode->pixclock)
+               return false;
+
+       pclk = PICOS2KHZ(mode->pixclock);
+
+       /* look on 44.1k audio table, if mode's pixel clock is within 1%, then
+        * use the pixel clock from the audio table.*/
+       while (cfg->pix_clock) {
+               if (cfg->pix_clock > (pclk / 100 * 99) &&
+                       cfg->pix_clock < (pclk / 100 * 101) &&
+                       cfg->pix_clock >= 1000) {
+                       mode->pixclock = KHZ2PICOS(cfg->pix_clock / 1000);
+                       return true;
+               }
+               cfg++;
+       }
+       return false;
+}
+
 static bool tegra_dc_hdmi_mode_filter(const struct tegra_dc *dc,
                                        struct fb_videomode *mode)
 {
@@ -719,6 +745,8 @@ static bool tegra_dc_hdmi_mode_filter(const struct tegra_dc *dc,
        /* don't filter any modes due to width - probably not what you want */
 #endif
 
+       tegra_dc_hdmi_adjust_pixclock(dc, mode);
+
        /* Check if the mode's pixel clock is more than the max rate*/
        if (!tegra_dc_hdmi_valid_pixclock(dc, mode))
                return false;