ARM: tegra: sdhci: Enable SDR50 mode for SDIO

Enabled SDR50 mode for SDIO device on ardbeg.

Bug 1447641

Change-Id: I282fae0e7b1ad43dba023290927b8b704b9f1ea6
Reviewed-on: http://git-master/r/361390
(cherry picked from commit 151335aa67065cd3a13b1fe21d3f0f29897119e7)

Signed-off-by: R Raj Kumar <rrajk@nvidia.com>
Change-Id: I13073e43877b03961cfbe374adef3a46d4474542
Reviewed-on: http://git-master/r/365739
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>

diff --git a/arch/arm/mach-tegra/board-ardbeg-sdhci.c b/arch/arm/mach-tegra/board-ardbeg-sdhci.c
index 8435ea807989d2dbb0980b471ebdd5754d9ae870..475355ecfe90b5161425ad337ea093b499e39216 100644 (file)
--- a/arch/arm/mach-tegra/board-ardbeg-sdhci.c
+++ b/arch/arm/mach-tegra/board-ardbeg-sdhci.c
@@ -185,8 +185,7 @@ static struct tegra_sdhci_platform_data tegra_sdhci_platform_data0 = {
        .tap_delay = 0,
        .trim_delay = 0x2,
        .ddr_clk_limit = 41000000,
-       .uhs_mask = MMC_UHS_MASK_DDR50 |
-               MMC_UHS_MASK_SDR50,
+       .uhs_mask = MMC_UHS_MASK_DDR50,
        .calib_3v3_offsets = 0x7676,
        .calib_1v8_offsets = 0x7676,
        .max_clk_limit = 136000000,