]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
xhci: tegra: fix wrong USB2_PORT_CAP padctl config
authorHenry Lin <henryl@nvidia.com>
Fri, 10 Jul 2015 10:08:22 +0000 (18:08 +0800)
committermobile promotions <svcmobile_promotions@nvidia.com>
Sat, 10 Oct 2015 10:13:33 +0000 (03:13 -0700)
Issue is visible if the platform is only enabled xudc for usb2.
For example, foster only enable usb2 on xudc. This issue results
PORT1_CAP field in USB2_PORT_CAP programmed to OTG_CAP unexpectedly.

Bug 200122464

Change-Id: Iee48c38c8894f4b173665b9db98328c326b87497
Signed-off-by: Henry Lin <henryl@nvidia.com>
Reviewed-on: http://git-master/r/768870
Reviewed-by: ChihMin Cheng <ccheng@nvidia.com>
Reviewed-by: George Zhou <gzhou@nvidia.com>
Reviewed-by: Ashutosh Jha <ajha@nvidia.com>
Reviewed-on: http://git-master/r/807532
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ajay Gupta <ajayg@nvidia.com>
Tested-by: Ajay Gupta <ajayg@nvidia.com>
GVS: Gerrit_Virtual_Submit

drivers/usb/host/xhci-tegra.c

index ed12bf3864f3bb882f0d74ae8883f0b4b257d17d..0de8f742030563db1b373147b0586f84214cd48a 100644 (file)
@@ -2335,6 +2335,10 @@ tegra_xhci_padctl_portmap_and_caps(struct tegra_xhci_hcd *tegra)
        ss_pads = tegra->soc_config->ss_pad_count;
        for_each_ss_pad(pad, ss_pads) {
                if (host_ports & (1 << pad)) {
+#if defined(CONFIG_ARCH_TEGRA_21x_SOC)
+                       bool is_otg_port =
+                               (tegra->bdata->otg_portmap & (1 << pad)) != 0;
+#endif
                        tegra->soc_config->check_lane_owner_by_pad(pad
                                        , tegra->bdata->lane_owner);
 
@@ -2343,8 +2347,7 @@ tegra_xhci_padctl_portmap_and_caps(struct tegra_xhci_hcd *tegra)
                                                prod_name,
                                                tegra->prod_list);
 #if defined(CONFIG_ARCH_TEGRA_21x_SOC)
-                       t210_program_ss_pad(tegra, pad,
-                                       pad == tegra->otg_portnum);
+                       t210_program_ss_pad(tegra, pad, is_otg_port);
 #else
                        tegra_xhci_program_ss_pad(tegra, pad);
 #endif