arm: tegra13: add CPU and GPU EDP support

Incorporate new CPU leakage parameters and use T12x GPU leakage
parameters to enable VDD_CPU and VDD_GPU EDP dynamic limiting
based on temperature. EPD table is calculated done based on IDDQ
of CPU and GPU and leakage parameters provided by Silicon
characterization process.

Bug 1434482

Change-Id: I08a02136e611bd969ea8bed0806ce5fede9a7a61
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/393185
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

diff --git a/arch/arm/mach-tegra/edp.c b/arch/arm/mach-tegra/edp.c
index 4e61a2364ce30bad5e8a2c560ca8ea1b06d88625..be050e546bf8f4e42c85214ced620aadae296a5f 100644 (file)
--- a/arch/arm/mach-tegra/edp.c
+++ b/arch/arm/mach-tegra/edp.c
@@ -47,7 +47,8 @@
 #define IS_T11X                (tegra_chip_id == TEGRA_CHIPID_TEGRA11)
 #define IS_T14X                (tegra_chip_id == TEGRA_CHIPID_TEGRA14)
 #define IS_T12X                (tegra_chip_id == TEGRA_CHIPID_TEGRA12)
-#define IS_T1XX                (IS_T11X || IS_T14X || IS_T12X)
+#define IS_T13X                (tegra_chip_id == TEGRA_CHIPID_TEGRA13)
+#define IS_T1XX                (IS_T11X || IS_T14X || IS_T12X || IS_T13X)
 
 static u32 tegra_chip_id = 0xdeadbeef;
 
@@ -323,6 +324,8 @@ static int edp_find_speedo_idx(int cpu_speedo_id, unsigned int *cpu_speedo_idx)
                params = tegra14x_get_leakage_params(0, &array_size);
        else if (IS_T12X)
                params = tegra12x_get_leakage_params(0, &array_size);
+       else if (IS_T13X)
+               params = tegra13x_get_leakage_params(0, &array_size);
        else
                array_size = 0;
 
@@ -367,6 +370,8 @@ static int init_cpu_edp_limits_calculated(void)
                params = tegra14x_get_leakage_params(cpu_speedo_idx, NULL);
        else if (IS_T12X)
                params = tegra12x_get_leakage_params(cpu_speedo_idx, NULL);
+       else if (IS_T13X)
+               params = tegra13x_get_leakage_params(cpu_speedo_idx, NULL);
        else
                return -EINVAL;
 
@@ -823,6 +828,8 @@ static int init_gpu_edp_limits_calculated(void)
 
        if (IS_T12X)
                params = tegra12x_get_gpu_leakage_params();
+       else if (IS_T13X)
+               params = tegra13x_get_gpu_leakage_params();
        else
                return -EINVAL;
 
@@ -925,7 +932,7 @@ void __init tegra_init_gpu_edp_limits(unsigned int regulator_mA)
        if (tegra_chip_id == 0xdeadbeef)
                tegra_chip_id = tegra_get_chip_id();
 
-       if (!IS_T12X)
+       if (!(IS_T12X || IS_T13X))
                return;
 
        if (!regulator_mA) {
@@ -1166,7 +1173,7 @@ static ssize_t gpu_edp_reg_override_write(struct file *file,
        unsigned int gpu_edp_reg_override_mA_temp;
        unsigned int gpu_edp_reg_override_mA_prev = gpu_edp_reg_override_mA;
 
-       if (!IS_T12X)
+       if (!(IS_T12X || IS_T13X))
                return -EINVAL;
 
        if (sizeof(buf) <= count)

diff --git a/arch/arm/mach-tegra/include/mach/edp.h b/arch/arm/mach-tegra/include/mach/edp.h
index ed74bddd6e8f83b8913d23f68c3398d369850496..53c52d36c27b95677ad054344c011f70dabf0954 100644 (file)
--- a/arch/arm/mach-tegra/include/mach/edp.h
+++ b/arch/arm/mach-tegra/include/mach/edp.h
@@ -182,6 +182,7 @@ void tegra_init_gpu_edp_limits(unsigned int regulator_mA);
 void tegra_platform_gpu_edp_init(struct thermal_trip_info *trips,
                                        int *num_trips, int margin);
 struct tegra_edp_gpu_leakage_params *tegra12x_get_gpu_leakage_params(void);
+struct tegra_edp_gpu_leakage_params *tegra13x_get_gpu_leakage_params(void);
 #else
 static inline void tegra_platform_gpu_edp_init(struct thermal_trip_info *trips,
                                        int *num_trips, int margin)
@@ -191,6 +192,9 @@ static inline void tegra_init_gpu_edp_limits(unsigned int regulator_mA)
 static inline struct tegra_edp_gpu_leakage_params
                                        *tegra12x_get_gpu_leakage_params(void)
 { return NULL; }
+static inline struct tegra_edp_gpu_leakage_params
+                                       *tegra13x_get_gpu_leakage_params(void)
+{ return NULL; }
 #endif
 
 
@@ -240,9 +244,13 @@ static inline struct tegra_edp_cpu_leakage_params *tegra14x_get_leakage_params
 #ifdef CONFIG_ARCH_TEGRA_12x_SOC
 struct tegra_edp_cpu_leakage_params *tegra12x_get_leakage_params(int index,
                                                        unsigned int *sz);
+struct tegra_edp_cpu_leakage_params *tegra13x_get_leakage_params(int index,
+                                                       unsigned int *sz);
 #else
 static inline struct tegra_edp_cpu_leakage_params *tegra12x_get_leakage_params
 (int index, unsigned int *sz) { return NULL; }
+static inline struct tegra_edp_cpu_leakage_params *tegra13x_get_leakage_params
+(int index, unsigned int *sz) { return NULL; }
 #endif
 
 #ifdef CONFIG_SYSEDP_FRAMEWORK

diff --git a/arch/arm/mach-tegra/tegra12_edp.c b/arch/arm/mach-tegra/tegra12_edp.c
index dadd16585a6c4fd0708c13d75feee739ba5b3353..b0db4c89776a9e0bee30c6860f4c9daf1eba740f 100644 (file)
--- a/arch/arm/mach-tegra/tegra12_edp.c
+++ b/arch/arm/mach-tegra/tegra12_edp.c
@@ -323,6 +323,57 @@ static struct tegra_edp_cpu_leakage_params t12x_leakage_params[] = {
        },
 };
 
+#define LEAKAGE13_CONSTS_IJK_COMMON                                    \
+{                                                                      \
+       /* i = 0 */                                                     \
+       { {     379418152,   -346934015,    78200120,   -4417754, },    \
+         {   -1206883115,   1104697779,  -249217981,   14061354, },    \
+         {    1254008683,  -1149673559,   259614111,  -14624565, },    \
+         {    -425176538,    391251722,   -88449682,    4972193, },    \
+       },                                                              \
+       /* i = 1 */                                                     \
+       { {    -503813674,    440324321,   -98337254,    5557249, },    \
+         {    1602759501,  -1397938820,   312576285,  -17649754, },    \
+         {   -1665439839,   1449369020,  -324538025,   18306811, },    \
+         {     565165401,   -490769906,   110089714,   -6198017, },    \
+       },                                                              \
+       /* i = 2 */                                                     \
+       { {     173847877,   -151521690,    33543642,   -1892650, },    \
+         {    -551852158,    480614203,  -106527695,    6012566, },    \
+         {     571798826,   -497665481,   110462057,   -6235968, },    \
+         {    -193342746,    168293820,   -37412123,    2112012, },    \
+       },                                                              \
+       /* i = 3 */                                                     \
+       { {     -16787513,     14607225,    -3223101,     181933, },    \
+         {      53238061,    -46295241,    10228756,    -577786, },    \
+         {     -55099102,     47886289,   -10596814,     598956, },    \
+         {      18611025,    -16172040,     3585182,    -202741, },    \
+       },                                                              \
+}
+
+#define EDP13_PARAMS_COMMON_PART                                       \
+       .temp_scaled      = 10,                                         \
+       .dyn_scaled       = 1000,                                       \
+       .dyn_consts_n     = { 2700, 4900 },                             \
+       .consts_scaled    = 100,                                        \
+       .leakage_consts_n = { 60, 100 },                                \
+       .ijk_scaled       = 10000,                                      \
+       .leakage_min      = 30,                                         \
+       /* .safety_cap       = { 2400000, 2200000, }, */                \
+       /* .volt_temp_cap = { 70, 1240 }, - TODO for T132 */            \
+       .leakage_consts_ijk = LEAKAGE13_CONSTS_IJK_COMMON
+
+static struct tegra_edp_cpu_leakage_params t13x_leakage_params[] = {
+       {
+               .cpu_speedo_id      = 0, /* Engg SKU */
+               EDP13_PARAMS_COMMON_PART,
+       },
+       {
+               .cpu_speedo_id      = 1, /* Engg SKU */
+               EDP13_PARAMS_COMMON_PART,
+       },
+};
+
 #ifdef CONFIG_TEGRA_GPU_EDP
 static struct tegra_edp_gpu_leakage_params t12x_gpu_leakage_params = {
        .temp_scaled      = 10,
@@ -364,6 +415,11 @@ struct tegra_edp_gpu_leakage_params *tegra12x_get_gpu_leakage_params(void)
 {
        return &t12x_gpu_leakage_params;
 }
+
+struct tegra_edp_gpu_leakage_params *tegra13x_get_gpu_leakage_params(void)
+{
+       return &t12x_gpu_leakage_params; /* T132 has same GPU_EDP params */
+}
 #endif
 
 struct tegra_edp_cpu_leakage_params *tegra12x_get_leakage_params(int index,
@@ -374,6 +430,15 @@ struct tegra_edp_cpu_leakage_params *tegra12x_get_leakage_params(int index,
                *sz = ARRAY_SIZE(t12x_leakage_params);
        return &t12x_leakage_params[index];
 }
+
+struct tegra_edp_cpu_leakage_params *tegra13x_get_leakage_params(int index,
+                                                       unsigned int *sz)
+{
+       BUG_ON(index >= ARRAY_SIZE(t13x_leakage_params));
+       if (sz)
+               *sz = ARRAY_SIZE(t13x_leakage_params);
+       return &t13x_leakage_params[index];
+}
 #endif
 
 static struct core_edp_entry *find_edp_entry(int sku, unsigned int regulator_mA)