ARM: tegra: enable averaging for P1761 powermon

Enable 4 sample averaging for P1761 power monitor in triggered
mode. The configuration for triggered mode after this change is as
follows:
 * All channels enabled
 * Conversion time for VBUS and VSHUNT 140us
 * Averaging over 4 samples

Change-Id: I419cf268f2c5995c6b83002b1ec7b933b4080993
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/393913
(cherry picked from commit 930e8ede6aa15ea17271e4540ad4c3ccba68a72d)
Reviewed-on: http://git-master/r/395108
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Steve Rogers <srogers@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a00.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a00.dtsi
index f9ac17187c94aa2bff4366f9205a5cbf228bbd4c..20bdb2745ace61f0842c2058a986f6d09015dff0 100644 (file)
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a00.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a00.dtsi
@@ -19,7 +19,7 @@
                ina3221x@40 {
                compatible = "ti,ina3221x";
                        reg = <0x40>;
-                       ti,trigger-config = <0x7003>;
+                       ti,trigger-config = <0x7203>;
                        ti,continuous-config = <0x7c07>;
                        #address-cells = <1>;
                        #size-cells = <0>;

diff --git a/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a02.dtsi b/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a02.dtsi
index cd578cdfc4d4eaf3321e97f37e4a38064c36349f..07f05b7e8e6e32449adaeb995ab61f0e2bdcbf97 100644 (file)
--- a/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a02.dtsi
+++ b/arch/arm/boot/dts/tegra124-platforms/tegra124-tn8-powermon-p1761-a02.dtsi
@@ -19,7 +19,7 @@
                ina3221x@40 {
                compatible = "ti,ina3221x";
                        reg = <0x40>;
-                       ti,trigger-config = <0x7003>;
+                       ti,trigger-config = <0x7203>;
                        ti,continuous-config = <0x7c07>;
                        #address-cells = <1>;
                        #size-cells = <0>;