gpu: nvgpu: Move clk bypass div code to clk init

Clock bypass divider was changed just before resetting priv ring.
Move the code to a new clk op instead so that it is executed only on
gk20a.

Change-Id: Ic8084a4a5fac23770f50b50f910ced2543ba0f28
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/764975
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>

diff --git a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
index 44f8fb64ffb5404d3394e9e71d9619861f01ecd5..e10df6ac357fe34cb17dbe9c0ab0df072c68360d 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/clk_gk20a.c
@@ -629,6 +629,17 @@ static int gk20a_clk_register_export_ops(struct gk20a *g)
        return ret;
 }
 
+static void gk20a_clk_disable_slowboot(struct gk20a *g)
+{
+       u32 data;
+
+       data = gk20a_readl(g, trim_sys_gpc2clk_out_r());
+       data = set_field(data,
+                       trim_sys_gpc2clk_out_bypdiv_m(),
+                       trim_sys_gpc2clk_out_bypdiv_f(0));
+       gk20a_writel(g, trim_sys_gpc2clk_out_r(), data);
+}
+
 static int gk20a_init_clk_support(struct gk20a *g)
 {
        struct clk_gk20a *clk = &g->clk;
@@ -695,6 +706,7 @@ static int gk20a_suspend_clk_support(struct gk20a *g)
 
 void gk20a_init_clk_ops(struct gpu_ops *gops)
 {
+       gops->clk.disable_slowboot = gk20a_clk_disable_slowboot;
        gops->clk.init_clk_support = gk20a_init_clk_support;
        gops->clk.suspend_clk_support = gk20a_suspend_clk_support;
 }

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.c b/drivers/gpu/nvgpu/gk20a/gk20a.c
index b56eff0cee51c3f1da549553fa0077380a33360a..b1e1915826419d60d6b7add62930139934114ce7 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.c
@@ -780,6 +780,9 @@ static int gk20a_pm_finalize_poweron(struct device *dev)
                                bus_intr_en_0_pri_fecserr_m() |
                                bus_intr_en_0_pri_timeout_m());
 
+       if (g->ops.clk.disable_slowboot)
+               g->ops.clk.disable_slowboot(g);
+
        gk20a_reset_priv_ring(g);
 
        /* TBD: move this after graphics init in which blcg/slcg is enabled.

diff --git a/drivers/gpu/nvgpu/gk20a/gk20a.h b/drivers/gpu/nvgpu/gk20a/gk20a.h
index fc2ed64325466789d004a8ed9c96efe1631ecd34..72f1178ba7987e2d58f6ba0095cd74422bf99b34 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/gk20a.h
+++ b/drivers/gpu/nvgpu/gk20a/gk20a.h
@@ -392,6 +392,7 @@ struct gpu_ops {
                bool fecsbootstrapdone;
        } pmu;
        struct {
+               void (*disable_slowboot)(struct gk20a *g);
                int (*init_clk_support)(struct gk20a *g);
                int (*suspend_clk_support)(struct gk20a *g);
        } clk;

diff --git a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
index d11cff06cac7d647dd405372c63f90954c9a1a8d..d19702bb09e8484bd5af2374aec00dd3958d14c5 100644 (file)
--- a/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
+++ b/drivers/gpu/nvgpu/gk20a/priv_ring_gk20a.c
@@ -22,21 +22,12 @@
 #include "hw_mc_gk20a.h"
 #include "hw_pri_ringmaster_gk20a.h"
 #include "hw_pri_ringstation_sys_gk20a.h"
-#include "hw_trim_gk20a.h"
 
 void gk20a_reset_priv_ring(struct gk20a *g)
 {
-       u32 data;
-
        if (tegra_platform_is_linsim())
                return;
 
-       data = gk20a_readl(g, trim_sys_gpc2clk_out_r());
-       data = set_field(data,
-                       trim_sys_gpc2clk_out_bypdiv_m(),
-                       trim_sys_gpc2clk_out_bypdiv_f(0));
-       gk20a_writel(g, trim_sys_gpc2clk_out_r(), data);
-
        gk20a_reset(g, mc_enable_priv_ring_enabled_f());
 
        if (g->ops.clock_gating.slcg_priring_load_gating_prod)