video: tegra: dc: select right windows for update

Use win->idx instead of windows table index to select right window
for tegra_dc_update_windows and tegra_dc_windows_are_clean funcs.

bug 1467186

Change-Id: I2e0f660556ad175205f173ca28195ac788eca08b
Signed-off-by: Jong Kim <jongk@nvidia.com>
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/377514
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>

diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c
index 3506724ea6decabb2b5495c90aca86afcbd45189..f2607456ba42e87e385955bb2b8c7084641af57e 100644 (file)
--- a/drivers/video/tegra/dc/dc.c
+++ b/drivers/video/tegra/dc/dc.c
@@ -2508,7 +2508,7 @@ void tegra_dc_blank(struct tegra_dc *dc)
        struct tegra_dc_win *dcwins[DC_N_WINDOWS];
        unsigned i;
 
-       for_each_set_bit(i, &dc->valid_windows, DC_N_WINDOWS) {
+       for (i = 0; i < DC_N_WINDOWS; i++) {
                dcwins[i] = tegra_dc_get_window(dc, i);
                if (!dcwins[i])
                        continue;

diff --git a/drivers/video/tegra/dc/window.c b/drivers/video/tegra/dc/window.c
index 8bf2369e8af9993630d0a81393dbeb6df44c5a56..075393f2eddb0fb6e16529d1707730db041fac02 100644 (file)
--- a/drivers/video/tegra/dc/window.c
+++ b/drivers/video/tegra/dc/window.c
@@ -3,7 +3,7 @@
  *
  * Copyright (C) 2010 Google, Inc.
  *
- * Copyright (c) 2010-2013, NVIDIA CORPORATION, All rights reserved.
+ * Copyright (c) 2010-2014, NVIDIA CORPORATION, All rights reserved.
  *
  * This software is licensed under the terms of the GNU General Public
  * License version 2, as published by the Free Software Foundation, and
@@ -39,7 +39,13 @@ static bool tegra_dc_windows_are_clean(struct tegra_dc_win *windows[],
 
        mutex_lock(&dc->lock);
        for (i = 0; i < n; i++) {
-               if (windows[i]->dirty) {
+               struct tegra_dc_win *dc_win;
+               if (windows[i] == NULL)
+                       continue;
+               dc_win = tegra_dc_get_window(dc, windows[i]->idx);
+               if (WARN_ON(dc_win == NULL))
+                       continue;
+               if (dc_win->dirty) {
                        mutex_unlock(&dc->lock);
                        return false;
                }
@@ -478,21 +484,35 @@ int tegra_dc_update_windows(struct tegra_dc_win *windows[], int n)
                tegra_dc_writel(dc, WRITE_MUX_ASSEMBLY | READ_MUX_ASSEMBLY,
                        DC_CMD_STATE_ACCESS);
 
-       for_each_set_bit(i, &dc->valid_windows, n) {
-               struct tegra_dc_win *win = windows[i];
-               struct tegra_dc_win *dc_win = tegra_dc_get_window(dc, win->idx);
+       for (i = 0; i < n; i++) {
+               struct tegra_dc_win *win;
+               struct tegra_dc_win *dc_win;
                bool scan_column = 0;
                fixed20_12 h_offset, v_offset;
-               bool invert_h = (win->flags & TEGRA_WIN_FLAG_INVERT_H) != 0;
-               bool invert_v = (win->flags & TEGRA_WIN_FLAG_INVERT_V) != 0;
-               bool yuv = tegra_dc_is_yuv(win->fmt);
-               bool yuvp = tegra_dc_is_yuv_planar(win->fmt);
-               bool yuvsp = tegra_dc_is_yuv_semi_planar(win->fmt);
-               unsigned Bpp = tegra_dc_fmt_bpp(win->fmt) / 8;
+               bool invert_h;
+               bool invert_v;
+               bool yuv;
+               bool yuvp;
+               bool yuvsp;
+               unsigned Bpp;
                /* Bytes per pixel of bandwidth, used for dda_inc calculation */
-               unsigned Bpp_bw = Bpp * ((yuvp || yuvsp) ? 2 : 1);
+               unsigned Bpp_bw;
                bool filter_h;
                bool filter_v;
+               win = windows[i];
+               if (win == NULL)
+                       continue;
+               if (WARN_ON(!test_bit(win->idx, &dc->valid_windows)))
+                       continue;
+               dc_win = tegra_dc_get_window(dc, win->idx);
+               invert_h = (win->flags & TEGRA_WIN_FLAG_INVERT_H) != 0;
+               invert_v = (win->flags & TEGRA_WIN_FLAG_INVERT_V) != 0;
+               yuv = tegra_dc_is_yuv(win->fmt);
+               yuvp = tegra_dc_is_yuv_planar(win->fmt);
+               yuvsp = tegra_dc_is_yuv_semi_planar(win->fmt);
+               Bpp = tegra_dc_fmt_bpp(win->fmt) / 8;
+               /* Bytes per pixel of bandwidth, used for dda_inc calculation */
+               Bpp_bw = Bpp * ((yuvp || yuvsp) ? 2 : 1);
 #if defined(CONFIG_TEGRA_DC_SCAN_COLUMN)
                scan_column = (win->flags & TEGRA_WIN_FLAG_SCAN_COLUMN);
 #endif