arm: tegra12: ardbeg: Support E1792 with E1735

Fix DDR rail voltage set higher than required for LPDDR3

Bug 1350759

Change-Id: I168b1371d870489acfac0e35ac314a9559080848
Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>
Reviewed-on: http://git-master/r/289905
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>

diff --git a/arch/arm/mach-tegra/board-ardbeg-power.c b/arch/arm/mach-tegra/board-ardbeg-power.c
index 22c03ce83e031774776fb2cf7aa8131368345c4e..455d8dc2829bed2aac2fe352a7613e83cfac56ef 100644 (file)
--- a/arch/arm/mach-tegra/board-ardbeg-power.c
+++ b/arch/arm/mach-tegra/board-ardbeg-power.c
@@ -640,6 +640,7 @@ int __init ardbeg_tps65913_regulator_init(void)
        tegra_get_board_info(&board_info);
        if (board_info.board_id == BOARD_E1792) {
                /*Default DDR voltage is 1.35V but lpddr3 supports 1.2V*/
+               reg_idata_ti913_smps7.constraints.min_uV = 1200000;
                reg_idata_ti913_smps7.constraints.max_uV = 1200000;
        }