struct tegra_dma_channel_regs ch_regs;
int req_len;
bool configured;
+ bool skipped;
bool last_sg;
bool half_done;
struct list_head node;
if (status & TEGRA_APBDMA_STATUS_ISE_EOC) {
dev_err(tdc2dev(tdc),
"Skipping new configuration as interrupt is pending\n");
+ nsg_req->skipped = true;
tegra_dma_resume(tdc);
return;
}
tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,
nsg_req->ch_regs.csr | TEGRA_APBDMA_CSR_ENB);
nsg_req->configured = true;
+ nsg_req->skipped = false;
tegra_dma_resume(tdc);
}
typeof(*sg_req), node);
tegra_dma_start(tdc, sg_req);
sg_req->configured = true;
+ sg_req->skipped = false;
tdc->busy = true;
}
* looping of transfer can not continue.
*/
hsgreq = list_first_entry(&tdc->pending_sg_req, typeof(*hsgreq), node);
- if (!hsgreq->configured) {
+ if (!hsgreq->configured && !hsgreq->skipped) {
tegra_dma_stop(tdc);
dev_err(tdc2dev(tdc), "Error in dma transfer, aborting dma\n");
tegra_dma_abort_all(tdc);
if (!list_is_last(&sgreq->node, &tdc->pending_sg_req)) {
list_move_tail(&sgreq->node, &tdc->pending_sg_req);
sgreq->configured = false;
+ sgreq->skipped = false;
st = handle_continuous_head_request(tdc, sgreq, to_terminate);
if (!st)
dma_desc->dma_status = DMA_ERROR;
sg_req->ch_regs.apb_seq = apb_seq;
sg_req->ch_regs.ahb_seq = ahb_seq;
sg_req->configured = false;
+ sg_req->skipped = false;
sg_req->last_sg = false;
sg_req->dma_desc = dma_desc;
sg_req->req_len = len;
sg_req->ch_regs.apb_seq = apb_seq;
sg_req->ch_regs.ahb_seq = ahb_seq;
sg_req->configured = false;
+ sg_req->skipped = false;
sg_req->half_done = false;
sg_req->last_sg = false;
sg_req->dma_desc = dma_desc;