GR status disable mask was never set, so driver always disabled all
engines from status rollup.
Change-Id: I500a127be9253294f73d1f42ce89b886471a9117
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/719141
gk20a_writel(g, gr_exception2_r(), 0xFFFFFFFF);
gk20a_writel(g, gr_exception2_en_r(), 0xFFFFFFFF);
- /* ignore status from some units */
- data = gk20a_readl(g, gr_status_mask_r());
- gk20a_writel(g, gr_status_mask_r(), data & gr->status_disable_mask);
-
gr_gk20a_load_zbc_table(g, gr);
g->ops.ltc.init_cbc(g, gr);
s32 max_used_color_index;
s32 max_used_depth_index;
- u32 status_disable_mask;
-
#define GR_CHANNEL_MAP_TLB_SIZE 2 /* must of power of 2 */
struct gr_channel_map_tlb_entry chid_tlb[GR_CHANNEL_MAP_TLB_SIZE];
u32 channel_tlb_flush_index;