arm: tegra124: p2360: Remove genric dtb file

This patch creates removes generic p2360 dts file as there are revision
based dts files already created by previous commits

bug 200106801

Change-Id: Id1385d830e5e869b8a2dd00f3320763ee28435ea
Signed-off-by: Vipin Kumar <vipink@nvidia.com>
Reviewed-on: http://git-master/r/759140
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sumeet Gupta <sumeetg@nvidia.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index a704784443980b429e4393e6a1c5c53cdc10e8b3..0a87bd15c3a334e3ae483f5cd1275e6fb9cd771e 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -267,7 +267,6 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
        tegra124-p1859-vm_1.dtb \
        tegra124-p1859-vm_2.dtb \
        tegra124-p1889.dtb \
-       tegra124-p2360.dtb \
        tegra124-p2360-b00.dtb \
        tegra124-p2360-b01.dtb \
        tegra124-p1855.dtb \

diff --git a/arch/arm/boot/dts/tegra124-p2360.dts b/arch/arm/boot/dts/tegra124-p2360.dts
deleted file mode 100644 (file)
index 6fa5a10..0000000
--- a/arch/arm/boot/dts/tegra124-p2360.dts
+++ /dev/null
@@ -1,306 +0,0 @@
-/*
- * arch/arm/boot/dts/tegra124-p2360.dts
- *
- * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
- *
- */
-
- /dts-v1/;
-
-#include "tegra124-vcm30_t124.dtsi"
-#include <tegra124-platforms/tegra124-vcm30-t124-hdmi.dtsi>
-#include <panel-a-lvds-800-480-14-0.dtsi>
-#include <dt-bindings/display/tegra-panel.h>
-#include <tegra124-platforms/tegra124-pmic-vcm30t124-max20024.dtsi>
-
-/ {
-       model = "NVIDIA Tegra124 p2360";
-       compatible = "nvidia,p2360", "nvidia,tegra124";
-       nvidia,dtsfilename = __FILE__;
-       #address-cells = <2>;
-       #size-cells = <2>;
-
-       host1x {
-               sor {
-                       status = "okay";
-                       panel-lvds-800-480 {
-                               status = "okay";
-                               disp-default-out {
-                                       nvidia,out-max-pixclk = <3367>;
-                               };
-                       };
-               };
-               /* tegradc.0 */
-               dc@54200000 {
-                       nvidia,dc-flags = <TEGRA_DC_FLAG_ENABLED>;
-                       nvidia,emc-clk-rate = <300000000>;
-                       nvidia,fb-bpp = <32>; /* bits per pixel */
-                       status = "okay";
-               };
-               /* tegradc.1 */
-               dc@54240000 {
-                       nvidia,emc-clk-rate = <300000000>;
-                       nvidia,fb-bpp = <32>; /* bits per pixel */
-                       status = "okay";
-               };
-               hdmi {
-                       nvidia,hpd-gpio = <&gpio 0xFFFFFFFF 1>; /* hotplug less HDMI */
-                       hdmi-display {
-                               nvidia,edid = [00 FF FF FF FF FF FF 00 04 21 00 00 00 00 00 00
-                                               01 00 01 03 00 00 00 00 00 00 00 00 00 00 00 00
-                                               00 00 00 00 00 00 01 01 01 01 01 01 01 01 01 01
-                                               01 01 01 01 01 01 FE 0C 20 00 31 E0 2D 10 40 40
-                                               43 00 00 00 00 00 00 00 00 00 00 10 00 00 00 00
-                                               00 00 00 00 00 00 00 00 00 00 00 00 00 10 00 00
-                                               00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 10
-                                               00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 61];
-                               nvidia,hdmi-fpd-bridge = <TEGRA_HDMI_ENABLE>;
-                       };
-               };
-       };
-
-       i2c@7000c700 {
-               fpd-serializer@0c {
-                       compatible = "ti,ds90uh949";
-                       reg = <0x0c>;
-                       ti,enable-gpio = <&gpio TEGRA_GPIO(R, 4) 0>; /*PR4*/
-                       ti,power-on-delay = <4>;
-                       ti,power-off-delay = <3>;
-               };
-       };
-
-       i2c@7000d000 {
-               status = "okay";
-
-               max16989@3a {
-                       compatible = "maxim,max16989";
-                       reg = <0x3a>;
-                       regulator-name = "max16989-vdd-cpu";
-                       regulator-min-microvolt = <500000>;
-                       regulator-max-microvolt = <1500000>;
-                       consumers {
-                               c1 {
-                                       regulator-consumer-supply = "vdd_cpu";
-                               };
-                       };
-               };
-
-               max16989@38 {
-                       compatible = "maxim,max16989";
-                       reg = <0x38>;
-                       regulator-name = "max16989-vdd-gpu";
-                       regulator-min-microvolt = <500000>;
-                       regulator-max-microvolt = <1500000>;
-                       maxim,enable-gpio = <&gpio TEGRA_GPIO(R, 2) 0>;
-                       regulator-enable-ramp-delay = <210>;
-                       consumers {
-                               c1 {
-                                       regulator-consumer-supply = "vdd_gpu";
-                               };
-                       };
-               };
-
-               max16989@3b {
-                       compatible = "maxim,max16989";
-                       reg = <0x3b>;
-                       regulator-name = "max16989-vdd-gpu";
-                       regulator-min-microvolt = <500000>;
-                       regulator-max-microvolt = <1500000>;
-                       enable-gpio = <&gpio TEGRA_GPIO(R, 2) 0>;
-                       regulator-enable-ramp-delay = <210>;
-                       consumers {
-                               c1 {
-                                       regulator-consumer-supply = "vdd_gpu";
-                               };
-                       };
-               };
-       };
-
-
-       serial@70006040 {
-               compatible = "nvidia,tegra20-uart";
-               console-port;
-               status = "okay";
-       };
-
-       spi@7000d400 {
-               status = "okay";
-               compatible = "nvidia,tegra124-spi-slave";
-               nvidia,clk-pin = "gpio_x5_aud_px5";
-               nvidia,slave-ready-gpio = <&gpio TEGRA_GPIO(K, 4) GPIO_ACTIVE_HIGH>; /*PK4*/
-               nvidia,rx-trigger-words = <0>;
-       };
-
-       spi@7000d600 {
-               status = "okay";
-               nvidia,maximum-dma-buffer-size = <65536>;
-
-               spi@1 {
-                       status = "disabled";
-               };
-
-               spiflash@1 {
-                       compatible = "s25fl512s";
-                       reg = <1>;
-                       spi-max-frequency = <25000000>;
-               };
-       };
-
-       spi@7000d800 {
-               status = "okay";
-               compatible = "nvidia,tegra124-spi-slave";
-               nvidia,clk-pin = "ulpi_data2_po3";
-               nvidia,slave-ready-gpio = <&gpio TEGRA_GPIO(O, 2) GPIO_ACTIVE_HIGH>; /*PO2*/
-               nvidia,rx-trigger-words = <0>;
-       };
-
-       spi@7000dc00 {
-               status = "okay";
-               compatible = "nvidia,tegra124-spi-slave";
-               nvidia,clk-pin = "ulpi_nxt_py2";
-               nvidia,slave-ready-gpio = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>; /*PI3*/
-               nvidia,rx-trigger-words = <0>;
-       };
-
-       pcie-controller {
-               status = "okay";
-               nvidia,boot-detect-delay = <10000>;
-
-               pci@1,0 {
-                       status = "okay";
-               };
-
-               pci@2,0 {
-                       status = "okay";
-               };
-               prod-settings {
-                       prod_c_pad {
-                               prod = <
-                                       0x000000C8 0x00000000 0x34ac44ac        // PADS_REFCLK_CFG0
-                               >;
-                       };
-                       prod_c_rp {
-                               prod = <
-                                       /*Keeping 0x00000FD8 from tegra124-prods.dtsi to avoid overwriting*/
-                                       0x00000FD8 0x0FFFF0FF 0x30000D00        // RP_ECTL_1_R2_0       31:28,11:8=TX_DRV_CNTL_1C,TX_CMADJ_1C   0x3,0xD
-                                       0x00000FD4 0x0FFFFF0F 0x10000020        // PCIE2_RP_ECTL_1_R1_1
-                               >;
-                       };
-               };
-
-       };
-
-       sdhci@700b0600 {
-               status = "okay";
-       };
-
-       snor {
-               status = "okay";
-       };
-
-       ehci@7d000000 {
-               nvidia,is-intf-utmi;
-               status = "disabled";
-       };
-
-       ehci@7d004000 {
-               nvidia,is-intf-utmi;
-               status = "okay";
-       };
-
-       ehci@7d008000 {
-               nvidia,is-intf-utmi;
-               status = "okay";
-       };
-
-       smmu: iommu {
-               #asids = <120>;
-       };
-
-       cpu_dfll_pmic_integration {
-               pmic-i2c-address = <0x74>;
-               pmic-i2c-voltage-register = <0x07>;
-               i2c-fs-rate = <400000>;
-               sel-conversion-slope = <1>;
-       };
-
-       isc-mgr.0 {
-               compatible = "nvidia,isc-mgr";
-               i2c-bus = <2>;
-               csi-port = <0>;
-               pwdn-gpios = < &gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_HIGH  /* GMSL_IN1_PDN */
-                       &gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH         /* CSI1_TV_EN1 */
-                       &gpio TEGRA_GPIO(K, 2) GPIO_ACTIVE_HIGH         /* CSI1_TV_EN2 */
-                       &gpio TEGRA_GPIO(K, 0) GPIO_ACTIVE_HIGH         /* CSI1_TV_EN3 */
-                       &gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;       /* CSI1_TV_EN4 */
-               /* default-power-on; */
-               interrupt-parent = <&gpio>;
-               interrupts = <TEGRA_GPIO(S, 3) 2>; /* gpio PS3 : falling edge sensitive */
-               status = "okay";
-       };
-
-       isc-mgr.1 {
-               compatible = "nvidia,isc-mgr";
-               i2c-bus = <0>;
-               csi-port = <2>;
-               /* default-power-on; */
-               interrupt-parent = <&gpio>;
-               interrupts = <TEGRA_GPIO(R, 3) 2>; /* gpio PR3 : falling edge sensitive */
-               status = "okay";
-       };
-
-       isc-mgr.2 {
-               compatible = "nvidia,isc-mgr";
-               i2c-bus = <0>;
-               csi-port = <4>;
-               /* default-power-on; */
-               status = "okay";
-       };
-
-       regulators {
-               compatible = "simple-bus";
-               device_type = "fixed-regulators";
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               vdd_fuse: regulator@1 {
-                       compatible = "regulator-fixed-sync";
-                       regulator-name = "vdd_fuse";
-                       regulator-min-microvolt = <3300000>;
-                       regulator-max-microvolt = <3300000>;
-                       gpio = <&max20024 0 0>;
-                       enable-active-high;
-               };
-       };
-
-       /* Populate fuse supply */
-       efuse@7000f800 {
-               vpp_fuse-supply = <&vdd_fuse>;
-       };
-
-       udc@7d000000 {
-               prod-settings {
-                       #prod-cells = <3>;
-                       phy_prod {
-                               prod = <
-                                       0x00000808 0x01C0003F 0x06002A0B        // USB1_UTMIP_XCVR_CFG0_0
-                               >;
-                       };
-               };
-
-       };
-
-};

diff --git a/arch/arm/boot/dts/tegra124-p2360.dtsi b/arch/arm/boot/dts/tegra124-p2360.dtsi
index a416b9657bd9b85b56d033385be1a5e7e7b66bc4..1061a422a8094c83a09fb6e03d100ca376e4b5de 100644 (file)
--- a/arch/arm/boot/dts/tegra124-p2360.dtsi
+++ b/arch/arm/boot/dts/tegra124-p2360.dtsi
@@ -192,6 +192,20 @@
                pci@2,0 {
                        status = "okay";
                };
+               prod-settings {
+                       prod_c_pad {
+                               prod = <
+                                       0x000000C8 0x00000000 0x34ac44ac        // PADS_REFCLK_CFG0
+                               >;
+                       };
+                       prod_c_rp {
+                               prod = <
+                                       /*Keeping 0x00000FD8 from tegra124-prods.dtsi to avoid overwriting*/
+                                       0x00000FD8 0x0FFFF0FF 0x30000D00        // RP_ECTL_1_R2_0       31:28,11:8=TX_DRV_CNTL_1C,TX_CMADJ_1C   0x3,0xD
+                                       0x00000FD4 0x0FFFFF0F 0x10000020        // PCIE2_RP_ECTL_1_R1_1
+                               >;
+                       };
+               };
        };
 
        sdhci@700b0600 {
@@ -247,6 +261,14 @@
                status = "okay";
        };
 
+       isc-mgr.2 {
+               compatible = "nvidia,isc-mgr";
+               i2c-bus = <0>;
+               csi-port = <4>;
+               /* default-power-on; */
+               status = "okay";
+       };
+
        regulators {
                compatible = "simple-bus";
                device_type = "fixed-regulators";
@@ -268,4 +290,16 @@
                vpp_fuse-supply = <&vdd_fuse>;
        };
 
+       udc@7d000000 {
+               prod-settings {
+                       #prod-cells = <3>;
+                       phy_prod {
+                               prod = <
+                                       0x00000808 0x01C0003F 0x06002A0B        // USB1_UTMIP_XCVR_CFG0_0
+                               >;
+                       };
+               };
+
+       };
+
 };