mmc: tegra: Set percentage of pass window to 50%

Bug 1547083

Change-Id: I13f73865a6f026af5dec0e45dd9ec92755fd8f89
Signed-off-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/654042
(cherry picked from commit b1eadb53c6526c36b77e9b5ab772d83efa8d77fa)
Reviewed-on: http://git-master/r/655108
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>

diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 5839fed49260c7d0626f2e9494e3569aa704e505..a172c3c4feb678af96b9acfce2e717ae2be9cdbc 100644 (file)
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -96,6 +96,10 @@
 #define SDHCI_VNDR_DLLCAL_CFG_STATUS_DLL_ACTIVE                0x80000000
 
 #define SDHCI_VNDR_TUN_CTRL0_0                         0x1c0
+/*MUL_M is defined in [12:6] bits*/
+#define SDHCI_VNDR_TUN_CTRL0_0_MUL_M                   0x1FC0
+/* To Set value of [12:6] as 1 */
+#define SDHCI_VNDR_TUN_CTRL0_0_MUL_M_VAL               0x40
 #define SDHCI_VNDR_TUN_CTRL1_0                         0x1c4
 /* Enable Re-tuning request only when CRC error is detected
  * in SDR50/SDR104/HS200 modes
@@ -1464,6 +1468,8 @@ static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask)
 
        if (soc_data->nvquirks2 & NVQUIRK2_UPDATE_HW_TUNING_CONFG) {
                vendor_ctrl = sdhci_readl(host, SDHCI_VNDR_TUN_CTRL0_0);
+               vendor_ctrl &= ~(SDHCI_VNDR_TUN_CTRL0_0_MUL_M);
+               vendor_ctrl |= SDHCI_VNDR_TUN_CTRL0_0_MUL_M_VAL;
                vendor_ctrl |= SDHCI_VNDR_TUN_CTRL_RETUNE_REQ_EN;
                vendor_ctrl |= SDHCI_VNDR_TUN_CTRL0_TUN_ITERATIONS;
                sdhci_writel(host, vendor_ctrl, SDHCI_VNDR_TUN_CTRL0_0);