To preserve power, run PCIE @ GEN1 speed.
This will introduce cap on pciex clock to 250Mhz
Bug
1483563
Change-Id: Iedc05870647368523070a8033e7cbba1e0bc2b43
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/384368
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
PR_FUNC_LINE;
/* configure all links to gen2 speed by default */
- if (!tegra_pcie_link_speed(true))
+ if (!tegra_pcie_link_speed(false))
pr_info("PCIE: No Link speed change happened\n");
tegra_pcie_pll_pdn();