]> rtime.felk.cvut.cz Git - sojka/nv-tegra/linux-3.10.git/commitdiff
video: tegra: host: Set CB defaults per GPU ver
authorTerje Bergstrom <tbergstrom@nvidia.com>
Mon, 27 Jan 2014 11:00:10 +0000 (13:00 +0200)
committerJuha Tukkinen <jtukkinen@nvidia.com>
Thu, 30 Jan 2014 14:06:53 +0000 (06:06 -0800)
Bug 1387211

Change-Id: Iebf41a4d0f47915fbfaea57e4bb0e269634e5e4d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/360814
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
drivers/video/tegra/host/gk20a/gk20a.h
drivers/video/tegra/host/gk20a/gr_gk20a.c

index ca3eaff42ef9702facd3dadd1d39f5f17f7fcf8d..a9b1961bfa22bea83e31e41a0dc2563c5aaab5b3 100644 (file)
@@ -62,6 +62,7 @@ struct gpu_ops {
        } ltc;
        struct {
                void (*access_smpc_reg)(struct gk20a *g, u32 quad, u32 offset);
+               void (*bundle_cb_defaults)(struct gk20a *g);
        } gr;
 };
 
index 71f6c946d82f3937a290b8b1dbc446b18a5f22ec..6c2c8aead08999e85aac2e27315d6df267917ea8 100644 (file)
@@ -2749,6 +2749,18 @@ static void gk20a_remove_gr_support(struct gr_gk20a *gr)
        nvhost_allocator_destroy(&gr->comp_tags);
 }
 
+static void gr_gk20a_bundle_cb_defaults(struct gk20a *g)
+{
+       struct gr_gk20a *gr = &g->gr;
+
+       gr->bundle_cb_default_size =
+               gr_scc_bundle_cb_size_div_256b__prod_v();
+       gr->min_gpm_fifo_depth =
+               gr_pd_ab_dist_cfg2_state_limit_min_gpm_fifo_depths_v();
+       gr->bundle_cb_token_limit =
+               gr_pd_ab_dist_cfg2_token_limit_init_v();
+}
+
 static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
 {
        u32 gpc_index, pes_index;
@@ -2897,9 +2909,7 @@ static int gr_gk20a_init_gr_config(struct gk20a *g, struct gr_gk20a *gr)
                                   pes_index, gpc_index,
                                   gr->pes_tpc_mask[pes_index][gpc_index]);
 
-       gr->bundle_cb_default_size = gr_scc_bundle_cb_size_div_256b__prod_v();
-       gr->min_gpm_fifo_depth = gr_pd_ab_dist_cfg2_state_limit_min_gpm_fifo_depths_v();
-       gr->bundle_cb_token_limit = gr_pd_ab_dist_cfg2_token_limit_init_v();
+       g->ops.gr.bundle_cb_defaults(g);
        gr->attrib_cb_default_size = gr_gpc0_ppc0_cbm_cfg_size_default_v();
        /* gk20a has a fixed beta CB RAM, don't alloc more */
        gr->attrib_cb_size = gr->attrib_cb_default_size;
@@ -6628,4 +6638,5 @@ int gr_gk20a_exec_ctx_ops(struct channel_gk20a *ch,
 void gk20a_init_gr(struct gpu_ops *gops)
 {
        gops->gr.access_smpc_reg = gr_gk20a_access_smpc_reg;
+       gops->gr.bundle_cb_defaults = gr_gk20a_bundle_cb_defaults;
 }