irqchip: enable FIQ for AGIC

Enabling FIQ for AGIC so that FIQ can be triggered on ADSP in case
there is a necessity to put in idle state.

Bug 200031688
Bug 200031683

Change-Id: I9d3f487cef04d718965c573831eef1f2fbe2cd00
Signed-off-by: Ajay Nandakumar <anandakumarm@nvidia.com>
Reviewed-on: http://git-master/r/488846
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 95ed662fc2c3f2af14116fb09dbeb9bdf62c2755..e962f0a21fa497072e0cdbf2f2d70a0f1efbd7ab 100644 (file)
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -614,7 +614,16 @@ static void __init gic_dist_init(struct gic_chip_data *gic)
        for (i = 32; i < gic_irqs; i += 32)
                writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32);
 
-       writel_relaxed(1, base + GIC_DIST_CTRL);
+       /* make all interrupts as group 1 interrupts */
+       if (!gic->is_percpu)
+               for (i = 0; i < gic_irqs; i += 32)
+                       writel_relaxed(0xffffffff,
+                                       base + GIC_DIST_IGROUP + i * 4 / 32);
+
+       if (gic->is_percpu)
+               writel_relaxed(1, base + GIC_DIST_CTRL);
+       else
+               writel_relaxed(3, base + GIC_DIST_CTRL);
 }
 
 static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
@@ -653,7 +662,12 @@ static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
                writel_relaxed(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4);
 
        writel_relaxed(0xf0, base + GIC_CPU_PRIMASK);
-       writel_relaxed(1, base + GIC_CPU_CTRL);
+
+       if (gic->is_percpu)
+               writel_relaxed(1, base + GIC_CPU_CTRL);
+       else
+               writel_relaxed((1 << 0) | (1 << 1) | (1 << 2),
+                               base + GIC_CPU_CTRL);
 }
 
 #ifdef CONFIG_CPU_PM