Bug
1691158
Change-Id: I429f4498e080b9b2c81a774e1e18e6bc0103e9d5
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: http://git-master/r/812625
GVS: Gerrit_Virtual_Submit
Tested-by: Vishal Agrawal (SW) <visagrawal@nvidia.com>
Reviewed-by: Raghavendra V K <rvk@nvidia.com>
Reviewed-by: Mitch Luban <mluban@nvidia.com>
#define TEGRA_WIN_FMT_YUV422R 23
#define TEGRA_WIN_FMT_YCbCr422RA 24
#define TEGRA_WIN_FMT_YUV422RA 25
+#define TEGRA_WIN_FMT_R5G6B5 34
#define TEGRA_WIN_FMT_A8R8G8B8 35
#define TEGRA_WIN_FMT_A8B8G8R8 36
#define TEGRA_WIN_FMT_B8G8R8X8 37
HIGHBIT(TEGRA_WIN_FMT_YCbCr420SP) | \
HIGHBIT(TEGRA_WIN_FMT_YCrCb422SP) | \
HIGHBIT(TEGRA_WIN_FMT_YCbCr422SP) | \
+ HIGHBIT(TEGRA_WIN_FMT_R5G6B5) | \
HIGHBIT(TEGRA_WIN_FMT_YVU420SP) | \
HIGHBIT(TEGRA_WIN_FMT_YUV420SP) | \
HIGHBIT(TEGRA_WIN_FMT_YVU422SP) | \
case TEGRA_WIN_FMT_B4G4R4A4:
case TEGRA_WIN_FMT_B5G5R5A:
case TEGRA_WIN_FMT_B5G6R5:
+ case TEGRA_WIN_FMT_R5G6B5:
case TEGRA_WIN_FMT_AB5G5R5:
case TEGRA_WIN_FMT_T_R4G4B4A4:
return 16;