2 * include/linux/tegra_profiler.h
4 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #ifndef __TEGRA_PROFILER_H
18 #define __TEGRA_PROFILER_H
20 #include <linux/ioctl.h>
22 #define QUADD_SAMPLES_VERSION 25
23 #define QUADD_IO_VERSION 12
25 #define QUADD_IO_VERSION_DYNAMIC_RB 5
26 #define QUADD_IO_VERSION_RB_MAX_FILL_COUNT 6
27 #define QUADD_IO_VERSION_MOD_STATE_STATUS_FIELD 7
28 #define QUADD_IO_VERSION_BT_KERNEL_CTX 8
29 #define QUADD_IO_VERSION_GET_MMAP 9
30 #define QUADD_IO_VERSION_BT_UNWIND_TABLES 10
31 #define QUADD_IO_VERSION_UNWIND_MIXED 11
32 #define QUADD_IO_VERSION_EXTABLES_MMAP 12
34 #define QUADD_SAMPLE_VERSION_THUMB_MODE_FLAG 17
35 #define QUADD_SAMPLE_VERSION_GROUP_SAMPLES 18
36 #define QUADD_SAMPLE_VERSION_THREAD_STATE_FLD 19
37 #define QUADD_SAMPLE_VERSION_BT_UNWIND_TABLES 22
38 #define QUADD_SAMPLE_VERSION_SUPPORT_IP64 23
39 #define QUADD_SAMPLE_VERSION_SPECIAL_MMAP 24
40 #define QUADD_SAMPLE_VERSION_UNWIND_MIXED 25
42 #define QUADD_MAX_COUNTERS 32
43 #define QUADD_MAX_PROCESS 64
45 #define QUADD_DEVICE_NAME "quadd"
46 #define QUADD_AUTH_DEVICE_NAME "quadd_auth"
48 #define QUADD_MOD_DEVICE_NAME "quadd_mod"
49 #define QUADD_MOD_AUTH_DEVICE_NAME "quadd_mod_auth"
51 #define QUADD_IOCTL 100
54 * Setup params (profiling frequency, etc.)
56 #define IOCTL_SETUP _IOW(QUADD_IOCTL, 0, struct quadd_parameters)
61 #define IOCTL_START _IO(QUADD_IOCTL, 1)
66 #define IOCTL_STOP _IO(QUADD_IOCTL, 2)
69 * Getting capabilities
71 #define IOCTL_GET_CAP _IOR(QUADD_IOCTL, 3, struct quadd_comm_cap)
74 * Getting state of module
76 #define IOCTL_GET_STATE _IOR(QUADD_IOCTL, 4, struct quadd_module_state)
79 * Getting version of module
81 #define IOCTL_GET_VERSION _IOR(QUADD_IOCTL, 5, struct quadd_module_version)
84 * Send exception-handling tables info
86 #define IOCTL_SET_EXTAB _IOW(QUADD_IOCTL, 6, struct quadd_extables)
88 #define QUADD_CPUMODE_TEGRA_POWER_CLUSTER_LP (1 << 29) /* LP CPU */
89 #define QUADD_CPUMODE_THUMB (1 << 30) /* thumb mode */
91 enum quadd_events_id {
92 QUADD_EVENT_TYPE_CPU_CYCLES = 0,
94 QUADD_EVENT_TYPE_INSTRUCTIONS,
95 QUADD_EVENT_TYPE_BRANCH_INSTRUCTIONS,
96 QUADD_EVENT_TYPE_BRANCH_MISSES,
97 QUADD_EVENT_TYPE_BUS_CYCLES,
99 QUADD_EVENT_TYPE_L1_DCACHE_READ_MISSES,
100 QUADD_EVENT_TYPE_L1_DCACHE_WRITE_MISSES,
101 QUADD_EVENT_TYPE_L1_ICACHE_MISSES,
103 QUADD_EVENT_TYPE_L2_DCACHE_READ_MISSES,
104 QUADD_EVENT_TYPE_L2_DCACHE_WRITE_MISSES,
105 QUADD_EVENT_TYPE_L2_ICACHE_MISSES,
107 QUADD_EVENT_TYPE_MAX,
118 enum quadd_record_type {
119 QUADD_RECORD_TYPE_SAMPLE = 1,
120 QUADD_RECORD_TYPE_MMAP,
121 QUADD_RECORD_TYPE_MA,
122 QUADD_RECORD_TYPE_COMM,
123 QUADD_RECORD_TYPE_DEBUG,
124 QUADD_RECORD_TYPE_HEADER,
125 QUADD_RECORD_TYPE_POWER_RATE,
126 QUADD_RECORD_TYPE_ADDITIONAL_SAMPLE,
129 enum quadd_event_source {
130 QUADD_EVENT_SOURCE_PMU = 1,
131 QUADD_EVENT_SOURCE_PL310,
134 enum quadd_cpu_mode {
135 QUADD_CPU_MODE_KERNEL = 1,
140 #pragma pack(push, 1)
142 #define QUADD_SAMPLE_UNW_METHOD_SHIFT 0
143 #define QUADD_SAMPLE_UNW_METHOD_MASK (1 << QUADD_SAMPLE_UNW_METHOD_SHIFT)
146 QUADD_UNW_METHOD_FP = 0,
147 QUADD_UNW_METHOD_EHT,
148 QUADD_UNW_METHOD_MIXED,
151 #define QUADD_SAMPLE_URC_SHIFT 1
152 #define QUADD_SAMPLE_URC_MASK (0x0f << QUADD_SAMPLE_URC_SHIFT)
155 QUADD_URC_SUCCESS = 0,
157 QUADD_URC_IDX_NOT_FOUND,
158 QUADD_URC_TBL_NOT_EXIST,
160 QUADD_URC_TBL_IS_CORRUPT,
161 QUADD_URC_CANTUNWIND,
162 QUADD_URC_UNHANDLED_INSTRUCTION,
163 QUADD_URC_REFUSE_TO_UNWIND,
164 QUADD_URC_SP_INCORRECT,
165 QUADD_URC_SPARE_ENCODING,
166 QUADD_URC_UNSUPPORTED_PR,
167 QUADD_URC_PC_INCORRECT,
171 #define QUADD_SED_IP64 (1 << 0)
173 #define QUADD_SED_UNW_METHOD_SHIFT 1
174 #define QUADD_SED_UNW_METHOD_MASK (0x07 << QUADD_SED_UNW_METHOD_SHIFT)
176 struct quadd_sample_data {
193 #define QUADD_MMAP_ED_IS_FILE_EXISTS (1 << 0)
195 struct quadd_mmap_data {
205 struct quadd_ma_data {
213 struct quadd_power_rate_data {
222 struct quadd_additional_sample {
230 QM_DEBUG_SAMPLE_TYPE_SCHED_IN = 1,
231 QM_DEBUG_SAMPLE_TYPE_SCHED_OUT,
233 QM_DEBUG_SAMPLE_TYPE_TIMER_HANDLE,
234 QM_DEBUG_SAMPLE_TYPE_TIMER_START,
235 QM_DEBUG_SAMPLE_TYPE_TIMER_CANCEL,
236 QM_DEBUG_SAMPLE_TYPE_TIMER_FORWARD,
238 QM_DEBUG_SAMPLE_TYPE_READ_COUNTER,
240 QM_DEBUG_SAMPLE_TYPE_SOURCE_START,
241 QM_DEBUG_SAMPLE_TYPE_SOURCE_STOP,
244 struct quadd_debug_data {
260 #define QUADD_HEADER_MAGIC 0x1122
262 struct quadd_header_data {
272 reserved:26; /* reserved fields for future extensions */
282 struct quadd_record_data {
285 /* sample: it should be the biggest size */
287 struct quadd_sample_data sample;
288 struct quadd_mmap_data mmap;
289 struct quadd_ma_data ma;
290 struct quadd_debug_data debug;
291 struct quadd_header_data hdr;
292 struct quadd_power_rate_data power_rate;
293 struct quadd_additional_sample additional_sample;
299 #define QUADD_MAX_PACKAGE_NAME 320
302 QUADD_PARAM_IDX_SIZE_OF_RB = 0,
303 QUADD_PARAM_IDX_EXTRA = 1,
306 #define QUADD_PARAM_EXTRA_GET_MMAP (1 << 0)
307 #define QUADD_PARAM_EXTRA_BT_FP (1 << 1)
308 #define QUADD_PARAM_EXTRA_BT_UNWIND_TABLES (1 << 2)
309 #define QUADD_PARAM_EXTRA_BT_MIXED (1 << 3)
311 struct quadd_parameters {
321 u32 pids[QUADD_MAX_PROCESS];
324 u8 package_name[QUADD_MAX_PACKAGE_NAME];
326 u32 events[QUADD_MAX_COUNTERS];
329 u32 reserved[16]; /* reserved fields for future extensions */
332 struct quadd_events_cap {
335 branch_instructions:1,
339 l1_dcache_read_misses:1,
340 l1_dcache_write_misses:1,
343 l2_dcache_read_misses:1,
344 l2_dcache_write_misses:1,
349 QUADD_COMM_CAP_IDX_EXTRA = 0,
352 #define QUADD_COMM_CAP_EXTRA_BT_KERNEL_CTX (1 << 0)
353 #define QUADD_COMM_CAP_EXTRA_GET_MMAP (1 << 1)
354 #define QUADD_COMM_CAP_EXTRA_GROUP_SAMPLES (1 << 2)
355 #define QUADD_COMM_CAP_EXTRA_BT_UNWIND_TABLES (1 << 3)
356 #define QUADD_COMM_CAP_EXTRA_SUPPORT_AARCH64 (1 << 4)
357 #define QUADD_COMM_CAP_EXTRA_SPECIAL_ARCH_MMAP (1 << 5)
358 #define QUADD_COMM_CAP_EXTRA_UNWIND_MIXED (1 << 6)
360 struct quadd_comm_cap {
364 l2_multiple_events:1,
368 struct quadd_events_cap events_cap;
370 u32 reserved[16]; /* reserved fields for future extensions */
374 QUADD_MOD_STATE_IDX_RB_MAX_FILL_COUNT = 0,
375 QUADD_MOD_STATE_IDX_STATUS,
378 #define QUADD_MOD_STATE_STATUS_IS_ACTIVE (1 << 0)
379 #define QUADD_MOD_STATE_STATUS_IS_AUTH_OPEN (1 << 1)
381 struct quadd_module_state {
383 u64 nr_skipped_samples;
386 u32 buffer_fill_size;
388 u32 reserved[16]; /* reserved fields for future extensions */
391 struct quadd_module_version {
398 u32 reserved[4]; /* reserved fields for future extensions */
401 struct quadd_sec_info {
407 QUADD_EXT_IDX_EXTAB_OFFSET = 0,
408 QUADD_EXT_IDX_EXIDX_OFFSET = 1,
409 QUADD_EXT_IDX_MMAP_VM_START = 2,
412 struct quadd_extables {
416 struct quadd_sec_info extab;
417 struct quadd_sec_info exidx;
419 u32 reserved[4]; /* reserved fields for future extensions */
427 struct vm_area_struct;
429 #ifdef CONFIG_TEGRA_PROFILER
430 extern void __quadd_task_sched_in(struct task_struct *prev,
431 struct task_struct *task);
432 extern void __quadd_task_sched_out(struct task_struct *prev,
433 struct task_struct *next);
435 extern void __quadd_event_mmap(struct vm_area_struct *vma);
437 static inline void quadd_task_sched_in(struct task_struct *prev,
438 struct task_struct *task)
440 __quadd_task_sched_in(prev, task);
443 static inline void quadd_task_sched_out(struct task_struct *prev,
444 struct task_struct *next)
446 __quadd_task_sched_out(prev, next);
449 static inline void quadd_event_mmap(struct vm_area_struct *vma)
451 __quadd_event_mmap(vma);
454 #else /* CONFIG_TEGRA_PROFILER */
456 static inline void quadd_task_sched_in(struct task_struct *prev,
457 struct task_struct *task)
461 static inline void quadd_task_sched_out(struct task_struct *prev,
462 struct task_struct *next)
466 static inline void quadd_event_mmap(struct vm_area_struct *vma)
470 #endif /* CONFIG_TEGRA_PROFILER */
472 #endif /* __KERNEL__ */
474 #endif /* __TEGRA_PROFILER_H */