drivers/media/platform/tegra/imx091.c

   1 /*
   2  * imx091.c - imx091 sensor driver
   3  *
   4  * Copyright (c) 2012-2014, NVIDIA Corporation. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #include <linux/fs.h>
  20 #include <linux/i2c.h>
  21 #include <linux/clk.h>
  22 #include <linux/miscdevice.h>
  23 #include <linux/slab.h>
  24 #include <linux/delay.h>
  25 #include <linux/uaccess.h>
  26 #include <linux/atomic.h>
  27 #include <linux/gpio.h>
  28 #include <linux/regulator/consumer.h>
  29 #include <linux/module.h>
  30 #include <linux/list.h>
  31 #include <media/imx091.h>
  32 #include <linux/of.h>
  33 #include <linux/of_device.h>
  34 #include <linux/of_gpio.h>
  35 #include <linux/tegra-soc.h>
  36
  37 #include "nvc_utilities.h"
  38
  39 #ifdef CONFIG_DEBUG_FS
  40 #include <media/nvc_debugfs.h>
  41 #endif
  42
  43 #undef MAX
  44 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
  45
  46
  47 #define IMX091_ID                       0x0091
  48 #define IMX091_ID_ADDRESS   0x0000
  49 #define IMX091_STREAM_CONTROL_REG 0x0100
  50 #define IMX091_STREAM_ENABLE 0x01
  51 #define IMX091_STREAM_DISABLE 0x00
  52 #define IMX091_SENSOR_TYPE              NVC_IMAGER_TYPE_RAW
  53 #define IMX091_STARTUP_DELAY_MS         50
  54 #define IMX091_RES_CHG_WAIT_TIME_MS     100
  55 #define IMX091_SIZEOF_I2C_BUF           16
  56 #define IMX091_TABLE_WAIT_MS            0
  57 #define IMX091_TABLE_END                1
  58 #define IMX091_NUM_MODES_MAX    MAX(ARRAY_SIZE(imx091_mode_table_non_fpga)\
  59                                         , ARRAY_SIZE(imx091_mode_table_fpga))
  60 /*#define IMX091_MODE_UNKNOWN           (IMX091_NUM_MODES + 1)*/
  61 #define IMX091_LENS_MAX_APERTURE        0 /* / _INT2FLOAT_DIVISOR */
  62 #define IMX091_LENS_FNUMBER             0 /* / _INT2FLOAT_DIVISOR */
  63 #define IMX091_LENS_FOCAL_LENGTH        4760 /* / _INT2FLOAT_DIVISOR */
  64 #define IMX091_LENS_VIEW_ANGLE_H        60400 /* / _INT2FLOAT_DIVISOR */
  65 #define IMX091_LENS_VIEW_ANGLE_V        60400 /* / _INT2FLOAT_DIVISOR */
  66 #define IMX091_WAIT_MS 3
  67 #define IMX091_I2C_TABLE_MAX_ENTRIES    400
  68 #define IMX091_FUSE_ID_SIZE             8
  69
  70 static u16 imx091_ids[] = {
  71         0x0091,
  72 };
  73
  74 static struct nvc_gpio_init imx091_gpios[] = {
  75         {IMX091_GPIO_RESET, GPIOF_OUT_INIT_LOW, "reset", false, true},
  76         {IMX091_GPIO_PWDN, GPIOF_OUT_INIT_LOW, "pwdn", false, true},
  77         {IMX091_GPIO_GP1, 0, "gp1", false, false},
  78 };
  79
  80 static struct nvc_regulator_init imx091_vregs[] = {
  81         { IMX091_VREG_DVDD, "vdig", },
  82         { IMX091_VREG_AVDD, "vana", },
  83         { IMX091_VREG_IOVDD, "vif", },
  84 };
  85
  86 struct imx091_info {
  87         u16 dev_id;
  88         atomic_t in_use;
  89         struct i2c_client *i2c_client;
  90         struct imx091_platform_data *pdata;
  91         struct nvc_imager_cap *cap;
  92         struct miscdevice miscdev;
  93         struct list_head list;
  94         struct clk *mclk;
  95         struct nvc_gpio gpio[ARRAY_SIZE(imx091_gpios)];
  96         struct nvc_regulator vreg[ARRAY_SIZE(imx091_vregs)];
  97         int pwr_api;
  98         int pwr_dev;
  99         u8 s_mode;
 100         struct imx091_info *s_info;
 101         u32 mode_index;
 102         bool mode_valid;
 103         bool mode_enable;
 104         bool reset_flag;
 105         unsigned test_pattern;
 106         struct nvc_imager_static_nvc sdata;
 107         struct regulator *imx091_ext_reg_vcm_vdd;
 108         struct regulator *imx091_ext_reg_i2c_vdd;
 109         u8 i2c_buf[IMX091_SIZEOF_I2C_BUF];
 110         u8 bin_en;
 111 #ifdef CONFIG_DEBUG_FS
 112         struct nvc_debugfs_info debugfs_info;
 113 #endif
 114         struct nvc_fuseid fuse_id;
 115         char devname[16];
 116 };
 117
 118 struct imx091_reg {
 119         u16 addr;
 120         u16 val;
 121 };
 122
 123 struct imx091_mode_data {
 124         struct nvc_imager_mode sensor_mode;
 125         struct nvc_imager_dynamic_nvc sensor_dnvc;
 126         struct imx091_reg *p_mode_i2c;
 127 };
 128
 129 static struct nvc_imager_cap imx091_dflt_cap = {
 130         .identifier             = "IMX091",
 131         .sensor_nvc_interface   = 3,
 132         .pixel_types[0]         = 0x100,
 133         .orientation            = 0,
 134         .direction              = 0,
 135         .initial_clock_rate_khz = 6000,
 136         .clock_profiles[0] = {
 137                 .external_clock_khz     = 24000,
 138                 .clock_multiplier       = 8500000, /* value / 1,000,000 */
 139         },
 140         .clock_profiles[1] = {
 141                 .external_clock_khz     = 0,
 142                 .clock_multiplier       = 0,
 143         },
 144         .h_sync_edge            = 0,
 145         .v_sync_edge            = 0,
 146         .mclk_on_vgp0           = 0,
 147         .csi_port               = 0,
 148         .data_lanes             = 4,
 149         .virtual_channel_id     = 0,
 150         .discontinuous_clk_mode = 1,
 151         .cil_threshold_settle   = 0x0,
 152         .min_blank_time_width   = 16,
 153         .min_blank_time_height  = 16,
 154         .preferred_mode_index   = 1,
 155         .focuser_guid   = NVC_FOCUS_GUID(0),
 156         .torch_guid             = NVC_TORCH_GUID(0),
 157         .cap_version            = NVC_IMAGER_CAPABILITIES_VERSION2,
 158 };
 159
 160 static struct imx091_platform_data imx091_dflt_pdata = {
 161         .cfg                    = 0,
 162         .num                    = 0,
 163         .sync                   = 0,
 164         .dev_name               = "camera",
 165         .cap                    = &imx091_dflt_cap,
 166 };
 167
 168         /* NOTE: static vs dynamic
 169          * If a member in the nvc_imager_static_nvc structure is not actually
 170          * static data, then leave blank and add the parameter to the parameter
 171          * read function that dynamically reads the data.  The NVC user driver
 172          * will call the parameter read for the data if the member data is 0.
 173          * If the dynamic data becomes static during probe (a one time read
 174          * such as device ID) then add the dynamic read to the _sdata_init
 175          * function.
 176          */
 177 static struct nvc_imager_static_nvc imx091_dflt_sdata = {
 178         .api_version            = NVC_IMAGER_API_STATIC_VER,
 179         .sensor_type            = IMX091_SENSOR_TYPE,
 180         .bits_per_pixel         = 10,
 181         .sensor_id              = IMX091_ID,
 182         .sensor_id_minor        = 0,
 183         .focal_len              = IMX091_LENS_FOCAL_LENGTH,
 184         .max_aperture           = IMX091_LENS_MAX_APERTURE,
 185         .fnumber                = IMX091_LENS_FNUMBER,
 186         .view_angle_h           = IMX091_LENS_VIEW_ANGLE_H,
 187         .view_angle_v           = IMX091_LENS_VIEW_ANGLE_V,
 188         .res_chg_wait_time      = IMX091_RES_CHG_WAIT_TIME_MS,
 189 };
 190
 191 static LIST_HEAD(imx091_info_list);
 192 static DEFINE_SPINLOCK(imx091_spinlock);
 193
 194
 195 static struct imx091_reg tp_none_seq[] = {
 196         {IMX091_TABLE_END, 0x0000}
 197 };
 198
 199 static struct imx091_reg tp_cbars_seq[] = {
 200         {IMX091_TABLE_END, 0x0000}
 201 };
 202
 203 static struct imx091_reg tp_checker_seq[] = {
 204         {IMX091_TABLE_END, 0x0000}
 205 };
 206
 207 static struct imx091_reg *test_patterns[] = {
 208         tp_none_seq,
 209         tp_cbars_seq,
 210         tp_checker_seq,
 211 };
 212
 213 static int imx091_power_on(struct nvc_regulator *vreg);
 214 static int imx091_power_off(struct nvc_regulator *vreg);
 215
 216 #define IMX091_WAIT_1000_MS 1000
 217 /* The setting is for 1-lane mode.
 218  * THS time is different as well. They are set
 219  * in the VI programming layer
 220  */
 221 static struct imx091_reg imx091_FPGA_4160x3120_i2c[] = {
 222         {0x0103, 0x01},
 223         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 224
 225         {0x3087, 0x53},
 226         {0x309D, 0x94},
 227         {0x30A1, 0x08},
 228         {0x30C7, 0x00},
 229         {0x3115, 0x0E},
 230         {0x3118, 0x42},
 231         {0x311D, 0x34},
 232         {0x3121, 0x0D},
 233         {0x3212, 0xF2},
 234         {0x3213, 0x0F},
 235         {0x3215, 0x0F},
 236         {0x3217, 0x0B},
 237         {0x3219, 0x0B},
 238         {0x321B, 0x0D},
 239         {0x321D, 0x0D},
 240         {0x0305, 0x01},
 241         {0x0307, 0x18},
 242         {0x30A4, 0x01},
 243         {0x303C, 0x28},
 244         {0x3032, 0x00},
 245         {0x0112, 0x0A},
 246         {0x0113, 0x0A},
 247         {0x0340, 0x0C},
 248         {0x0341, 0x58},
 249         {0x0342, 0x12},
 250         {0x0343, 0x0C},
 251         {0x0344, 0x00},
 252         {0x0345, 0x08},
 253         {0x0346, 0x00},
 254         {0x0347, 0x30},
 255         {0x0348, 0x10},
 256         {0x0349, 0x77},
 257         {0x034A, 0x0C},
 258         {0x034B, 0x5F},
 259         {0x034C, 0x10},
 260         {0x034D, 0x40},
 261         {0x034E, 0x0C},
 262         {0x034F, 0x30},
 263         {0x0381, 0x01},
 264         {0x0383, 0x01},
 265         {0x0385, 0x01},
 266         {0x0387, 0x01},
 267         {0x3033, 0x00},
 268         {0x303D, 0x10},
 269         {0x303E, 0xD0},
 270         {0x3040, 0x08},
 271         {0x3041, 0x97},
 272         {0x3048, 0x00},
 273         {0x304C, 0x7F},
 274         {0x304D, 0x04},
 275         {0x3064, 0x12},
 276         {0x309B, 0x20},
 277         {0x309E, 0x00},
 278         {0x30D5, 0x00},
 279         {0x30D6, 0x85},
 280         {0x30D7, 0x2A},
 281         {0x30D8, 0x64},
 282         {0x30D9, 0x89},
 283         {0x30DA, 0x00},
 284         {0x30DB, 0x00},
 285         {0x30DC, 0x00},
 286         {0x30DD, 0x00},
 287         {0x30DE, 0x00},
 288         {0x3102, 0x10},
 289         {0x3103, 0x44},
 290         {0x3104, 0x40},
 291         {0x3105, 0x00},
 292         {0x3106, 0x0D},
 293         {0x3107, 0x01},
 294         {0x310A, 0x0A},
 295         {0x315C, 0x99},
 296         {0x315D, 0x98},
 297         {0x316E, 0x9A},
 298         {0x316F, 0x99},
 299         {0x3301, 0x01},
 300         {0x3304, 0x05},
 301         {0x3305, 0x04},
 302         {0x3306, 0x12},
 303         {0x3307, 0x03},
 304         {0x3308, 0x0D},
 305         {0x3309, 0x05},
 306         {0x330A, 0x09},
 307         {0x330B, 0x04},
 308         {0x330C, 0x08},
 309         {0x330D, 0x05},
 310         {0x330E, 0x03},
 311         {0x3318, 0x65},
 312         {0x3322, 0x02},
 313         {0x3342, 0x0F},
 314         {0x3348, 0xE0},
 315         {0x0600, 0x00},
 316         {0x0601, 0x00},
 317
 318         {IMX091_TABLE_WAIT_MS, 5000},
 319         {IMX091_TABLE_END, 0x00}
 320 };
 321
 322 static struct imx091_reg imx091_FPGA_1052x1560_i2c[] = {
 323         /* Stand by */
 324         {0x0100, 0x00},
 325         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 326
 327         /* global settings */
 328         {0x3087, 0x53},
 329         {0x309D, 0x94},
 330         {0x30A1, 0x08},
 331         {0x30C7, 0x00},
 332         {0x3115, 0x0E},
 333         {0x3118, 0x42},
 334         {0x311D, 0x34},
 335         {0x3121, 0x0D},
 336         {0x3212, 0xF2},
 337         {0x3213, 0x0F},
 338         {0x3215, 0x0F},
 339         {0x3217, 0x0B},
 340         {0x3219, 0x0B},
 341         {0x321B, 0x0D},
 342         {0x321D, 0x0D},
 343
 344         /* black level */
 345         {0x3032, 0x00},
 346
 347         /*
 348          * PLL (MCLK) = 13MHz
 349          * Previously, this was calibrated for a 24MHz system, which has
 350          * PREPLLCLK_DIV of 2 (1/2), RGPLTD of 2 (1/1), and PLL_MPY of 47.
 351          * In the standard setting, this is set to 564MHz.
 352          * In the 13MHz (FPGA) setting, set for a PREPLLCLK_DIV of 1 (1/1),
 353          * a PLL_MPY of 43, and a RGPLTD of 2 (1/1), for an output PLL frequency
 354          * of 559MHz.
 355          */
 356         {0x0305, 0x01}, /* PREPLLCLK_DIV */
 357         {0x0307, 0x18}, /* PLL_MPY */
 358         {0x30A4, 0x01}, /* RGPLTD */
 359         {0x303C, 0x28}, /* PLSTATIM */
 360
 361         /* Mode Settings */
 362         {0x0112, 0x0A}, /* RAW 10 */
 363         {0x0113, 0x0A},
 364         {0x0340, 0x07}, /* FrameLength 0x700 = 1792 */
 365         {0x0341, 0x00},
 366         {0x0342, 0x12}, /* LineLength = 0x120C = 4620 */
 367         {0x0343, 0x0C},
 368
 369         /* Imaging Area Determination */
 370         {0x0344, 0x00}, /* ReadOut start horizontal position = 8 */
 371         {0x0345, 0x08},
 372         {0x0346, 0x00}, /* ReadOut start vertical position = 0x30 = 48 */
 373         {0x0347, 0x30},
 374         {0x0348, 0x10}, /* ReadOut end horizontal position = 0x1077 */
 375         {0x0349, 0x77},
 376         {0x034A, 0x0C}, /* ReadOut end vertical position = 0xc5f */
 377         {0x034B, 0x5F},
 378         {0x034C, 0x04}, /* ReadOut size horizontal position = 0x041C = 1052 */
 379         {0x034D, 0x1C},
 380         {0x034E, 0x06}, /* ReadOut size vertical position = 0x0618 = 1560 */
 381         {0x034F, 0x18},
 382         {0x0381, 0x05},
 383         {0x0383, 0x03},
 384         {0x0385, 0x01},
 385         {0x0387, 0x03},
 386         {0x3033, 0x00}, /* HD mode off */
 387         {0x303D, 0x10}, /* standby end immediate */
 388         {0x303E, 0xD0},
 389         {0x3040, 0x08}, /* OPB start and end address vert */
 390         {0x3041, 0x97},
 391         {0x3048, 0x01}, /* vertical addition enabled */
 392         {0x304C, 0x7F}, /* readout pixels set to 0x04_78 */
 393         {0x304D, 0x04},
 394         {0x3064, 0x12},
 395         {0x309B, 0x28},
 396         {0x309E, 0x00},
 397         {0x30D5, 0x09},
 398         {0x30D6, 0x00},
 399         {0x30D7, 0x00},
 400         {0x30D8, 0x00},
 401         {0x30D9, 0x00},
 402         {0x30DA, 0x00},
 403         {0x30DB, 0x00},
 404         {0x30DC, 0x00},
 405         {0x30DD, 0x00},
 406         {0x30DE, 0x04},
 407         {0x3102, 0x10},
 408         {0x3103, 0x44},
 409         {0x3104, 0x40},
 410         {0x3105, 0x00},
 411         {0x3106, 0x0D},
 412         {0x3107, 0x01},
 413         {0x310A, 0x0A},
 414         {0x315C, 0x99},
 415         {0x315D, 0x98},
 416         {0x316E, 0x9A},
 417         {0x316F, 0x99},
 418         {0x3301, 0x03}, /* 4 Lane */
 419         {0x3304, 0x05},
 420         {0x3305, 0x04},
 421         {0x3306, 0x12},
 422         {0x3307, 0x03},
 423         {0x3308, 0x0D},
 424         {0x3309, 0x05},
 425         {0x330A, 0x09},
 426         {0x330B, 0x04},
 427         {0x330C, 0x08},
 428         {0x330D, 0x05},
 429         {0x330E, 0x03},
 430         {0x3318, 0x73},
 431         {0x3322, 0x02},
 432         {0x3342, 0x0F},
 433         {0x3348, 0xE0},
 434         {0x0600, 0x00}, /* colorbar fade-to-gray */
 435         {0x0601, 0x00},
 436         {0x0101, 0x00}, /* image orientation */
 437         {0x0100, 0x01},
 438
 439         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 440         {IMX091_TABLE_END, 0x00}
 441 };
 442
 443 static struct imx091_reg imx091_4208x3120_i2c[] = {
 444         /* Reset */
 445         {0x0103, 0x01},
 446         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 447
 448         /* global settings */
 449         {0x3087, 0x53},
 450         {0x309D, 0x94},
 451         {0x30A1, 0x08},
 452         {0x30C7, 0x00},
 453         {0x3115, 0x0E},
 454         {0x3118, 0x42},
 455         {0x311D, 0x34},
 456         {0x3121, 0x0D},
 457         {0x3212, 0xF2},
 458         {0x3213, 0x0F},
 459         {0x3215, 0x0F},
 460         {0x3217, 0x0B},
 461         {0x3219, 0x0B},
 462         {0x321B, 0x0D},
 463         {0x321D, 0x0D},
 464
 465         /* black level setting */
 466         {0x3032, 0x40},
 467
 468         /* PLL */
 469         {0x0305, 0x02},
 470         {0x0307, 0x2A}, /* PLL Multipiler = 42 */
 471         {0x30A4, 0x02},
 472         {0x303C, 0x4B},
 473
 474         /* Mode Settings */
 475         {0x0112, 0x0A},
 476         {0x0113, 0x0A},
 477         {0x0340, 0x0C},
 478         {0x0341, 0x58},
 479         {0x0342, 0x12},
 480         {0x0343, 0x0C},
 481         {0x0344, 0x00},
 482         {0x0345, 0x08},
 483         {0x0346, 0x00},
 484         {0x0347, 0x30},
 485         {0x0348, 0x10},
 486         {0x0349, 0x77},
 487         {0x034A, 0x0C},
 488         {0x034B, 0x5F},
 489         {0x034C, 0x10},
 490         {0x034D, 0x70},
 491         {0x034E, 0x0C},
 492         {0x034F, 0x30},
 493         {0x0381, 0x01},
 494         {0x0383, 0x01},
 495         {0x0385, 0x01},
 496         {0x0387, 0x01},
 497         {0x3033, 0x00},
 498         {0x303D, 0x10},
 499         {0x303E, 0xD0},
 500         {0x3040, 0x08},
 501         {0x3041, 0x97},
 502         {0x3048, 0x00},
 503         {0x304C, 0x7F},
 504         {0x304D, 0x04},
 505         {0x3064, 0x12},
 506         {0x309B, 0x20},
 507         {0x309E, 0x00},
 508         {0x30D5, 0x00},
 509         {0x30D6, 0x85},
 510         {0x30D7, 0x2A},
 511         {0x30D8, 0x64},
 512         {0x30D9, 0x89},
 513         {0x30DE, 0x00},
 514         {0x3102, 0x10},
 515         {0x3103, 0x44},
 516         {0x3104, 0x40},
 517         {0x3105, 0x00},
 518         {0x3106, 0x0D},
 519         {0x3107, 0x01},
 520         {0x310A, 0x0A},
 521         {0x315C, 0x99},
 522         {0x315D, 0x98},
 523         {0x316E, 0x9A},
 524         {0x316F, 0x99},
 525         {0x3301, 0x03},
 526         {0x3304, 0x05},
 527         {0x3305, 0x04},
 528         {0x3306, 0x12},
 529         {0x3307, 0x03},
 530         {0x3308, 0x0D},
 531         {0x3309, 0x05},
 532         {0x330A, 0x09},
 533         {0x330B, 0x04},
 534         {0x330C, 0x08},
 535         {0x330D, 0x05},
 536         {0x330E, 0x03},
 537         {0x3318, 0x65},
 538         {0x3322, 0x02},
 539         {0x3342, 0x0F},
 540         {0x3348, 0xE0},
 541
 542         {0x0202, 0x0B},
 543         {0x0203, 0xB8},
 544         {0x0205, 0x00},
 545
 546         {IMX091_TABLE_END, 0x00}
 547 };
 548
 549 static struct imx091_reg imx091_1948x1096_i2c[] = {
 550         /* Reset */
 551         {0x0103, 0x01},
 552         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 553
 554         /* global settings */
 555         {0x3087, 0x53},
 556         {0x309D, 0x94},
 557         {0x30A1, 0x08},
 558         {0x30C7, 0x00},
 559         {0x3115, 0x0E},
 560         {0x3118, 0x42},
 561         {0x311D, 0x34},
 562         {0x3121, 0x0D},
 563         {0x3212, 0xF2},
 564         {0x3213, 0x0F},
 565         {0x3215, 0x0F},
 566         {0x3217, 0x0B},
 567         {0x3219, 0x0B},
 568         {0x321B, 0x0D},
 569         {0x321D, 0x0D},
 570
 571         /* black level setting */
 572         {0x3032, 0x40},
 573
 574         /* PLL */
 575         {0x0305, 0x02},
 576         {0x0307, 0x20},
 577         {0x30A4, 0x02},
 578         {0x303C, 0x4B},
 579
 580         /* Mode Settings */
 581         {0x0112, 0x0A},
 582         {0x0113, 0x0A},
 583         {0x0340, 0x08},
 584         {0x0341, 0xA6},
 585         {0x0342, 0x09},
 586         {0x0343, 0x06},
 587         {0x0344, 0x00},
 588         {0x0345, 0xA4},
 589         {0x0346, 0x02},
 590         {0x0347, 0x00},
 591         {0x0348, 0x0F},
 592         {0x0349, 0xDB},
 593         {0x034A, 0x0A},
 594         {0x034B, 0x8F},
 595         {0x034C, 0x07},
 596         {0x034D, 0x9C},
 597         {0x034E, 0x04},
 598         {0x034F, 0x48},
 599         {0x0381, 0x01},
 600         {0x0383, 0x01},
 601         {0x0385, 0x01},
 602         {0x0387, 0x03},
 603         {0x3033, 0x84},
 604         {0x303D, 0x10},
 605         {0x303E, 0xD0},
 606         {0x3040, 0x08},
 607         {0x3041, 0x97},
 608         {0x3048, 0x01},
 609         {0x304C, 0x3F},
 610         {0x304D, 0x02},
 611         {0x3064, 0x12},
 612         {0x309B, 0x48},
 613         {0x309E, 0x04},
 614         {0x30D5, 0x04},
 615         {0x30D6, 0x85},
 616         {0x30D7, 0x2A},
 617         {0x30D8, 0x64},
 618         {0x30D9, 0x89},
 619         {0x30DE, 0x00},
 620         {0x3102, 0x09},
 621         {0x3103, 0x23},
 622         {0x3104, 0x24},
 623         {0x3105, 0x00},
 624         {0x3106, 0x8B},
 625         {0x3107, 0x00},
 626         {0x310A, 0x0A},
 627         {0x315C, 0x4A},
 628         {0x315D, 0x49},
 629         {0x316E, 0x4B},
 630         {0x316F, 0x4A},
 631         {0x3301, 0x03},
 632         {0x3304, 0x05},
 633         {0x3305, 0x04},
 634         {0x3306, 0x12},
 635         {0x3307, 0x03},
 636         {0x3308, 0x0D},
 637         {0x3309, 0x05},
 638         {0x330A, 0x09},
 639         {0x330B, 0x04},
 640         {0x330C, 0x08},
 641         {0x330D, 0x05},
 642         {0x330E, 0x03},
 643         {0x3318, 0x67},
 644         {0x3322, 0x02},
 645         {0x3342, 0x0F},
 646         {0x3348, 0xE0},
 647
 648         {0x0202, 0x00},
 649         {0x0203, 0x00},
 650         {0x0205, 0x00},
 651
 652         {IMX091_TABLE_END, 0x00}
 653 };
 654
 655 static struct imx091_reg imx091_1308x736_i2c[] = {
 656         /* Reset */
 657         {0x0103, 0x01},
 658         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 659
 660         /* global settings */
 661         {0x3087, 0x53},
 662         {0x309D, 0x94},
 663         {0x30A1, 0x08},
 664         {0x30C7, 0x00},
 665         {0x3115, 0x0E},
 666         {0x3118, 0x42},
 667         {0x311D, 0x34},
 668         {0x3121, 0x0D},
 669         {0x3212, 0xF2},
 670         {0x3213, 0x0F},
 671         {0x3215, 0x0F},
 672         {0x3217, 0x0B},
 673         {0x3219, 0x0B},
 674         {0x321B, 0x0D},
 675         {0x321D, 0x0D},
 676
 677         /* black level setting */
 678         {0x3032, 0x40},
 679
 680         /* PLL */
 681         {0x0305, 0x02},
 682         {0x0307, 0x20},
 683         {0x30A4, 0x02},
 684         {0x303C, 0x4B},
 685
 686         /* Mode Settings */
 687         {0x0112, 0x0A},
 688         {0x0113, 0x0A},
 689         {0x0340, 0x04},
 690         {0x0341, 0x4E},
 691         {0x0342, 0x12},
 692         {0x0343, 0x0C},
 693         {0x0344, 0x00},
 694         {0x0345, 0x96},
 695         {0x0346, 0x01},
 696         {0x0347, 0xF8},
 697         {0x0348, 0x0F},
 698         {0x0349, 0xE9},
 699         {0x034A, 0x0A},
 700         {0x034B, 0x97},
 701         {0x034C, 0x05},
 702         {0x034D, 0x1C},
 703         {0x034E, 0x02},
 704         {0x034F, 0xE0},
 705         {0x0381, 0x03},
 706         {0x0383, 0x03},
 707         {0x0385, 0x03},
 708         {0x0387, 0x03},
 709         {0x3033, 0x00},
 710         {0x303D, 0x10},
 711         {0x303E, 0xD0},
 712         {0x3040, 0x08},
 713         {0x3041, 0x97},
 714         {0x3048, 0x22},
 715         {0x304C, 0x7F},
 716         {0x304D, 0x04},
 717         {0x3064, 0x12},
 718         {0x309B, 0x60},
 719         {0x309E, 0x04},
 720         {0x30D5, 0x09},
 721         {0x30D6, 0x00},
 722         {0x30D7, 0x00},
 723         {0x30D8, 0x00},
 724         {0x30D9, 0x89},
 725         {0x30DE, 0x03},
 726         {0x3102, 0x09},
 727         {0x3103, 0x23},
 728         {0x3104, 0x24},
 729         {0x3105, 0x00},
 730         {0x3106, 0x8B},
 731         {0x3107, 0x00},
 732         {0x310A, 0x0A},
 733         {0x315C, 0x4A},
 734         {0x315D, 0x49},
 735         {0x316E, 0x4B},
 736         {0x316F, 0x4A},
 737         {0x3301, 0x03},
 738         {0x3304, 0x05},
 739         {0x3305, 0x04},
 740         {0x3306, 0x12},
 741         {0x3307, 0x03},
 742         {0x3308, 0x0D},
 743         {0x3309, 0x05},
 744         {0x330A, 0x09},
 745         {0x330B, 0x04},
 746         {0x330C, 0x08},
 747         {0x330D, 0x05},
 748         {0x330E, 0x03},
 749         {0x3318, 0x6C},
 750         {0x3322, 0x02},
 751         {0x3342, 0x0F},
 752         {0x3348, 0xE0},
 753
 754         {0x0202, 0x00},
 755         {0x0203, 0x00},
 756         {0x0205, 0x00},
 757
 758         {IMX091_TABLE_END, 0x00}
 759 };
 760
 761 static struct imx091_reg imx091_2104x1560_i2c[] = {
 762         /* Software reset */
 763         {0x0103, 0x01},
 764         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 765
 766         /* global settings */
 767         {0x3087, 0x53},
 768         {0x309D, 0x94},
 769         {0x30A1, 0x08},
 770         {0x30C7, 0x00},
 771         {0x3115, 0x0E},
 772         {0x3118, 0x42},
 773         {0x311D, 0x34},
 774         {0x3121, 0x0D},
 775         {0x3212, 0xF2},
 776         {0x3213, 0x0F},
 777         {0x3215, 0x0F},
 778         {0x3217, 0x0B},
 779         {0x3219, 0x0B},
 780         {0x321B, 0x0D},
 781         {0x321D, 0x0D},
 782
 783         /* black level setting */
 784         {0x3032, 0x40},
 785
 786         /* PLL */
 787         {0x0305, 0x02},
 788         {0x0307, 0x2F},
 789         {0x30A4, 0x02},
 790         {0x303C, 0x4B},
 791
 792         /* Mode Settings */
 793         {0x0112, 0x0A},
 794         {0x0113, 0x0A},
 795         {0x0340, 0x06},
 796         {0x0341, 0x58},
 797         {0x0342, 0x12},
 798         {0x0343, 0x0C},
 799         {0x0344, 0x00},
 800         {0x0345, 0x08},
 801         {0x0346, 0x00},
 802         {0x0347, 0x30},
 803         {0x0348, 0x10},
 804         {0x0349, 0x77},
 805
 806         {0x034A, 0x0C},
 807         {0x034B, 0x5F},
 808         {0x034C, 0x08},
 809         {0x034D, 0x38},
 810         {0x034E, 0x06},
 811         {0x034F, 0x18},
 812         {0x0381, 0x01},
 813         {0x0383, 0x03},
 814         {0x0385, 0x01},
 815         {0x0387, 0x03},
 816         {0x3033, 0x00},
 817         {0x303D, 0x10},
 818         {0x303E, 0xD0},
 819         {0x3040, 0x08},
 820         {0x3041, 0x97},
 821         {0x3048, 0x01},
 822         {0x304C, 0x7F},
 823         {0x304D, 0x04},
 824         {0x3064, 0x12},
 825         {0x309B, 0x28},
 826         {0x309E, 0x00},
 827         {0x30D5, 0x09},
 828         {0x30D6, 0x01},
 829         {0x30D7, 0x01},
 830         {0x30D8, 0x64},
 831         {0x30D9, 0x89},
 832         {0x30DE, 0x02},
 833         {0x3102, 0x10},
 834         {0x3103, 0x44},
 835         {0x3104, 0x40},
 836         {0x3105, 0x00},
 837         {0x3106, 0x0D},
 838         {0x3107, 0x01},
 839         {0x310A, 0x0A},
 840         {0x315C, 0x99},
 841         {0x315D, 0x98},
 842         {0x316E, 0x9A},
 843         {0x316F, 0x99},
 844         {0x3301, 0x03},
 845         {0x3304, 0x05},
 846         {0x3305, 0x04},
 847         {0x3306, 0x12},
 848         {0x3307, 0x03},
 849         {0x3308, 0x0D},
 850         {0x3309, 0x05},
 851         {0x330A, 0x09},
 852         {0x330B, 0x04},
 853         {0x330C, 0x08},
 854         {0x330D, 0x05},
 855         {0x330E, 0x03},
 856         {0x3318, 0x73},
 857         {0x3322, 0x02},
 858         {0x3342, 0x0F},
 859         {0x3348, 0xE0},
 860
 861         {0x0202, 0x06},
 862         {0x0203, 0x00},
 863         {0x0205, 0x00},
 864
 865         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 866         {IMX091_TABLE_END, 0x00}
 867 };
 868
 869 static struct imx091_reg imx091_524X390_i2c[] = {
 870         /* Reset */
 871         {0x0103, 0x01},
 872         {IMX091_TABLE_WAIT_MS, IMX091_WAIT_MS},
 873
 874         /* global settings */
 875         {0x3087, 0x53},
 876         {0x309D, 0x94},
 877         {0x30A1, 0x08},
 878         {0x30C7, 0x00},
 879         {0x3115, 0x0E},
 880         {0x3118, 0x42},
 881         {0x311D, 0x34},
 882         {0x3121, 0x0D},
 883         {0x3212, 0xF2},
 884         {0x3213, 0x0F},
 885         {0x3215, 0x0F},
 886         {0x3217, 0x0B},
 887         {0x3219, 0x0B},
 888         {0x321B, 0x0D},
 889         {0x321D, 0x0D},
 890
 891         /* black level setting */
 892         {0x3032, 0x40},
 893
 894         /* PLL */
 895         {0x0305, 0x02},
 896         {0x0307, 0x2F},
 897         {0x30A4, 0x02},
 898         {0x303C, 0x4B},
 899
 900         /* Mode Settings */
 901         {0x0112, 0x0A},
 902         {0x0113, 0x0A},
 903         {0x0340, 0x01},
 904         {0x0341, 0x96},
 905         {0x0342, 0x12},
 906         {0x0343, 0x0C},
 907         {0x0344, 0x00},
 908         {0x0345, 0x10},
 909         {0x0346, 0x00},
 910         {0x0347, 0x30},
 911         {0x0348, 0x10},
 912         {0x0349, 0x6F},
 913         {0x034A, 0x0C},
 914         {0x034B, 0x5F},
 915         {0x034C, 0x02},
 916         {0x034D, 0x0C},
 917         {0x034E, 0x01},
 918         {0x034F, 0x86},
 919         {0x0381, 0x09},
 920         {0x0383, 0x07},
 921         {0x0385, 0x09},
 922         {0x0387, 0x07},
 923         {0x3033, 0x00},
 924         {0x303D, 0x10},
 925         {0x303E, 0xD0},
 926         {0x3040, 0x08},
 927         {0x3041, 0x97},
 928         {0x3048, 0x01},
 929         {0x304C, 0x7F},
 930         {0x304D, 0x04},
 931         {0x3064, 0x12},
 932         {0x309B, 0x28},
 933         {0x309E, 0x00},
 934         {0x30D5, 0x09},
 935         {0x30D6, 0x00},
 936         {0x30D7, 0x00},
 937         {0x30D8, 0x00},
 938         {0x30D9, 0x00},
 939         {0x30DE, 0x08},
 940         {0x3102, 0x10},
 941         {0x3103, 0x44},
 942         {0x3104, 0x40},
 943         {0x3105, 0x00},
 944         {0x3106, 0x0D},
 945         {0x3107, 0x01},
 946         {0x310A, 0x0A},
 947         {0x315C, 0x99},
 948         {0x315D, 0x98},
 949         {0x316E, 0x9A},
 950         {0x316F, 0x99},
 951         {0x3301, 0x03},
 952         {0x3304, 0x03},
 953         {0x3305, 0x02},
 954         {0x3306, 0x09},
 955         {0x3307, 0x06},
 956         {0x3308, 0x1E},
 957         {0x3309, 0x05},
 958         {0x330A, 0x05},
 959         {0x330B, 0x04},
 960         {0x330C, 0x07},
 961         {0x330D, 0x06},
 962         {0x330E, 0x01},
 963         {0x3318, 0x44},
 964         {0x3322, 0x0E},
 965         {0x3342, 0x00},
 966         {0x3348, 0xE0},
 967
 968         {0x0202, 0x00},
 969         {0x0203, 0x00},
 970         {0x0205, 0x00},
 971
 972         {IMX091_TABLE_END, 0x00}
 973 };
 974
 975 /* Each resolution requires the below data table setup and the corresponding
 976  * I2C data table.
 977  * If more NVC data is needed for the NVC driver, be sure and modify the
 978  * nvc_imager_nvc structure in nvc_imager.h
 979  * If more data sets are needed per resolution, they can be added to the
 980  * table format below with the imx091_mode_data structure.  New data sets
 981  * should conform to an already defined NVC structure.  If it's data for the
 982  * NVC driver, then it should be added to the nvc_imager_nvc structure.
 983  * Steps to add a resolution:
 984  * 1. Add I2C data table
 985  * 2. Add imx091_mode_data table
 986  * 3. Add entry to the imx091_mode_table_non_fpga and/or imx091_mode_table_fpga
 987  */
 988 static struct imx091_mode_data imx091_FPGA_4160x3120 = {
 989         .sensor_mode = {
 990                 .res_x                  = 4160,
 991                 .res_y                  = 3120,
 992                 .active_start_x         = 0,
 993                 .active_stary_y         = 0,
 994                 .peak_frame_rate        = 30000, /* / _INT2FLOAT_DIVISOR */
 995                 .pixel_aspect_ratio     = 1000,  /* / _INT2FLOAT_DIVISOR */
 996                 .pll_multiplier         = 5000,  /* / _INT2FLOAT_DIVISOR */
 997                 .crop_mode              = NVC_IMAGER_CROPMODE_NONE,
 998         },
 999         .sensor_dnvc = {
1000                 .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
1001                 .region_start_x         = 0,
1002                 .region_start_y         = 0,
1003                 .x_scale                = 1,
1004                 .y_scale                = 1,
1005                 .bracket_caps           = 1,
1006                 .flush_count            = 2,
1007                 .init_intra_frame_skip  = 0,
1008                 .ss_intra_frame_skip    = 2,
1009                 .ss_frame_number        = 3,
1010                 .coarse_time            = 0x06FB,
1011                 .max_coarse_diff        = 5,
1012                 .min_exposure_course    = 2,
1013                 .max_exposure_course    = 0xFFFC,
1014                 .diff_integration_time  = 110, /* / _INT2FLOAT_DIVISOR */
1015                 .line_length            = 0x120C,
1016                 .frame_length           = 0x0c58,
1017                 .min_frame_length       = 0x0c58,
1018                 .max_frame_length       = 0xFFFF,
1019                 .min_gain               = 1, /* / _INT2FLOAT_DIVISOR */
1020                 .max_gain               = 16000, /* / _INT2FLOAT_DIVISOR */
1021                 .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
1022                 .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
1023                 .support_bin_control    = 0,
1024                 .support_fast_mode      = 0,
1025                 .pll_mult               = 0x20,
1026                 .pll_div                = 0x2,
1027         },
1028         .p_mode_i2c                     = imx091_FPGA_4160x3120_i2c,
1029 };
1030
1031 static struct imx091_mode_data imx091_FPGA_1052x1560 = {
1032         .sensor_mode = {
1033                 .res_x                  = 1032,
1034                 .res_y                  = 1540,
1035                 .active_start_x         = 0,
1036                 .active_stary_y         = 0,
1037                 .peak_frame_rate        = 30000, /* / _INT2FLOAT_DIVISOR */
1038                 .pixel_aspect_ratio     = 1000,  /* / _INT2FLOAT_DIVISOR */
1039                 .pll_multiplier         = 5000,  /* / _INT2FLOAT_DIVISOR */
1040                 .crop_mode              = NVC_IMAGER_CROPMODE_NONE,
1041         },
1042         .sensor_dnvc = {
1043                 .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
1044                 .region_start_x         = 0,
1045                 .region_start_y         = 0,
1046                 .x_scale                = 1,
1047                 .y_scale                = 1,
1048                 .bracket_caps           = 1,
1049                 .flush_count            = 2,
1050                 .init_intra_frame_skip  = 0,
1051                 .ss_intra_frame_skip    = 2,
1052                 .ss_frame_number        = 3,
1053                 .coarse_time            = 0x06FB,
1054                 .max_coarse_diff        = 5,
1055                 .min_exposure_course    = 2,
1056                 .max_exposure_course    = 0xFFFC,
1057                 .diff_integration_time  = 110, /* / _INT2FLOAT_DIVISOR */
1058                 .line_length            = 0x120C,
1059                 .frame_length           = 0x0700,
1060                 .min_frame_length       = 0x0700,
1061                 .max_frame_length       = 0xFFFF,
1062                 .min_gain               = 1, /* / _INT2FLOAT_DIVISOR */
1063                 .max_gain               = 16000, /* / _INT2FLOAT_DIVISOR */
1064                 .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
1065                 .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
1066                 .support_bin_control    = 0,
1067                 .support_fast_mode      = 0,
1068                 .pll_mult               = 0x20,
1069                 .pll_div                = 0x2,
1070         },
1071         .p_mode_i2c                     = imx091_FPGA_1052x1560_i2c,
1072 };
1073
1074 static struct imx091_mode_data imx091_4208x3120 = {
1075         .sensor_mode = {
1076                 .res_x                  = 4096,
1077                 .res_y                  = 3072,
1078                 .active_start_x         = 0,
1079                 .active_stary_y         = 0,
1080                 .peak_frame_rate        = 15000, /* / _INT2FLOAT_DIVISOR */
1081                 .pixel_aspect_ratio     = 1000, /* / _INT2FLOAT_DIVISOR */
1082                 .pll_multiplier         = 10000, /* / _INT2FLOAT_DIVISOR */
1083                 .crop_mode              = NVC_IMAGER_CROPMODE_NONE,
1084         },
1085         .sensor_dnvc = {
1086                 .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
1087                 .region_start_x         = 0,
1088                 .region_start_y         = 0,
1089                 .x_scale                = 1,
1090                 .y_scale                = 1,
1091                 .bracket_caps           = 1,
1092                 .flush_count            = 2,
1093                 .init_intra_frame_skip  = 0,
1094                 .ss_intra_frame_skip    = 2,
1095                 .ss_frame_number        = 3,
1096                 .coarse_time            = 0x0C53,
1097                 .max_coarse_diff        = 5,
1098                 .min_exposure_course    = 2,
1099                 .max_exposure_course    = 0xFFFC,
1100                 .diff_integration_time  = 110, /* / _INT2FLOAT_DIVISOR */
1101                 .line_length            = 0x120C,
1102                 .frame_length           = 0x0C58,
1103                 .min_frame_length       = 0x0C58,
1104                 .max_frame_length       = 0xFFFF,
1105                 .min_gain               = 1, /* / _INT2FLOAT_DIVISOR */
1106                 .max_gain               = 16000, /* / _INT2FLOAT_DIVISOR */
1107                 .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
1108                 .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
1109                 .support_bin_control    = 0,
1110                 .support_fast_mode      = 0,
1111                 .pll_mult               = 0x2A,
1112                 .pll_div                = 0x2,
1113         },
1114         .p_mode_i2c                     = imx091_4208x3120_i2c,
1115 };
1116
1117 static struct imx091_mode_data imx091_1948x1096 = {
1118         .sensor_mode = {
1119                 .res_x                  = 1920,
1120                 .res_y                  = 1080,
1121                 .active_start_x         = 0,
1122                 .active_stary_y         = 0,
1123                 .peak_frame_rate        = 30000, /* / _INT2FLOAT_DIVISOR */
1124                 .pixel_aspect_ratio     = 1000, /* / _INT2FLOAT_DIVISOR */
1125                 .pll_multiplier         = 7000, /* / _INT2FLOAT_DIVISOR */
1126                 .crop_mode              = NVC_IMAGER_CROPMODE_PARTIAL,
1127         },
1128         .sensor_dnvc = {
1129                 .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
1130                 .region_start_x         = 0,
1131                 .region_start_y         = 0,
1132                 .x_scale                = 1,
1133                 .y_scale                = 1,
1134                 .bracket_caps           = 1,
1135                 .flush_count            = 2,
1136                 .init_intra_frame_skip  = 0,
1137                 .ss_intra_frame_skip    = 2,
1138                 .ss_frame_number        = 3,
1139         .coarse_time            = 0x08A1,
1140         .max_coarse_diff        = 5,
1141                 .min_exposure_course    = 2,
1142                 .max_exposure_course    = 0xFFFC,
1143                 .diff_integration_time  = 110, /* / _INT2FLOAT_DIVISOR */
1144                 .line_length            = 0x0906,
1145                 .frame_length           = 0x08A6,
1146                 .min_frame_length       = 0x08A6,
1147                 .max_frame_length       = 0xFFFF,
1148                 .min_gain               = 1, /* / _INT2FLOAT_DIVISOR */
1149                 .max_gain               = 16000, /* / _INT2FLOAT_DIVISOR */
1150                 .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
1151                 .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
1152                 .support_bin_control    = 0,
1153                 .support_fast_mode      = 0,
1154                 .pll_mult               = 0x20,
1155                 .pll_div                = 0x2,
1156         },
1157         .p_mode_i2c                     = imx091_1948x1096_i2c,
1158 };
1159
1160 static struct imx091_mode_data imx091_1308x736 = {
1161         .sensor_mode = {
1162                 .res_x                  = 1280,
1163                 .res_y                  = 720,
1164                 .active_start_x         = 0,
1165                 .active_stary_y         = 0,
1166                 .peak_frame_rate        = 30000, /* / _INT2FLOAT_DIVISOR */
1167                 .pixel_aspect_ratio     = 1000, /* / _INT2FLOAT_DIVISOR */
1168                 .pll_multiplier         = 5000, /* / _INT2FLOAT_DIVISOR */
1169                 .crop_mode              = NVC_IMAGER_CROPMODE_PARTIAL,
1170         },
1171         .sensor_dnvc = {
1172                 .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
1173                 .region_start_x         = 0,
1174                 .region_start_y         = 0,
1175                 .x_scale                = 1,
1176                 .y_scale                = 1,
1177                 .bracket_caps           = 1,
1178                 .flush_count            = 2,
1179                 .init_intra_frame_skip  = 0,
1180                 .ss_intra_frame_skip    = 2,
1181                 .ss_frame_number        = 3,
1182                 .coarse_time            = 0x0448,
1183                 .max_coarse_diff        = 5,
1184                 .min_exposure_course    = 2,
1185                 .max_exposure_course    = 0xFFFC,
1186                 .diff_integration_time  = 110, /* / _INT2FLOAT_DIVISOR */
1187                 .line_length            = 0x120C,
1188                 .frame_length           = 0x044e,
1189                 .min_frame_length       = 0x044e,
1190                 .max_frame_length       = 0xFFFF,
1191                 .min_gain               = 1, /* / _INT2FLOAT_DIVISOR */
1192                 .max_gain               = 16000, /* / _INT2FLOAT_DIVISOR */
1193                 .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
1194                 .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
1195                 .support_bin_control    = 0,
1196                 .support_fast_mode      = 0,
1197                 .pll_mult               = 0x20,
1198                 .pll_div                = 0x2,
1199         },
1200         .p_mode_i2c                     = imx091_1308x736_i2c,
1201 };
1202
1203 static struct imx091_mode_data imx091_2104x1560 = {
1204         .sensor_mode = {
1205                 .res_x                  = 2048,
1206                 .res_y                  = 1536,
1207                 .active_start_x         = 0,
1208                 .active_stary_y         = 0,
1209                 .peak_frame_rate        = 30000, /* / _INT2FLOAT_DIVISOR */
1210                 .pixel_aspect_ratio     = 1000, /* / _INT2FLOAT_DIVISOR */
1211                 .pll_multiplier         = 6000, /* / _INT2FLOAT_DIVISOR */
1212                 .crop_mode              = NVC_IMAGER_CROPMODE_NONE,
1213         },
1214         .sensor_dnvc = {
1215                 .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
1216                 .region_start_x         = 0,
1217                 .region_start_y         = 0,
1218                 .x_scale                = 1,
1219                 .y_scale                = 1,
1220                 .bracket_caps           = 1,
1221                 .flush_count            = 2,
1222                 .init_intra_frame_skip  = 0,
1223                 .ss_intra_frame_skip    = 2,
1224                 .ss_frame_number        = 3,
1225                 .coarse_time            = 0x0653,
1226                 .max_coarse_diff        = 5,
1227                 .min_exposure_course    = 2,
1228                 .max_exposure_course    = 0xFFFC,
1229                 .diff_integration_time  = 110, /* / _INT2FLOAT_DIVISOR */
1230                 .line_length            = 0x120C,
1231                 .frame_length           = 0x0658,
1232                 .min_frame_length       = 0x0658,
1233                 .max_frame_length       = 0xFFFF,
1234                 .min_gain               = 1, /* / _INT2FLOAT_DIVISOR */
1235                 .max_gain               = 16000, /* / _INT2FLOAT_DIVISOR */
1236                 .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
1237                 .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
1238                 .support_bin_control    = 0,
1239                 .support_fast_mode      = 0,
1240                 .pll_mult               = 0x2F,
1241                 .pll_div                = 0x2,
1242         },
1243         .p_mode_i2c                     = imx091_2104x1560_i2c,
1244 };
1245
1246 static struct imx091_mode_data imx091_524x390 = {
1247         .sensor_mode = {
1248                 .res_x                  = 524,
1249                 .res_y                  = 374,
1250                 .active_start_x         = 0,
1251                 .active_stary_y         = 0,
1252                 .peak_frame_rate        = 120000, /* / _INT2FLOAT_DIVISOR */
1253                 .pixel_aspect_ratio     = 1000, /* / _INT2FLOAT_DIVISOR */
1254                 .pll_multiplier         = 5000, /* / _INT2FLOAT_DIVISOR */
1255                 .crop_mode              = NVC_IMAGER_CROPMODE_PARTIAL,
1256         },
1257         .sensor_dnvc = {
1258                 .api_version            = NVC_IMAGER_API_DYNAMIC_VER,
1259                 .region_start_x         = 0,
1260                 .region_start_y         = 0,
1261                 .x_scale                = 1,
1262                 .y_scale                = 1,
1263                 .bracket_caps           = 1,
1264                 .flush_count            = 2,
1265                 .init_intra_frame_skip  = 0,
1266                 .ss_intra_frame_skip    = 2,
1267                 .ss_frame_number        = 3,
1268                 .coarse_time            = 0x0191,
1269                 .max_coarse_diff        = 5,
1270                 .min_exposure_course    = 2,
1271                 .max_exposure_course    = 0xFFFC,
1272                 .diff_integration_time  = 110, /* / _INT2FLOAT_DIVISOR */
1273                 .line_length            = 0x120C,
1274                 .frame_length           = 0x0196,
1275                 .min_frame_length       = 0x0196,
1276                 .max_frame_length       = 0xFFFF,
1277                 .min_gain               = 1, /* / _INT2FLOAT_DIVISOR */
1278                 .max_gain               = 16000, /* / _INT2FLOAT_DIVISOR */
1279                 .inherent_gain          = 1000, /* / _INT2FLOAT_DIVISOR */
1280                 .inherent_gain_bin_en   = 1000, /* / _INT2FLOAT_DIVISOR */
1281                 .support_bin_control    = 0,
1282                 .support_fast_mode      = 0,
1283                 .pll_mult               = 0x2F,
1284                 .pll_div                = 0x2,
1285         },
1286         .p_mode_i2c                     = imx091_524X390_i2c,
1287 };
1288
1289 static struct imx091_mode_data **imx091_mode_table;
1290 static unsigned int imx091_num_modes;
1291
1292 static struct imx091_mode_data *imx091_mode_table_fpga[] = {
1293         &imx091_FPGA_1052x1560,
1294         &imx091_FPGA_4160x3120,
1295 };
1296
1297 static struct imx091_mode_data *imx091_mode_table_non_fpga[] = {
1298         &imx091_4208x3120,
1299         &imx091_1948x1096,
1300         &imx091_1308x736,
1301         &imx091_2104x1560,
1302         &imx091_524x390,
1303 };
1304
1305 static int imx091_i2c_rd8(struct i2c_client *client, u16 reg, u8 *val)
1306 {
1307         struct i2c_msg msg[2];
1308         u8 buf[3];
1309
1310         buf[0] = (reg >> 8);
1311         buf[1] = (reg & 0x00FF);
1312         msg[0].addr = client->addr;
1313         msg[0].flags = 0;
1314         msg[0].len = 2;
1315         msg[0].buf = &buf[0];
1316         msg[1].addr = client->addr;
1317         msg[1].flags = I2C_M_RD;
1318         msg[1].len = 1;
1319         msg[1].buf = &buf[2];
1320         *val = 0;
1321         if (i2c_transfer(client->adapter, msg, 2) != 2)
1322                 return -EIO;
1323
1324         *val = buf[2];
1325         return 0;
1326 }
1327
1328 static int imx091_i2c_rd16(struct i2c_client *client, u16 reg, u16 *val)
1329 {
1330         struct i2c_msg msg[2];
1331         u8 buf[4];
1332
1333         buf[0] = (reg >> 8);
1334         buf[1] = (reg & 0x00FF);
1335         msg[0].addr = client->addr;
1336         msg[0].flags = 0;
1337         msg[0].len = 2;
1338         msg[0].buf = &buf[0];
1339         msg[1].addr = client->addr;
1340         msg[1].flags = I2C_M_RD;
1341         msg[1].len = 2;
1342         msg[1].buf = &buf[2];
1343         *val = 0;
1344         if (i2c_transfer(client->adapter, msg, 2) != 2)
1345                 return -EIO;
1346
1347         *val = (((u16)buf[2] << 8) | (u16)buf[3]);
1348         return 0;
1349 }
1350
1351 static int imx091_i2c_wr8(struct i2c_client *client, u16 reg, u8 val)
1352 {
1353         struct i2c_msg msg;
1354         u8 buf[3];
1355
1356         buf[0] = (reg >> 8);
1357         buf[1] = (reg & 0x00FF);
1358         buf[2] = val;
1359         msg.addr = client->addr;
1360         msg.flags = 0;
1361         msg.len = 3;
1362         msg.buf = &buf[0];
1363         if (i2c_transfer(client->adapter, &msg, 1) != 1)
1364                 return -EIO;
1365
1366         return 0;
1367 }
1368
1369 static int imx091_i2c_wr16(struct i2c_client *client, u16 reg, u16 val)
1370 {
1371         struct i2c_msg msg;
1372         u8 buf[4];
1373
1374         buf[0] = (reg >> 8);
1375         buf[1] = (reg & 0x00FF);
1376         buf[2] = (val & 0x00FF);
1377         buf[3] = (val >> 8);
1378         msg.addr = client->addr;
1379         msg.flags = 0;
1380         msg.len = 4;
1381         msg.buf = &buf[0];
1382         if (i2c_transfer(client->adapter, &msg, 1) != 1)
1383                 return -EIO;
1384
1385         return 0;
1386 }
1387
1388 static int imx091_i2c_rd_table(struct imx091_info *info,
1389                                struct imx091_reg table[])
1390 {
1391         struct imx091_reg *p_table = table;
1392         u8 val;
1393         int err = 0;
1394
1395         while (p_table->addr != IMX091_TABLE_END) {
1396                 err = imx091_i2c_rd8(info->i2c_client, p_table->addr, &val);
1397                 if (err)
1398                         return err;
1399
1400                 p_table->val = (u16)val;
1401                 p_table++;
1402         }
1403
1404         return err;
1405 }
1406
1407 static int imx091_i2c_wr_blk(struct imx091_info *info, u8 *buf, int len)
1408 {
1409         struct i2c_msg msg;
1410
1411         msg.addr = info->i2c_client->addr;
1412         msg.flags = 0;
1413         msg.len = len;
1414         msg.buf = buf;
1415         if (i2c_transfer(info->i2c_client->adapter, &msg, 1) != 1)
1416                 return -EIO;
1417
1418         return 0;
1419 }
1420
1421 static int imx091_i2c_wr_table(struct imx091_info *info,
1422                                struct imx091_reg table[])
1423 {
1424         int err;
1425         const struct imx091_reg *next;
1426         const struct imx091_reg *n_next;
1427         u8 *b_ptr = info->i2c_buf;
1428         u16 buf_count = 0;
1429
1430         for (next = table; next->addr != IMX091_TABLE_END; next++) {
1431                 if (next->addr == IMX091_TABLE_WAIT_MS) {
1432                         msleep(next->val);
1433                         continue;
1434                 }
1435
1436                 if (!buf_count) {
1437                         b_ptr = info->i2c_buf;
1438                         *b_ptr++ = next->addr >> 8;
1439                         *b_ptr++ = next->addr & 0xFF;
1440                         buf_count = 2;
1441                 }
1442                 *b_ptr++ = next->val;
1443                 buf_count++;
1444                 n_next = next + 1;
1445                 if (n_next->addr == next->addr + 1 &&
1446                                 n_next->addr != IMX091_TABLE_WAIT_MS &&
1447                                 buf_count < IMX091_SIZEOF_I2C_BUF &&
1448                                 n_next->addr != IMX091_TABLE_END)
1449                         continue;
1450
1451                 err = imx091_i2c_wr_blk(info, info->i2c_buf, buf_count);
1452                 if (err)
1453                         return err;
1454
1455                 buf_count = 0;
1456         }
1457
1458         return 0;
1459 }
1460
1461 static inline void imx091_frame_length_reg(struct imx091_reg *regs,
1462                                            u32 frame_length)
1463 {
1464         regs->addr = 0x0340;
1465         regs->val = (frame_length >> 8) & 0xFF;
1466         (regs + 1)->addr = 0x0341;
1467         (regs + 1)->val = (frame_length) & 0xFF;
1468 }
1469
1470 static inline void imx091_coarse_time_reg(struct imx091_reg *regs,
1471                                           u32 coarse_time)
1472 {
1473         regs->addr = 0x0202;
1474         regs->val = (coarse_time >> 8) & 0xFF;
1475         (regs + 1)->addr = 0x0203;
1476         (regs + 1)->val = (coarse_time) & 0xFF;
1477 }
1478
1479 static inline void imx091_gain_reg(struct imx091_reg *regs, u32 gain)
1480 {
1481         regs->addr = 0x0205;
1482         regs->val = gain & 0xFF;
1483 }
1484
1485 static int imx091_bin_wr(struct imx091_info *info, u8 enable)
1486 {
1487         int err = 0;
1488
1489         if (enable == info->bin_en)
1490                 return 0;
1491
1492         if (!info->mode_valid || !imx091_mode_table[info->mode_index]->
1493                                   sensor_dnvc.support_bin_control)
1494                 return -EINVAL;
1495
1496         if (!err)
1497                 info->bin_en = enable;
1498         dev_dbg(&info->i2c_client->dev, "%s bin_en=%x err=%d\n",
1499                 __func__, info->bin_en, err);
1500         return err;
1501 }
1502
1503 static int imx091_exposure_wr(struct imx091_info *info,
1504                               struct nvc_imager_bayer *mode)
1505 {
1506         struct imx091_reg reg_list[8];
1507         int err;
1508
1509         reg_list[0].addr = 0x0104;
1510         reg_list[0].val = 0x01;
1511         imx091_frame_length_reg(reg_list+1, mode->frame_length);
1512         imx091_coarse_time_reg(reg_list + 3, mode->coarse_time);
1513         imx091_gain_reg(reg_list + 5, mode->gain);
1514         reg_list[6].addr = 0x0104;
1515         reg_list[6].val = 0x00;
1516         reg_list[7].addr = IMX091_TABLE_END;
1517         err = imx091_i2c_wr_table(info, reg_list);
1518         if (!err)
1519                 err = imx091_bin_wr(info, mode->bin_en);
1520         return err;
1521 }
1522
1523 static int imx091_gain_wr(struct imx091_info *info, u32 gain)
1524 {
1525         int err;
1526
1527         gain &= 0xFF;
1528         err = imx091_i2c_wr16(info->i2c_client, 0x0205, (u16)gain);
1529         return err;
1530 }
1531
1532 static int imx091_gain_rd(struct imx091_info *info, u32 *gain)
1533 {
1534         int err;
1535
1536         *gain = 0;
1537         err = imx091_i2c_rd8(info->i2c_client, 0x0205, (u8 *)gain);
1538         return err;
1539 }
1540
1541 static int imx091_group_hold_wr(struct imx091_info *info,
1542                                 struct nvc_imager_ae *ae)
1543 {
1544         int err;
1545         bool groupHoldEnable;
1546         struct imx091_reg reg_list[6];
1547         int count = 0;
1548
1549         groupHoldEnable = ae->gain_enable |
1550                                         ae->frame_length_enable |
1551                                         ae->coarse_time_enable;
1552
1553         if (groupHoldEnable) {
1554                 err = imx091_i2c_wr8(info->i2c_client, 0x104, 1);
1555                 if (err) {
1556                         dev_err(&info->i2c_client->dev,
1557                                 "Error: %s fail to enable grouphold\n",
1558                                 __func__);
1559                         return err;
1560                 }
1561         }
1562
1563         if (ae->gain_enable) {
1564                 imx091_gain_reg(reg_list + count, ae->gain);
1565                 count += 1;
1566         }
1567         if (ae->coarse_time_enable) {
1568                 imx091_coarse_time_reg(reg_list + count, ae->coarse_time);
1569                 count += 2;
1570         }
1571         if (ae->frame_length_enable) {
1572                 imx091_frame_length_reg(reg_list + count, ae->frame_length);
1573                 count += 2;
1574         }
1575         reg_list[count].addr = IMX091_TABLE_END;
1576         err = imx091_i2c_wr_table(info, reg_list);
1577         if (err) {
1578                 dev_err(&info->i2c_client->dev, "Error: %s i2c wr_table fail\n",
1579                         __func__);
1580         }
1581
1582         if (groupHoldEnable) {
1583                 err = imx091_i2c_wr8(info->i2c_client, 0x104, 0);
1584                 if (err) {
1585                         dev_err(&info->i2c_client->dev,
1586                                 "Error: %s fail to release grouphold\n",
1587                                 __func__);
1588                 }
1589         }
1590         return err;
1591 }
1592
1593 static int imx091_test_pattern_wr(struct imx091_info *info, unsigned pattern)
1594 {
1595         if (pattern >= ARRAY_SIZE(test_patterns))
1596                 return -EINVAL;
1597
1598         return imx091_i2c_wr_table(info, test_patterns[pattern]);
1599 }
1600
1601 static int imx091_set_flash_output(struct imx091_info *info)
1602 {
1603         struct imx091_flash_config *fcfg;
1604         u8 val = 0;
1605         int ret = 0;
1606
1607         if (!info->pdata)
1608                 return 0;
1609
1610         fcfg = &info->pdata->flash_cap;
1611         if (fcfg->xvs_trigger_enabled)
1612                 val |= 0x0c;
1613         if (fcfg->sdo_trigger_enabled)
1614                 val |= 0x02;
1615         dev_dbg(&info->i2c_client->dev, "%s: %02x\n", __func__, val);
1616         /* disable all flash pulse output */
1617         ret = imx091_i2c_wr8(info->i2c_client, 0x304A, 0);
1618         /* config XVS/SDO pin output mode */
1619         ret |= imx091_i2c_wr8(info->i2c_client, 0x3240, val);
1620         /* set the control pulse width settings - Gain + Step
1621          * Pulse width(sec) = 64 * 2^(Gain) * (Step + 1) / Logic Clk
1622          * Logic Clk = ExtClk * PLL Multipiler / Pre_Div / Post_Div
1623          * / Logic Clk Division Ratio
1624          * Logic Clk Division Ratio = 5 @4lane, 10 @2lane, 20 @1lane
1625          */
1626         ret |= imx091_i2c_wr8(info->i2c_client, 0x307C, 0x07);
1627         ret |= imx091_i2c_wr8(info->i2c_client, 0x307D, 0x3F);
1628         return ret;
1629 }
1630
1631 static void imx091_get_flash_cap(struct imx091_info *info)
1632 {
1633         struct nvc_imager_cap *fcap = info->cap;
1634         struct imx091_flash_config *fcfg;
1635
1636         if (!info->pdata)
1637                 return;
1638
1639         fcfg = &info->pdata->flash_cap;
1640         fcap->flash_control_enabled =
1641                 fcfg->xvs_trigger_enabled | fcfg->sdo_trigger_enabled;
1642         fcap->adjustable_flash_timing = fcfg->adjustable_flash_timing;
1643 }
1644
1645 static int imx091_flash_control(
1646         struct imx091_info *info, union nvc_imager_flash_control *fm)
1647 {
1648         int ret;
1649         u8 f_cntl;
1650         u8 f_tim;
1651
1652         if (!info->pdata)
1653                 return -EFAULT;
1654
1655         ret = imx091_i2c_wr8(info->i2c_client, 0x304A, 0);
1656         f_tim = 0;
1657         f_cntl = 0;
1658         if (fm->settings.enable) {
1659                 if (fm->settings.edge_trig_en) {
1660                         f_cntl |= 0x10;
1661                         if (fm->settings.start_edge)
1662                                 f_tim |= 0x08;
1663                         if (fm->settings.repeat)
1664                                 f_tim |= 0x04;
1665                         f_tim |= fm->settings.delay_frm & 0x03;
1666                 } else
1667                         f_cntl |= 0x20;
1668         }
1669         ret |= imx091_i2c_wr8(info->i2c_client, 0x307B, f_tim);
1670         ret |= imx091_i2c_wr8(info->i2c_client, 0x304A, f_cntl);
1671
1672         dev_dbg(&info->i2c_client->dev,
1673                 "%s: %04x %02x %02x\n", __func__, fm->mode, f_tim, f_cntl);
1674         return ret;
1675 }
1676
1677 static int imx091_gpio_rd(struct imx091_info *info,
1678                           enum imx091_gpio i)
1679 {
1680         int val = -EINVAL;
1681
1682         if (info->gpio[i].flag) {
1683                 val = gpio_get_value_cansleep(info->gpio[i].gpio);
1684                 if (val)
1685                         val = 1;
1686                 dev_dbg(&info->i2c_client->dev, "%s %u %d\n",
1687                         __func__, info->gpio[i].gpio, val);
1688                 if (!info->gpio[i].active_high)
1689                         val = !val;
1690                 val &= 1;
1691         }
1692         return val; /* return read value or error */
1693 }
1694
1695 static int imx091_gpio_wr(struct imx091_info *info,
1696                           enum imx091_gpio i,
1697                           int val) /* val: 0=deassert, 1=assert */
1698 {
1699         int err = -EINVAL;
1700
1701         if (info->gpio[i].flag) {
1702                 if (val)
1703                         val = 1;
1704                 if (!info->gpio[i].active_high)
1705                         val = !val;
1706                 val &= 1;
1707                 err = val;
1708                 gpio_set_value_cansleep(info->gpio[i].gpio, val);
1709                 dev_dbg(&info->i2c_client->dev, "%s %u %d\n",
1710                         __func__, info->gpio[i].gpio, val);
1711         }
1712         return err; /* return value written or error */
1713 }
1714
1715 static int imx091_gpio_pwrdn(struct imx091_info *info, int val)
1716 {
1717         int prev_val;
1718
1719         prev_val = imx091_gpio_rd(info, IMX091_GPIO_PWDN);
1720         if (prev_val < 0)
1721                 return 1; /* assume PWRDN hardwired deasserted */
1722
1723         if (val == prev_val)
1724                 return 0; /* no change */
1725
1726         imx091_gpio_wr(info, IMX091_GPIO_PWDN, val);
1727         return 1; /* return state change */
1728 }
1729
1730 static int imx091_gpio_reset(struct imx091_info *info, int val)
1731 {
1732         int err = 0;
1733
1734         if (val) {
1735                 if (!info->reset_flag) {
1736                         info->reset_flag = true;
1737                         err = imx091_gpio_wr(info, IMX091_GPIO_RESET, 1);
1738                         if (err < 0)
1739                                 return 0; /* flag no reset */
1740
1741                         usleep_range(1000, 1500);
1742                         imx091_gpio_wr(info, IMX091_GPIO_RESET, 0);
1743                         msleep(IMX091_STARTUP_DELAY_MS); /* startup delay */
1744                         err = 1; /* flag that a reset was done */
1745                 }
1746         } else {
1747                 info->reset_flag = false;
1748         }
1749         return err;
1750 }
1751
1752 static void imx091_gpio_able(struct imx091_info *info, int val)
1753 {
1754         if (val)
1755                 imx091_gpio_wr(info, IMX091_GPIO_GP1, val);
1756         else
1757                 imx091_gpio_wr(info, IMX091_GPIO_GP1, val);
1758 }
1759
1760 static void imx091_gpio_exit(struct imx091_info *info)
1761 {
1762         unsigned i;
1763
1764         for (i = 0; i < ARRAY_SIZE(imx091_gpios); i++) {
1765                 if (info->gpio[i].flag && info->gpio[i].own) {
1766                         gpio_free(info->gpio[i].gpio);
1767                         info->gpio[i].own = false;
1768                 }
1769         }
1770 }
1771
1772 static void imx091_gpio_init(struct imx091_info *info)
1773 {
1774         char label[32];
1775         unsigned long flags;
1776         unsigned type;
1777         unsigned i;
1778         unsigned j;
1779         int err;
1780
1781         for (i = 0; i < ARRAY_SIZE(imx091_gpios); i++)
1782                 info->gpio[i].flag = false;
1783         if (!info->pdata->gpio_count || !info->pdata->gpio)
1784                 return;
1785
1786         for (i = 0; i < ARRAY_SIZE(imx091_gpios); i++) {
1787                 type = imx091_gpios[i].gpio_type;
1788                 for (j = 0; j < info->pdata->gpio_count; j++) {
1789                         if (type == info->pdata->gpio[j].gpio_type)
1790                                 break;
1791                 }
1792                 if (j == info->pdata->gpio_count)
1793                         continue;
1794
1795                 info->gpio[type].gpio = info->pdata->gpio[j].gpio;
1796                 info->gpio[type].flag = true;
1797                 if (imx091_gpios[i].use_flags) {
1798                         flags = imx091_gpios[i].flags;
1799                         info->gpio[type].active_high =
1800                                                    imx091_gpios[i].active_high;
1801                 } else {
1802                         info->gpio[type].active_high =
1803                                               info->pdata->gpio[j].active_high;
1804                         if (info->gpio[type].active_high)
1805                                 flags = GPIOF_OUT_INIT_LOW;
1806                         else
1807                                 flags = GPIOF_OUT_INIT_HIGH;
1808                 }
1809                 if (!info->pdata->gpio[j].init_en)
1810                         continue;
1811
1812                 snprintf(label, sizeof(label), "imx091_%u_%s",
1813                          info->pdata->num, imx091_gpios[i].label);
1814                 err = gpio_request_one(info->gpio[type].gpio, flags, label);
1815                 if (err) {
1816                         dev_err(&info->i2c_client->dev, "%s ERR %s %u\n",
1817                                 __func__, label, info->gpio[type].gpio);
1818                 } else {
1819                         info->gpio[type].own = true;
1820                         dev_dbg(&info->i2c_client->dev, "%s %s %u\n",
1821                                 __func__, label, info->gpio[type].gpio);
1822                 }
1823         }
1824 }
1825
1826 static void imx091_mclk_disable(struct imx091_info *info)
1827 {
1828         dev_dbg(&info->i2c_client->dev, "%s: disable MCLK\n", __func__);
1829         clk_disable_unprepare(info->mclk);
1830 }
1831
1832 static int imx091_mclk_enable(struct imx091_info *info)
1833 {
1834         int err;
1835         unsigned long mclk_init_rate =
1836                 nvc_imager_get_mclk(info->cap, &imx091_dflt_cap, 0);
1837
1838         dev_dbg(&info->i2c_client->dev, "%s: enable MCLK with %lu Hz\n",
1839                 __func__, mclk_init_rate);
1840
1841         err = clk_set_rate(info->mclk, mclk_init_rate);
1842         if (!err)
1843                 err = clk_prepare_enable(info->mclk);
1844
1845         return err;
1846 }
1847
1848 static int imx091_vreg_dis_all(struct imx091_info *info)
1849 {
1850         int err;
1851
1852         if (!info->pdata || !info->pdata->power_off)
1853                 return -EFAULT;
1854
1855         err = info->pdata->power_off(info->vreg);
1856
1857         imx091_mclk_disable(info);
1858
1859         return err;
1860 }
1861
1862 static int imx091_vreg_en_all(struct imx091_info *info)
1863 {
1864         int err;
1865
1866         if (!info->pdata || !info->pdata->power_on)
1867                 return -EFAULT;
1868
1869         err = imx091_mclk_enable(info);
1870         if (err)
1871                 return err;
1872
1873         err = info->pdata->power_on(info->vreg);
1874         if (err < 0)
1875                 imx091_mclk_disable(info);
1876
1877         return err;
1878 }
1879
1880 static void imx091_vreg_exit(struct imx091_info *info)
1881 {
1882         unsigned i;
1883
1884         for (i = 0; i < ARRAY_SIZE(imx091_vregs); i++) {
1885                 if (info->vreg[i].vreg)
1886                         regulator_put(info->vreg[i].vreg);
1887                 info->vreg[i].vreg = NULL;
1888         }
1889
1890         if (likely(info->imx091_ext_reg_vcm_vdd))
1891                 regulator_put(info->imx091_ext_reg_vcm_vdd);
1892         info->imx091_ext_reg_vcm_vdd = NULL;
1893
1894         if (likely(info->imx091_ext_reg_i2c_vdd))
1895                 regulator_put(info->imx091_ext_reg_i2c_vdd);
1896         info->imx091_ext_reg_i2c_vdd = NULL;
1897 }
1898
1899 static int imx091_vreg_init(struct imx091_info *info)
1900 {
1901         unsigned i;
1902         unsigned j;
1903         int err = 0;
1904
1905         for (i = 0; i < ARRAY_SIZE(imx091_vregs); i++) {
1906                 j = imx091_vregs[i].vreg_num;
1907                 info->vreg[j].vreg_name = imx091_vregs[i].vreg_name;
1908                 info->vreg[j].vreg_flag = false;
1909                 info->vreg[j].vreg = regulator_get(&info->i2c_client->dev,
1910                                                    info->vreg[j].vreg_name);
1911                 if (IS_ERR(info->vreg[j].vreg)) {
1912                         dev_dbg(&info->i2c_client->dev, "%s %s ERR: %p\n",
1913                                 __func__, info->vreg[j].vreg_name,
1914                                 info->vreg[j].vreg);
1915                         err |= PTR_ERR(info->vreg[j].vreg);
1916                         info->vreg[j].vreg = NULL;
1917                 } else {
1918                         dev_dbg(&info->i2c_client->dev, "%s: %s\n",
1919                                 __func__, info->vreg[j].vreg_name);
1920                 }
1921         }
1922         return err;
1923 }
1924
1925 static int imx091_pm_wr(struct imx091_info *info, int pwr)
1926 {
1927         int ret;
1928         int err = 0;
1929         u16 val;
1930
1931         if ((info->pdata->cfg & (NVC_CFG_OFF2STDBY | NVC_CFG_BOOT_INIT)) &&
1932                         (pwr == NVC_PWR_OFF ||
1933                          pwr == NVC_PWR_STDBY_OFF))
1934                 pwr = NVC_PWR_STDBY;
1935         if (pwr == info->pwr_dev)
1936                 return 0;
1937
1938         switch (pwr) {
1939         case NVC_PWR_OFF_FORCE:
1940         case NVC_PWR_OFF:
1941         case NVC_PWR_STDBY_OFF:
1942                 imx091_gpio_pwrdn(info, 1);
1943                 err = imx091_vreg_dis_all(info);
1944                 imx091_gpio_able(info, 0);
1945                 imx091_gpio_reset(info, 0);
1946                 info->mode_valid = false;
1947                 info->bin_en = 0;
1948                 break;
1949
1950         case NVC_PWR_STDBY:
1951                 imx091_gpio_pwrdn(info, 1);
1952                 err = imx091_vreg_en_all(info);
1953                 imx091_gpio_able(info, 1);
1954                 break;
1955
1956         case NVC_PWR_COMM:
1957         case NVC_PWR_ON:
1958                 if (info->pwr_dev != NVC_PWR_ON &&
1959                                 info->pwr_dev != NVC_PWR_COMM)
1960                         imx091_gpio_pwrdn(info, 1);
1961                 err = imx091_vreg_en_all(info);
1962                 imx091_gpio_able(info, 1);
1963                 ret = imx091_gpio_pwrdn(info, 0);
1964                 ret &= !imx091_gpio_reset(info, 1);
1965                 if (ret) /* if no reset && pwrdn changed states then delay */
1966                         msleep(IMX091_STARTUP_DELAY_MS);
1967                 if (err > 0)
1968                         err = imx091_i2c_rd16(info->i2c_client,
1969                                               IMX091_ID_ADDRESS, &val);
1970                 break;
1971
1972         default:
1973                 err = -EINVAL;
1974                 break;
1975         }
1976
1977         if (err < 0) {
1978                 dev_err(&info->i2c_client->dev, "%s err %d\n", __func__, err);
1979                 pwr = NVC_PWR_ERR;
1980         }
1981         info->pwr_dev = pwr;
1982         dev_dbg(&info->i2c_client->dev, "%s pwr_dev=%d\n",
1983                 __func__, info->pwr_dev);
1984         if (err > 0)
1985                 return 0;
1986
1987         return err;
1988 }
1989
1990 static int imx091_pm_wr_s(struct imx091_info *info, int pwr)
1991 {
1992         int err1 = 0;
1993         int err2 = 0;
1994
1995         if ((info->s_mode == NVC_SYNC_OFF) ||
1996                         (info->s_mode == NVC_SYNC_MASTER) ||
1997                         (info->s_mode == NVC_SYNC_STEREO))
1998                 err1 = imx091_pm_wr(info, pwr);
1999         if ((info->s_mode == NVC_SYNC_SLAVE) ||
2000                         (info->s_mode == NVC_SYNC_STEREO))
2001                 err2 = imx091_pm_wr(info->s_info, pwr);
2002         return err1 | err2;
2003 }
2004
2005 static int imx091_pm_api_wr(struct imx091_info *info, int pwr)
2006 {
2007         int err = 0;
2008
2009         if (!pwr || (pwr > NVC_PWR_ON))
2010                 return 0;
2011
2012         if (pwr > info->pwr_dev)
2013                 err = imx091_pm_wr_s(info, pwr);
2014         if (!err)
2015                 info->pwr_api = pwr;
2016         else
2017                 info->pwr_api = NVC_PWR_ERR;
2018         if (info->pdata->cfg & NVC_CFG_NOERR)
2019                 return 0;
2020
2021         return err;
2022 }
2023
2024 static int imx091_pm_dev_wr(struct imx091_info *info, int pwr)
2025 {
2026         if (pwr < info->pwr_api)
2027                 pwr = info->pwr_api;
2028         if (info->mode_enable)
2029                 pwr = NVC_PWR_ON;
2030         return imx091_pm_wr(info, pwr);
2031 }
2032
2033 static void imx091_pm_exit(struct imx091_info *info)
2034 {
2035         imx091_pm_dev_wr(info, NVC_PWR_OFF_FORCE);
2036         imx091_vreg_exit(info);
2037         imx091_gpio_exit(info);
2038 }
2039
2040 static void imx091_pm_init(struct imx091_info *info)
2041 {
2042         imx091_gpio_init(info);
2043         imx091_vreg_init(info);
2044 }
2045
2046 static int imx091_reset(struct imx091_info *info, u32 level)
2047 {
2048         int err;
2049
2050         if (level == NVC_RESET_SOFT) {
2051                 err = imx091_pm_wr(info, NVC_PWR_COMM);
2052                 /* SW reset */
2053                 err |= imx091_i2c_wr8(info->i2c_client, 0x0103, 0x01);
2054         } else {
2055                 err = imx091_pm_wr(info, NVC_PWR_OFF_FORCE);
2056         }
2057         err |= imx091_pm_wr(info, info->pwr_api);
2058         return err;
2059 }
2060
2061 static int imx091_dev_id(struct imx091_info *info)
2062 {
2063         u16 val = 0;
2064         unsigned i;
2065         int err;
2066
2067         dev_dbg(&info->i2c_client->dev, "%s +++++\n",
2068                         __func__);
2069         imx091_pm_dev_wr(info, NVC_PWR_COMM);
2070         dev_dbg(&info->i2c_client->dev, "DUCK:%s:%d\n",
2071                         __func__, __LINE__);
2072         err = imx091_i2c_rd16(info->i2c_client, IMX091_ID_ADDRESS, &val);
2073         if (!err) {
2074                 dev_dbg(&info->i2c_client->dev, "%s found devId: %x\n",
2075                         __func__, val);
2076                 info->sdata.sensor_id_minor = 0;
2077                 for (i = 0; i < ARRAY_SIZE(imx091_ids); i++) {
2078                         if (val == imx091_ids[i]) {
2079                                 info->sdata.sensor_id_minor = val;
2080                                 break;
2081                         }
2082                 }
2083                 if (!info->sdata.sensor_id_minor) {
2084                         err = -ENODEV;
2085                         dev_dbg(&info->i2c_client->dev, "%s No devId match\n",
2086                                 __func__);
2087                 }
2088         }
2089         imx091_pm_dev_wr(info, NVC_PWR_OFF);
2090         dev_dbg(&info->i2c_client->dev, "%s -----\n",
2091                         __func__);
2092         return err;
2093 }
2094
2095 static int imx091_mode_enable(struct imx091_info *info, bool mode_enable)
2096 {
2097         u8 val;
2098         int err;
2099
2100         if (mode_enable)
2101                 val = IMX091_STREAM_ENABLE;
2102         else
2103                 val = IMX091_STREAM_DISABLE;
2104         err = imx091_i2c_wr8(info->i2c_client, IMX091_STREAM_CONTROL_REG, val);
2105         if (!err) {
2106                 info->mode_enable = mode_enable;
2107                 dev_dbg(&info->i2c_client->dev, "%s streaming=%x\n",
2108                         __func__, info->mode_enable);
2109                 if (!mode_enable)
2110                         imx091_pm_dev_wr(info, NVC_PWR_OFF);
2111         }
2112         msleep(IMX091_WAIT_MS);
2113         return err;
2114 }
2115
2116 static int imx091_mode_rd(struct imx091_info *info,
2117                           s32 res_x,
2118                           s32 res_y,
2119                           u32 *index)
2120 {
2121         int i;
2122
2123         if (!res_x && !res_y) {
2124                 *index = info->cap->preferred_mode_index;
2125                 return 0;
2126         }
2127
2128         for (i = 0; i < imx091_num_modes; i++) {
2129                 if ((res_x == imx091_mode_table[i]->sensor_mode.res_x) &&
2130                     (res_y == imx091_mode_table[i]->sensor_mode.res_y)) {
2131                         break;
2132                 }
2133         }
2134
2135         if (i == imx091_num_modes) {
2136                 dev_err(&info->i2c_client->dev,
2137                         "%s invalid resolution: %dx%d\n",
2138                         __func__, res_x, res_y);
2139                 return -EINVAL;
2140         }
2141
2142         *index = i;
2143         return 0;
2144 }
2145
2146 static int imx091_mode_wr_full(struct imx091_info *info, u32 mode_index)
2147 {
2148         int err;
2149
2150         imx091_pm_dev_wr(info, NVC_PWR_ON);
2151         imx091_bin_wr(info, 0);
2152         err = imx091_i2c_wr_table(info,
2153                                   imx091_mode_table[mode_index]->p_mode_i2c);
2154         if (!err) {
2155                 info->mode_index = mode_index;
2156                 info->mode_valid = true;
2157         } else {
2158                 info->mode_valid = false;
2159         }
2160
2161         return err;
2162 }
2163
2164 static int imx091_mode_wr(struct imx091_info *info,
2165                           struct nvc_imager_bayer *mode)
2166 {
2167         u32 mode_index;
2168         int err;
2169
2170         err = imx091_mode_rd(info, mode->res_x, mode->res_y, &mode_index);
2171         if (err < 0)
2172                 return err;
2173
2174         if (!mode->res_x && !mode->res_y) {
2175                 if (mode->frame_length || mode->coarse_time || mode->gain) {
2176                         /* write exposure only */
2177                         err = imx091_exposure_wr(info, mode);
2178                         return err;
2179                 } else {
2180                         /* turn off streaming */
2181                         err = imx091_mode_enable(info, false);
2182                         return err;
2183                 }
2184         }
2185
2186         if (!info->mode_valid || (info->mode_index != mode_index))
2187                 err = imx091_mode_wr_full(info, mode_index);
2188         else
2189                 dev_dbg(&info->i2c_client->dev, "%s short mode\n", __func__);
2190         err |= imx091_exposure_wr(info, mode);
2191         if (err < 0) {
2192                 info->mode_valid = false;
2193                 goto imx091_mode_wr_err;
2194         }
2195
2196         err = imx091_set_flash_output(info);
2197
2198         err |= imx091_mode_enable(info, true);
2199         if (err < 0)
2200                 goto imx091_mode_wr_err;
2201
2202         return 0;
2203
2204 imx091_mode_wr_err:
2205         if (!info->mode_enable)
2206                 imx091_pm_dev_wr(info, NVC_PWR_STDBY);
2207         return err;
2208 }
2209
2210
2211 static int imx091_param_rd(struct imx091_info *info, unsigned long arg)
2212 {
2213         struct nvc_param params;
2214         struct imx091_reg *p_i2c_table;
2215         const void *data_ptr;
2216         u32 data_size = 0;
2217         u32 u32val;
2218         int err;
2219
2220         if (copy_from_user(&params,
2221                            (const void __user *)arg,
2222                            sizeof(struct nvc_param))) {
2223                 dev_err(&info->i2c_client->dev,
2224                         "%s copy_from_user err line %d\n", __func__, __LINE__);
2225                 return -EFAULT;
2226         }
2227
2228         if (info->s_mode == NVC_SYNC_SLAVE)
2229                 info = info->s_info;
2230
2231         switch (params.param) {
2232         case NVC_PARAM_GAIN:
2233                 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2234                 err = imx091_gain_rd(info, &u32val);
2235                 imx091_pm_dev_wr(info, NVC_PWR_OFF);
2236                 dev_dbg(&info->i2c_client->dev, "%s GAIN: %u err: %d\n",
2237                         __func__, u32val, err);
2238                 if (err)
2239                         return err;
2240
2241                 data_ptr = &u32val;
2242                 data_size = sizeof(u32val);
2243                 break;
2244
2245         case NVC_PARAM_STEREO_CAP:
2246                 if (info->s_info != NULL)
2247                         err = 0;
2248                 else
2249                         err = -ENODEV;
2250                 dev_dbg(&info->i2c_client->dev, "%s STEREO_CAP: %d\n",
2251                         __func__, err);
2252                 data_ptr = &err;
2253                 data_size = sizeof(err);
2254                 break;
2255
2256         case NVC_PARAM_STEREO:
2257                 dev_dbg(&info->i2c_client->dev, "%s STEREO: %d\n",
2258                         __func__, info->s_mode);
2259                 data_ptr = &info->s_mode;
2260                 data_size = sizeof(info->s_mode);
2261                 break;
2262
2263         case NVC_PARAM_STS:
2264                 err = imx091_dev_id(info);
2265                 dev_dbg(&info->i2c_client->dev, "%s STS: %d\n",
2266                         __func__, err);
2267                 data_ptr = &err;
2268                 data_size = sizeof(err);
2269                 break;
2270
2271         case NVC_PARAM_DEV_ID:
2272                 if (!info->sdata.sensor_id_minor)
2273                         imx091_dev_id(info);
2274                 data_ptr = &info->sdata.sensor_id;
2275                 data_size = sizeof(info->sdata.sensor_id) * 2;
2276                 dev_dbg(&info->i2c_client->dev, "%s DEV_ID: %x-%x\n",
2277                         __func__, info->sdata.sensor_id,
2278                         info->sdata.sensor_id_minor);
2279                 break;
2280
2281         case NVC_PARAM_SENSOR_TYPE:
2282                 data_ptr = &info->sdata.sensor_type;
2283                 data_size = sizeof(info->sdata.sensor_type);
2284                 dev_dbg(&info->i2c_client->dev, "%s SENSOR_TYPE: %d\n",
2285                         __func__, info->sdata.sensor_type);
2286                 break;
2287
2288         case NVC_PARAM_FOCAL_LEN:
2289                 data_ptr = &info->sdata.focal_len;
2290                 data_size = sizeof(info->sdata.focal_len);
2291                 dev_dbg(&info->i2c_client->dev, "%s FOCAL_LEN: %u\n",
2292                         __func__, info->sdata.focal_len);
2293                 break;
2294
2295         case NVC_PARAM_MAX_APERTURE:
2296                 data_ptr = &info->sdata.max_aperture;
2297                 data_size = sizeof(info->sdata.max_aperture);
2298                 dev_dbg(&info->i2c_client->dev, "%s MAX_APERTURE: %u\n",
2299                         __func__, info->sdata.max_aperture);
2300                 break;
2301
2302         case NVC_PARAM_FNUMBER:
2303                 data_ptr = &info->sdata.fnumber;
2304                 data_size = sizeof(info->sdata.fnumber);
2305                 dev_dbg(&info->i2c_client->dev, "%s FNUMBER: %u\n",
2306                         __func__, info->sdata.fnumber);
2307                 break;
2308
2309         case NVC_PARAM_VIEW_ANGLE_H:
2310                 data_ptr = &info->sdata.view_angle_h;
2311                 data_size = sizeof(info->sdata.view_angle_h);
2312                 dev_dbg(&info->i2c_client->dev, "%s VIEW_ANGLE_H: %u\n",
2313                         __func__, info->sdata.view_angle_h);
2314                 break;
2315
2316         case NVC_PARAM_VIEW_ANGLE_V:
2317                 data_ptr = &info->sdata.view_angle_v;
2318                 data_size = sizeof(info->sdata.view_angle_v);
2319                 dev_dbg(&info->i2c_client->dev, "%s VIEW_ANGLE_V: %u\n",
2320                         __func__, info->sdata.view_angle_v);
2321                 break;
2322
2323         case NVC_PARAM_I2C:
2324                 dev_dbg(&info->i2c_client->dev, "%s I2C\n", __func__);
2325                 if (params.sizeofvalue > IMX091_I2C_TABLE_MAX_ENTRIES) {
2326                         dev_err(&info->i2c_client->dev,
2327                                 "%s NVC_PARAM_I2C request size too large\n",
2328                                 __func__);
2329                         return -EINVAL;
2330                 }
2331                 p_i2c_table = kzalloc(sizeof(params.sizeofvalue), GFP_KERNEL);
2332                 if (p_i2c_table == NULL) {
2333                         pr_err("%s: kzalloc error\n", __func__);
2334                         return -ENOMEM;
2335                 }
2336
2337                 if (copy_from_user(p_i2c_table,
2338                         (const void __user *)(uintptr_t)params.p_value,
2339                         params.sizeofvalue)) {
2340                         dev_err(&info->i2c_client->dev,
2341                                 "%s copy_from_user err line %d\n",
2342                                 __func__, __LINE__);
2343                         kfree(p_i2c_table);
2344                         return -EINVAL;
2345                 }
2346
2347                 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2348                 err = imx091_i2c_rd_table(info, p_i2c_table);
2349                 imx091_pm_dev_wr(info, NVC_PWR_OFF);
2350                 if (copy_to_user((void __user *)(uintptr_t)params.p_value,
2351                         p_i2c_table,
2352                         params.sizeofvalue)) {
2353                         dev_err(&info->i2c_client->dev,
2354                                 "%s copy_to_user err line %d\n",
2355                                 __func__, __LINE__);
2356                         err = -EINVAL;
2357                 }
2358                 kfree(p_i2c_table);
2359                 return err;
2360         default:
2361                 dev_dbg(&info->i2c_client->dev,
2362                         "%s unsupported parameter: %d\n",
2363                         __func__, params.param);
2364                 return -EINVAL;
2365         }
2366
2367         if (params.sizeofvalue < data_size) {
2368                 dev_err(&info->i2c_client->dev,
2369                         "%s data size mismatch %d != %d Param: %d\n",
2370                         __func__, params.sizeofvalue, data_size, params.param);
2371                 return -EINVAL;
2372         }
2373
2374         if (copy_to_user((void __user *)(uintptr_t)params.p_value,
2375                 data_ptr, data_size)) {
2376                 dev_err(&info->i2c_client->dev,
2377                         "%s copy_to_user err line %d\n", __func__, __LINE__);
2378                 return -EFAULT;
2379         }
2380
2381         return 0;
2382 }
2383
2384 static int imx091_param_wr_s(struct imx091_info *info,
2385                              struct nvc_param *params,
2386                              u32 u32val)
2387 {
2388         struct imx091_reg *p_i2c_table;
2389         u8 u8val;
2390         int err;
2391
2392         u8val = (u8)u32val;
2393         switch (params->param) {
2394         case NVC_PARAM_GAIN:
2395                 dev_dbg(&info->i2c_client->dev, "%s GAIN: %u\n",
2396                         __func__, u32val);
2397                 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2398                 err = imx091_gain_wr(info, u32val);
2399                 if (err) {
2400                         dev_err(&info->i2c_client->dev,
2401                                 "Error: %s SET GAIN ERR",
2402                                 __func__);
2403                 }
2404                 imx091_pm_dev_wr(info, NVC_PWR_STDBY);
2405                 return err;
2406
2407         case NVC_PARAM_RESET:
2408                 err = imx091_reset(info, u32val);
2409                 dev_dbg(&info->i2c_client->dev, "%s RESET=%d err=%d\n",
2410                         __func__, u32val, err);
2411                 return err;
2412
2413         case NVC_PARAM_TESTMODE:
2414                 dev_dbg(&info->i2c_client->dev, "%s TESTMODE: %u\n",
2415                         __func__, (unsigned)u8val);
2416                 if (u8val)
2417                         u32val = info->test_pattern;
2418                 else
2419                         u32val = 0;
2420                 imx091_pm_dev_wr(info, NVC_PWR_ON);
2421                 err = imx091_test_pattern_wr(info, u32val);
2422                 if (!u8val)
2423                         imx091_pm_dev_wr(info, NVC_PWR_OFF);
2424                 return err;
2425
2426         case NVC_PARAM_TEST_PATTERN:
2427                 dev_dbg(&info->i2c_client->dev, "%s TEST_PATTERN: %d\n",
2428                         __func__, u32val);
2429                 info->test_pattern = u32val;
2430                 return 0;
2431
2432         case NVC_PARAM_SELF_TEST:
2433                 err = imx091_dev_id(info);
2434                 dev_dbg(&info->i2c_client->dev, "%s SELF_TEST: %d\n",
2435                         __func__, err);
2436                 return err;
2437
2438         case NVC_PARAM_I2C:
2439                 dev_dbg(&info->i2c_client->dev, "%s I2C\n", __func__);
2440                 if (params->sizeofvalue > IMX091_I2C_TABLE_MAX_ENTRIES) {
2441                         dev_err(&info->i2c_client->dev,
2442                                 "%s NVC_PARAM_I2C request size too large\n",
2443                                 __func__);
2444                         return -EINVAL;
2445                 }
2446                 p_i2c_table = kzalloc(sizeof(params->sizeofvalue), GFP_KERNEL);
2447                 if (p_i2c_table == NULL) {
2448                         dev_err(&info->i2c_client->dev,
2449                                 "%s kzalloc err line %d\n",
2450                                 __func__, __LINE__);
2451                         return -ENOMEM;
2452                 }
2453
2454                 if (copy_from_user(p_i2c_table,
2455                         (const void __user *)(uintptr_t)params->p_value,
2456                         params->sizeofvalue)) {
2457                         dev_err(&info->i2c_client->dev,
2458                                 "%s copy_from_user err line %d\n",
2459                                 __func__, __LINE__);
2460                         kfree(p_i2c_table);
2461                         return -EFAULT;
2462                 }
2463
2464                 imx091_pm_dev_wr(info, NVC_PWR_ON);
2465                 err = imx091_i2c_wr_table(info, p_i2c_table);
2466                 kfree(p_i2c_table);
2467                 return err;
2468
2469         case NVC_PARAM_SET_SENSOR_FLASH_MODE:
2470         {
2471                 union nvc_imager_flash_control fm;
2472                 if (copy_from_user(&fm,
2473                         (const void __user *)(uintptr_t)params->p_value,
2474                         sizeof(fm))) {
2475                         pr_info("%s:fail set flash mode.\n", __func__);
2476                         return -EFAULT;
2477                 }
2478                 return imx091_flash_control(info, &fm);
2479         }
2480
2481         default:
2482                 dev_dbg(&info->i2c_client->dev,
2483                         "%s unsupported parameter: %d\n",
2484                         __func__, params->param);
2485                 return -EINVAL;
2486         }
2487 }
2488
2489 static int imx091_param_wr(struct imx091_info *info, unsigned long arg)
2490 {
2491         struct nvc_param params;
2492         u8 u8val;
2493         u32 u32val;
2494         int err = 0;
2495
2496         if (copy_from_user(&params, (const void __user *)arg,
2497                            sizeof(struct nvc_param))) {
2498                 dev_err(&info->i2c_client->dev,
2499                         "%s copy_from_user err line %d\n", __func__, __LINE__);
2500                 return -EFAULT;
2501         }
2502
2503         if (copy_from_user(&u32val,
2504                 (const void __user *)(uintptr_t)params.p_value,
2505                 sizeof(u32val))) {
2506                 dev_err(&info->i2c_client->dev, "%s %d copy_from_user err\n",
2507                         __func__, __LINE__);
2508                 return -EFAULT;
2509         }
2510
2511         u8val = (u8)u32val;
2512         /* parameters independent of sync mode */
2513         switch (params.param) {
2514         case NVC_PARAM_STEREO:
2515                 dev_dbg(&info->i2c_client->dev, "%s STEREO: %d\n",
2516                         __func__, u8val);
2517                 if (u8val == info->s_mode)
2518                         return 0;
2519
2520                 switch (u8val) {
2521                 case NVC_SYNC_OFF:
2522                         info->s_mode = u8val;
2523                         if (info->s_info != NULL) {
2524                                 info->s_info->s_mode = u8val;
2525                                 imx091_pm_wr(info->s_info, NVC_PWR_OFF);
2526                         }
2527                         break;
2528
2529                 case NVC_SYNC_MASTER:
2530                         info->s_mode = u8val;
2531                         if (info->s_info != NULL)
2532                                 info->s_info->s_mode = u8val;
2533                         break;
2534
2535                 case NVC_SYNC_SLAVE:
2536                         if (info->s_info != NULL) {
2537                                 /* sync power */
2538                                 info->s_info->pwr_api = info->pwr_api;
2539                                 err = imx091_pm_wr(info->s_info,
2540                                                    info->pwr_dev);
2541                                 if (!err) {
2542                                         info->s_mode = u8val;
2543                                         info->s_info->s_mode = u8val;
2544                                 } else {
2545                                         if (info->s_mode != NVC_SYNC_STEREO)
2546                                                 imx091_pm_wr(info->s_info,
2547                                                              NVC_PWR_OFF);
2548                                         err = -EIO;
2549                                 }
2550                         } else {
2551                                 err = -EINVAL;
2552                         }
2553                         break;
2554
2555                 case NVC_SYNC_STEREO:
2556                         if (info->s_info != NULL) {
2557                                 /* sync power */
2558                                 info->s_info->pwr_api = info->pwr_api;
2559                                 err = imx091_pm_wr(info->s_info,
2560                                                    info->pwr_dev);
2561                                 if (!err) {
2562                                         info->s_mode = u8val;
2563                                         info->s_info->s_mode = u8val;
2564                                 } else {
2565                                         if (info->s_mode != NVC_SYNC_SLAVE)
2566                                                 imx091_pm_wr(info->s_info,
2567                                                              NVC_PWR_OFF);
2568                                         err = -EIO;
2569                                 }
2570                         } else {
2571                                 err = -EINVAL;
2572                         }
2573                         break;
2574
2575                 default:
2576                         err = -EINVAL;
2577                 }
2578                 if (info->pdata->cfg & NVC_CFG_NOERR)
2579                         return 0;
2580
2581                 return err;
2582
2583         case NVC_PARAM_GROUP_HOLD:
2584         {
2585                 struct nvc_imager_ae ae;
2586                 dev_dbg(&info->i2c_client->dev, "%s GROUP_HOLD\n",
2587                         __func__);
2588                 if (copy_from_user(&ae,
2589                         (const void __user *)(uintptr_t)params.p_value,
2590                         sizeof(struct nvc_imager_ae))) {
2591                         dev_err(&info->i2c_client->dev,
2592                                 "Error: %s %d copy_from_user err\n",
2593                                 __func__, __LINE__);
2594                         return -EFAULT;
2595                 }
2596                 imx091_pm_dev_wr(info, NVC_PWR_COMM);
2597                 err = imx091_group_hold_wr(info, &ae);
2598                 imx091_pm_dev_wr(info, NVC_PWR_STDBY);
2599                 return err;
2600         }
2601
2602         default:
2603         /* parameters dependent on sync mode */
2604                 switch (info->s_mode) {
2605                 case NVC_SYNC_OFF:
2606                 case NVC_SYNC_MASTER:
2607                         return imx091_param_wr_s(info, &params, u32val);
2608
2609                 case NVC_SYNC_SLAVE:
2610                         return imx091_param_wr_s(info->s_info, &params,
2611                                                  u32val);
2612
2613                 case NVC_SYNC_STEREO:
2614                         err = imx091_param_wr_s(info, &params, u32val);
2615                         if (!(info->pdata->cfg & NVC_CFG_SYNC_I2C_MUX))
2616                                 err |= imx091_param_wr_s(info->s_info,
2617                                                          &params, u32val);
2618                         return err;
2619
2620                 default:
2621                         dev_err(&info->i2c_client->dev, "%s %d internal err\n",
2622                                 __func__, __LINE__);
2623                         return -EINVAL;
2624                 }
2625         }
2626 }
2627
2628 static int imx091_get_fuse_id(struct imx091_info *info)
2629 {
2630         int ret, i;
2631
2632         if (info->fuse_id.size)
2633                 return 0;
2634
2635         ret = imx091_i2c_wr8(info->i2c_client, 0x34C9, 0x10);
2636
2637         for (i = 0; i < IMX091_FUSE_ID_SIZE ; i++) {
2638                 ret |= imx091_i2c_rd8(info->i2c_client,
2639                                 0x3580 + i,
2640                                 &info->fuse_id.data[i]);
2641         }
2642
2643         if (!ret)
2644                 info->fuse_id.size = i;
2645
2646         return ret;
2647 }
2648
2649 static long imx091_ioctl(struct file *file,
2650                          unsigned int cmd,
2651                          unsigned long arg)
2652 {
2653         struct imx091_info *info = file->private_data;
2654         struct nvc_imager_bayer mode;
2655         struct nvc_imager_mode_list mode_list;
2656         struct nvc_imager_mode mode_table[IMX091_NUM_MODES_MAX];
2657         struct nvc_imager_dnvc dnvc;
2658         unsigned int mode_table_size;
2659         const void *data_ptr;
2660         s32 num_modes;
2661         u32 i;
2662         int pwr;
2663         int err;
2664
2665         if (tegra_platform_is_fpga()) {
2666                 imx091_mode_table = imx091_mode_table_fpga;
2667                 imx091_num_modes = ARRAY_SIZE(imx091_mode_table_fpga);
2668
2669         } else {
2670                 imx091_mode_table = imx091_mode_table_non_fpga;
2671                 imx091_num_modes = ARRAY_SIZE(imx091_mode_table_non_fpga);
2672         }
2673
2674         mode_table_size = sizeof(struct nvc_imager_mode) * imx091_num_modes;
2675
2676         switch (_IOC_NR(cmd)) {
2677         case _IOC_NR(NVC_IOCTL_FUSE_ID):
2678                 err = imx091_get_fuse_id(info);
2679
2680                 if (err) {
2681                         pr_err("%s %d %d\n", __func__, __LINE__, err);
2682                         return err;
2683                 }
2684                 if (copy_to_user((void __user *)arg,
2685                                 &info->fuse_id,
2686                                 sizeof(struct nvc_fuseid))) {
2687                         pr_err("%s: %d: fail copy fuse id to user space\n",
2688                                 __func__, __LINE__);
2689                         return -EFAULT;
2690                 }
2691                 return 0;
2692
2693         case _IOC_NR(NVC_IOCTL_PARAM_WR):
2694                 err = imx091_param_wr(info, arg);
2695                 return err;
2696
2697         case _IOC_NR(NVC_IOCTL_PARAM_RD):
2698                 err = imx091_param_rd(info, arg);
2699                 return err;
2700
2701         case _IOC_NR(NVC_IOCTL_DYNAMIC_RD):
2702                 if (copy_from_user(&dnvc, (const void __user *)arg,
2703                                    sizeof(struct nvc_imager_dnvc))) {
2704                         dev_err(&info->i2c_client->dev,
2705                                 "%s copy_from_user err line %d\n",
2706                                 __func__, __LINE__);
2707                         return -EFAULT;
2708                 }
2709
2710                 dev_dbg(&info->i2c_client->dev, "%s DYNAMIC_RD x=%d y=%d\n",
2711                         __func__, dnvc.res_x, dnvc.res_y);
2712                 err = imx091_mode_rd(info, dnvc.res_x, dnvc.res_y, &i);
2713                 if (err)
2714                         return -EINVAL;
2715
2716                 if (dnvc.p_mode) {
2717                         if (copy_to_user((void __user *)dnvc.p_mode,
2718                                          &imx091_mode_table[i]->sensor_mode,
2719                                          sizeof(struct nvc_imager_mode))) {
2720                                 dev_err(&info->i2c_client->dev,
2721                                         "%s copy_to_user err line %d\n",
2722                                         __func__, __LINE__);
2723                                 return -EFAULT;
2724                         }
2725                 }
2726
2727                 if (dnvc.p_dnvc) {
2728                         if (copy_to_user((void __user *)dnvc.p_dnvc,
2729                                       &imx091_mode_table[i]->sensor_dnvc,
2730                                       sizeof(struct nvc_imager_dynamic_nvc))) {
2731                                 dev_err(&info->i2c_client->dev,
2732                                         "%s copy_to_user err line %d\n",
2733                                         __func__, __LINE__);
2734                                 return -EFAULT;
2735                         }
2736                 }
2737
2738                 return 0;
2739
2740         case _IOC_NR(NVC_IOCTL_MODE_WR):
2741                 if (copy_from_user(&mode, (const void __user *)arg,
2742                                    sizeof(struct nvc_imager_bayer))) {
2743                         dev_err(&info->i2c_client->dev,
2744                                 "%s copy_from_user err line %d\n",
2745                                 __func__, __LINE__);
2746                         return -EFAULT;
2747                 }
2748
2749                 dev_info(&info->i2c_client->dev,
2750                         "%s MODE_WR x=%d y=%d coarse=%u frame=%u gain=%u\n",
2751                         __func__, mode.res_x, mode.res_y,
2752                         mode.coarse_time, mode.frame_length, mode.gain);
2753                 err = imx091_mode_wr(info, &mode);
2754                 return err;
2755
2756         case _IOC_NR(NVC_IOCTL_MODE_RD):
2757                 /*
2758                  * Return a list of modes that sensor bayer supports.
2759                  * If called with a NULL ptr to pModes,
2760                  * then it just returns the count.
2761                  */
2762                 dev_dbg(&info->i2c_client->dev, "%s MODE_RD n=%d\n",
2763                         __func__, imx091_num_modes);
2764                 if (copy_from_user(&mode_list, (const void __user *)arg,
2765                                    sizeof(struct nvc_imager_mode_list))) {
2766                         dev_err(&info->i2c_client->dev,
2767                                 "%s copy_from_user err line %d\n",
2768                                 __func__, __LINE__);
2769                         return -EFAULT;
2770                 }
2771
2772                 num_modes = imx091_num_modes;
2773                 if (mode_list.p_num_mode != NULL) {
2774                         if (copy_to_user((void __user *)mode_list.p_num_mode,
2775                                          &num_modes, sizeof(num_modes))) {
2776                                 dev_err(&info->i2c_client->dev,
2777                                         "%s copy_to_user err line %d\n",
2778                                         __func__, __LINE__);
2779                                 return -EFAULT;
2780                         }
2781                 }
2782
2783                 if (mode_list.p_modes != NULL) {
2784                         for (i = 0; i < imx091_num_modes; i++) {
2785                                 mode_table[i] =
2786                                              imx091_mode_table[i]->sensor_mode;
2787                         }
2788                         if (copy_to_user((void __user *)mode_list.p_modes,
2789                                          (const void *)&mode_table,
2790                                          mode_table_size)) {
2791                                 dev_err(&info->i2c_client->dev,
2792                                         "%s copy_to_user err line %d\n",
2793                                         __func__, __LINE__);
2794                                 return -EFAULT;
2795                         }
2796                 }
2797
2798                 return 0;
2799
2800         case _IOC_NR(NVC_IOCTL_PWR_WR):
2801                 /* This is a Guaranteed Level of Service (GLOS) call */
2802                 pwr = (int)arg * 2;
2803                 dev_dbg(&info->i2c_client->dev, "%s PWR_WR: %d\n",
2804                         __func__, pwr);
2805                 err = imx091_pm_api_wr(info, pwr);
2806                 return err;
2807
2808         case _IOC_NR(NVC_IOCTL_PWR_RD):
2809                 if (info->s_mode == NVC_SYNC_SLAVE)
2810                         pwr = info->s_info->pwr_api / 2;
2811                 else
2812                         pwr = info->pwr_api / 2;
2813                 dev_dbg(&info->i2c_client->dev, "%s PWR_RD: %d\n",
2814                         __func__, pwr);
2815                 if (copy_to_user((void __user *)arg, (const void *)&pwr,
2816                                  sizeof(pwr))) {
2817                         dev_err(&info->i2c_client->dev,
2818                                         "%s copy_to_user err line %d\n",
2819                                         __func__, __LINE__);
2820                         return -EFAULT;
2821                 }
2822
2823                 return 0;
2824
2825         case _IOC_NR(NVC_IOCTL_CAPS_RD):
2826                 dev_dbg(&info->i2c_client->dev, "%s CAPS_RD n=%zd\n",
2827                         __func__, sizeof(imx091_dflt_cap));
2828                 data_ptr = info->cap;
2829                 if (copy_to_user((void __user *)arg,
2830                                  data_ptr,
2831                                  sizeof(imx091_dflt_cap))) {
2832                         dev_err(&info->i2c_client->dev,
2833                                 "%s copy_to_user err line %d\n",
2834                                 __func__, __LINE__);
2835                         return -EFAULT;
2836                 }
2837
2838                 return 0;
2839
2840         case _IOC_NR(NVC_IOCTL_STATIC_RD):
2841                 dev_dbg(&info->i2c_client->dev, "%s STATIC_RD n=%lu\n",
2842                         __func__,
2843                         (unsigned long)sizeof(struct nvc_imager_static_nvc));
2844                 data_ptr = &info->sdata;
2845                 if (copy_to_user((void __user *)arg,
2846                                  data_ptr,
2847                                  sizeof(struct nvc_imager_static_nvc))) {
2848                         dev_err(&info->i2c_client->dev,
2849                                 "%s copy_to_user err line %d\n",
2850                                 __func__, __LINE__);
2851                         return -EFAULT;
2852                 }
2853
2854                 return 0;
2855
2856         default:
2857                 dev_dbg(&info->i2c_client->dev, "%s unsupported ioctl: %x\n",
2858                         __func__, cmd);
2859         }
2860
2861         return -EINVAL;
2862 }
2863
2864 static void imx091_sdata_init(struct imx091_info *info)
2865 {
2866         if (info->pdata->cap)
2867                 info->cap = info->pdata->cap;
2868         else
2869                 info->cap = &imx091_dflt_cap;
2870         memcpy(&info->sdata, &imx091_dflt_sdata, sizeof(info->sdata));
2871         if (info->pdata->lens_focal_length)
2872                 info->sdata.focal_len = info->pdata->lens_focal_length;
2873         if (info->pdata->lens_max_aperture)
2874                 info->sdata.max_aperture = info->pdata->lens_max_aperture;
2875         if (info->pdata->lens_fnumber)
2876                 info->sdata.fnumber = info->pdata->lens_fnumber;
2877         if (info->pdata->lens_view_angle_h)
2878                 info->sdata.view_angle_h = info->pdata->lens_view_angle_h;
2879         if (info->pdata->lens_view_angle_v)
2880                 info->sdata.view_angle_v = info->pdata->lens_view_angle_v;
2881 }
2882
2883 static int imx091_sync_en(unsigned num, unsigned sync)
2884 {
2885         struct imx091_info *master = NULL;
2886         struct imx091_info *slave = NULL;
2887         struct imx091_info *pos = NULL;
2888
2889         rcu_read_lock();
2890         list_for_each_entry_rcu(pos, &imx091_info_list, list) {
2891                 if (pos->pdata->num == num) {
2892                         master = pos;
2893                         break;
2894                 }
2895         }
2896         pos = NULL;
2897         list_for_each_entry_rcu(pos, &imx091_info_list, list) {
2898                 if (pos->pdata->num == sync) {
2899                         slave = pos;
2900                         break;
2901                 }
2902         }
2903         rcu_read_unlock();
2904         if (master != NULL)
2905                 master->s_info = NULL;
2906         if (slave != NULL)
2907                 slave->s_info = NULL;
2908         if (!sync)
2909                 return 0; /* no err if sync disabled */
2910
2911         if (num == sync)
2912                 return -EINVAL; /* err if sync instance is itself */
2913
2914         if ((master != NULL) && (slave != NULL)) {
2915                 master->s_info = slave;
2916                 slave->s_info = master;
2917         }
2918         return 0;
2919 }
2920
2921 static int imx091_sync_dis(struct imx091_info *info)
2922 {
2923         if (info->s_info != NULL) {
2924                 info->s_info->s_mode = 0;
2925                 info->s_info->s_info = NULL;
2926                 info->s_mode = 0;
2927                 info->s_info = NULL;
2928                 return 0;
2929         }
2930
2931         return -EINVAL;
2932 }
2933
2934 static int imx091_open(struct inode *inode, struct file *file)
2935 {
2936         struct imx091_info *info = NULL;
2937         struct imx091_info *pos = NULL;
2938         int err;
2939
2940
2941         rcu_read_lock();
2942         list_for_each_entry_rcu(pos, &imx091_info_list, list) {
2943                 if (pos->miscdev.minor == iminor(inode)) {
2944                         info = pos;
2945                         break;
2946                 }
2947         }
2948         rcu_read_unlock();
2949         if (!info) {
2950                 pr_err("%s err @%d info is null\n", __func__, __LINE__);
2951                 return -ENODEV;
2952         }
2953
2954         dev_dbg(&info->i2c_client->dev, "%s +++++\n", __func__);
2955         err = imx091_sync_en(info->pdata->num, info->pdata->sync);
2956         if (err == -EINVAL)
2957                 dev_err(&info->i2c_client->dev,
2958                         "%s err: invalid num (%u) and sync (%u) instance\n",
2959                         __func__, info->pdata->num, info->pdata->sync);
2960         if (atomic_xchg(&info->in_use, 1)) {
2961                 dev_err(&info->i2c_client->dev, "%s err @%d device is busy\n",
2962                         __func__, __LINE__);
2963                 return -EBUSY;
2964         }
2965         if (info->s_info != NULL) {
2966                 if (atomic_xchg(&info->s_info->in_use, 1)) {
2967                         dev_err(&info->i2c_client->dev,
2968                                 "%s err @%d sync device is busy\n",
2969                                 __func__, __LINE__);
2970                         return -EBUSY;
2971                 }
2972                 info->sdata.stereo_cap = 1;
2973         }
2974
2975         file->private_data = info;
2976         dev_dbg(&info->i2c_client->dev, "%s -----\n", __func__);
2977         return 0;
2978 }
2979
2980 static int imx091_release(struct inode *inode, struct file *file)
2981 {
2982         struct imx091_info *info = file->private_data;
2983
2984         dev_dbg(&info->i2c_client->dev, "%s +++++\n", __func__);
2985         imx091_pm_wr_s(info, NVC_PWR_OFF);
2986         file->private_data = NULL;
2987         WARN_ON(!atomic_xchg(&info->in_use, 0));
2988         if (info->s_info != NULL)
2989                 WARN_ON(!atomic_xchg(&info->s_info->in_use, 0));
2990         imx091_sync_dis(info);
2991         dev_dbg(&info->i2c_client->dev, "%s -----\n", __func__);
2992         return 0;
2993 }
2994
2995 static const struct file_operations imx091_fileops = {
2996         .owner = THIS_MODULE,
2997         .open = imx091_open,
2998         .unlocked_ioctl = imx091_ioctl,
2999 #ifdef CONFIG_COMPAT
3000         .compat_ioctl = imx091_ioctl,
3001 #endif
3002         .release = imx091_release,
3003 };
3004
3005 static void imx091_del(struct imx091_info *info)
3006 {
3007         imx091_pm_exit(info);
3008         if ((info->s_mode == NVC_SYNC_SLAVE) ||
3009                                              (info->s_mode == NVC_SYNC_STEREO))
3010                 imx091_pm_exit(info->s_info);
3011         imx091_sync_dis(info);
3012         spin_lock(&imx091_spinlock);
3013         list_del_rcu(&info->list);
3014         spin_unlock(&imx091_spinlock);
3015         synchronize_rcu();
3016 }
3017
3018 static int imx091_remove(struct i2c_client *client)
3019 {
3020         struct imx091_info *info = i2c_get_clientdata(client);
3021
3022         dev_dbg(&info->i2c_client->dev, "%s\n", __func__);
3023 #ifdef CONFIG_DEBUG_FS
3024         nvc_debugfs_remove(&info->debugfs_info);
3025 #endif
3026         misc_deregister(&info->miscdev);
3027         imx091_del(info);
3028         return 0;
3029 }
3030
3031 static struct of_device_id imx091_of_match[] = {
3032         { .compatible = "nvidia,imx091", },
3033         { },
3034 };
3035
3036 MODULE_DEVICE_TABLE(of, imx091_of_match);
3037
3038 static int imx091_get_extra_regulators(struct imx091_info *info)
3039 {
3040         if (info->pdata->vcm_vdd && !info->imx091_ext_reg_vcm_vdd) {
3041                 info->imx091_ext_reg_vcm_vdd = regulator_get(NULL,
3042                                                         "imx091_vcm_vdd");
3043                 if (WARN_ON(IS_ERR(info->imx091_ext_reg_vcm_vdd))) {
3044                         pr_err("%s: imx091_ext_reg_vcm_vdd get failed %ld\n",
3045                                 __func__,
3046                                 PTR_ERR(info->imx091_ext_reg_vcm_vdd));
3047                         info->imx091_ext_reg_vcm_vdd = NULL;
3048                         return -ENODEV;
3049                 }
3050         }
3051
3052         if (info->pdata->i2c_vdd && !info->imx091_ext_reg_i2c_vdd) {
3053                 info->imx091_ext_reg_i2c_vdd = regulator_get(NULL,
3054                                                         "imx091_i2c_vdd");
3055                 if (unlikely(WARN_ON(IS_ERR(info->imx091_ext_reg_i2c_vdd)))) {
3056                         pr_err("%s: imx091_ext_reg_i2c_vdd get failed %ld\n",
3057                                 __func__,
3058                                 PTR_ERR(info->imx091_ext_reg_i2c_vdd));
3059                         info->imx091_ext_reg_i2c_vdd = NULL;
3060                         if (info->pdata->vcm_vdd)
3061                                 regulator_put(info->imx091_ext_reg_vcm_vdd);
3062                         info->imx091_ext_reg_vcm_vdd = NULL;
3063                         return -ENODEV;
3064                 }
3065         }
3066
3067         return 0;
3068 }
3069
3070 static int imx091_power_on(struct nvc_regulator *vreg)
3071 {
3072         int err;
3073         struct imx091_info *info = container_of(vreg, struct imx091_info,
3074                                                 vreg[0]);
3075
3076         if (unlikely(WARN_ON(!info)))
3077                 return -EFAULT;
3078
3079         if (imx091_get_extra_regulators(info))
3080                 goto imx091_poweron_fail;
3081
3082         if (info->pdata->vcm_vdd) {
3083                 err = regulator_enable(info->imx091_ext_reg_vcm_vdd);
3084                 if (unlikely(err))
3085                         goto imx091_vcm_fail;
3086         }
3087
3088         if (info->pdata->i2c_vdd) {
3089                 err = regulator_enable(info->imx091_ext_reg_i2c_vdd);
3090                 if (unlikely(err))
3091                         goto imx091_i2c_fail;
3092         }
3093
3094         imx091_gpio_wr(info, IMX091_GPIO_PWDN, 0);
3095         usleep_range(10, 20);
3096
3097         if (vreg[IMX091_VREG_AVDD].vreg) {
3098                 err = regulator_enable(vreg[IMX091_VREG_AVDD].vreg);
3099                 if (unlikely(err))
3100                         goto imx091_avdd_fail;
3101         }
3102
3103         if (vreg[IMX091_VREG_DVDD].vreg) {
3104                 err = regulator_enable(vreg[IMX091_VREG_DVDD].vreg);
3105                 if (unlikely(err))
3106                         goto imx091_dvdd_fail;
3107         }
3108
3109         if (vreg[IMX091_VREG_IOVDD].vreg) {
3110                 err = regulator_enable(vreg[IMX091_VREG_IOVDD].vreg);
3111                 if (unlikely(err))
3112                         goto imx091_iovdd_fail;
3113         }
3114
3115         usleep_range(1, 2);
3116         imx091_gpio_wr(info, IMX091_GPIO_PWDN, 1);
3117         usleep_range(300, 310);
3118
3119         return 1;
3120
3121 imx091_iovdd_fail:
3122         if (vreg[IMX091_VREG_DVDD].vreg)
3123                 regulator_disable(vreg[IMX091_VREG_DVDD].vreg);
3124
3125 imx091_dvdd_fail:
3126         if (vreg[IMX091_VREG_AVDD].vreg)
3127                 regulator_disable(vreg[IMX091_VREG_AVDD].vreg);
3128
3129 imx091_avdd_fail:
3130         imx091_gpio_wr(info, IMX091_GPIO_PWDN, 0);
3131         if (info->pdata->i2c_vdd)
3132                 regulator_disable(info->imx091_ext_reg_i2c_vdd);
3133 imx091_i2c_fail:
3134         if (info->pdata->vcm_vdd)
3135                 regulator_disable(info->imx091_ext_reg_vcm_vdd);
3136 imx091_vcm_fail:
3137 imx091_poweron_fail:
3138         pr_err("%s FAILED\n", __func__);
3139         return -ENODEV;
3140
3141 }
3142
3143 static int imx091_power_off(struct nvc_regulator *vreg)
3144 {
3145         struct imx091_info *info = container_of(vreg, struct imx091_info,
3146                                                 vreg[0]);
3147
3148         if (unlikely(WARN_ON(!info)))
3149                 return -EFAULT;
3150
3151         usleep_range(1, 2);
3152         imx091_gpio_wr(info, IMX091_GPIO_PWDN, 0);
3153         usleep_range(1, 2);
3154
3155         if (vreg[IMX091_VREG_IOVDD].vreg)
3156                 regulator_disable(vreg[IMX091_VREG_IOVDD].vreg);
3157         if (vreg[IMX091_VREG_DVDD].vreg)
3158                 regulator_disable(vreg[IMX091_VREG_DVDD].vreg);
3159         if (vreg[IMX091_VREG_AVDD].vreg)
3160                 regulator_disable(vreg[IMX091_VREG_AVDD].vreg);
3161
3162         if (info->pdata->i2c_vdd)
3163                 regulator_disable(info->imx091_ext_reg_i2c_vdd);
3164         if (info->pdata->vcm_vdd)
3165                 regulator_disable(info->imx091_ext_reg_vcm_vdd);
3166
3167         return 0;
3168 }
3169
3170 static int imx091_parse_dt_gpio(struct device_node *np, const char *name,
3171                         enum imx091_gpio type,
3172                         struct nvc_gpio_pdata *pdata)
3173 {
3174         enum of_gpio_flags gpio_flags;
3175
3176         if (of_find_property(np, name, NULL)) {
3177                 pdata->gpio = of_get_named_gpio_flags(np, name, 0, &gpio_flags);
3178                 pdata->gpio_type = type;
3179                 pdata->init_en = true;
3180                 pdata->active_high = !(gpio_flags & OF_GPIO_ACTIVE_LOW);
3181                 return 1;
3182         }
3183         return 0;
3184 }
3185
3186 static struct imx091_platform_data *imx091_parse_dt(struct i2c_client *client)
3187 {
3188         struct device_node *np = client->dev.of_node;
3189         struct imx091_platform_data *board_info_pdata;
3190         const struct of_device_id *match;
3191         struct nvc_gpio_pdata *gpio_pdata = NULL;
3192         struct nvc_imager_cap *imx091_cap = NULL;
3193         u32 temp_prop_read = 0;
3194
3195         match = of_match_device(imx091_of_match, &client->dev);
3196         if (!match) {
3197                 dev_err(&client->dev, "Failed to find matching dt id\n");
3198                 return NULL;
3199         }
3200
3201         board_info_pdata = devm_kzalloc(&client->dev, sizeof(*board_info_pdata),
3202                         GFP_KERNEL);
3203         if (!board_info_pdata) {
3204                 dev_err(&client->dev, "Failed to allocate pdata\n");
3205                 return ERR_PTR(-ENOMEM);
3206         }
3207
3208         gpio_pdata = devm_kzalloc(&client->dev,
3209                 sizeof(*gpio_pdata) * ARRAY_SIZE(imx091_gpios),
3210                 GFP_KERNEL);
3211         if (!gpio_pdata) {
3212                 dev_err(&client->dev, "cannot allocate gpio data memory\n");
3213                 return ERR_PTR(-ENOMEM);
3214         }
3215
3216         imx091_cap = devm_kzalloc(&client->dev,
3217                 sizeof(*imx091_cap),
3218                 GFP_KERNEL);
3219         if (!imx091_cap) {
3220                 dev_err(&client->dev, "cannot allocate imx091_cap memory\n");
3221                 return ERR_PTR(-ENOMEM);
3222         }
3223
3224         /* init with default platform data values */
3225         memcpy(board_info_pdata, &imx091_dflt_pdata, sizeof(*board_info_pdata));
3226
3227         /* extra regulators info */
3228         board_info_pdata->vcm_vdd = of_property_read_bool(np, "nvidia,vcm_vdd");
3229         board_info_pdata->i2c_vdd = of_property_read_bool(np, "nvidia,i2c_vdd");
3230
3231         /* MCLK clock info */
3232         of_property_read_string(np, "nvidia,mclk_name",
3233                                 &board_info_pdata->mclk_name);
3234
3235         /* generic info */
3236         of_property_read_u32(np, "nvidia,num", &board_info_pdata->num);
3237         of_property_read_u32(np, "nvidia,cfg", &board_info_pdata->cfg);
3238         of_property_read_u32(np, "nvidia,sync", &board_info_pdata->sync);
3239         of_property_read_string(np, "nvidia,dev_name",
3240                                 &board_info_pdata->dev_name);
3241
3242         /* imx091 gpios */
3243         board_info_pdata->gpio_count = 0;
3244         board_info_pdata->gpio_count += imx091_parse_dt_gpio(np,
3245                                 "reset-gpios", IMX091_GPIO_RESET,
3246                                 &gpio_pdata[board_info_pdata->gpio_count]);
3247         board_info_pdata->gpio_count += imx091_parse_dt_gpio(np,
3248                                 "power-gpios", IMX091_GPIO_PWDN,
3249                                 &gpio_pdata[board_info_pdata->gpio_count]);
3250         board_info_pdata->gpio_count += imx091_parse_dt_gpio(np,
3251                                 "gp1-gpios", IMX091_GPIO_GP1,
3252                                 &gpio_pdata[board_info_pdata->gpio_count]);
3253         board_info_pdata->gpio = gpio_pdata;
3254
3255         /* imx091 caps */
3256         nvc_imager_parse_caps(np, imx091_cap, NULL);
3257         imx091_cap->focuser_guid = NVC_FOCUS_GUID(0);
3258         imx091_cap->torch_guid = NVC_TORCH_GUID(0);
3259         imx091_cap->cap_version = NVC_IMAGER_CAPABILITIES_VERSION2;
3260
3261         board_info_pdata->cap = imx091_cap;
3262
3263         /* imx091 flash caps */
3264         board_info_pdata->flash_cap.xvs_trigger_enabled =
3265                 of_property_read_bool(np, "nvidia,xvs_trigger_enabled");
3266         board_info_pdata->flash_cap.sdo_trigger_enabled =
3267                 of_property_read_bool(np, "nvidia,sdo_trigger_enabled");
3268         board_info_pdata->flash_cap.adjustable_flash_timing =
3269                 of_property_read_bool(np, "nvidia,adjustable_flash_timing");
3270         of_property_read_u32(np, "nvidia,pulse_width_uS",
3271                                 &temp_prop_read);
3272         board_info_pdata->flash_cap.pulse_width_uS = (u16)temp_prop_read;
3273
3274         /* imx091 power functions */
3275         board_info_pdata->power_on = imx091_power_on;
3276         board_info_pdata->power_off = imx091_power_off;
3277
3278         return board_info_pdata;
3279 }
3280
3281 static int imx091_probe(
3282         struct i2c_client *client,
3283         const struct i2c_device_id *id)
3284 {
3285         struct imx091_info *info;
3286         unsigned long clock_probe_rate;
3287         int err;
3288         const char *mclk_name;
3289
3290         if (tegra_platform_is_fpga()) {
3291                 imx091_dflt_cap.discontinuous_clk_mode  = 0;
3292                 imx091_dflt_cap.cil_threshold_settle    = 0xd;
3293                 imx091_dflt_cap.focuser_guid    = 0;
3294                 imx091_dflt_cap.torch_guid      = 0;
3295         }
3296
3297         dev_dbg(&client->dev, "%s +++++\n", __func__);
3298         info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
3299         if (info == NULL) {
3300                 dev_err(&client->dev, "%s: kzalloc error\n", __func__);
3301                 return -ENOMEM;
3302         }
3303
3304         info->i2c_client = client;
3305
3306         if (client->dev.of_node) {
3307                 info->pdata = imx091_parse_dt(client);
3308         } else if (client->dev.platform_data) {
3309                 info->pdata = client->dev.platform_data;
3310         } else {
3311                 info->pdata = &imx091_dflt_pdata;
3312                 dev_dbg(&client->dev,
3313                         "%s No platform data.  Using defaults.\n", __func__);
3314         }
3315
3316         if (!info->pdata) {
3317                 dev_err(&client->dev, "%s: Platform data error.\n", __func__);
3318                 return -EINVAL;
3319         }
3320
3321         mclk_name = info->pdata->mclk_name ?
3322                     info->pdata->mclk_name : "default_mclk";
3323         info->mclk = devm_clk_get(&client->dev, mclk_name);
3324         if (IS_ERR(info->mclk)) {
3325                 dev_err(&client->dev, "%s: unable to get clock %s\n",
3326                         __func__, mclk_name);
3327                 return PTR_ERR(info->mclk);
3328         }
3329
3330         i2c_set_clientdata(client, info);
3331         INIT_LIST_HEAD(&info->list);
3332         spin_lock(&imx091_spinlock);
3333         list_add_rcu(&info->list, &imx091_info_list);
3334         spin_unlock(&imx091_spinlock);
3335         imx091_pm_init(info);
3336         imx091_sdata_init(info);
3337         imx091_get_flash_cap(info);
3338         info->pwr_api = NVC_PWR_OFF;
3339         if (info->pdata->cfg & (NVC_CFG_NODEV | NVC_CFG_BOOT_INIT)) {
3340                 if (info->pdata->probe_clock) {
3341                         if (info->cap->initial_clock_rate_khz)
3342                                 clock_probe_rate = info->cap->
3343                                                         initial_clock_rate_khz;
3344                         else
3345                                 clock_probe_rate = imx091_dflt_cap.
3346                                                         initial_clock_rate_khz;
3347                         clock_probe_rate *= 1000;
3348                         info->pdata->probe_clock(clock_probe_rate);
3349                 }
3350                 err = imx091_dev_id(info);
3351                 if (err < 0) {
3352                         if (info->pdata->cfg & NVC_CFG_NODEV) {
3353                                 imx091_del(info);
3354                                 if (info->pdata->probe_clock)
3355                                         info->pdata->probe_clock(0);
3356                                 return -ENODEV;
3357                         } else {
3358                                 dev_err(&client->dev, "%s device not found\n",
3359                                         __func__);
3360                         }
3361                 } else {
3362                         dev_dbg(&client->dev, "%s device found\n", __func__);
3363                         if (info->pdata->cfg & NVC_CFG_BOOT_INIT)
3364                                 imx091_mode_wr_full(info, info->cap->
3365                                                     preferred_mode_index);
3366                         info->dev_id = info->sdata.sensor_id_minor;
3367                 }
3368                 imx091_pm_dev_wr(info, NVC_PWR_OFF);
3369                 if (info->pdata->probe_clock)
3370                         info->pdata->probe_clock(0);
3371         }
3372
3373         if (info->pdata->dev_name != NULL)
3374                 strncpy(info->devname, info->pdata->dev_name,
3375                         sizeof(info->devname) - 1);
3376         else
3377                 strncpy(info->devname, "imx091", sizeof(info->devname) - 1);
3378
3379         if (info->pdata->num)
3380                 snprintf(info->devname, sizeof(info->devname), "%s.%u",
3381                          info->devname, info->pdata->num);
3382         info->miscdev.name = info->devname;
3383         info->miscdev.fops = &imx091_fileops;
3384         info->miscdev.minor = MISC_DYNAMIC_MINOR;
3385         if (misc_register(&info->miscdev)) {
3386                 dev_err(&client->dev, "%s unable to register misc device %s\n",
3387                         __func__, info->devname);
3388                 imx091_del(info);
3389                 return -ENODEV;
3390         }
3391
3392 #ifdef CONFIG_DEBUG_FS
3393         info->debugfs_info.name = info->devname;
3394         info->debugfs_info.i2c_client = info->i2c_client;
3395         info->debugfs_info.i2c_addr_limit = 0xFFFF;
3396         info->debugfs_info.i2c_rd8 = imx091_i2c_rd8;
3397         info->debugfs_info.i2c_wr8 = imx091_i2c_wr8;
3398         nvc_debugfs_init(&info->debugfs_info);
3399 #endif
3400         dev_dbg(&client->dev, "%s -----\n", __func__);
3401         return 0;
3402 }
3403
3404 static const struct i2c_device_id imx091_id[] = {
3405         { "imx091", 0 },
3406         { },
3407 };
3408
3409 MODULE_DEVICE_TABLE(i2c, imx091_id);
3410
3411 static struct i2c_driver imx091_i2c_driver = {
3412         .driver = {
3413                 .name = "imx091",
3414                 .owner = THIS_MODULE,
3415         },
3416         .id_table = imx091_id,
3417         .probe = imx091_probe,
3418         .remove = imx091_remove,
3419 };
3420
3421 module_i2c_driver(imx091_i2c_driver);
3422 MODULE_LICENSE("GPL v2");