2 * include/linux/tegra_profiler.h
4 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 #ifndef __TEGRA_PROFILER_H
18 #define __TEGRA_PROFILER_H
20 #include <linux/ioctl.h>
22 #define QUADD_SAMPLES_VERSION 31
23 #define QUADD_IO_VERSION 16
25 #define QUADD_IO_VERSION_DYNAMIC_RB 5
26 #define QUADD_IO_VERSION_RB_MAX_FILL_COUNT 6
27 #define QUADD_IO_VERSION_MOD_STATE_STATUS_FIELD 7
28 #define QUADD_IO_VERSION_BT_KERNEL_CTX 8
29 #define QUADD_IO_VERSION_GET_MMAP 9
30 #define QUADD_IO_VERSION_BT_UNWIND_TABLES 10
31 #define QUADD_IO_VERSION_UNWIND_MIXED 11
32 #define QUADD_IO_VERSION_EXTABLES_MMAP 12
33 #define QUADD_IO_VERSION_ARCH_TIMER_OPT 13
34 #define QUADD_IO_VERSION_DATA_MMAP 14
35 #define QUADD_IO_VERSION_BT_LOWER_BOUND 15
36 #define QUADD_IO_VERSION_STACK_OFFSET 16
38 #define QUADD_SAMPLE_VERSION_THUMB_MODE_FLAG 17
39 #define QUADD_SAMPLE_VERSION_GROUP_SAMPLES 18
40 #define QUADD_SAMPLE_VERSION_THREAD_STATE_FLD 19
41 #define QUADD_SAMPLE_VERSION_BT_UNWIND_TABLES 22
42 #define QUADD_SAMPLE_VERSION_SUPPORT_IP64 23
43 #define QUADD_SAMPLE_VERSION_SPECIAL_MMAP 24
44 #define QUADD_SAMPLE_VERSION_UNWIND_MIXED 25
45 #define QUADD_SAMPLE_VERSION_UNW_ENTRY_TYPE 26
46 #define QUADD_SAMPLE_VERSION_USE_ARCH_TIMER 27
47 #define QUADD_SAMPLE_VERSION_SCHED_SAMPLES 28
48 #define QUADD_SAMPLE_VERSION_HDR_UNW_METHOD 29
49 #define QUADD_SAMPLE_VERSION_HDR_ARCH_TIMER 30
50 #define QUADD_SAMPLE_VERSION_STACK_OFFSET 31
52 #define QUADD_MMAP_HEADER_VERSION 1
54 #define QUADD_MAX_COUNTERS 32
55 #define QUADD_MAX_PROCESS 64
57 #define QUADD_DEVICE_NAME "quadd"
58 #define QUADD_AUTH_DEVICE_NAME "quadd_auth"
60 #define QUADD_MOD_DEVICE_NAME "quadd_mod"
61 #define QUADD_MOD_AUTH_DEVICE_NAME "quadd_mod_auth"
63 #define QUADD_IOCTL 100
66 * Setup params (profiling frequency, etc.)
68 #define IOCTL_SETUP _IOW(QUADD_IOCTL, 0, struct quadd_parameters)
73 #define IOCTL_START _IO(QUADD_IOCTL, 1)
78 #define IOCTL_STOP _IO(QUADD_IOCTL, 2)
81 * Getting capabilities
83 #define IOCTL_GET_CAP _IOR(QUADD_IOCTL, 3, struct quadd_comm_cap)
86 * Getting state of module
88 #define IOCTL_GET_STATE _IOR(QUADD_IOCTL, 4, struct quadd_module_state)
91 * Getting version of module
93 #define IOCTL_GET_VERSION _IOR(QUADD_IOCTL, 5, struct quadd_module_version)
96 * Send exception-handling tables info
98 #define IOCTL_SET_EXTAB _IOW(QUADD_IOCTL, 6, struct quadd_extables)
101 * Send ring buffer mmap info
103 #define IOCTL_SET_MMAP_RB _IOW(QUADD_IOCTL, 7, struct quadd_mmap_rb_info)
105 #define QUADD_CPUMODE_TEGRA_POWER_CLUSTER_LP (1 << 29) /* LP CPU */
106 #define QUADD_CPUMODE_THUMB (1 << 30) /* thumb mode */
108 enum quadd_events_id {
109 QUADD_EVENT_TYPE_CPU_CYCLES = 0,
111 QUADD_EVENT_TYPE_INSTRUCTIONS,
112 QUADD_EVENT_TYPE_BRANCH_INSTRUCTIONS,
113 QUADD_EVENT_TYPE_BRANCH_MISSES,
114 QUADD_EVENT_TYPE_BUS_CYCLES,
116 QUADD_EVENT_TYPE_L1_DCACHE_READ_MISSES,
117 QUADD_EVENT_TYPE_L1_DCACHE_WRITE_MISSES,
118 QUADD_EVENT_TYPE_L1_ICACHE_MISSES,
120 QUADD_EVENT_TYPE_L2_DCACHE_READ_MISSES,
121 QUADD_EVENT_TYPE_L2_DCACHE_WRITE_MISSES,
122 QUADD_EVENT_TYPE_L2_ICACHE_MISSES,
124 QUADD_EVENT_TYPE_MAX,
135 enum quadd_record_type {
136 QUADD_RECORD_TYPE_SAMPLE = 1,
137 QUADD_RECORD_TYPE_MMAP,
138 QUADD_RECORD_TYPE_MA,
139 QUADD_RECORD_TYPE_COMM,
140 QUADD_RECORD_TYPE_DEBUG,
141 QUADD_RECORD_TYPE_HEADER,
142 QUADD_RECORD_TYPE_POWER_RATE,
143 QUADD_RECORD_TYPE_ADDITIONAL_SAMPLE,
144 QUADD_RECORD_TYPE_SCHED,
147 enum quadd_event_source {
148 QUADD_EVENT_SOURCE_PMU = 1,
149 QUADD_EVENT_SOURCE_PL310,
152 enum quadd_cpu_mode {
153 QUADD_CPU_MODE_KERNEL = 1,
158 #pragma pack(push, 1)
160 #define QUADD_SAMPLE_UNW_METHOD_SHIFT 0
161 #define QUADD_SAMPLE_UNW_METHOD_MASK (1 << QUADD_SAMPLE_UNW_METHOD_SHIFT)
164 QUADD_UNW_METHOD_FP = 0,
165 QUADD_UNW_METHOD_EHT,
166 QUADD_UNW_METHOD_MIXED,
167 QUADD_UNW_METHOD_NONE,
170 #define QUADD_SAMPLE_URC_SHIFT 1
171 #define QUADD_SAMPLE_URC_MASK (0x0f << QUADD_SAMPLE_URC_SHIFT)
174 QUADD_URC_SUCCESS = 0,
176 QUADD_URC_IDX_NOT_FOUND,
177 QUADD_URC_TBL_NOT_EXIST,
179 QUADD_URC_TBL_IS_CORRUPT,
180 QUADD_URC_CANTUNWIND,
181 QUADD_URC_UNHANDLED_INSTRUCTION,
182 QUADD_URC_REFUSE_TO_UNWIND,
183 QUADD_URC_SP_INCORRECT,
184 QUADD_URC_SPARE_ENCODING,
185 QUADD_URC_UNSUPPORTED_PR,
186 QUADD_URC_PC_INCORRECT,
187 QUADD_URC_LEVEL_TOO_DEEP,
188 QUADD_URC_FP_INCORRECT,
192 #define QUADD_SED_IP64 (1 << 0)
194 #define QUADD_SED_UNW_METHOD_SHIFT 1
195 #define QUADD_SED_UNW_METHOD_MASK (0x07 << QUADD_SED_UNW_METHOD_SHIFT)
197 #define QUADD_SED_STACK_OFFSET_SHIFT 4
198 #define QUADD_SED_STACK_OFFSET_MASK (0xffff << QUADD_SED_STACK_OFFSET_SHIFT)
201 QUADD_UNW_TYPE_FP = 0,
203 QUADD_UNW_TYPE_LR_FP,
204 QUADD_UNW_TYPE_LR_UT,
208 struct quadd_sample_data {
225 #define QUADD_MMAP_ED_IS_FILE_EXISTS (1 << 0)
227 struct quadd_mmap_data {
237 struct quadd_ma_data {
245 struct quadd_power_rate_data {
254 struct quadd_additional_sample {
261 struct quadd_sched_data {
274 QM_DEBUG_SAMPLE_TYPE_SCHED_IN = 1,
275 QM_DEBUG_SAMPLE_TYPE_SCHED_OUT,
277 QM_DEBUG_SAMPLE_TYPE_TIMER_HANDLE,
278 QM_DEBUG_SAMPLE_TYPE_TIMER_START,
279 QM_DEBUG_SAMPLE_TYPE_TIMER_CANCEL,
280 QM_DEBUG_SAMPLE_TYPE_TIMER_FORWARD,
282 QM_DEBUG_SAMPLE_TYPE_READ_COUNTER,
284 QM_DEBUG_SAMPLE_TYPE_SOURCE_START,
285 QM_DEBUG_SAMPLE_TYPE_SOURCE_STOP,
288 struct quadd_debug_data {
304 #define QUADD_HEADER_MAGIC 0x1122
306 #define QUADD_HDR_UNW_METHOD_SHIFT 0
307 #define QUADD_HDR_UNW_METHOD_MASK (0x07 << QUADD_HDR_UNW_METHOD_SHIFT)
309 #define QUADD_HDR_USE_ARCH_TIMER (1 << 3)
310 #define QUADD_HDR_STACK_OFFSET (1 << 4)
312 struct quadd_header_data {
322 reserved:26; /* reserved fields for future extensions */
332 struct quadd_record_data {
335 /* sample: it should be the biggest size */
337 struct quadd_sample_data sample;
338 struct quadd_mmap_data mmap;
339 struct quadd_ma_data ma;
340 struct quadd_debug_data debug;
341 struct quadd_header_data hdr;
342 struct quadd_power_rate_data power_rate;
343 struct quadd_sched_data sched;
344 struct quadd_additional_sample additional_sample;
350 #define QUADD_MAX_PACKAGE_NAME 320
353 QUADD_PARAM_IDX_SIZE_OF_RB = 0,
354 QUADD_PARAM_IDX_EXTRA = 1,
355 QUADD_PARAM_IDX_BT_LOWER_BOUND = 2,
358 #define QUADD_PARAM_EXTRA_GET_MMAP (1 << 0)
359 #define QUADD_PARAM_EXTRA_BT_FP (1 << 1)
360 #define QUADD_PARAM_EXTRA_BT_UNWIND_TABLES (1 << 2)
361 #define QUADD_PARAM_EXTRA_BT_MIXED (1 << 3)
362 #define QUADD_PARAM_EXTRA_USE_ARCH_TIMER (1 << 4)
363 #define QUADD_PARAM_EXTRA_STACK_OFFSET (1 << 5)
365 struct quadd_parameters {
375 u32 pids[QUADD_MAX_PROCESS];
378 u8 package_name[QUADD_MAX_PACKAGE_NAME];
380 u32 events[QUADD_MAX_COUNTERS];
383 u32 reserved[16]; /* reserved fields for future extensions */
386 struct quadd_events_cap {
389 branch_instructions:1,
393 l1_dcache_read_misses:1,
394 l1_dcache_write_misses:1,
397 l2_dcache_read_misses:1,
398 l2_dcache_write_misses:1,
403 QUADD_COMM_CAP_IDX_EXTRA = 0,
406 #define QUADD_COMM_CAP_EXTRA_BT_KERNEL_CTX (1 << 0)
407 #define QUADD_COMM_CAP_EXTRA_GET_MMAP (1 << 1)
408 #define QUADD_COMM_CAP_EXTRA_GROUP_SAMPLES (1 << 2)
409 #define QUADD_COMM_CAP_EXTRA_BT_UNWIND_TABLES (1 << 3)
410 #define QUADD_COMM_CAP_EXTRA_SUPPORT_AARCH64 (1 << 4)
411 #define QUADD_COMM_CAP_EXTRA_SPECIAL_ARCH_MMAP (1 << 5)
412 #define QUADD_COMM_CAP_EXTRA_UNWIND_MIXED (1 << 6)
413 #define QUADD_COMM_CAP_EXTRA_UNW_ENTRY_TYPE (1 << 7)
414 #define QUADD_COMM_CAP_EXTRA_ARCH_TIMER (1 << 8)
415 #define QUADD_COMM_CAP_EXTRA_RB_MMAP_OP (1 << 9)
417 struct quadd_comm_cap {
421 l2_multiple_events:1,
425 struct quadd_events_cap events_cap;
427 u32 reserved[16]; /* reserved fields for future extensions */
431 QUADD_MOD_STATE_IDX_RB_MAX_FILL_COUNT = 0,
432 QUADD_MOD_STATE_IDX_STATUS,
435 #define QUADD_MOD_STATE_STATUS_IS_ACTIVE (1 << 0)
436 #define QUADD_MOD_STATE_STATUS_IS_AUTH_OPEN (1 << 1)
438 struct quadd_module_state {
440 u64 nr_skipped_samples;
443 u32 buffer_fill_size;
445 u32 reserved[16]; /* reserved fields for future extensions */
448 struct quadd_module_version {
455 u32 reserved[4]; /* reserved fields for future extensions */
458 struct quadd_sec_info {
464 QUADD_EXT_IDX_EXTAB_OFFSET = 0,
465 QUADD_EXT_IDX_EXIDX_OFFSET = 1,
466 QUADD_EXT_IDX_MMAP_VM_START = 2,
469 struct quadd_extables {
473 struct quadd_sec_info extab;
474 struct quadd_sec_info exidx;
476 u32 reserved[4]; /* reserved fields for future extensions */
479 struct quadd_mmap_rb_info {
485 u32 reserved[4]; /* reserved fields for future extensions */
488 #define QUADD_MMAP_HEADER_MAGIC 0x33445566
490 struct quadd_mmap_header {
497 u32 reserved[4]; /* reserved fields for future extensions */
501 QUADD_RB_STATE_NONE = 0,
502 QUADD_RB_STATE_ACTIVE,
503 QUADD_RB_STATE_STOPPED,
506 struct quadd_ring_buffer_hdr {
516 u32 reserved[4]; /* reserved fields for future extensions */
524 struct vm_area_struct;
526 #ifdef CONFIG_TEGRA_PROFILER
527 extern void __quadd_task_sched_in(struct task_struct *prev,
528 struct task_struct *task);
529 extern void __quadd_task_sched_out(struct task_struct *prev,
530 struct task_struct *next);
532 extern void __quadd_event_mmap(struct vm_area_struct *vma);
534 static inline void quadd_task_sched_in(struct task_struct *prev,
535 struct task_struct *task)
537 __quadd_task_sched_in(prev, task);
540 static inline void quadd_task_sched_out(struct task_struct *prev,
541 struct task_struct *next)
543 __quadd_task_sched_out(prev, next);
546 static inline void quadd_event_mmap(struct vm_area_struct *vma)
548 __quadd_event_mmap(vma);
551 #else /* CONFIG_TEGRA_PROFILER */
553 static inline void quadd_task_sched_in(struct task_struct *prev,
554 struct task_struct *task)
558 static inline void quadd_task_sched_out(struct task_struct *prev,
559 struct task_struct *next)
563 static inline void quadd_event_mmap(struct vm_area_struct *vma)
567 #endif /* CONFIG_TEGRA_PROFILER */
569 #endif /* __KERNEL__ */
571 #endif /* __TEGRA_PROFILER_H */