drivers/pinctrl/pinctrl-tegra.c

   1 /*
   2  * Driver for the NVIDIA Tegra pinmux
   3  *
   4  * Copyright (c) 2011-2014, NVIDIA CORPORATION.  All rights reserved.
   5  *
   6  * Derived from code:
   7  * Copyright (C) 2010 Google, Inc.
   8  * Copyright (C) 2010 NVIDIA Corporation
   9  * Copyright (C) 2009-2011 ST-Ericsson AB
  10  *
  11  * This program is free software; you can redistribute it and/or modify it
  12  * under the terms and conditions of the GNU General Public License,
  13  * version 2, as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope it will be useful, but WITHOUT
  16  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  18  * more details.
  19  */
  20
  21 #include <linux/err.h>
  22 #include <linux/init.h>
  23 #include <linux/io.h>
  24 #include <linux/gpio.h>
  25 #include <linux/module.h>
  26 #include <linux/of.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/pinctrl/machine.h>
  29 #include <linux/pinctrl/pinctrl.h>
  30 #include <linux/pinctrl/pinmux.h>
  31 #include <linux/pinctrl/pinconf.h>
  32 #include <linux/slab.h>
  33 #include <linux/syscore_ops.h>
  34 #include <linux/uaccess.h>
  35
  36 #include <linux/pinctrl/pinconf-tegra.h>
  37
  38 #include "core.h"
  39 #include "pinctrl-tegra.h"
  40
  41 static DEFINE_SPINLOCK(mux_lock);
  42
  43 struct tegra_pmx {
  44         struct device *dev;
  45         struct pinctrl_dev *pctl;
  46
  47         const struct tegra_pinctrl_soc_data *soc;
  48
  49         int nbanks;
  50         void __iomem **regs;
  51         int *regs_size;
  52         unsigned int *reg_base;
  53
  54         u32 *pg_data;
  55         unsigned drive_group_start_index;
  56 };
  57
  58 static struct tegra_pmx *pmx;
  59
  60 static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,
  61                    unsigned group, unsigned long config);
  62
  63 static inline u32 pmx_readl(struct tegra_pmx *pmx, u32 bank, u32 reg)
  64 {
  65         return readl(pmx->regs[bank] + reg);
  66 }
  67
  68 static inline void pmx_writel(struct tegra_pmx *pmx, u32 val, u32 bank, u32 reg)
  69 {
  70         writel(val, pmx->regs[bank] + reg);
  71 }
  72
  73 static int tegra_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
  74 {
  75         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  76
  77         return pmx->soc->ngroups;
  78 }
  79
  80 static const char *tegra_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
  81                                                 unsigned group)
  82 {
  83         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  84
  85         return pmx->soc->groups[group].name;
  86 }
  87
  88 static int tegra_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
  89                                         unsigned group,
  90                                         const unsigned **pins,
  91                                         unsigned *num_pins)
  92 {
  93         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  94
  95         *pins = pmx->soc->groups[group].pins;
  96         *num_pins = pmx->soc->groups[group].npins;
  97
  98         return 0;
  99 }
 100
 101 #ifdef CONFIG_DEBUG_FS
 102 static void tegra_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
 103                                        struct seq_file *s,
 104                                        unsigned offset)
 105 {
 106         seq_printf(s, " %s", dev_name(pctldev->dev));
 107 }
 108 #endif
 109
 110 static int reserve_map(struct device *dev, struct pinctrl_map **map,
 111                        unsigned *reserved_maps, unsigned *num_maps,
 112                        unsigned reserve)
 113 {
 114         unsigned old_num = *reserved_maps;
 115         unsigned new_num = *num_maps + reserve;
 116         struct pinctrl_map *new_map;
 117
 118         if (old_num >= new_num)
 119                 return 0;
 120
 121         new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
 122         if (!new_map) {
 123                 dev_err(dev, "krealloc(map) failed\n");
 124                 return -ENOMEM;
 125         }
 126
 127         memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
 128
 129         *map = new_map;
 130         *reserved_maps = new_num;
 131
 132         return 0;
 133 }
 134
 135 static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
 136                        unsigned *num_maps, const char *group,
 137                        const char *function)
 138 {
 139         if (WARN_ON(*num_maps == *reserved_maps))
 140                 return -ENOSPC;
 141
 142         (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 143         (*map)[*num_maps].data.mux.group = group;
 144         (*map)[*num_maps].data.mux.function = function;
 145         (*num_maps)++;
 146
 147         return 0;
 148 }
 149
 150 static int add_map_configs(struct device *dev, struct pinctrl_map **map,
 151                            unsigned *reserved_maps, unsigned *num_maps,
 152                            const char *group, unsigned long *configs,
 153                            unsigned num_configs)
 154 {
 155         unsigned long *dup_configs;
 156
 157         if (WARN_ON(*num_maps == *reserved_maps))
 158                 return -ENOSPC;
 159
 160         dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
 161                               GFP_KERNEL);
 162         if (!dup_configs) {
 163                 dev_err(dev, "kmemdup(configs) failed\n");
 164                 return -ENOMEM;
 165         }
 166
 167         (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
 168         (*map)[*num_maps].data.configs.group_or_pin = group;
 169         (*map)[*num_maps].data.configs.configs = dup_configs;
 170         (*map)[*num_maps].data.configs.num_configs = num_configs;
 171         (*num_maps)++;
 172
 173         return 0;
 174 }
 175
 176 static int add_config(struct device *dev, unsigned long **configs,
 177                       unsigned *num_configs, unsigned long config)
 178 {
 179         unsigned old_num = *num_configs;
 180         unsigned new_num = old_num + 1;
 181         unsigned long *new_configs;
 182
 183         new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
 184                                GFP_KERNEL);
 185         if (!new_configs) {
 186                 dev_err(dev, "krealloc(configs) failed\n");
 187                 return -ENOMEM;
 188         }
 189
 190         new_configs[old_num] = config;
 191
 192         *configs = new_configs;
 193         *num_configs = new_num;
 194
 195         return 0;
 196 }
 197
 198 static void tegra_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
 199                                       struct pinctrl_map *map,
 200                                       unsigned num_maps)
 201 {
 202         int i;
 203
 204         for (i = 0; i < num_maps; i++)
 205                 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
 206                         kfree(map[i].data.configs.configs);
 207
 208         kfree(map);
 209 }
 210
 211 static const struct cfg_param {
 212         const char *property;
 213         enum tegra_pinconf_param param;
 214 } cfg_params[] = {
 215         {"nvidia,pull",                 TEGRA_PINCONF_PARAM_PULL},
 216         {"nvidia,tristate",             TEGRA_PINCONF_PARAM_TRISTATE},
 217         {"nvidia,enable-input",         TEGRA_PINCONF_PARAM_ENABLE_INPUT},
 218         {"nvidia,open-drain",           TEGRA_PINCONF_PARAM_OPEN_DRAIN},
 219         {"nvidia,lock",                 TEGRA_PINCONF_PARAM_LOCK},
 220         {"nvidia,io-reset",             TEGRA_PINCONF_PARAM_IORESET},
 221         {"nvidia,rcv-sel",              TEGRA_PINCONF_PARAM_RCV_SEL},
 222         {"nvidia,io-high-voltage",      TEGRA_PINCONF_PARAM_E_IO_HV},
 223         {"nvidia,high-speed-mode",      TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE},
 224         {"nvidia,schmitt",              TEGRA_PINCONF_PARAM_SCHMITT},
 225         {"nvidia,low-power-mode",       TEGRA_PINCONF_PARAM_LOW_POWER_MODE},
 226         {"nvidia,pull-down-strength",   TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH},
 227         {"nvidia,pull-up-strength",     TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH},
 228         {"nvidia,slew-rate-falling",    TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
 229         {"nvidia,slew-rate-rising",     TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
 230         {"nvidia,drive-type",           TEGRA_PINCONF_PARAM_DRIVE_TYPE},
 231 };
 232
 233 static int tegra_pinctrl_dt_subnode_to_map(struct device *dev,
 234                                            struct device_node *np,
 235                                            struct pinctrl_map **map,
 236                                            unsigned *reserved_maps,
 237                                            unsigned *num_maps)
 238 {
 239         int ret, i;
 240         const char *function;
 241         u32 val;
 242         unsigned long config;
 243         unsigned long *configs = NULL;
 244         unsigned num_configs = 0;
 245         unsigned reserve;
 246         struct property *prop;
 247         const char *group;
 248
 249         ret = of_property_read_string(np, "nvidia,function", &function);
 250         if (ret < 0) {
 251                 /* EINVAL=missing, which is fine since it's optional */
 252                 if (ret != -EINVAL)
 253                         dev_err(dev,
 254                                 "could not parse property nvidia,function\n");
 255                 function = NULL;
 256         }
 257
 258         for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
 259                 ret = of_property_read_u32(np, cfg_params[i].property, &val);
 260                 if (!ret) {
 261                         config = TEGRA_PINCONF_PACK(cfg_params[i].param, val);
 262                         ret = add_config(dev, &configs, &num_configs, config);
 263                         if (ret < 0)
 264                                 goto exit;
 265                 /* EINVAL=missing, which is fine since it's optional */
 266                 } else if (ret != -EINVAL) {
 267                         dev_err(dev, "could not parse property %s\n",
 268                                 cfg_params[i].property);
 269                 }
 270         }
 271
 272         reserve = 0;
 273         if (function != NULL)
 274                 reserve++;
 275         if (num_configs)
 276                 reserve++;
 277         ret = of_property_count_strings(np, "nvidia,pins");
 278         if (ret < 0) {
 279                 dev_err(dev, "could not parse property nvidia,pins\n");
 280                 goto exit;
 281         }
 282         reserve *= ret;
 283
 284         ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
 285         if (ret < 0)
 286                 goto exit;
 287
 288         of_property_for_each_string(np, "nvidia,pins", prop, group) {
 289                 if (function) {
 290                         ret = add_map_mux(map, reserved_maps, num_maps,
 291                                           group, function);
 292                         if (ret < 0)
 293                                 goto exit;
 294                 }
 295
 296                 if (num_configs) {
 297                         ret = add_map_configs(dev, map, reserved_maps,
 298                                               num_maps, group, configs,
 299                                               num_configs);
 300                         if (ret < 0)
 301                                 goto exit;
 302                 }
 303         }
 304
 305         ret = 0;
 306
 307 exit:
 308         kfree(configs);
 309         return ret;
 310 }
 311
 312 static int tegra_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
 313                                         struct device_node *np_config,
 314                                         struct pinctrl_map **map,
 315                                         unsigned *num_maps)
 316 {
 317         unsigned reserved_maps;
 318         struct device_node *np;
 319         int ret;
 320
 321         reserved_maps = 0;
 322         *map = NULL;
 323         *num_maps = 0;
 324
 325         for_each_child_of_node(np_config, np) {
 326                 /* If node status is disabled then ignore the node */
 327                 if (!of_device_is_available(np))
 328                         continue;
 329
 330                 ret = tegra_pinctrl_dt_subnode_to_map(pctldev->dev, np, map,
 331                                                       &reserved_maps, num_maps);
 332                 if (ret < 0) {
 333                         tegra_pinctrl_dt_free_map(pctldev, *map, *num_maps);
 334                         return ret;
 335                 }
 336         }
 337
 338         return 0;
 339 }
 340
 341 static const struct pinctrl_ops tegra_pinctrl_ops = {
 342         .get_groups_count = tegra_pinctrl_get_groups_count,
 343         .get_group_name = tegra_pinctrl_get_group_name,
 344         .get_group_pins = tegra_pinctrl_get_group_pins,
 345 #ifdef CONFIG_DEBUG_FS
 346         .pin_dbg_show = tegra_pinctrl_pin_dbg_show,
 347 #endif
 348         .dt_node_to_map = tegra_pinctrl_dt_node_to_map,
 349         .dt_free_map = tegra_pinctrl_dt_free_map,
 350 };
 351
 352 static int tegra_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
 353 {
 354         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 355
 356         return pmx->soc->nfunctions;
 357 }
 358
 359 static const char *tegra_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 360                                                unsigned function)
 361 {
 362         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 363
 364         return pmx->soc->functions[function].name;
 365 }
 366
 367 static int tegra_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
 368                                          unsigned function,
 369                                          const char * const **groups,
 370                                          unsigned * const num_groups)
 371 {
 372         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 373
 374         *groups = pmx->soc->functions[function].groups;
 375         *num_groups = pmx->soc->functions[function].ngroups;
 376
 377         return 0;
 378 }
 379
 380 static int tegra_pinconfig_group_set(struct pinctrl_dev *pctldev,
 381                 unsigned group, unsigned long param, unsigned long arg)
 382 {
 383         unsigned long config;
 384         int ret;
 385
 386         config = TEGRA_PINCONF_PACK(param, arg);
 387         ret = tegra_pinconf_group_set(pctldev, group, config);
 388         if (ret < 0)
 389                 dev_err(pctldev->dev,
 390                         "Pinctrl group %u tristate config failed: %d\n",
 391                         group, ret);
 392         return ret;
 393 }
 394
 395 static int tegra_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned req_function,
 396                                unsigned group)
 397 {
 398         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 399         const struct tegra_pingroup *g;
 400         unsigned function = req_function;
 401         int i;
 402         u32 val;
 403         unsigned long flags;
 404         int ret;
 405
 406         g = &pmx->soc->groups[group];
 407
 408         if (WARN_ON(g->mux_reg < 0))
 409                 return -EINVAL;
 410
 411         switch (req_function) {
 412         case TEGRA_PINMUX_SPECIAL_UNUSED:
 413                 /* Set tristate =1 and input = 0 for unused pins */
 414                 ret = tegra_pinconfig_group_set(pctldev, group,
 415                                         TEGRA_PINCONF_PARAM_TRISTATE, 1);
 416                 if (!ret)
 417                         ret = tegra_pinconfig_group_set(pctldev, group,
 418                                         TEGRA_PINCONF_PARAM_ENABLE_INPUT, 0);
 419                 return ret;
 420
 421         case TEGRA_PINMUX_SPECIAL_GPIO:
 422                 /* Do nothing for gpio pins */
 423                 return 0;
 424
 425         default:
 426                 break;
 427         }
 428
 429         for (i = 0; i < ARRAY_SIZE(g->funcs); i++) {
 430                 if (g->funcs[i] == function)
 431                         break;
 432         }
 433         if (WARN_ON(i == ARRAY_SIZE(g->funcs)))
 434                 return -EINVAL;
 435
 436         spin_lock_irqsave(&mux_lock, flags);
 437
 438         val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
 439         val &= ~(0x3 << g->mux_bit);
 440         val |= i << g->mux_bit;
 441         pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
 442
 443         spin_unlock_irqrestore(&mux_lock, flags);
 444
 445         return 0;
 446 }
 447
 448 static int tegra_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
 449                                 struct pinctrl_gpio_range *range,
 450                                 unsigned pin)
 451 {
 452         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 453
 454         if (pmx->soc->gpio_request_enable)
 455                 return pmx->soc->gpio_request_enable(pin);
 456         return 0;
 457 }
 458
 459 static int tegra_pinctrl_gpio_set_direction (struct pinctrl_dev *pctldev,
 460         struct pinctrl_gpio_range *range, unsigned offset, bool input)
 461 {
 462         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 463         unsigned  group;
 464         const unsigned *pins;
 465         unsigned num_pins;
 466         int ret;
 467
 468         for (group = 0; group < pmx->soc->ngroups; ++group) {
 469                 ret = tegra_pinctrl_get_group_pins(pctldev, group,
 470                                 &pins, &num_pins);
 471                 if (ret < 0 || num_pins != 1)
 472                         continue;
 473                 if (offset ==  pins[0])
 474                         break;
 475         }
 476
 477         if (group == pmx->soc->ngroups) {
 478                 dev_err(pctldev->dev,
 479                         "Pingroup not found for pin %u\n", offset);
 480                 return -EINVAL;
 481         }
 482
 483         /*
 484          * Set input = 1 for the input direction and
 485          * tristate = 0 for output direction.
 486          */
 487         if (input)
 488                 ret = tegra_pinconfig_group_set(pctldev, group,
 489                                         TEGRA_PINCONF_PARAM_ENABLE_INPUT, 1);
 490         else
 491                 ret = tegra_pinconfig_group_set(pctldev, group,
 492                                         TEGRA_PINCONF_PARAM_TRISTATE, 0);
 493         return ret;
 494 }
 495
 496 static const struct pinmux_ops tegra_pinmux_ops = {
 497         .get_functions_count = tegra_pinctrl_get_funcs_count,
 498         .get_function_name = tegra_pinctrl_get_func_name,
 499         .get_function_groups = tegra_pinctrl_get_func_groups,
 500         .enable = tegra_pinctrl_enable,
 501         .gpio_request_enable = tegra_pinctrl_gpio_request_enable,
 502         .gpio_set_direction = tegra_pinctrl_gpio_set_direction,
 503 };
 504
 505 static int tegra_pinconf_reg(struct tegra_pmx *pmx,
 506                              const struct tegra_pingroup *g,
 507                              enum tegra_pinconf_param param,
 508                              bool report_err,
 509                              s8 *bank, s16 *reg, s8 *bit, s8 *width)
 510 {
 511         switch (param) {
 512         case TEGRA_PINCONF_PARAM_PULL:
 513                 *bank = g->pupd_bank;
 514                 *reg = g->pupd_reg;
 515                 *bit = g->pupd_bit;
 516                 *width = 2;
 517                 break;
 518         case TEGRA_PINCONF_PARAM_TRISTATE:
 519                 *bank = g->tri_bank;
 520                 *reg = g->tri_reg;
 521                 *bit = g->tri_bit;
 522                 *width = 1;
 523                 break;
 524         case TEGRA_PINCONF_PARAM_ENABLE_INPUT:
 525                 *bank = g->einput_bank;
 526                 *reg = g->einput_reg;
 527                 *bit = g->einput_bit;
 528                 *width = 1;
 529                 break;
 530         case TEGRA_PINCONF_PARAM_OPEN_DRAIN:
 531                 *bank = g->odrain_bank;
 532                 *reg = g->odrain_reg;
 533                 *bit = g->odrain_bit;
 534                 *width = 1;
 535                 break;
 536         case TEGRA_PINCONF_PARAM_LOCK:
 537                 *bank = g->lock_bank;
 538                 *reg = g->lock_reg;
 539                 *bit = g->lock_bit;
 540                 *width = 1;
 541                 break;
 542         case TEGRA_PINCONF_PARAM_IORESET:
 543                 *bank = g->ioreset_bank;
 544                 *reg = g->ioreset_reg;
 545                 *bit = g->ioreset_bit;
 546                 *width = 1;
 547                 break;
 548         case TEGRA_PINCONF_PARAM_RCV_SEL:
 549                 *bank = g->rcv_sel_bank;
 550                 *reg = g->rcv_sel_reg;
 551                 *bit = g->rcv_sel_bit;
 552                 *width = 1;
 553                 break;
 554         case TEGRA_PINCONF_PARAM_E_IO_HV:
 555                 *bank = g->e_io_hv_bank;
 556                 *reg = g->e_io_hv_reg;
 557                 *bit = g->e_io_hv_bit;
 558                 *width = 1;
 559                 break;
 560         case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE:
 561                 if (g->drv_reg == -1) {
 562                         *bank = g->mux_bank;
 563                         *reg = g->hsm_reg;
 564                 } else {
 565                         *bank = g->drv_bank;
 566                         *reg = g->drv_reg;
 567                 }
 568                 *bit = g->hsm_bit;
 569                 *width = 1;
 570                 break;
 571         case TEGRA_PINCONF_PARAM_SCHMITT:
 572                 if (g->drv_reg == -1) {
 573                         *bank = g->mux_bank;
 574                         *reg = g->schmitt_reg;
 575                 } else {
 576                         *bank = g->drv_bank;
 577                         *reg = g->drv_reg;
 578                 }
 579                 *bit = g->schmitt_bit;
 580                 *width = 1;
 581                 break;
 582         case TEGRA_PINCONF_PARAM_LOW_POWER_MODE:
 583                 *bank = g->drv_bank;
 584                 *reg = g->drv_reg;
 585                 *bit = g->lpmd_bit;
 586                 *width = 2;
 587                 break;
 588         case TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH:
 589                 *bank = g->drv_bank;
 590                 *reg = g->drv_reg;
 591                 *bit = g->drvdn_bit;
 592                 *width = g->drvdn_width;
 593                 break;
 594         case TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH:
 595                 *bank = g->drv_bank;
 596                 *reg = g->drv_reg;
 597                 *bit = g->drvup_bit;
 598                 *width = g->drvup_width;
 599                 break;
 600         case TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING:
 601                 *bank = g->drv_bank;
 602                 *reg = g->drv_reg;
 603                 *bit = g->slwf_bit;
 604                 *width = g->slwf_width;
 605                 break;
 606         case TEGRA_PINCONF_PARAM_SLEW_RATE_RISING:
 607                 *bank = g->drv_bank;
 608                 *reg = g->drv_reg;
 609                 *bit = g->slwr_bit;
 610                 *width = g->slwr_width;
 611                 break;
 612         case TEGRA_PINCONF_PARAM_DRIVE_TYPE:
 613                 *bank = g->drvtype_bank;
 614                 *reg = g->drvtype_reg;
 615                 *bit = g->drvtype_bit;
 616                 *width = g->drvtype_width;
 617                 break;
 618         default:
 619                 dev_err(pmx->dev, "Invalid config param %04x\n", param);
 620                 return -ENOTSUPP;
 621         }
 622
 623         if (*reg < 0 || *bit < 0) {
 624                 if (report_err)
 625                         dev_err(pmx->dev,
 626                                 "Config param %04x not supported on group %s\n",
 627                                 param, g->name);
 628                 return -ENOTSUPP;
 629         }
 630
 631         return 0;
 632 }
 633
 634 static int tegra_pinconf_get(struct pinctrl_dev *pctldev,
 635                              unsigned pin, unsigned long *config)
 636 {
 637         dev_err(pctldev->dev, "pin_config_get op not supported\n");
 638         return -ENOTSUPP;
 639 }
 640
 641 static int tegra_pinconf_set(struct pinctrl_dev *pctldev,
 642                              unsigned pin, unsigned long config)
 643 {
 644         dev_err(pctldev->dev, "pin_config_set op not supported\n");
 645         return -ENOTSUPP;
 646 }
 647
 648 static int tegra_pinconf_group_get(struct pinctrl_dev *pctldev,
 649                                    unsigned group, unsigned long *config)
 650 {
 651         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 652         enum tegra_pinconf_param param = TEGRA_PINCONF_UNPACK_PARAM(*config);
 653         u16 arg;
 654         const struct tegra_pingroup *g;
 655         int ret;
 656         s8 bank, bit, width;
 657         s16 reg;
 658         u32 val, mask;
 659         unsigned long flags;
 660
 661         g = &pmx->soc->groups[group];
 662
 663         ret = tegra_pinconf_reg(pmx, g, param, true, &bank, &reg, &bit,
 664                                 &width);
 665         if (ret < 0)
 666                 return ret;
 667
 668         spin_lock_irqsave(&mux_lock, flags);
 669
 670         val = pmx_readl(pmx, bank, reg);
 671
 672         spin_unlock_irqrestore(&mux_lock, flags);
 673
 674         mask = (1 << width) - 1;
 675         arg = (val >> bit) & mask;
 676
 677         *config = TEGRA_PINCONF_PACK(param, arg);
 678
 679         return 0;
 680 }
 681
 682 static int tegra_pinconf_group_set(struct pinctrl_dev *pctldev,
 683                                    unsigned group, unsigned long config)
 684 {
 685         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 686         enum tegra_pinconf_param param = TEGRA_PINCONF_UNPACK_PARAM(config);
 687         u16 arg = TEGRA_PINCONF_UNPACK_ARG(config);
 688         const struct tegra_pingroup *g;
 689         int ret;
 690         s8 bank, bit, width;
 691         s16 reg;
 692         u32 val, mask;
 693         unsigned long flags;
 694
 695         g = &pmx->soc->groups[group];
 696
 697         ret = tegra_pinconf_reg(pmx, g, param, true, &bank, &reg, &bit,
 698                                 &width);
 699         if (ret < 0)
 700                 return ret;
 701
 702         spin_lock_irqsave(&mux_lock, flags);
 703         val = pmx_readl(pmx, bank, reg);
 704
 705         /* LOCK can't be cleared */
 706         if (param == TEGRA_PINCONF_PARAM_LOCK) {
 707                 if ((val & BIT(bit)) && !arg) {
 708                         dev_err(pctldev->dev, "LOCK bit cannot be cleared\n");
 709                         ret = -EINVAL;
 710                         goto end;
 711                 }
 712         }
 713
 714         /* Special-case Boolean values; allow any non-zero as true */
 715         if (width == 1)
 716                 arg = !!arg;
 717
 718         /* Range-check user-supplied value */
 719         mask = (1 << width) - 1;
 720
 721         switch (param) {
 722         case TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH:
 723                 if (arg > mask)
 724                         arg = mask;
 725                 break;
 726         default:
 727                 break;
 728         }
 729
 730         if (arg & ~mask) {
 731                 dev_err(pctldev->dev,
 732                         "group %s config %lx: %x too big for %d bit register\n",
 733                         g->name, config, arg, width);
 734                         ret = -EINVAL;
 735                         goto end;
 736         }
 737
 738         /* Update register */
 739         val &= ~(mask << bit);
 740         val |= arg << bit;
 741         pmx_writel(pmx, val, bank, reg);
 742
 743 end:
 744         spin_unlock_irqrestore(&mux_lock, flags);
 745         return ret;
 746 }
 747
 748 #ifdef CONFIG_DEBUG_FS
 749 static void tegra_pinconf_dbg_show(struct pinctrl_dev *pctldev,
 750                                    struct seq_file *s, unsigned offset)
 751 {
 752 }
 753
 754 static const char *strip_prefix(const char *s)
 755 {
 756         const char *comma = strchr(s, ',');
 757         if (!comma)
 758                 return s;
 759
 760         return comma + 1;
 761 }
 762
 763 static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 764                                          struct seq_file *s, unsigned group)
 765 {
 766         struct tegra_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 767         const struct tegra_pingroup *g;
 768         int i, ret;
 769         s8 bank, bit, width;
 770         s16 reg;
 771         u32 val;
 772
 773         g = &pmx->soc->groups[group];
 774
 775         for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
 776                 ret = tegra_pinconf_reg(pmx, g, cfg_params[i].param, false,
 777                                         &bank, &reg, &bit, &width);
 778                 if (ret < 0)
 779                         continue;
 780
 781                 val = pmx_readl(pmx, bank, reg);
 782                 val >>= bit;
 783                 val &= (1 << width) - 1;
 784
 785                 seq_printf(s, "\n\t%s=%u",
 786                            strip_prefix(cfg_params[i].property), val);
 787         }
 788 }
 789
 790 static void tegra_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,
 791                                           struct seq_file *s,
 792                                           unsigned long config)
 793 {
 794         enum tegra_pinconf_param param = TEGRA_PINCONF_UNPACK_PARAM(config);
 795         u16 arg = TEGRA_PINCONF_UNPACK_ARG(config);
 796         const char *pname = "unknown";
 797         int i;
 798
 799         for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
 800                 if (cfg_params[i].param == param) {
 801                         pname = cfg_params[i].property;
 802                         break;
 803                 }
 804         }
 805
 806         seq_printf(s, "%s=%d", strip_prefix(pname), arg);
 807 }
 808 #endif
 809
 810 static const struct pinconf_ops tegra_pinconf_ops = {
 811         .pin_config_get = tegra_pinconf_get,
 812         .pin_config_set = tegra_pinconf_set,
 813         .pin_config_group_get = tegra_pinconf_group_get,
 814         .pin_config_group_set = tegra_pinconf_group_set,
 815 #ifdef CONFIG_DEBUG_FS
 816         .pin_config_dbg_show = tegra_pinconf_dbg_show,
 817         .pin_config_group_dbg_show = tegra_pinconf_group_dbg_show,
 818         .pin_config_config_dbg_show = tegra_pinconf_config_dbg_show,
 819 #endif
 820 };
 821
 822 static struct pinctrl_desc tegra_pinctrl_desc = {
 823         .pctlops = &tegra_pinctrl_ops,
 824         .pmxops = &tegra_pinmux_ops,
 825         .confops = &tegra_pinconf_ops,
 826         .owner = THIS_MODULE,
 827 };
 828
 829 #ifdef CONFIG_PM_SLEEP
 830
 831 static int pinctrl_suspend(void)
 832 {
 833         int i, j;
 834         u32 *pg_data = pmx->pg_data;
 835         u32 *regs;
 836
 837         if (pmx->soc->suspend) {
 838                 int ret;
 839
 840                 ret = pmx->soc->suspend(pg_data);
 841                 if (!ret)
 842                         pinctrl_configure_user_state(pmx->pctl, "suspend");
 843                 return ret;
 844         }
 845
 846         for (i = 0; i < pmx->nbanks; i++) {
 847                 regs = pmx->regs[i];
 848                 for (j = 0; j < pmx->regs_size[i] / 4; j++)
 849                         *pg_data++ = readl(regs++);
 850         }
 851         return 0;
 852 }
 853
 854 static void pinctrl_resume(void)
 855 {
 856         int i, j;
 857         u32 *pg_data = pmx->pg_data;
 858         u32 *regs;
 859
 860         if (pmx->soc->resume) {
 861                 pmx->soc->resume(pg_data);
 862                 return;
 863         }
 864
 865         for (i = 0; i < pmx->nbanks; i++) {
 866                 regs = pmx->regs[i];
 867                 for (j = 0; j < pmx->regs_size[i] / 4; j++)
 868                         writel(*pg_data++, regs++);
 869         }
 870 }
 871
 872 static struct syscore_ops pinctrl_syscore_ops = {
 873         .suspend = pinctrl_suspend,
 874         .resume = pinctrl_resume,
 875         .save = pinctrl_suspend,
 876         .restore = pinctrl_resume,
 877 };
 878
 879 #endif
 880
 881 static int tegra_pinctrl_get_group(struct tegra_pmx *pmx, const char *name)
 882 {
 883         int i;
 884
 885         for (i = 0; i< pmx->soc->ngroups; ++i) {
 886                 if (!strcmp(pmx->soc->groups[i].name, name))
 887                         return i;
 888         }
 889         return -EINVAL;
 890 }
 891
 892 static int tegra_pinctrl_set_config(struct pinctrl_dev *pctldev,
 893         int pg, int param, int val)
 894 {
 895         unsigned long config;
 896
 897         config = TEGRA_PINCONF_PACK(param, val);
 898         return tegra_pinconf_group_set(pmx->pctl, pg, config);
 899 }
 900
 901 static void tegra_pinctrl_default_soc_init(struct tegra_pmx *pmx)
 902 {
 903         struct tegra_pinctrl_group_config_data *cdata;
 904         int group;
 905         int i;
 906
 907         for (i = 0; i < pmx->soc->nconfig_data; ++i) {
 908                 cdata = &pmx->soc->config_data[i];
 909                 group = tegra_pinctrl_get_group(pmx, cdata->name);
 910                 if (group < 0) {
 911                         dev_warn(pmx->dev, "Group name %s not found\n",
 912                                 cdata->name);
 913                         continue;
 914                 }
 915
 916                 if (pmx->soc->groups[group].hsm_bit >= 0)
 917                         tegra_pinctrl_set_config(pmx->pctl, group,
 918                                 TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE,
 919                                 cdata->high_speed_mode);
 920
 921                 if (pmx->soc->groups[group].schmitt_bit >= 0)
 922                         tegra_pinctrl_set_config(pmx->pctl, group,
 923                                 TEGRA_PINCONF_PARAM_SCHMITT,
 924                                 cdata->schmitt);
 925
 926                 if (pmx->soc->groups[group].lpmd_bit >= 0)
 927                         tegra_pinctrl_set_config(pmx->pctl, group,
 928                                 TEGRA_PINCONF_PARAM_LOW_POWER_MODE,
 929                                 cdata->low_power_mode);
 930
 931                 if (pmx->soc->groups[group].drvdn_bit >= 0)
 932                         tegra_pinctrl_set_config(pmx->pctl, group,
 933                                 TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH,
 934                                 cdata->pull_down_strength);
 935
 936                 if (pmx->soc->groups[group].drvup_bit >= 0)
 937                         tegra_pinctrl_set_config(pmx->pctl, group,
 938                                 TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH,
 939                                 cdata->pull_up_strength);
 940
 941                 if (pmx->soc->groups[group].slwf_bit >= 0)
 942                         tegra_pinctrl_set_config(pmx->pctl, group,
 943                                 TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING,
 944                                 cdata->slew_rate_falling);
 945
 946                 if (pmx->soc->groups[group].slwr_bit >= 0)
 947                         tegra_pinctrl_set_config(pmx->pctl, group,
 948                                 TEGRA_PINCONF_PARAM_SLEW_RATE_RISING,
 949                                 cdata->slew_rate_rising);
 950
 951                 if (pmx->soc->groups[group].drvtype_reg >= 0)
 952                         tegra_pinctrl_set_config(pmx->pctl, group,
 953                                         TEGRA_PINCONF_PARAM_DRIVE_TYPE,
 954                                         cdata->drive_type);
 955         }
 956 }
 957
 958 int tegra_pinctrl_probe(struct platform_device *pdev,
 959                         const struct tegra_pinctrl_soc_data *soc_data)
 960 {
 961         struct resource *res;
 962         int i, pg_data_size = 0;
 963
 964         pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
 965         if (!pmx) {
 966                 dev_err(&pdev->dev, "Can't alloc tegra_pmx\n");
 967                 return -ENOMEM;
 968         }
 969         pmx->dev = &pdev->dev;
 970         pmx->soc = soc_data;
 971
 972         pmx->drive_group_start_index = -1;
 973
 974         for (i = 0; i < pmx->soc->ngroups; ++i) {
 975                 if (pmx->soc->groups[i].drv_reg < 0)
 976                         continue;
 977                 pmx->drive_group_start_index = i;
 978                 break;
 979         }
 980
 981         tegra_pinctrl_desc.name = dev_name(&pdev->dev);
 982         tegra_pinctrl_desc.pins = pmx->soc->pins;
 983         tegra_pinctrl_desc.npins = pmx->soc->npins;
 984
 985         for (i = 0; ; i++) {
 986                 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
 987                 if (!res)
 988                         break;
 989                 pg_data_size += resource_size(res);
 990         }
 991         pmx->nbanks = i;
 992
 993         pmx->regs = devm_kzalloc(&pdev->dev, pmx->nbanks * sizeof(*pmx->regs),
 994                                  GFP_KERNEL);
 995         if (!pmx->regs) {
 996                 dev_err(&pdev->dev, "Can't alloc regs pointer\n");
 997                 return -ENODEV;
 998         }
 999
1000         pmx->reg_base = devm_kzalloc(&pdev->dev, pmx->nbanks *
1001                                         sizeof(*pmx->reg_base), GFP_KERNEL);
1002         if (!pmx->reg_base) {
1003                 dev_err(&pdev->dev, "Can't alloc reg_base pointer\n");
1004                 return -ENOMEM;
1005         }
1006
1007
1008 #ifdef CONFIG_PM_SLEEP
1009         pmx->regs_size = devm_kzalloc(&pdev->dev,
1010                                 pmx->nbanks * sizeof(*(pmx->regs_size)),
1011                                 GFP_KERNEL);
1012         if (!pmx->regs_size) {
1013                 dev_err(&pdev->dev, "Can't alloc regs pointer\n");
1014                 return -ENODEV;
1015         }
1016
1017         pmx->pg_data = devm_kzalloc(&pdev->dev, pg_data_size, GFP_KERNEL);
1018         if (!pmx->pg_data) {
1019                 dev_err(&pdev->dev, "Can't alloc pingroup data pointer\n");
1020                 return -ENODEV;
1021         }
1022 #endif
1023
1024         for (i = 0; i < pmx->nbanks; i++) {
1025                 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1026                 if (!res) {
1027                         dev_err(&pdev->dev, "Missing MEM resource\n");
1028                         return -ENODEV;
1029                 }
1030
1031                 if (!devm_request_mem_region(&pdev->dev, res->start,
1032                                             resource_size(res),
1033                                             dev_name(&pdev->dev))) {
1034                         dev_err(&pdev->dev,
1035                                 "Couldn't request MEM resource %d\n", i);
1036                         return -ENODEV;
1037                 }
1038
1039                 pmx->reg_base[i] = res->start;
1040                 pmx->regs[i] = devm_ioremap(&pdev->dev, res->start,
1041                                             resource_size(res));
1042                 if (!pmx->regs[i]) {
1043                         dev_err(&pdev->dev, "Couldn't ioremap regs %d\n", i);
1044                         return -ENODEV;
1045                 }
1046
1047 #ifdef CONFIG_PM_SLEEP
1048                 pmx->regs_size[i] = resource_size(res);
1049 #endif
1050         }
1051
1052         pmx->pctl = pinctrl_register(&tegra_pinctrl_desc, &pdev->dev, pmx);
1053         if (!pmx->pctl) {
1054                 dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
1055                 return -ENODEV;
1056         }
1057
1058         platform_set_drvdata(pdev, pmx);
1059
1060         tegra_pinctrl_default_soc_init(pmx);
1061
1062         pinctrl_configure_user_state(pmx->pctl, "drive");
1063         pinctrl_configure_user_state(pmx->pctl, "unused");
1064
1065 #ifdef CONFIG_PM_SLEEP
1066         register_syscore_ops(&pinctrl_syscore_ops);
1067 #endif
1068         dev_info(&pdev->dev, "Probed Tegra pinctrl driver\n");
1069
1070         return 0;
1071 }
1072 EXPORT_SYMBOL_GPL(tegra_pinctrl_probe);
1073
1074 int tegra_pinctrl_remove(struct platform_device *pdev)
1075 {
1076         struct tegra_pmx *pmx = platform_get_drvdata(pdev);
1077
1078         pinctrl_unregister(pmx->pctl);
1079
1080         return 0;
1081 }
1082 EXPORT_SYMBOL_GPL(tegra_pinctrl_remove);
1083
1084 u32 tegra_pinctrl_readl(u32 bank, u32 reg)
1085 {
1086         return readl(pmx->regs[bank] + reg);
1087 }
1088 EXPORT_SYMBOL_GPL(tegra_pinctrl_readl);
1089
1090 void tegra_pinctrl_writel(u32 val, u32 bank, u32 reg)
1091 {
1092         writel(val, pmx->regs[bank] + reg);
1093 }
1094 EXPORT_SYMBOL_GPL(tegra_pinctrl_writel);
1095
1096 #ifdef  CONFIG_DEBUG_FS
1097
1098 #include <linux/debugfs.h>
1099 #include <linux/seq_file.h>
1100
1101 static int dbg_reg_pinmux_show(struct seq_file *s, void *unused)
1102 {
1103         int i;
1104         u32 offset;
1105         u32 reg;
1106         int bank;
1107
1108         for (i = 0; i < pmx->soc->ngroups; i++) {
1109                 if (pmx->soc->groups[i].drv_reg < 0) {
1110                         bank = pmx->soc->groups[i].mux_bank;
1111                         offset = pmx->soc->groups[i].mux_reg;
1112                 } else {
1113                         bank = pmx->soc->groups[i].drv_bank;
1114                         offset = pmx->soc->groups[i].drv_reg;
1115                 }
1116                 reg = pmx_readl(pmx, bank, offset);
1117                 seq_printf(s, "Bank: %d Reg: 0x%08x Val: 0x%08x -> %s\n",
1118                                 bank, pmx->reg_base[bank] + offset, reg,
1119                                 pmx->soc->groups[i].name);
1120         }
1121         return 0;
1122 }
1123
1124 static int dbg_reg_pinmux_open(struct inode *inode, struct file *file)
1125 {
1126         return single_open(file, dbg_reg_pinmux_show, &inode->i_private);
1127 }
1128
1129 static const struct file_operations debug_reg_fops = {
1130         .open           = dbg_reg_pinmux_open,
1131         .read           = seq_read,
1132         .llseek         = seq_lseek,
1133         .release        = single_release,
1134 };
1135
1136 static int __init tegra_pinctrl_debuginit(void)
1137 {
1138         if (!pmx)
1139                 return 0;
1140
1141         (void) debugfs_create_file("tegra_pinctrl_reg", S_IRUGO,
1142                                         NULL, NULL, &debug_reg_fops);
1143         return 0;
1144 }
1145 late_initcall(tegra_pinctrl_debuginit);
1146 #endif